ARM: tegra: loki: fix build error due to warning
[linux-3.10.git] / arch / arm / mach-tegra / board-bonaire.c
1 /*
2  * arch/arm/mach-tegra/board-bonaire.c
3  *
4  * Copyright (C) 2013 NVIDIA Corporation. All rights reserved.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful, but WITHOUT
12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
14  * more details.
15  *
16  * You should have received a copy of the GNU General Public License along
17  * with this program; if not, write to the Free Software Foundation, Inc.,
18  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
19  */
20
21 #include <linux/kernel.h>
22 #include <linux/init.h>
23 #include <linux/slab.h>
24 #include <linux/ctype.h>
25 #include <linux/platform_device.h>
26 #include <linux/clk.h>
27 #include <linux/serial_8250.h>
28 #include <linux/i2c.h>
29 #include <linux/spi/spi.h>
30 #include <linux/spi/spi-tegra.h>
31 #include <linux/i2c/panjit_ts.h>
32 #include <linux/dma-mapping.h>
33 #include <linux/delay.h>
34 #include <linux/i2c-tegra.h>
35 #include <linux/gpio.h>
36 #include <linux/gpio_keys.h>
37 #include <linux/input.h>
38 #include <linux/platform_data/tegra_usb.h>
39 #include <linux/platform_data/serial-tegra.h>
40 #include <linux/of_platform.h>
41 #include <linux/clk/tegra.h>
42 #include <linux/tegra-soc.h>
43 #include <linux/usb/tegra_usb_phy.h>
44
45 #include <mach/gpio-tegra.h>
46
47 #include <mach/io_dpd.h>
48
49 #include <mach/irqs.h>
50 #include <mach/pinmux.h>
51 #include <mach/i2s.h>
52 #include <mach/audio.h>
53 #include <mach/nand.h>
54 #include <mach/pci.h>
55
56 #include <asm/mach-types.h>
57 #include <asm/mach/arch.h>
58
59 #include "board.h"
60 #include "board-bonaire.h"
61 #include "clock.h"
62 #include "common.h"
63 #include "devices.h"
64 #include "fuse.h"
65 #include "gpio-names.h"
66 #include "iomap.h"
67
68 #define ENABLE_OTG 0
69 /*#define USB_HOST_ONLY*/
70
71 static struct plat_serial8250_port debug_uart_platform_data[] = {
72         {
73                 .membase        = IO_ADDRESS(TEGRA_UARTA_BASE),
74                 .mapbase        = TEGRA_UARTA_BASE,
75                 .irq            = INT_UARTA,
76                 .flags          = UPF_BOOT_AUTOCONF | UPF_FIXED_TYPE,
77                 .type           = PORT_TEGRA,
78                 .iotype         = UPIO_MEM,
79                 .regshift       = 2,
80                 .uartclk        = 13000000,
81         }, {
82                 .flags          = 0,
83         }
84 };
85
86 static struct platform_device debug_uart = {
87         .name = "serial8250",
88         .id = PLAT8250_DEV_PLATFORM,
89         .dev = {
90                 .platform_data = debug_uart_platform_data,
91         },
92 };
93
94 #ifdef CONFIG_BCM4329_RFKILL
95
96 static struct resource bonaire_bcm4329_rfkill_resources[] = {
97         {
98                 .name   = "bcm4329_nreset_gpio",
99                 .start  = TEGRA_GPIO_PU0,
100                 .end    = TEGRA_GPIO_PU0,
101                 .flags  = IORESOURCE_IO,
102         },
103         {
104                 .name   = "bcm4329_nshutdown_gpio",
105                 .start  = TEGRA_GPIO_PK2,
106                 .end    = TEGRA_GPIO_PK2,
107                 .flags  = IORESOURCE_IO,
108         },
109 };
110
111 static struct platform_device bonaire_bcm4329_rfkill_device = {
112         .name = "bcm4329_rfkill",
113         .id             = -1,
114         .num_resources  = ARRAY_SIZE(bonaire_bcm4329_rfkill_resources),
115         .resource       = bonaire_bcm4329_rfkill_resources,
116 };
117
118 static noinline void __init bonaire_bt_rfkill(void)
119 {
120         /*Add Clock Resource*/
121         clk_add_alias("bcm4329_32k_clk", bonaire_bcm4329_rfkill_device.name, \
122                                 "blink", NULL);
123
124         platform_device_register(&bonaire_bcm4329_rfkill_device);
125
126         return;
127 }
128 #else
129 static inline void bonaire_bt_rfkill(void) { }
130 #endif
131
132 static __initdata struct tegra_clk_init_table bonaire_clk_init_table[] = {
133         /* name         parent          rate            enabled */
134         { "uarta",      "clk_m",        13000000,       true},
135         { "uartb",      "clk_m",        13000000,       true},
136         { "uartc",      "clk_m",        13000000,       true},
137         { "uartd",      "clk_m",        13000000,       true},
138         { "uarte",      "clk_m",        13000000,       true},
139         { "sdmmc1",     "clk_m",        26000000,       false},
140         { "sdmmc3",     "clk_m",        26000000,       false},
141         { "sdmmc4",     "clk_m",        26000000,       false},
142         { "pll_m",      NULL,           0,              true},
143         { "blink",      "clk_32k",      32768,          false},
144         { "pll_p_out4", "pll_p",        24000000,       true },
145         { "pwm",        "clk_32k",      32768,          false},
146         { "blink",      "clk_32k",      32768,          false},
147         { "pll_a",      NULL,           56448000,       true},
148         { "pll_a_out0", NULL,           11289600,       true},
149         { "i2s1",       "pll_a_out0",   11289600,       true},
150         { "i2s2",       "pll_a_out0",   11289600,       true},
151         { "d_audio",    "pll_a_out0",   11289600,       false},
152         { "audio_2x",   "audio",        22579200,       true},
153         { NULL,         NULL,           0,              0},
154 };
155
156 static struct i2c_board_info __initdata bonaire_i2c_bus1_board_info[] = {
157         {
158                 I2C_BOARD_INFO("wm8903", 0x1a),
159         },
160 };
161
162 static struct tegra_i2c_platform_data bonaire_i2c1_platform_data = {
163         .bus_clk_rate   = 100000,
164 };
165
166 #if 0   /* !!!FIXME!!! THESE ARE VENTANA SETTINGS */
167 static const struct tegra_pingroup_config i2c2_ddc = {
168         .pingroup       = TEGRA_PINGROUP_DDC,
169         .func           = TEGRA_MUX_I2C2,
170 };
171
172 static const struct tegra_pingroup_config i2c2_gen2 = {
173         .pingroup       = TEGRA_PINGROUP_PTA,
174         .func           = TEGRA_MUX_I2C2,
175 };
176 #endif
177
178 static struct tegra_i2c_platform_data bonaire_i2c2_platform_data = {
179         .bus_clk_rate   = 100000,
180 #if 0   /* !!!FIXME!!!! TESE ARE VENTANA SETTINGS */
181         .bus_mux        = { &i2c2_ddc, &i2c2_gen2 },
182         .bus_mux_len    = { 1, 1 },
183 #endif
184 };
185
186 static struct tegra_i2c_platform_data bonaire_i2c3_platform_data = {
187         .bus_clk_rate   = 100000,
188 };
189
190 static struct tegra_i2c_platform_data bonaire_i2c4_platform_data = {
191         .bus_clk_rate   = 100000,
192 };
193
194 static struct tegra_i2c_platform_data bonaire_i2c5_platform_data = {
195         .bus_clk_rate   = 100000,
196 };
197
198 static struct tegra_i2c_platform_data bonaire_i2c6_platform_data = {
199         .bus_clk_rate   = 100000,
200 };
201
202 static void bonaire_i2c_init(void)
203 {
204         tegra12_i2c_device1.dev.platform_data = &bonaire_i2c1_platform_data;
205         tegra12_i2c_device2.dev.platform_data = &bonaire_i2c2_platform_data;
206         tegra12_i2c_device3.dev.platform_data = &bonaire_i2c3_platform_data;
207         tegra12_i2c_device4.dev.platform_data = &bonaire_i2c4_platform_data;
208         tegra12_i2c_device5.dev.platform_data = &bonaire_i2c5_platform_data;
209         tegra12_i2c_device6.dev.platform_data = &bonaire_i2c6_platform_data;
210
211         i2c_register_board_info(0, bonaire_i2c_bus1_board_info, 1);
212
213         platform_device_register(&tegra12_i2c_device6);
214         platform_device_register(&tegra12_i2c_device5);
215         platform_device_register(&tegra12_i2c_device4);
216         platform_device_register(&tegra12_i2c_device3);
217         platform_device_register(&tegra12_i2c_device2);
218         platform_device_register(&tegra12_i2c_device1);
219 }
220
221 static void bonaire_apbdma_init(void)
222 {
223         platform_device_register(&tegra_apbdma);
224 }
225
226 static struct platform_device *bonaire_spi_devices[] __initdata = {
227         &tegra11_spi_device4,
228 };
229
230 /* struct spi_clk_parent spi_parent_clk_bonaire[] = { */
231 /*      [0] = {.name = "pll_p"}, */
232 /* #ifndef CONFIG_TEGRA_PLLM_RESTRICTED */
233 /*      [1] = {.name = "pll_m"}, */
234 /*      [2] = {.name = "clk_m"}, */
235 /* #else */
236 /*      [1] = {.name = "clk_m"}, */
237 /* #endif */
238 /* }; */
239
240 /* static struct tegra_spi_platform_data bonaire_spi_pdata = { */
241 /*      .is_dma_based           = true, */
242 /*      .max_dma_buffer         = 16 * 1024, */
243 /*      .is_clkon_always        = false, */
244 /*      .max_rate               = 25000000, */
245 /* }; */
246
247 /* static void __init bonaire_spi_init(void) */
248 /* { */
249 /*      int i; */
250 /*      struct clk *c; */
251 /*      struct board_info board_info, display_board_info; */
252
253 /*      tegra_get_board_info(&board_info); */
254 /*      tegra_get_display_board_info(&display_board_info); */
255
256 /*      for (i = 0; i < ARRAY_SIZE(spi_parent_clk_bonaire); ++i) { */
257 /*              c = tegra_get_clock_by_name(spi_parent_clk_bonaire[i].name); */
258 /*              if (IS_ERR_OR_NULL(c)) { */
259 /*                      pr_err("Not able to get the clock for %s\n", */
260 /*                                      spi_parent_clk_bonaire[i].name); */
261 /*              continue; */
262 /*              } */
263 /*              spi_parent_clk_bonaire[i].parent_clk = c; */
264 /*              spi_parent_clk_bonaire[i].fixed_clk_rate = clk_get_rate(c); */
265 /*      } */
266 /*      bonaire_spi_pdata.parent_clk_list = spi_parent_clk_bonaire; */
267 /*      bonaire_spi_pdata.parent_clk_count = ARRAY_SIZE(spi_parent_clk_bonaire); */
268 /*      tegra11_spi_device4.dev.platform_data = &bonaire_spi_pdata; */
269 /*      platform_add_devices(bonaire_spi_devices, */
270 /*                      ARRAY_SIZE(bonaire_spi_devices)); */
271 /* } */
272
273 #define GPIO_KEY(_id, _gpio, _iswake)           \
274         {                                       \
275                 .code = _id,                    \
276                 .gpio = TEGRA_GPIO_##_gpio,     \
277                 .active_low = 1,                \
278                 .desc = #_id,                   \
279                 .type = EV_KEY,                 \
280                 .wakeup = _iswake,              \
281                 .debounce_interval = 10,        \
282         }
283
284 /* !!!FIXME!!! THESE ARE VENTANA DEFINITIONS */
285 static struct gpio_keys_button bonaire_keys[] = {
286         [0] = GPIO_KEY(KEY_MENU, PQ0, 0),
287         [1] = GPIO_KEY(KEY_HOME, PQ1, 0),
288         [2] = GPIO_KEY(KEY_BACK, PQ2, 0),
289         [3] = GPIO_KEY(KEY_VOLUMEUP, PQ3, 0),
290         [4] = GPIO_KEY(KEY_VOLUMEDOWN, PQ4, 0),
291         [5] = GPIO_KEY(KEY_POWER, PV2, 1),
292 };
293
294 static struct gpio_keys_platform_data bonaire_keys_platform_data = {
295         .buttons        = bonaire_keys,
296         .nbuttons       = ARRAY_SIZE(bonaire_keys),
297 };
298
299 static struct platform_device bonaire_keys_device = {
300         .name   = "gpio-keys",
301         .id     = 0,
302         .dev    = {
303                 .platform_data  = &bonaire_keys_platform_data,
304         },
305 };
306
307 static struct resource tegra_rtc_resources[] = {
308         [0] = {
309                 .start = TEGRA_RTC_BASE,
310                 .end = TEGRA_RTC_BASE + TEGRA_RTC_SIZE - 1,
311                 .flags = IORESOURCE_MEM,
312         },
313         [1] = {
314                 .start = INT_RTC,
315                 .end = INT_RTC,
316                 .flags = IORESOURCE_IRQ,
317         },
318 };
319
320 static struct platform_device tegra_rtc_device = {
321         .name = "tegra_rtc",
322         .id   = -1,
323         .resource = tegra_rtc_resources,
324         .num_resources = ARRAY_SIZE(tegra_rtc_resources),
325 };
326
327 #if defined(CONFIG_MTD_NAND_TEGRA)
328 static struct resource nand_resources[] = {
329         [0] = {
330                 .start = INT_NANDFLASH,
331                 .end   = INT_NANDFLASH,
332                 .flags = IORESOURCE_IRQ
333         },
334         [1] = {
335                 .start = TEGRA_NAND_BASE,
336                 .end = TEGRA_NAND_BASE + TEGRA_NAND_SIZE - 1,
337                 .flags = IORESOURCE_MEM
338         }
339 };
340
341 static struct tegra_nand_chip_parms nand_chip_parms[] = {
342         /* Samsung K5E2G1GACM */
343         [0] = {
344                 .vendor_id   = 0xEC,
345                 .device_id   = 0xAA,
346                 .capacity    = 256,
347                 .timing      = {
348                         .trp            = 21,
349                         .trh            = 15,
350                         .twp            = 21,
351                         .twh            = 15,
352                         .tcs            = 31,
353                         .twhr           = 60,
354                         .tcr_tar_trr    = 20,
355                         .twb            = 100,
356                         .trp_resp       = 30,
357                         .tadl           = 100,
358                 },
359         },
360         /* Hynix H5PS1GB3EFR */
361         [1] = {
362                 .vendor_id   = 0xAD,
363                 .device_id   = 0xDC,
364                 .capacity    = 512,
365                 .timing      = {
366                         .trp            = 12,
367                         .trh            = 10,
368                         .twp            = 12,
369                         .twh            = 10,
370                         .tcs            = 20,
371                         .twhr           = 80,
372                         .tcr_tar_trr    = 20,
373                         .twb            = 100,
374                         .trp_resp       = 20,
375                         .tadl           = 70,
376                 },
377         },
378 };
379
380 struct tegra_nand_platform nand_data = {
381         .max_chips      = 8,
382         .chip_parms     = nand_chip_parms,
383         .nr_chip_parms  = ARRAY_SIZE(nand_chip_parms),
384 };
385
386 struct platform_device tegra_nand_device = {
387         .name          = "tegra_nand",
388         .id            = -1,
389         .resource      = nand_resources,
390         .num_resources = ARRAY_SIZE(nand_resources),
391         .dev            = {
392                 .platform_data = &nand_data,
393         },
394 };
395 #endif
396
397 static struct platform_device *bonaire_devices[] __initdata = {
398 #if ENABLE_OTG
399         &tegra_otg_device,
400 #endif
401         &debug_uart,
402         &tegra_pmu_device,
403         &tegra_rtc_device,
404 #if !defined(USB_HOST_ONLY)
405         &tegra_udc_device,
406 #endif
407 #if defined(CONFIG_CRYPTO_DEV_TEGRA_SE)
408         &tegra12_se_device,
409 #endif
410         &bonaire_keys_device,
411 #if defined(CONFIG_SND_HDA_TEGRA)
412         &tegra_hda_device,
413 #endif
414         &tegra_avp_device,
415 #if defined(CONFIG_MTD_NAND_TEGRA)
416         &tegra_nand_device,
417 #endif
418 };
419
420 static int __init bonaire_touch_init(void)
421 {
422         return 0;
423 }
424
425 static struct tegra_usb_platform_data tegra_udc_pdata = {
426         .port_otg = false,
427         .has_hostpc = true,
428         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
429         .op_mode = TEGRA_USB_OPMODE_DEVICE,
430         .u_data.dev = {
431                 .vbus_pmu_irq = 0,
432                 .vbus_gpio = -1,
433                 .charging_supported = false,
434                 .remote_wakeup_supported = false,
435         },
436         .u_cfg.utmi = {
437                 .hssync_start_delay = 0,
438                 .elastic_limit = 16,
439                 .idle_wait_delay = 17,
440                 .term_range_adj = 6,
441                 .xcvr_setup = 8,
442                 .xcvr_lsfslew = 2,
443                 .xcvr_lsrslew = 2,
444                 .xcvr_setup_offset = 0,
445                 .xcvr_use_fuses = 1,
446         },
447 };
448
449 static struct tegra_usb_platform_data tegra_ehci1_utmi_pdata = {
450         .port_otg = false,
451         .has_hostpc = true,
452         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
453         .op_mode = TEGRA_USB_OPMODE_HOST,
454         .u_data.host = {
455                 .vbus_gpio = -1,
456                 /*.vbus_reg = "vdd_vbus_micro_usb",*/
457                 .hot_plug = true,
458                 .remote_wakeup_supported = true,
459                 .power_off_on_suspend = true,
460         },
461         .u_cfg.utmi = {
462                 .hssync_start_delay = 0,
463                 .elastic_limit = 16,
464                 .idle_wait_delay = 17,
465                 .term_range_adj = 6,
466                 .xcvr_setup = 15,
467                 .xcvr_lsfslew = 2,
468                 .xcvr_lsrslew = 2,
469                 .xcvr_setup_offset = 0,
470                 .xcvr_use_fuses = 1,
471         },
472 };
473
474 static struct tegra_usb_platform_data tegra_ehci2_utmi_pdata = {
475         .port_otg = false,
476         .has_hostpc = true,
477         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
478         .op_mode         = TEGRA_USB_OPMODE_HOST,
479         .u_data.host = {
480                 .vbus_gpio = -1,
481                 .hot_plug = true,
482                 .remote_wakeup_supported = true,
483                 .power_off_on_suspend = true,
484         },
485         .u_cfg.utmi = {
486                 .hssync_start_delay = 0,
487                 .elastic_limit = 16,
488                 .idle_wait_delay = 17,
489                 .term_range_adj = 6,
490                 .xcvr_setup = 15,
491                 .xcvr_lsfslew = 2,
492                 .xcvr_lsrslew = 2,
493                 .xcvr_setup_offset = 0,
494                 .xcvr_use_fuses = 1,
495         },
496 };
497
498 static struct tegra_usb_platform_data tegra_ehci3_utmi_pdata = {
499         .port_otg = false,
500         .has_hostpc = true,
501         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
502         .op_mode         = TEGRA_USB_OPMODE_HOST,
503         .u_data.host = {
504                 .vbus_gpio = -1,
505                 /*.vbus_reg = "vdd_vbus_typea_usb",*/
506                 .hot_plug = true,
507                 .remote_wakeup_supported = true,
508                 .power_off_on_suspend = true,
509         },
510         .u_cfg.utmi = {
511                 .hssync_start_delay = 0,
512                 .elastic_limit = 16,
513                 .idle_wait_delay = 17,
514                 .term_range_adj = 6,
515                 .xcvr_setup = 8,
516                 .xcvr_lsfslew = 2,
517                 .xcvr_lsrslew = 2,
518                 .xcvr_setup_offset = 0,
519                 .xcvr_use_fuses = 1,
520         },
521 };
522
523 static void bonaire_usb_init(void)
524 {
525 #if defined(USB_HOST_ONLY)
526         tegra_ehci1_device.dev.platform_data = &tegra_ehci1_utmi_pdata;
527         platform_device_register(&tegra_ehci1_device);
528 #else
529         /* setup the udc platform data */
530         tegra_udc_device.dev.platform_data = &tegra_udc_pdata;
531
532 #endif
533 }
534
535 static struct platform_device *bonaire_hs_uart_devices[] __initdata = {
536         &tegra_uartd_device, &tegra_uartb_device, &tegra_uartc_device,
537 };
538
539 static struct tegra_serial_platform_data bonaire_uartb_pdata = {
540         .dma_req_selector = 9,
541         .modem_interrupt = false,
542 };
543 static struct tegra_serial_platform_data bonaire_uartc_pdata = {
544         .dma_req_selector = 10,
545         .modem_interrupt = false,
546 };
547 static struct tegra_serial_platform_data bonaire_uartd_pdata = {
548         .dma_req_selector = 19,
549         .modem_interrupt = false,
550 };
551
552 static void __init bonaire_hs_uart_init(void)
553 {
554         tegra_uartb_device.dev.platform_data = &bonaire_uartb_pdata;
555         tegra_uartc_device.dev.platform_data = &bonaire_uartc_pdata;
556         tegra_uartd_device.dev.platform_data = &bonaire_uartd_pdata;
557         platform_add_devices(bonaire_hs_uart_devices,
558                         ARRAY_SIZE(bonaire_hs_uart_devices));
559 }
560
561 static struct tegra_pci_platform_data bonaire_pcie_platform_data = {
562         .port_status[0] = 1,
563         .port_status[1] = 1,
564         .use_dock_detect        = 1,
565         .gpio                   = TEGRA_GPIO_PO1,
566 };
567
568 static void bonaire_pcie_init(void)
569 {
570         tegra_pci_device.dev.platform_data = &bonaire_pcie_platform_data;
571         platform_device_register(&tegra_pci_device);
572 }
573
574 static void __init tegra_bonaire_init(void)
575 {
576         tegra_clk_init_from_table(bonaire_clk_init_table);
577         tegra_enable_pinmux();
578         bonaire_pinmux_init();
579         tegra_soc_device_init("bonaire");
580         bonaire_apbdma_init();
581
582         if (tegra_platform_is_fpga() && tegra_platform_is_qt())
583                 debug_uart_platform_data[0].uartclk =
584                                                 tegra_clk_measure_input_freq();
585
586         platform_add_devices(bonaire_devices, ARRAY_SIZE(bonaire_devices));
587
588         if (tegra_cpu_is_asim())
589                 bonaire_power_off_init();
590         tegra_io_dpd_init();
591         bonaire_hs_uart_init();
592         bonaire_sdhci_init();
593         bonaire_i2c_init();
594         /* bonaire_spi_init(); */
595         bonaire_regulator_init();
596         bonaire_suspend_init();
597         bonaire_touch_init();
598         bonaire_usb_init();
599         bonaire_panel_init();
600         bonaire_sensors_init();
601         bonaire_bt_rfkill();
602         bonaire_pcie_init();
603         tegra_register_fuse();
604 }
605
606 #ifdef CONFIG_USE_OF
607 struct of_dev_auxdata tegra_bonaire_auxdata_lookup[] __initdata = {
608         OF_DEV_AUXDATA("nvidia,tegra124-host1x", TEGRA_HOST1X_BASE, "host1x",
609                 NULL),
610         OF_DEV_AUXDATA("nvidia,tegra124-gk20a", 0x538F0000, "gk20a", NULL),
611         OF_DEV_AUXDATA("nvidia,tegra124-vic", TEGRA_VIC_BASE, "vic03", NULL),
612         OF_DEV_AUXDATA("nvidia,tegra124-msenc", TEGRA_MSENC_BASE, "msenc",
613                 NULL),
614         OF_DEV_AUXDATA("nvidia,tegra124-vi", TEGRA_VI_BASE, "vi", NULL),
615         OF_DEV_AUXDATA("nvidia,tegra124-isp", TEGRA_ISP_BASE, "isp", NULL),
616         OF_DEV_AUXDATA("nvidia,tegra124-tsec", TEGRA_TSEC_BASE, "tsec", NULL),
617         {}
618 };
619 #endif
620
621 static void __init tegra_bonaire_dt_init(void)
622 {
623         of_platform_populate(NULL, of_default_bus_match_table,
624                 tegra_bonaire_auxdata_lookup, &platform_bus);
625
626         tegra_bonaire_init();
627 }
628
629 static void __init tegra_bonaire_reserve(void)
630 {
631 #if defined(CONFIG_NVMAP_CONVERT_CARVEOUT_TO_IOVMM)
632         tegra_reserve(0, SZ_16M + SZ_2M, SZ_16M);
633 #else
634         if (tegra_cpu_is_asim() && tegra_split_mem_active())
635                 tegra_reserve(0, 0, 0);
636         else
637                 tegra_reserve(SZ_128M, SZ_16M + SZ_2M, SZ_16M);
638 #endif
639 }
640
641 static const char * const bonaire_dt_board_compat[] = {
642         "nvidia,bonaire",
643         NULL
644 };
645
646 MACHINE_START(BONAIRE, "bonaire")
647         .atag_offset    = 0x80000100,
648         .map_io         = tegra_map_common_io,
649         .reserve        = tegra_bonaire_reserve,
650         .init_early     = tegra12x_init_early,
651         .init_irq       = tegra_dt_init_irq,
652         .init_machine   = tegra_bonaire_dt_init,
653         .init_time      = tegra_init_timer,
654         .dt_compat      = bonaire_dt_board_compat,
655 MACHINE_END