bb7553da10f8b516e52f49ca768146104fee72c8
[linux-3.10.git] / arch / arm / mach-tegra / board-bonaire.c
1 /*
2  * arch/arm/mach-tegra/board-bonaire.c
3  *
4  * Copyright (c) 2013, NVIDIA Corporation.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful, but WITHOUT
12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
14  * more details.
15  *
16  * You should have received a copy of the GNU General Public License along
17  * with this program; if not, write to the Free Software Foundation, Inc.,
18  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
19  */
20
21 #include <linux/kernel.h>
22 #include <linux/init.h>
23 #include <linux/slab.h>
24 #include <linux/ctype.h>
25 #include <linux/platform_device.h>
26 #include <linux/clk.h>
27 #include <linux/serial_8250.h>
28 #include <linux/i2c.h>
29 #include <linux/spi/spi.h>
30 #include <linux/spi-tegra.h>
31 #include <linux/i2c/panjit_ts.h>
32 #include <linux/dma-mapping.h>
33 #include <linux/delay.h>
34 #include <linux/i2c-tegra.h>
35 #include <linux/gpio.h>
36 #include <linux/gpio_keys.h>
37 #include <linux/input.h>
38 #include <linux/platform_data/tegra_usb.h>
39 #include <linux/tegra_uart.h>
40 #if defined(CONFIG_SMSC911X)
41 #include <linux/smsc911x.h>
42 #endif
43 #include <mach/clk.h>
44 #include <mach/gpio-tegra.h>
45 #include <mach/iomap.h>
46
47 #include <mach/io_dpd.h>
48
49 #include <mach/irqs.h>
50 #include <mach/pinmux.h>
51 #include <mach/iomap.h>
52 #include <mach/io.h>
53 #include <mach/i2s.h>
54 #include <mach/audio.h>
55 #include <mach/usb_phy.h>
56 #include <mach/nand.h>
57 #include <mach/hardware.h>
58
59 #include <asm/hardware/gic.h>
60 #include <asm/mach-types.h>
61 #include <asm/mach/arch.h>
62
63 #include "board.h"
64 #include "board-bonaire.h"
65 #include "clock.h"
66 #include "common.h"
67 #include "devices.h"
68 #include "fuse.h"
69 #include "gpio-names.h"
70
71 #define ENABLE_OTG 0
72 /*#define USB_HOST_ONLY*/
73
74 static struct plat_serial8250_port debug_uart_platform_data[] = {
75         {
76                 .membase        = IO_ADDRESS(TEGRA_UARTA_BASE),
77                 .mapbase        = TEGRA_UARTA_BASE,
78                 .irq            = INT_UARTA,
79                 .flags          = UPF_BOOT_AUTOCONF | UPF_FIXED_TYPE,
80                 .type           = PORT_TEGRA,
81                 .iotype         = UPIO_MEM,
82                 .regshift       = 2,
83                 .uartclk        = 13000000,
84         }, {
85                 .flags          = 0,
86         }
87 };
88
89 static struct platform_device debug_uart = {
90         .name = "serial8250",
91         .id = PLAT8250_DEV_PLATFORM,
92         .dev = {
93                 .platform_data = debug_uart_platform_data,
94         },
95 };
96
97 #ifdef CONFIG_BCM4329_RFKILL
98
99 static struct resource bonaire_bcm4329_rfkill_resources[] = {
100         {
101                 .name   = "bcm4329_nreset_gpio",
102                 .start  = TEGRA_GPIO_PU0,
103                 .end    = TEGRA_GPIO_PU0,
104                 .flags  = IORESOURCE_IO,
105         },
106         {
107                 .name   = "bcm4329_nshutdown_gpio",
108                 .start  = TEGRA_GPIO_PK2,
109                 .end    = TEGRA_GPIO_PK2,
110                 .flags  = IORESOURCE_IO,
111         },
112 };
113
114 static struct platform_device bonaire_bcm4329_rfkill_device = {
115         .name = "bcm4329_rfkill",
116         .id             = -1,
117         .num_resources  = ARRAY_SIZE(bonaire_bcm4329_rfkill_resources),
118         .resource       = bonaire_bcm4329_rfkill_resources,
119 };
120
121 static noinline void __init bonaire_bt_rfkill(void)
122 {
123         /*Add Clock Resource*/
124         clk_add_alias("bcm4329_32k_clk", bonaire_bcm4329_rfkill_device.name, \
125                                 "blink", NULL);
126
127         platform_device_register(&bonaire_bcm4329_rfkill_device);
128
129         return;
130 }
131 #else
132 static inline void bonaire_bt_rfkill(void) { }
133 #endif
134
135 static __initdata struct tegra_clk_init_table bonaire_clk_init_table[] = {
136         /* name         parent          rate            enabled */
137         { "uarta",      "clk_m",        13000000,       true},
138         { "uartb",      "clk_m",        13000000,       true},
139         { "uartc",      "clk_m",        13000000,       true},
140         { "uartd",      "clk_m",        13000000,       true},
141         { "uarte",      "clk_m",        13000000,       true},
142         { "sdmmc1",     "clk_m",        26000000,       false},
143         { "sdmmc3",     "clk_m",        26000000,       false},
144         { "sdmmc4",     "clk_m",        26000000,       false},
145         { "pll_m",      NULL,           0,              true},
146         { "blink",      "clk_32k",      32768,          false},
147         { "pll_p_out4", "pll_p",        24000000,       true },
148         { "pwm",        "clk_32k",      32768,          false},
149         { "blink",      "clk_32k",      32768,          false},
150         { "pll_a",      NULL,           56448000,       true},
151         { "pll_a_out0", NULL,           11289600,       true},
152         { "i2s1",       "pll_a_out0",   11289600,       true},
153         { "i2s2",       "pll_a_out0",   11289600,       true},
154         { "d_audio",    "pll_a_out0",   11289600,       false},
155         { "audio_2x",   "audio",        22579200,       true},
156         { NULL,         NULL,           0,              0},
157 };
158
159 static struct i2c_board_info __initdata bonaire_i2c_bus1_board_info[] = {
160         {
161                 I2C_BOARD_INFO("wm8903", 0x1a),
162         },
163 };
164
165 static struct tegra_i2c_platform_data bonaire_i2c1_platform_data = {
166         .bus_clk_rate   = 100000,
167 };
168
169 #if 0   /* !!!FIXME!!! THESE ARE VENTANA SETTINGS */
170 static const struct tegra_pingroup_config i2c2_ddc = {
171         .pingroup       = TEGRA_PINGROUP_DDC,
172         .func           = TEGRA_MUX_I2C2,
173 };
174
175 static const struct tegra_pingroup_config i2c2_gen2 = {
176         .pingroup       = TEGRA_PINGROUP_PTA,
177         .func           = TEGRA_MUX_I2C2,
178 };
179 #endif
180
181 static struct tegra_i2c_platform_data bonaire_i2c2_platform_data = {
182         .bus_clk_rate   = 100000,
183 #if 0   /* !!!FIXME!!!! TESE ARE VENTANA SETTINGS */
184         .bus_mux        = { &i2c2_ddc, &i2c2_gen2 },
185         .bus_mux_len    = { 1, 1 },
186 #endif
187 };
188
189 static struct tegra_i2c_platform_data bonaire_i2c3_platform_data = {
190         .bus_clk_rate   = 100000,
191 };
192
193 static struct tegra_i2c_platform_data bonaire_i2c4_platform_data = {
194         .bus_clk_rate   = 100000,
195 };
196
197 static struct tegra_i2c_platform_data bonaire_i2c5_platform_data = {
198         .bus_clk_rate   = 100000,
199 };
200
201 static struct tegra_i2c_platform_data bonaire_i2c6_platform_data = {
202         .bus_clk_rate   = 100000,
203 };
204
205 static void bonaire_i2c_init(void)
206 {
207         tegra14_i2c_device1.dev.platform_data = &bonaire_i2c1_platform_data;
208         tegra14_i2c_device2.dev.platform_data = &bonaire_i2c2_platform_data;
209         tegra14_i2c_device3.dev.platform_data = &bonaire_i2c3_platform_data;
210         tegra14_i2c_device4.dev.platform_data = &bonaire_i2c4_platform_data;
211         tegra14_i2c_device5.dev.platform_data = &bonaire_i2c5_platform_data;
212         tegra14_i2c_device6.dev.platform_data = &bonaire_i2c6_platform_data;
213
214         i2c_register_board_info(0, bonaire_i2c_bus1_board_info, 1);
215
216         platform_device_register(&tegra14_i2c_device6);
217         platform_device_register(&tegra14_i2c_device5);
218         platform_device_register(&tegra14_i2c_device4);
219         platform_device_register(&tegra14_i2c_device3);
220         platform_device_register(&tegra14_i2c_device2);
221         platform_device_register(&tegra14_i2c_device1);
222 }
223
224 static struct platform_device *bonaire_spi_devices[] __initdata = {
225         &tegra11_spi_device4,
226 };
227
228 struct spi_clk_parent spi_parent_clk_bonaire[] = {
229         [0] = {.name = "pll_p"},
230 #ifndef CONFIG_TEGRA_PLLM_RESTRICTED
231         [1] = {.name = "pll_m"},
232         [2] = {.name = "clk_m"},
233 #else
234         [1] = {.name = "clk_m"},
235 #endif
236 };
237
238 static struct tegra_spi_platform_data bonaire_spi_pdata = {
239         .is_dma_based           = true,
240         .max_dma_buffer         = 16 * 1024,
241         .is_clkon_always        = false,
242         .max_rate               = 25000000,
243 };
244
245 static void __init bonaire_spi_init(void)
246 {
247         int i;
248         struct clk *c;
249         struct board_info board_info, display_board_info;
250
251         tegra_get_board_info(&board_info);
252         tegra_get_display_board_info(&display_board_info);
253
254         for (i = 0; i < ARRAY_SIZE(spi_parent_clk_bonaire); ++i) {
255                 c = tegra_get_clock_by_name(spi_parent_clk_bonaire[i].name);
256                 if (IS_ERR_OR_NULL(c)) {
257                         pr_err("Not able to get the clock for %s\n",
258                                         spi_parent_clk_bonaire[i].name);
259                 continue;
260                 }
261                 spi_parent_clk_bonaire[i].parent_clk = c;
262                 spi_parent_clk_bonaire[i].fixed_clk_rate = clk_get_rate(c);
263         }
264         bonaire_spi_pdata.parent_clk_list = spi_parent_clk_bonaire;
265         bonaire_spi_pdata.parent_clk_count = ARRAY_SIZE(spi_parent_clk_bonaire);
266         tegra11_spi_device4.dev.platform_data = &bonaire_spi_pdata;
267         platform_add_devices(bonaire_spi_devices,
268                         ARRAY_SIZE(bonaire_spi_devices));
269 }
270
271 #define GPIO_KEY(_id, _gpio, _iswake)           \
272         {                                       \
273                 .code = _id,                    \
274                 .gpio = TEGRA_GPIO_##_gpio,     \
275                 .active_low = 1,                \
276                 .desc = #_id,                   \
277                 .type = EV_KEY,                 \
278                 .wakeup = _iswake,              \
279                 .debounce_interval = 10,        \
280         }
281
282 /* !!!FIXME!!! THESE ARE VENTANA DEFINITIONS */
283 static struct gpio_keys_button bonaire_keys[] = {
284         [0] = GPIO_KEY(KEY_MENU, PQ0, 0),
285         [1] = GPIO_KEY(KEY_HOME, PQ1, 0),
286         [2] = GPIO_KEY(KEY_BACK, PQ2, 0),
287         [3] = GPIO_KEY(KEY_VOLUMEUP, PQ3, 0),
288         [4] = GPIO_KEY(KEY_VOLUMEDOWN, PQ4, 0),
289         [5] = GPIO_KEY(KEY_POWER, PV2, 1),
290 };
291
292 static struct gpio_keys_platform_data bonaire_keys_platform_data = {
293         .buttons        = bonaire_keys,
294         .nbuttons       = ARRAY_SIZE(bonaire_keys),
295 };
296
297 static struct platform_device bonaire_keys_device = {
298         .name   = "gpio-keys",
299         .id     = 0,
300         .dev    = {
301                 .platform_data  = &bonaire_keys_platform_data,
302         },
303 };
304
305 static struct resource tegra_rtc_resources[] = {
306         [0] = {
307                 .start = TEGRA_RTC_BASE,
308                 .end = TEGRA_RTC_BASE + TEGRA_RTC_SIZE - 1,
309                 .flags = IORESOURCE_MEM,
310         },
311         [1] = {
312                 .start = INT_RTC,
313                 .end = INT_RTC,
314                 .flags = IORESOURCE_IRQ,
315         },
316 };
317
318 static struct platform_device tegra_rtc_device = {
319         .name = "tegra_rtc",
320         .id   = -1,
321         .resource = tegra_rtc_resources,
322         .num_resources = ARRAY_SIZE(tegra_rtc_resources),
323 };
324
325 #if defined(CONFIG_MTD_NAND_TEGRA)
326 static struct resource nand_resources[] = {
327         [0] = {
328                 .start = INT_NANDFLASH,
329                 .end   = INT_NANDFLASH,
330                 .flags = IORESOURCE_IRQ
331         },
332         [1] = {
333                 .start = TEGRA_NAND_BASE,
334                 .end = TEGRA_NAND_BASE + TEGRA_NAND_SIZE - 1,
335                 .flags = IORESOURCE_MEM
336         }
337 };
338
339 static struct tegra_nand_chip_parms nand_chip_parms[] = {
340         /* Samsung K5E2G1GACM */
341         [0] = {
342                 .vendor_id   = 0xEC,
343                 .device_id   = 0xAA,
344                 .capacity    = 256,
345                 .timing      = {
346                         .trp            = 21,
347                         .trh            = 15,
348                         .twp            = 21,
349                         .twh            = 15,
350                         .tcs            = 31,
351                         .twhr           = 60,
352                         .tcr_tar_trr    = 20,
353                         .twb            = 100,
354                         .trp_resp       = 30,
355                         .tadl           = 100,
356                 },
357         },
358         /* Hynix H5PS1GB3EFR */
359         [1] = {
360                 .vendor_id   = 0xAD,
361                 .device_id   = 0xDC,
362                 .capacity    = 512,
363                 .timing      = {
364                         .trp            = 12,
365                         .trh            = 10,
366                         .twp            = 12,
367                         .twh            = 10,
368                         .tcs            = 20,
369                         .twhr           = 80,
370                         .tcr_tar_trr    = 20,
371                         .twb            = 100,
372                         .trp_resp       = 20,
373                         .tadl           = 70,
374                 },
375         },
376 };
377
378 struct tegra_nand_platform nand_data = {
379         .max_chips      = 8,
380         .chip_parms     = nand_chip_parms,
381         .nr_chip_parms  = ARRAY_SIZE(nand_chip_parms),
382 };
383
384 struct platform_device tegra_nand_device = {
385         .name          = "tegra_nand",
386         .id            = -1,
387         .resource      = nand_resources,
388         .num_resources = ARRAY_SIZE(nand_resources),
389         .dev            = {
390                 .platform_data = &nand_data,
391         },
392 };
393 #endif
394
395 #if defined(CONFIG_TEGRA_SIMULATION_PLATFORM) && defined(CONFIG_SMC91X)
396 static struct resource tegra_sim_smc91x_resources[] = {
397         [0] = {
398                 .start          = TEGRA_SIM_ETH_BASE,
399                 .end            = TEGRA_SIM_ETH_BASE + TEGRA_SIM_ETH_SIZE - 1,
400                 .flags          = IORESOURCE_MEM,
401         },
402         [1] = {
403                 .start          = IRQ_ETH,
404                 .end            = IRQ_ETH,
405                 .flags          = IORESOURCE_IRQ,
406         },
407 };
408
409 static struct platform_device tegra_sim_smc91x_device = {
410         .name           = "smc91x",
411         .id             = 0,
412         .num_resources  = ARRAY_SIZE(tegra_sim_smc91x_resources),
413         .resource       = tegra_sim_smc91x_resources,
414 };
415 #endif
416
417 #if defined(CONFIG_SMSC911X)
418 static struct resource tegra_smsc911x_resources[] = {
419         [0] = {
420                 .start          = 0x4E000000,
421                 .end            = 0x4E000000 + SZ_64K - 1,
422                 .flags          = IORESOURCE_MEM,
423         },
424         [1] = {
425                 .start          = IRQ_ETH,
426                 .end            = IRQ_ETH,
427                 .flags          = IORESOURCE_IRQ,
428         },
429 };
430
431 static struct smsc911x_platform_config tegra_smsc911x_config = {
432         .flags          = SMSC911X_USE_32BIT,
433         .irq_polarity   = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH,
434         .irq_type       = SMSC911X_IRQ_TYPE_PUSH_PULL,
435         .phy_interface  = PHY_INTERFACE_MODE_MII,
436 };
437
438 static struct platform_device tegra_smsc911x_device = {
439         .name              = "smsc911x",
440         .id                = 0,
441         .resource          = tegra_smsc911x_resources,
442         .num_resources     = ARRAY_SIZE(tegra_smsc911x_resources),
443         .dev.platform_data = &tegra_smsc911x_config,
444 };
445 #endif
446
447 static struct platform_device *bonaire_devices[] __initdata = {
448 #if ENABLE_OTG
449         &tegra_otg_device,
450 #endif
451         &debug_uart,
452         &tegra_pmu_device,
453         &tegra_rtc_device,
454 #if !defined(USB_HOST_ONLY)
455         &tegra_udc_device,
456 #endif
457 #if defined(CONFIG_CRYPTO_DEV_TEGRA_SE)
458         &tegra11_se_device,
459 #endif
460 #if defined(CONFIG_TEGRA_IOVMM_SMMU)
461         &tegra_smmu_device,
462 #endif
463         &bonaire_keys_device,
464 #if defined(CONFIG_SND_HDA_TEGRA)
465         &tegra_hda_device,
466 #endif
467         &tegra_avp_device,
468 #if defined(CONFIG_MTD_NAND_TEGRA)
469         &tegra_nand_device,
470 #endif
471 #if defined(CONFIG_TEGRA_SIMULATION_PLATFORM) && defined(CONFIG_SMC91X)
472         &tegra_sim_smc91x_device,
473 #endif
474 #if defined(CONFIG_SMSC911X)
475         &tegra_smsc911x_device,
476 #endif
477 };
478
479 static int __init bonaire_touch_init(void)
480 {
481         return 0;
482 }
483
484 static struct tegra_usb_platform_data tegra_udc_pdata = {
485         .port_otg = false,
486         .has_hostpc = true,
487         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
488         .op_mode = TEGRA_USB_OPMODE_DEVICE,
489         .u_data.dev = {
490                 .vbus_pmu_irq = 0,
491                 .vbus_gpio = -1,
492                 .charging_supported = false,
493                 .remote_wakeup_supported = false,
494         },
495         .u_cfg.utmi = {
496                 .hssync_start_delay = 0,
497                 .elastic_limit = 16,
498                 .idle_wait_delay = 17,
499                 .term_range_adj = 6,
500                 .xcvr_setup = 8,
501                 .xcvr_lsfslew = 2,
502                 .xcvr_lsrslew = 2,
503                 .xcvr_setup_offset = 0,
504                 .xcvr_use_fuses = 1,
505         },
506 };
507
508 static struct tegra_usb_platform_data tegra_ehci1_utmi_pdata = {
509         .port_otg = false,
510         .has_hostpc = true,
511         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
512         .op_mode = TEGRA_USB_OPMODE_HOST,
513         .u_data.host = {
514                 .vbus_gpio = -1,
515                 /*.vbus_reg = "vdd_vbus_micro_usb",*/
516                 .hot_plug = true,
517                 .remote_wakeup_supported = true,
518                 .power_off_on_suspend = true,
519         },
520         .u_cfg.utmi = {
521                 .hssync_start_delay = 0,
522                 .elastic_limit = 16,
523                 .idle_wait_delay = 17,
524                 .term_range_adj = 6,
525                 .xcvr_setup = 15,
526                 .xcvr_lsfslew = 2,
527                 .xcvr_lsrslew = 2,
528                 .xcvr_setup_offset = 0,
529                 .xcvr_use_fuses = 1,
530         },
531 };
532
533 static struct tegra_usb_platform_data tegra_ehci2_utmi_pdata = {
534         .port_otg = false,
535         .has_hostpc = true,
536         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
537         .op_mode         = TEGRA_USB_OPMODE_HOST,
538         .u_data.host = {
539                 .vbus_gpio = -1,
540                 .hot_plug = true,
541                 .remote_wakeup_supported = true,
542                 .power_off_on_suspend = true,
543         },
544         .u_cfg.utmi = {
545                 .hssync_start_delay = 0,
546                 .elastic_limit = 16,
547                 .idle_wait_delay = 17,
548                 .term_range_adj = 6,
549                 .xcvr_setup = 15,
550                 .xcvr_lsfslew = 2,
551                 .xcvr_lsrslew = 2,
552                 .xcvr_setup_offset = 0,
553                 .xcvr_use_fuses = 1,
554         },
555 };
556
557 static struct tegra_usb_platform_data tegra_ehci3_utmi_pdata = {
558         .port_otg = false,
559         .has_hostpc = true,
560         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
561         .op_mode         = TEGRA_USB_OPMODE_HOST,
562         .u_data.host = {
563                 .vbus_gpio = -1,
564                 /*.vbus_reg = "vdd_vbus_typea_usb",*/
565                 .hot_plug = true,
566                 .remote_wakeup_supported = true,
567                 .power_off_on_suspend = true,
568         },
569         .u_cfg.utmi = {
570                 .hssync_start_delay = 0,
571                 .elastic_limit = 16,
572                 .idle_wait_delay = 17,
573                 .term_range_adj = 6,
574                 .xcvr_setup = 8,
575                 .xcvr_lsfslew = 2,
576                 .xcvr_lsrslew = 2,
577                 .xcvr_setup_offset = 0,
578                 .xcvr_use_fuses = 1,
579         },
580 };
581
582 static void bonaire_usb_init(void)
583 {
584 #if defined(USB_HOST_ONLY)
585         tegra_ehci1_device.dev.platform_data = &tegra_ehci1_utmi_pdata;
586         platform_device_register(&tegra_ehci1_device);
587 #else
588         /* setup the udc platform data */
589         tegra_udc_device.dev.platform_data = &tegra_udc_pdata;
590
591 #endif
592 }
593 static struct platform_device *bonaire_hs_uart_devices[] __initdata = {
594         &tegra_uartd_device, &tegra_uartb_device, &tegra_uartc_device,
595 };
596
597 static struct uart_clk_parent uart_parent_clk[] = {
598         [0] = {.name = "clk_m"},
599 };
600
601 static struct tegra_uart_platform_data bonaire_uart_pdata;
602 static struct tegra_uart_platform_data bonaire_loopback_uart_pdata;
603
604 static void __init bonaire_hs_uart_init(void)
605 {
606         struct clk *c;
607         int i;
608
609         for (i = 0; i < ARRAY_SIZE(uart_parent_clk); ++i) {
610                 c = tegra_get_clock_by_name(uart_parent_clk[i].name);
611                 if (IS_ERR_OR_NULL(c)) {
612                         pr_err("Not able to get the clock for %s\n",
613                                         uart_parent_clk[i].name);
614                         continue;
615                 }
616                 uart_parent_clk[i].parent_clk = c;
617                 uart_parent_clk[i].fixed_clk_rate = clk_get_rate(c);
618         }
619         bonaire_uart_pdata.parent_clk_list = uart_parent_clk;
620         bonaire_loopback_uart_pdata.parent_clk_list = uart_parent_clk;
621         bonaire_uart_pdata.parent_clk_count = ARRAY_SIZE(uart_parent_clk);
622         bonaire_loopback_uart_pdata.parent_clk_count =
623                 ARRAY_SIZE(uart_parent_clk);
624         bonaire_loopback_uart_pdata.is_loopback = true;
625         tegra_uartb_device.dev.platform_data = &bonaire_uart_pdata;
626         tegra_uartc_device.dev.platform_data = &bonaire_uart_pdata;
627         tegra_uartd_device.dev.platform_data = &bonaire_uart_pdata;
628         platform_add_devices(bonaire_hs_uart_devices,
629                         ARRAY_SIZE(bonaire_hs_uart_devices));
630 }
631
632 static void __init tegra_bonaire_init(void)
633 {
634         tegra_clk_init_from_table(bonaire_clk_init_table);
635         tegra_enable_pinmux();
636         bonaire_pinmux_init();
637         tegra_soc_device_init("bonaire");
638
639 #ifdef CONFIG_TEGRA_FPGA_PLATFORM
640         if (tegra_platform_is_qt())
641                 debug_uart_platform_data[0].uartclk =
642                                                 tegra_clk_measure_input_freq();
643 #endif
644
645         platform_add_devices(bonaire_devices, ARRAY_SIZE(bonaire_devices));
646
647 #ifdef CONFIG_TEGRA_SIMULATION_PLATFORM
648         bonaire_power_off_init();
649 #endif
650         tegra_io_dpd_init();
651         bonaire_hs_uart_init();
652         bonaire_sdhci_init();
653         bonaire_i2c_init();
654         bonaire_spi_init();
655         bonaire_regulator_init();
656         bonaire_suspend_init();
657         bonaire_touch_init();
658         bonaire_usb_init();
659         bonaire_panel_init();
660         bonaire_bt_rfkill();
661 }
662
663 static void __init tegra_bonaire_reserve(void)
664 {
665 #if defined(CONFIG_NVMAP_CONVERT_CARVEOUT_TO_IOVMM)
666         tegra_reserve(0, SZ_4M, 0);
667 #else
668 #if defined(CONFIG_TEGRA_SIMULATION_SPLIT_MEM)
669         if (tegra_split_mem_active())
670                 tegra_reserve(0, 0, 0);
671         else
672 #endif
673                 tegra_reserve(SZ_128M, SZ_4M, 0);
674 #endif
675 }
676
677
678 MACHINE_START(BONAIRE, BONAIRE_BOARD_NAME)
679         .atag_offset    = 0x80000100,
680         .map_io         = tegra_map_common_io,
681         .reserve        = tegra_bonaire_reserve,
682         .init_early     = tegra12x_init_early,
683         .init_irq       = tegra_dt_init_irq,
684         .handle_irq     = gic_handle_irq,
685         .init_machine   = tegra_bonaire_init,
686         .timer          = &tegra_sys_timer,
687 MACHINE_END