875acfd30ddd1670006f3a7454216fa97b593052
[linux-3.10.git] / arch / arm / mach-tegra / board-bonaire.c
1 /*
2  * arch/arm/mach-tegra/board-bonaire.c
3  *
4  * Copyright (c) 2011, NVIDIA Corporation.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful, but WITHOUT
12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
14  * more details.
15  *
16  * You should have received a copy of the GNU General Public License along
17  * with this program; if not, write to the Free Software Foundation, Inc.,
18  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
19  */
20
21 #include <linux/kernel.h>
22 #include <linux/init.h>
23 #include <linux/slab.h>
24 #include <linux/ctype.h>
25 #include <linux/platform_device.h>
26 #include <linux/clk.h>
27 #include <linux/serial_8250.h>
28 #include <linux/i2c.h>
29 #include <linux/i2c/panjit_ts.h>
30 #include <linux/dma-mapping.h>
31 #include <linux/delay.h>
32 #include <linux/i2c-tegra.h>
33 #include <linux/gpio.h>
34 #include <linux/gpio_keys.h>
35 #include <linux/input.h>
36 #include <linux/platform_data/tegra_usb.h>
37
38 #include <mach/clk.h>
39 #include <mach/gpio-tegra.h>
40 #include <mach/iomap.h>
41
42 #include <mach/io_dpd.h>
43
44 #include <mach/irqs.h>
45 #include <mach/pinmux.h>
46 #include <mach/iomap.h>
47 #include <mach/io.h>
48 #include <mach/i2s.h>
49 #include <mach/audio.h>
50 #include <mach/usb_phy.h>
51 #include <mach/nand.h>
52 #include <mach/hardware.h>
53
54 #include <asm/hardware/gic.h>
55 #include <asm/mach-types.h>
56 #include <asm/mach/arch.h>
57
58 #include "board.h"
59 #include "board-bonaire.h"
60 #include "clock.h"
61 #include "common.h"
62 #include "devices.h"
63 #include "fuse.h"
64 #include "gpio-names.h"
65
66 #define ENABLE_OTG 0
67
68 static struct plat_serial8250_port debug_uart_platform_data[] = {
69         {
70                 .membase        = IO_ADDRESS(TEGRA_UARTA_BASE),
71                 .mapbase        = TEGRA_UARTA_BASE,
72                 .irq            = INT_UARTA,
73                 .flags          = UPF_BOOT_AUTOCONF | UPF_FIXED_TYPE,
74                 .type           = PORT_TEGRA,
75                 .iotype         = UPIO_MEM,
76                 .regshift       = 2,
77                 .uartclk        = 13000000,
78         }, {
79                 .flags          = 0,
80         }
81 };
82
83 static struct platform_device debug_uart = {
84         .name = "serial8250",
85         .id = PLAT8250_DEV_PLATFORM,
86         .dev = {
87                 .platform_data = debug_uart_platform_data,
88         },
89 };
90
91 #ifdef CONFIG_BCM4329_RFKILL
92
93 static struct resource bonaire_bcm4329_rfkill_resources[] = {
94         {
95                 .name   = "bcm4329_nreset_gpio",
96                 .start  = TEGRA_GPIO_PU0,
97                 .end    = TEGRA_GPIO_PU0,
98                 .flags  = IORESOURCE_IO,
99         },
100         {
101                 .name   = "bcm4329_nshutdown_gpio",
102                 .start  = TEGRA_GPIO_PK2,
103                 .end    = TEGRA_GPIO_PK2,
104                 .flags  = IORESOURCE_IO,
105         },
106 };
107
108 static struct platform_device bonaire_bcm4329_rfkill_device = {
109         .name = "bcm4329_rfkill",
110         .id             = -1,
111         .num_resources  = ARRAY_SIZE(bonaire_bcm4329_rfkill_resources),
112         .resource       = bonaire_bcm4329_rfkill_resources,
113 };
114
115 static noinline void __init bonaire_bt_rfkill(void)
116 {
117         /*Add Clock Resource*/
118         clk_add_alias("bcm4329_32k_clk", bonaire_bcm4329_rfkill_device.name, \
119                                 "blink", NULL);
120
121         platform_device_register(&bonaire_bcm4329_rfkill_device);
122
123         return;
124 }
125 #else
126 static inline void bonaire_bt_rfkill(void) { }
127 #endif
128
129 static __initdata struct tegra_clk_init_table bonaire_clk_init_table[] = {
130         /* name         parent          rate            enabled */
131         { "uarta",      "clk_m",        13000000,       true},
132         { "uartb",      "clk_m",        13000000,       true},
133         { "uartc",      "clk_m",        13000000,       true},
134         { "uartd",      "clk_m",        13000000,       true},
135         { "uarte",      "clk_m",        13000000,       true},
136         { "pll_m",      NULL,           0,              true},
137         { "blink",      "clk_32k",      32768,          false},
138         { "pll_p_out4", "pll_p",        24000000,       true },
139         { "pwm",        "clk_32k",      32768,          false},
140         { "blink",      "clk_32k",      32768,          false},
141         { "pll_a",      NULL,           56448000,       true},
142         { "pll_a_out0", NULL,           11289600,       true},
143         { "i2s1",       "pll_a_out0",   11289600,       true},
144         { "i2s2",       "pll_a_out0",   11289600,       true},
145         { "d_audio",    "pll_a_out0",   11289600,       false},
146         { "audio_2x",   "audio",        22579200,       true},
147         { NULL,         NULL,           0,              0},
148 };
149
150 static struct i2c_board_info __initdata bonaire_i2c_bus1_board_info[] = {
151         {
152                 I2C_BOARD_INFO("wm8903", 0x1a),
153         },
154 };
155
156 static struct tegra_i2c_platform_data bonaire_i2c1_platform_data = {
157         .adapter_nr     = 0,
158         .bus_count      = 1,
159         .bus_clk_rate   = 100000,
160 };
161
162 #if 0   /* !!!FIXME!!! THESE ARE VENTANA SETTINGS */
163 static const struct tegra_pingroup_config i2c2_ddc = {
164         .pingroup       = TEGRA_PINGROUP_DDC,
165         .func           = TEGRA_MUX_I2C2,
166 };
167
168 static const struct tegra_pingroup_config i2c2_gen2 = {
169         .pingroup       = TEGRA_PINGROUP_PTA,
170         .func           = TEGRA_MUX_I2C2,
171 };
172 #endif
173
174 static struct tegra_i2c_platform_data bonaire_i2c2_platform_data = {
175         .adapter_nr     = 1,
176         .bus_count      = 2,
177         .bus_clk_rate   = { 100000, 100000 },
178 #if 0   /* !!!FIXME!!!! TESE ARE VENTANA SETTINGS */
179         .bus_mux        = { &i2c2_ddc, &i2c2_gen2 },
180         .bus_mux_len    = { 1, 1 },
181 #endif
182 };
183
184 static struct tegra_i2c_platform_data bonaire_i2c3_platform_data = {
185         .adapter_nr     = 3,
186         .bus_count      = 1,
187         .bus_clk_rate   = { 100000, 0 },
188 };
189
190 static struct tegra_i2c_platform_data bonaire_i2c4_platform_data = {
191         .adapter_nr     = 4,
192         .bus_count      = 1,
193         .bus_clk_rate   = { 100000, 0 },
194 };
195
196 static struct tegra_i2c_platform_data bonaire_i2c5_platform_data = {
197         .adapter_nr     = 5,
198         .bus_count      = 1,
199         .bus_clk_rate   = { 100000, 0 },
200 };
201
202 static void bonaire_i2c_init(void)
203 {
204         tegra_i2c_device1.dev.platform_data = &bonaire_i2c1_platform_data;
205         tegra_i2c_device2.dev.platform_data = &bonaire_i2c2_platform_data;
206         tegra_i2c_device3.dev.platform_data = &bonaire_i2c3_platform_data;
207         tegra_i2c_device4.dev.platform_data = &bonaire_i2c4_platform_data;
208         tegra_i2c_device5.dev.platform_data = &bonaire_i2c5_platform_data;
209
210         i2c_register_board_info(0, bonaire_i2c_bus1_board_info, 1);
211
212         platform_device_register(&tegra_i2c_device5);
213         platform_device_register(&tegra_i2c_device4);
214         platform_device_register(&tegra_i2c_device3);
215         platform_device_register(&tegra_i2c_device2);
216         platform_device_register(&tegra_i2c_device1);
217 }
218
219 #define GPIO_KEY(_id, _gpio, _iswake)           \
220         {                                       \
221                 .code = _id,                    \
222                 .gpio = TEGRA_GPIO_##_gpio,     \
223                 .active_low = 1,                \
224                 .desc = #_id,                   \
225                 .type = EV_KEY,                 \
226                 .wakeup = _iswake,              \
227                 .debounce_interval = 10,        \
228         }
229
230 /* !!!FIXME!!! THESE ARE VENTANA DEFINITIONS */
231 static struct gpio_keys_button bonaire_keys[] = {
232         [0] = GPIO_KEY(KEY_MENU, PQ0, 0),
233         [1] = GPIO_KEY(KEY_HOME, PQ1, 0),
234         [2] = GPIO_KEY(KEY_BACK, PQ2, 0),
235         [3] = GPIO_KEY(KEY_VOLUMEUP, PQ3, 0),
236         [4] = GPIO_KEY(KEY_VOLUMEDOWN, PQ4, 0),
237         [5] = GPIO_KEY(KEY_POWER, PV2, 1),
238 };
239
240 static struct gpio_keys_platform_data bonaire_keys_platform_data = {
241         .buttons        = bonaire_keys,
242         .nbuttons       = ARRAY_SIZE(bonaire_keys),
243 };
244
245 static struct platform_device bonaire_keys_device = {
246         .name   = "gpio-keys",
247         .id     = 0,
248         .dev    = {
249                 .platform_data  = &bonaire_keys_platform_data,
250         },
251 };
252
253 static struct resource tegra_rtc_resources[] = {
254         [0] = {
255                 .start = TEGRA_RTC_BASE,
256                 .end = TEGRA_RTC_BASE + TEGRA_RTC_SIZE - 1,
257                 .flags = IORESOURCE_MEM,
258         },
259         [1] = {
260                 .start = INT_RTC,
261                 .end = INT_RTC,
262                 .flags = IORESOURCE_IRQ,
263         },
264 };
265
266 static struct platform_device tegra_rtc_device = {
267         .name = "tegra_rtc",
268         .id   = -1,
269         .resource = tegra_rtc_resources,
270         .num_resources = ARRAY_SIZE(tegra_rtc_resources),
271 };
272
273 #if defined(CONFIG_MTD_NAND_TEGRA)
274 static struct resource nand_resources[] = {
275         [0] = {
276                 .start = INT_NANDFLASH,
277                 .end   = INT_NANDFLASH,
278                 .flags = IORESOURCE_IRQ
279         },
280         [1] = {
281                 .start = TEGRA_NAND_BASE,
282                 .end = TEGRA_NAND_BASE + TEGRA_NAND_SIZE - 1,
283                 .flags = IORESOURCE_MEM
284         }
285 };
286
287 static struct tegra_nand_chip_parms nand_chip_parms[] = {
288         /* Samsung K5E2G1GACM */
289         [0] = {
290                 .vendor_id   = 0xEC,
291                 .device_id   = 0xAA,
292                 .capacity    = 256,
293                 .timing      = {
294                         .trp            = 21,
295                         .trh            = 15,
296                         .twp            = 21,
297                         .twh            = 15,
298                         .tcs            = 31,
299                         .twhr           = 60,
300                         .tcr_tar_trr    = 20,
301                         .twb            = 100,
302                         .trp_resp       = 30,
303                         .tadl           = 100,
304                 },
305         },
306         /* Hynix H5PS1GB3EFR */
307         [1] = {
308                 .vendor_id   = 0xAD,
309                 .device_id   = 0xDC,
310                 .capacity    = 512,
311                 .timing      = {
312                         .trp            = 12,
313                         .trh            = 10,
314                         .twp            = 12,
315                         .twh            = 10,
316                         .tcs            = 20,
317                         .twhr           = 80,
318                         .tcr_tar_trr    = 20,
319                         .twb            = 100,
320                         .trp_resp       = 20,
321                         .tadl           = 70,
322                 },
323         },
324 };
325
326 struct tegra_nand_platform nand_data = {
327         .max_chips      = 8,
328         .chip_parms     = nand_chip_parms,
329         .nr_chip_parms  = ARRAY_SIZE(nand_chip_parms),
330 };
331
332 struct platform_device tegra_nand_device = {
333         .name          = "tegra_nand",
334         .id            = -1,
335         .resource      = nand_resources,
336         .num_resources = ARRAY_SIZE(nand_resources),
337         .dev            = {
338                 .platform_data = &nand_data,
339         },
340 };
341 #endif
342
343 #if defined(CONFIG_TEGRA_SIMULATION_PLATFORM) && defined(CONFIG_SMC91X)
344 static struct resource tegra_sim_smc91x_resources[] = {
345         [0] = {
346                 .start          = TEGRA_SIM_ETH_BASE,
347                 .end            = TEGRA_SIM_ETH_BASE + TEGRA_SIM_ETH_SIZE - 1,
348                 .flags          = IORESOURCE_MEM,
349         },
350         [1] = {
351                 .start          = IRQ_ETH,
352                 .end            = IRQ_ETH,
353                 .flags          = IORESOURCE_IRQ,
354         },
355 };
356
357 static struct platform_device tegra_sim_smc91x_device = {
358         .name           = "smc91x",
359         .id             = 0,
360         .num_resources  = ARRAY_SIZE(tegra_sim_smc91x_resources),
361         .resource       = tegra_sim_smc91x_resources,
362 };
363 #endif
364
365 static struct platform_device *bonaire_devices[] __initdata = {
366 #if ENABLE_OTG
367         &tegra_otg_device,
368 #endif
369         &debug_uart,
370         &tegra_uartb_device,
371         &tegra_uartc_device,
372         &tegra_uartd_device,
373         &tegra_uarte_device,
374         &tegra_pmu_device,
375         &tegra_rtc_device,
376         &tegra_udc_device,
377 #if defined(CONFIG_TEGRA_IOVMM_SMMU)
378         &tegra_smmu_device,
379 #endif
380         &bonaire_keys_device,
381 #if defined(CONFIG_SND_HDA_TEGRA)
382         &tegra_hda_device,
383 #endif
384         &tegra_avp_device,
385 #if defined(CONFIG_MTD_NAND_TEGRA)
386         &tegra_nand_device,
387 #endif
388 #if defined(CONFIG_TEGRA_SIMULATION_PLATFORM) && defined(CONFIG_SMC91X)
389         &tegra_sim_smc91x_device,
390 #endif
391 };
392
393 static int __init bonaire_touch_init(void)
394 {
395         return 0;
396 }
397
398 #if defined(USB_HOST_ONLY)
399 static struct tegra_ehci_platform_data tegra_ehci_pdata[] = {
400         [0] = {
401                         .phy_config = &utmi_phy_config[0],
402                         .operating_mode = TEGRA_USB_HOST,
403                         .power_down_on_bus_suspend = 0,
404         },
405         [1] = {
406                         .phy_config = &ulpi_phy_config,
407                         .operating_mode = TEGRA_USB_HOST,
408                         .power_down_on_bus_suspend = 1,
409         },
410         [2] = {
411                         .phy_config = &utmi_phy_config[1],
412                         .operating_mode = TEGRA_USB_HOST,
413                         .power_down_on_bus_suspend = 0,
414         },
415 };
416 #endif
417
418 static struct tegra_usb_platform_data tegra_udc_pdata = {
419         .port_otg = true,
420         .has_hostpc = true,
421         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
422         .op_mode = TEGRA_USB_OPMODE_DEVICE,
423         .u_data.dev = {
424                 .vbus_pmu_irq = 0,
425                 .vbus_gpio = -1,
426                 .charging_supported = false,
427                 .remote_wakeup_supported = false,
428         },
429         .u_cfg.utmi = {
430                 .hssync_start_delay = 0,
431                 .elastic_limit = 16,
432                 .idle_wait_delay = 17,
433                 .term_range_adj = 6,
434                 .xcvr_setup = 8,
435                 .xcvr_lsfslew = 2,
436                 .xcvr_lsrslew = 2,
437                 .xcvr_setup_offset = 0,
438                 .xcvr_use_fuses = 1,
439         },
440 };
441
442 static struct tegra_usb_platform_data tegra_ehci1_utmi_pdata = {
443         .port_otg = true,
444         .has_hostpc = true,
445         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
446         .op_mode = TEGRA_USB_OPMODE_HOST,
447         .u_data.host = {
448                 .vbus_gpio = -1,
449                 .vbus_reg = "vdd_vbus_micro_usb",
450                 .hot_plug = true,
451                 .remote_wakeup_supported = true,
452                 .power_off_on_suspend = true,
453         },
454         .u_cfg.utmi = {
455                 .hssync_start_delay = 0,
456                 .elastic_limit = 16,
457                 .idle_wait_delay = 17,
458                 .term_range_adj = 6,
459                 .xcvr_setup = 15,
460                 .xcvr_lsfslew = 2,
461                 .xcvr_lsrslew = 2,
462                 .xcvr_setup_offset = 0,
463                 .xcvr_use_fuses = 1,
464         },
465 };
466
467 static struct tegra_usb_platform_data tegra_ehci2_utmi_pdata = {
468         .port_otg = false,
469         .has_hostpc = true,
470         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
471         .op_mode         = TEGRA_USB_OPMODE_HOST,
472         .u_data.host = {
473                 .vbus_gpio = -1,
474                 .hot_plug = true,
475                 .remote_wakeup_supported = true,
476                 .power_off_on_suspend = true,
477         },
478         .u_cfg.utmi = {
479                 .hssync_start_delay = 0,
480                 .elastic_limit = 16,
481                 .idle_wait_delay = 17,
482                 .term_range_adj = 6,
483                 .xcvr_setup = 15,
484                 .xcvr_lsfslew = 2,
485                 .xcvr_lsrslew = 2,
486                 .xcvr_setup_offset = 0,
487                 .xcvr_use_fuses = 1,
488         },
489 };
490
491 static struct tegra_usb_platform_data tegra_ehci3_utmi_pdata = {
492         .port_otg = false,
493         .has_hostpc = true,
494         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
495         .op_mode         = TEGRA_USB_OPMODE_HOST,
496         .u_data.host = {
497                 .vbus_gpio = -1,
498                 .vbus_reg = "vdd_vbus_typea_usb",
499                 .hot_plug = true,
500                 .remote_wakeup_supported = true,
501                 .power_off_on_suspend = true,
502         },
503         .u_cfg.utmi = {
504                 .hssync_start_delay = 0,
505                 .elastic_limit = 16,
506                 .idle_wait_delay = 17,
507                 .term_range_adj = 6,
508                 .xcvr_setup = 8,
509                 .xcvr_lsfslew = 2,
510                 .xcvr_lsrslew = 2,
511                 .xcvr_setup_offset = 0,
512                 .xcvr_use_fuses = 1,
513         },
514 };
515
516 static void bonaire_usb_init(void)
517 {
518 #if defined(USB_HOST_ONLY)
519         tegra_ehci1_device.dev.platform_data = &tegra_ehci1_utmi_pdata;
520         platform_device_register(&tegra_ehci1_device);
521 #else
522         /* setup the udc platform data */
523         tegra_udc_device.dev.platform_data = &tegra_udc_pdata;
524
525 #endif
526 }
527
528 static void __init tegra_bonaire_init(void)
529 {
530         tegra_clk_init_from_table(bonaire_clk_init_table);
531         tegra_enable_pinmux();
532         bonaire_pinmux_init();
533
534         if (tegra_revision == TEGRA_REVISION_QT)
535                 debug_uart_platform_data[0].uartclk =
536                                                 tegra_clk_measure_input_freq();
537
538         platform_add_devices(bonaire_devices, ARRAY_SIZE(bonaire_devices));
539
540 #ifdef CONFIG_TEGRA_SIMULATION_PLATFORM
541         bonaire_power_off_init();
542 #endif
543         tegra_io_dpd_init();
544
545         bonaire_sdhci_init();
546         bonaire_i2c_init();
547         bonaire_regulator_init();
548         bonaire_suspend_init();
549         bonaire_touch_init();
550         bonaire_usb_init();
551         bonaire_panel_init();
552         bonaire_bt_rfkill();
553 }
554
555 static void __init tegra_bonaire_reserve(void)
556 {
557 #if defined(CONFIG_NVMAP_CONVERT_CARVEOUT_TO_IOVMM)
558         tegra_reserve(0, SZ_4M, 0);
559 #else
560 #if defined(CONFIG_TEGRA_SIMULATION_SPLIT_MEM)
561         if (tegra_split_mem_active())
562                 tegra_reserve(0, 0, 0);
563         else
564 #endif
565                 tegra_reserve(SZ_128M, SZ_4M, 0);
566 #endif
567 }
568
569
570 MACHINE_START(BONAIRE, BONAIRE_BOARD_NAME)
571         .atag_offset    = 0x80000100,
572         .soc            = &tegra_soc_desc,
573         .map_io         = tegra_map_common_io,
574         .reserve        = tegra_bonaire_reserve,
575         .init_early     = tegra12x_init_early,
576         .init_irq       = tegra_init_irq,
577         .handle_irq     = gic_handle_irq,
578         .init_machine   = tegra_bonaire_init,
579         .timer          = &tegra_timer,
580 MACHINE_END