04552d33078ee1e709243689d10dd0429d3bb495
[linux-3.10.git] / arch / arm / mach-tegra / board-bonaire.c
1 /*
2  * arch/arm/mach-tegra/board-bonaire.c
3  *
4  * Copyright (C) 2013 NVIDIA Corporation. All rights reserved.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful, but WITHOUT
12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
14  * more details.
15  *
16  * You should have received a copy of the GNU General Public License along
17  * with this program; if not, write to the Free Software Foundation, Inc.,
18  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
19  */
20
21 #include <linux/kernel.h>
22 #include <linux/init.h>
23 #include <linux/slab.h>
24 #include <linux/ctype.h>
25 #include <linux/platform_device.h>
26 #include <linux/clk.h>
27 #include <linux/serial_8250.h>
28 #include <linux/i2c.h>
29 #include <linux/spi/spi.h>
30 #include <linux/spi/spi-tegra.h>
31 #include <linux/i2c/panjit_ts.h>
32 #include <linux/dma-mapping.h>
33 #include <linux/delay.h>
34 #include <linux/i2c-tegra.h>
35 #include <linux/gpio.h>
36 #include <linux/gpio_keys.h>
37 #include <linux/input.h>
38 #include <linux/platform_data/tegra_usb.h>
39 #include <linux/platform_data/serial-tegra.h>
40 #include <linux/of_platform.h>
41 #include <mach/clk.h>
42 #include <mach/gpio-tegra.h>
43
44 #include <mach/io_dpd.h>
45
46 #include <mach/irqs.h>
47 #include <mach/pinmux.h>
48 #include <mach/i2s.h>
49 #include <mach/audio.h>
50 #include <mach/usb_phy.h>
51 #include <mach/nand.h>
52 #include <mach/pci.h>
53 #include <mach/hardware.h>
54
55 #include <asm/mach-types.h>
56 #include <asm/mach/arch.h>
57
58 #include "board.h"
59 #include "board-bonaire.h"
60 #include "clock.h"
61 #include "common.h"
62 #include "devices.h"
63 #include "fuse.h"
64 #include "gpio-names.h"
65 #include "iomap.h"
66
67 #define ENABLE_OTG 0
68 /*#define USB_HOST_ONLY*/
69
70 static struct plat_serial8250_port debug_uart_platform_data[] = {
71         {
72                 .membase        = IO_ADDRESS(TEGRA_UARTA_BASE),
73                 .mapbase        = TEGRA_UARTA_BASE,
74                 .irq            = INT_UARTA,
75                 .flags          = UPF_BOOT_AUTOCONF | UPF_FIXED_TYPE,
76                 .type           = PORT_TEGRA,
77                 .iotype         = UPIO_MEM,
78                 .regshift       = 2,
79                 .uartclk        = 13000000,
80         }, {
81                 .flags          = 0,
82         }
83 };
84
85 static struct platform_device debug_uart = {
86         .name = "serial8250",
87         .id = PLAT8250_DEV_PLATFORM,
88         .dev = {
89                 .platform_data = debug_uart_platform_data,
90         },
91 };
92
93 #ifdef CONFIG_BCM4329_RFKILL
94
95 static struct resource bonaire_bcm4329_rfkill_resources[] = {
96         {
97                 .name   = "bcm4329_nreset_gpio",
98                 .start  = TEGRA_GPIO_PU0,
99                 .end    = TEGRA_GPIO_PU0,
100                 .flags  = IORESOURCE_IO,
101         },
102         {
103                 .name   = "bcm4329_nshutdown_gpio",
104                 .start  = TEGRA_GPIO_PK2,
105                 .end    = TEGRA_GPIO_PK2,
106                 .flags  = IORESOURCE_IO,
107         },
108 };
109
110 static struct platform_device bonaire_bcm4329_rfkill_device = {
111         .name = "bcm4329_rfkill",
112         .id             = -1,
113         .num_resources  = ARRAY_SIZE(bonaire_bcm4329_rfkill_resources),
114         .resource       = bonaire_bcm4329_rfkill_resources,
115 };
116
117 static noinline void __init bonaire_bt_rfkill(void)
118 {
119         /*Add Clock Resource*/
120         clk_add_alias("bcm4329_32k_clk", bonaire_bcm4329_rfkill_device.name, \
121                                 "blink", NULL);
122
123         platform_device_register(&bonaire_bcm4329_rfkill_device);
124
125         return;
126 }
127 #else
128 static inline void bonaire_bt_rfkill(void) { }
129 #endif
130
131 static __initdata struct tegra_clk_init_table bonaire_clk_init_table[] = {
132         /* name         parent          rate            enabled */
133         { "uarta",      "clk_m",        13000000,       true},
134         { "uartb",      "clk_m",        13000000,       true},
135         { "uartc",      "clk_m",        13000000,       true},
136         { "uartd",      "clk_m",        13000000,       true},
137         { "uarte",      "clk_m",        13000000,       true},
138         { "sdmmc1",     "clk_m",        26000000,       false},
139         { "sdmmc3",     "clk_m",        26000000,       false},
140         { "sdmmc4",     "clk_m",        26000000,       false},
141         { "pll_m",      NULL,           0,              true},
142         { "blink",      "clk_32k",      32768,          false},
143         { "pll_p_out4", "pll_p",        24000000,       true },
144         { "pwm",        "clk_32k",      32768,          false},
145         { "blink",      "clk_32k",      32768,          false},
146         { "pll_a",      NULL,           56448000,       true},
147         { "pll_a_out0", NULL,           11289600,       true},
148         { "i2s1",       "pll_a_out0",   11289600,       true},
149         { "i2s2",       "pll_a_out0",   11289600,       true},
150         { "d_audio",    "pll_a_out0",   11289600,       false},
151         { "audio_2x",   "audio",        22579200,       true},
152         { NULL,         NULL,           0,              0},
153 };
154
155 static struct i2c_board_info __initdata bonaire_i2c_bus1_board_info[] = {
156         {
157                 I2C_BOARD_INFO("wm8903", 0x1a),
158         },
159 };
160
161 static struct tegra_i2c_platform_data bonaire_i2c1_platform_data = {
162         .bus_clk_rate   = 100000,
163 };
164
165 #if 0   /* !!!FIXME!!! THESE ARE VENTANA SETTINGS */
166 static const struct tegra_pingroup_config i2c2_ddc = {
167         .pingroup       = TEGRA_PINGROUP_DDC,
168         .func           = TEGRA_MUX_I2C2,
169 };
170
171 static const struct tegra_pingroup_config i2c2_gen2 = {
172         .pingroup       = TEGRA_PINGROUP_PTA,
173         .func           = TEGRA_MUX_I2C2,
174 };
175 #endif
176
177 static struct tegra_i2c_platform_data bonaire_i2c2_platform_data = {
178         .bus_clk_rate   = 100000,
179 #if 0   /* !!!FIXME!!!! TESE ARE VENTANA SETTINGS */
180         .bus_mux        = { &i2c2_ddc, &i2c2_gen2 },
181         .bus_mux_len    = { 1, 1 },
182 #endif
183 };
184
185 static struct tegra_i2c_platform_data bonaire_i2c3_platform_data = {
186         .bus_clk_rate   = 100000,
187 };
188
189 static struct tegra_i2c_platform_data bonaire_i2c4_platform_data = {
190         .bus_clk_rate   = 100000,
191 };
192
193 static struct tegra_i2c_platform_data bonaire_i2c5_platform_data = {
194         .bus_clk_rate   = 100000,
195 };
196
197 static struct tegra_i2c_platform_data bonaire_i2c6_platform_data = {
198         .bus_clk_rate   = 100000,
199 };
200
201 static void bonaire_i2c_init(void)
202 {
203         tegra12_i2c_device1.dev.platform_data = &bonaire_i2c1_platform_data;
204         tegra12_i2c_device2.dev.platform_data = &bonaire_i2c2_platform_data;
205         tegra12_i2c_device3.dev.platform_data = &bonaire_i2c3_platform_data;
206         tegra12_i2c_device4.dev.platform_data = &bonaire_i2c4_platform_data;
207         tegra12_i2c_device5.dev.platform_data = &bonaire_i2c5_platform_data;
208         tegra12_i2c_device6.dev.platform_data = &bonaire_i2c6_platform_data;
209
210         i2c_register_board_info(0, bonaire_i2c_bus1_board_info, 1);
211
212         platform_device_register(&tegra12_i2c_device6);
213         platform_device_register(&tegra12_i2c_device5);
214         platform_device_register(&tegra12_i2c_device4);
215         platform_device_register(&tegra12_i2c_device3);
216         platform_device_register(&tegra12_i2c_device2);
217         platform_device_register(&tegra12_i2c_device1);
218 }
219
220 static void bonaire_apbdma_init(void)
221 {
222         platform_device_register(&tegra_apbdma);
223 }
224
225 static struct platform_device *bonaire_spi_devices[] __initdata = {
226         &tegra11_spi_device4,
227 };
228
229 /* struct spi_clk_parent spi_parent_clk_bonaire[] = { */
230 /*      [0] = {.name = "pll_p"}, */
231 /* #ifndef CONFIG_TEGRA_PLLM_RESTRICTED */
232 /*      [1] = {.name = "pll_m"}, */
233 /*      [2] = {.name = "clk_m"}, */
234 /* #else */
235 /*      [1] = {.name = "clk_m"}, */
236 /* #endif */
237 /* }; */
238
239 /* static struct tegra_spi_platform_data bonaire_spi_pdata = { */
240 /*      .is_dma_based           = true, */
241 /*      .max_dma_buffer         = 16 * 1024, */
242 /*      .is_clkon_always        = false, */
243 /*      .max_rate               = 25000000, */
244 /* }; */
245
246 /* static void __init bonaire_spi_init(void) */
247 /* { */
248 /*      int i; */
249 /*      struct clk *c; */
250 /*      struct board_info board_info, display_board_info; */
251
252 /*      tegra_get_board_info(&board_info); */
253 /*      tegra_get_display_board_info(&display_board_info); */
254
255 /*      for (i = 0; i < ARRAY_SIZE(spi_parent_clk_bonaire); ++i) { */
256 /*              c = tegra_get_clock_by_name(spi_parent_clk_bonaire[i].name); */
257 /*              if (IS_ERR_OR_NULL(c)) { */
258 /*                      pr_err("Not able to get the clock for %s\n", */
259 /*                                      spi_parent_clk_bonaire[i].name); */
260 /*              continue; */
261 /*              } */
262 /*              spi_parent_clk_bonaire[i].parent_clk = c; */
263 /*              spi_parent_clk_bonaire[i].fixed_clk_rate = clk_get_rate(c); */
264 /*      } */
265 /*      bonaire_spi_pdata.parent_clk_list = spi_parent_clk_bonaire; */
266 /*      bonaire_spi_pdata.parent_clk_count = ARRAY_SIZE(spi_parent_clk_bonaire); */
267 /*      tegra11_spi_device4.dev.platform_data = &bonaire_spi_pdata; */
268 /*      platform_add_devices(bonaire_spi_devices, */
269 /*                      ARRAY_SIZE(bonaire_spi_devices)); */
270 /* } */
271
272 #define GPIO_KEY(_id, _gpio, _iswake)           \
273         {                                       \
274                 .code = _id,                    \
275                 .gpio = TEGRA_GPIO_##_gpio,     \
276                 .active_low = 1,                \
277                 .desc = #_id,                   \
278                 .type = EV_KEY,                 \
279                 .wakeup = _iswake,              \
280                 .debounce_interval = 10,        \
281         }
282
283 /* !!!FIXME!!! THESE ARE VENTANA DEFINITIONS */
284 static struct gpio_keys_button bonaire_keys[] = {
285         [0] = GPIO_KEY(KEY_MENU, PQ0, 0),
286         [1] = GPIO_KEY(KEY_HOME, PQ1, 0),
287         [2] = GPIO_KEY(KEY_BACK, PQ2, 0),
288         [3] = GPIO_KEY(KEY_VOLUMEUP, PQ3, 0),
289         [4] = GPIO_KEY(KEY_VOLUMEDOWN, PQ4, 0),
290         [5] = GPIO_KEY(KEY_POWER, PV2, 1),
291 };
292
293 static struct gpio_keys_platform_data bonaire_keys_platform_data = {
294         .buttons        = bonaire_keys,
295         .nbuttons       = ARRAY_SIZE(bonaire_keys),
296 };
297
298 static struct platform_device bonaire_keys_device = {
299         .name   = "gpio-keys",
300         .id     = 0,
301         .dev    = {
302                 .platform_data  = &bonaire_keys_platform_data,
303         },
304 };
305
306 static struct resource tegra_rtc_resources[] = {
307         [0] = {
308                 .start = TEGRA_RTC_BASE,
309                 .end = TEGRA_RTC_BASE + TEGRA_RTC_SIZE - 1,
310                 .flags = IORESOURCE_MEM,
311         },
312         [1] = {
313                 .start = INT_RTC,
314                 .end = INT_RTC,
315                 .flags = IORESOURCE_IRQ,
316         },
317 };
318
319 static struct platform_device tegra_rtc_device = {
320         .name = "tegra_rtc",
321         .id   = -1,
322         .resource = tegra_rtc_resources,
323         .num_resources = ARRAY_SIZE(tegra_rtc_resources),
324 };
325
326 #if defined(CONFIG_MTD_NAND_TEGRA)
327 static struct resource nand_resources[] = {
328         [0] = {
329                 .start = INT_NANDFLASH,
330                 .end   = INT_NANDFLASH,
331                 .flags = IORESOURCE_IRQ
332         },
333         [1] = {
334                 .start = TEGRA_NAND_BASE,
335                 .end = TEGRA_NAND_BASE + TEGRA_NAND_SIZE - 1,
336                 .flags = IORESOURCE_MEM
337         }
338 };
339
340 static struct tegra_nand_chip_parms nand_chip_parms[] = {
341         /* Samsung K5E2G1GACM */
342         [0] = {
343                 .vendor_id   = 0xEC,
344                 .device_id   = 0xAA,
345                 .capacity    = 256,
346                 .timing      = {
347                         .trp            = 21,
348                         .trh            = 15,
349                         .twp            = 21,
350                         .twh            = 15,
351                         .tcs            = 31,
352                         .twhr           = 60,
353                         .tcr_tar_trr    = 20,
354                         .twb            = 100,
355                         .trp_resp       = 30,
356                         .tadl           = 100,
357                 },
358         },
359         /* Hynix H5PS1GB3EFR */
360         [1] = {
361                 .vendor_id   = 0xAD,
362                 .device_id   = 0xDC,
363                 .capacity    = 512,
364                 .timing      = {
365                         .trp            = 12,
366                         .trh            = 10,
367                         .twp            = 12,
368                         .twh            = 10,
369                         .tcs            = 20,
370                         .twhr           = 80,
371                         .tcr_tar_trr    = 20,
372                         .twb            = 100,
373                         .trp_resp       = 20,
374                         .tadl           = 70,
375                 },
376         },
377 };
378
379 struct tegra_nand_platform nand_data = {
380         .max_chips      = 8,
381         .chip_parms     = nand_chip_parms,
382         .nr_chip_parms  = ARRAY_SIZE(nand_chip_parms),
383 };
384
385 struct platform_device tegra_nand_device = {
386         .name          = "tegra_nand",
387         .id            = -1,
388         .resource      = nand_resources,
389         .num_resources = ARRAY_SIZE(nand_resources),
390         .dev            = {
391                 .platform_data = &nand_data,
392         },
393 };
394 #endif
395
396 static struct platform_device *bonaire_devices[] __initdata = {
397 #if ENABLE_OTG
398         &tegra_otg_device,
399 #endif
400         &debug_uart,
401         &tegra_pmu_device,
402         &tegra_rtc_device,
403 #if !defined(USB_HOST_ONLY)
404         &tegra_udc_device,
405 #endif
406 #if defined(CONFIG_CRYPTO_DEV_TEGRA_SE)
407         &tegra12_se_device,
408 #endif
409         &bonaire_keys_device,
410 #if defined(CONFIG_SND_HDA_TEGRA)
411         &tegra_hda_device,
412 #endif
413         &tegra_avp_device,
414 #if defined(CONFIG_MTD_NAND_TEGRA)
415         &tegra_nand_device,
416 #endif
417 };
418
419 static int __init bonaire_touch_init(void)
420 {
421         return 0;
422 }
423
424 static struct tegra_usb_platform_data tegra_udc_pdata = {
425         .port_otg = false,
426         .has_hostpc = true,
427         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
428         .op_mode = TEGRA_USB_OPMODE_DEVICE,
429         .u_data.dev = {
430                 .vbus_pmu_irq = 0,
431                 .vbus_gpio = -1,
432                 .charging_supported = false,
433                 .remote_wakeup_supported = false,
434         },
435         .u_cfg.utmi = {
436                 .hssync_start_delay = 0,
437                 .elastic_limit = 16,
438                 .idle_wait_delay = 17,
439                 .term_range_adj = 6,
440                 .xcvr_setup = 8,
441                 .xcvr_lsfslew = 2,
442                 .xcvr_lsrslew = 2,
443                 .xcvr_setup_offset = 0,
444                 .xcvr_use_fuses = 1,
445         },
446 };
447
448 static struct tegra_usb_platform_data tegra_ehci1_utmi_pdata = {
449         .port_otg = false,
450         .has_hostpc = true,
451         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
452         .op_mode = TEGRA_USB_OPMODE_HOST,
453         .u_data.host = {
454                 .vbus_gpio = -1,
455                 /*.vbus_reg = "vdd_vbus_micro_usb",*/
456                 .hot_plug = true,
457                 .remote_wakeup_supported = true,
458                 .power_off_on_suspend = true,
459         },
460         .u_cfg.utmi = {
461                 .hssync_start_delay = 0,
462                 .elastic_limit = 16,
463                 .idle_wait_delay = 17,
464                 .term_range_adj = 6,
465                 .xcvr_setup = 15,
466                 .xcvr_lsfslew = 2,
467                 .xcvr_lsrslew = 2,
468                 .xcvr_setup_offset = 0,
469                 .xcvr_use_fuses = 1,
470         },
471 };
472
473 static struct tegra_usb_platform_data tegra_ehci2_utmi_pdata = {
474         .port_otg = false,
475         .has_hostpc = true,
476         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
477         .op_mode         = TEGRA_USB_OPMODE_HOST,
478         .u_data.host = {
479                 .vbus_gpio = -1,
480                 .hot_plug = true,
481                 .remote_wakeup_supported = true,
482                 .power_off_on_suspend = true,
483         },
484         .u_cfg.utmi = {
485                 .hssync_start_delay = 0,
486                 .elastic_limit = 16,
487                 .idle_wait_delay = 17,
488                 .term_range_adj = 6,
489                 .xcvr_setup = 15,
490                 .xcvr_lsfslew = 2,
491                 .xcvr_lsrslew = 2,
492                 .xcvr_setup_offset = 0,
493                 .xcvr_use_fuses = 1,
494         },
495 };
496
497 static struct tegra_usb_platform_data tegra_ehci3_utmi_pdata = {
498         .port_otg = false,
499         .has_hostpc = true,
500         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
501         .op_mode         = TEGRA_USB_OPMODE_HOST,
502         .u_data.host = {
503                 .vbus_gpio = -1,
504                 /*.vbus_reg = "vdd_vbus_typea_usb",*/
505                 .hot_plug = true,
506                 .remote_wakeup_supported = true,
507                 .power_off_on_suspend = true,
508         },
509         .u_cfg.utmi = {
510                 .hssync_start_delay = 0,
511                 .elastic_limit = 16,
512                 .idle_wait_delay = 17,
513                 .term_range_adj = 6,
514                 .xcvr_setup = 8,
515                 .xcvr_lsfslew = 2,
516                 .xcvr_lsrslew = 2,
517                 .xcvr_setup_offset = 0,
518                 .xcvr_use_fuses = 1,
519         },
520 };
521
522 static void bonaire_usb_init(void)
523 {
524 #if defined(USB_HOST_ONLY)
525         tegra_ehci1_device.dev.platform_data = &tegra_ehci1_utmi_pdata;
526         platform_device_register(&tegra_ehci1_device);
527 #else
528         /* setup the udc platform data */
529         tegra_udc_device.dev.platform_data = &tegra_udc_pdata;
530
531 #endif
532 }
533
534 static struct platform_device *bonaire_hs_uart_devices[] __initdata = {
535         &tegra_uartd_device, &tegra_uartb_device, &tegra_uartc_device,
536 };
537
538 static struct tegra_serial_platform_data bonaire_uartb_pdata = {
539         .dma_req_selector = 9,
540         .modem_interrupt = false,
541 };
542 static struct tegra_serial_platform_data bonaire_uartc_pdata = {
543         .dma_req_selector = 10,
544         .modem_interrupt = false,
545 };
546 static struct tegra_serial_platform_data bonaire_uartd_pdata = {
547         .dma_req_selector = 19,
548         .modem_interrupt = false,
549 };
550
551 static void __init bonaire_hs_uart_init(void)
552 {
553         tegra_uartb_device.dev.platform_data = &bonaire_uartb_pdata;
554         tegra_uartc_device.dev.platform_data = &bonaire_uartc_pdata;
555         tegra_uartd_device.dev.platform_data = &bonaire_uartd_pdata;
556         platform_add_devices(bonaire_hs_uart_devices,
557                         ARRAY_SIZE(bonaire_hs_uart_devices));
558 }
559
560 static struct tegra_pci_platform_data bonaire_pcie_platform_data = {
561         .port_status[0] = 1,
562         .port_status[1] = 1,
563         .use_dock_detect        = 1,
564         .gpio                   = TEGRA_GPIO_PO1,
565 };
566
567 static void bonaire_pcie_init(void)
568 {
569         tegra_pci_device.dev.platform_data = &bonaire_pcie_platform_data;
570         platform_device_register(&tegra_pci_device);
571 }
572
573 static void __init tegra_bonaire_init(void)
574 {
575         tegra_clk_init_from_table(bonaire_clk_init_table);
576         tegra_enable_pinmux();
577         bonaire_pinmux_init();
578         tegra_soc_device_init("bonaire");
579         bonaire_apbdma_init();
580
581         if (tegra_platform_is_fpga() && tegra_platform_is_qt())
582                 debug_uart_platform_data[0].uartclk =
583                                                 tegra_clk_measure_input_freq();
584
585         platform_add_devices(bonaire_devices, ARRAY_SIZE(bonaire_devices));
586
587         if (tegra_cpu_is_asim())
588                 bonaire_power_off_init();
589         tegra_io_dpd_init();
590         bonaire_hs_uart_init();
591         bonaire_sdhci_init();
592         bonaire_i2c_init();
593         /* bonaire_spi_init(); */
594         bonaire_regulator_init();
595         bonaire_suspend_init();
596         bonaire_touch_init();
597         bonaire_usb_init();
598         bonaire_panel_init();
599         bonaire_sensors_init();
600         bonaire_bt_rfkill();
601         bonaire_pcie_init();
602         tegra_register_fuse();
603 }
604
605 #ifdef CONFIG_USE_OF
606 struct of_dev_auxdata tegra_bonaire_auxdata_lookup[] __initdata = {
607         OF_DEV_AUXDATA("nvidia,tegra124-host1x", TEGRA_HOST1X_BASE, "host1x",
608                 NULL),
609         OF_DEV_AUXDATA("nvidia,tegra124-gk20a", 0x538F0000, "gk20a", NULL),
610         OF_DEV_AUXDATA("nvidia,tegra124-vic", TEGRA_VIC_BASE, "vic03", NULL),
611         OF_DEV_AUXDATA("nvidia,tegra124-msenc", TEGRA_MSENC_BASE, "msenc",
612                 NULL),
613         OF_DEV_AUXDATA("nvidia,tegra124-vi", TEGRA_VI_BASE, "vi", NULL),
614         OF_DEV_AUXDATA("nvidia,tegra124-isp", TEGRA_ISP_BASE, "isp", NULL),
615         OF_DEV_AUXDATA("nvidia,tegra124-tsec", TEGRA_TSEC_BASE, "tsec", NULL),
616         {}
617 };
618 #endif
619
620 static void __init tegra_bonaire_dt_init(void)
621 {
622         of_platform_populate(NULL, of_default_bus_match_table,
623                 tegra_bonaire_auxdata_lookup, &platform_bus);
624
625         tegra_bonaire_init();
626 }
627
628 static void __init tegra_bonaire_reserve(void)
629 {
630 #if defined(CONFIG_NVMAP_CONVERT_CARVEOUT_TO_IOVMM)
631         tegra_reserve(0, SZ_16M + SZ_2M, SZ_16M);
632 #else
633         if (tegra_cpu_is_asim() && tegra_split_mem_active())
634                 tegra_reserve(0, 0, 0);
635         else
636                 tegra_reserve(SZ_128M, SZ_16M + SZ_2M, SZ_16M);
637 #endif
638 }
639
640 static const char * const bonaire_dt_board_compat[] = {
641         "nvidia,bonaire",
642         NULL
643 };
644
645 MACHINE_START(BONAIRE, "bonaire")
646         .atag_offset    = 0x80000100,
647         .map_io         = tegra_map_common_io,
648         .reserve        = tegra_bonaire_reserve,
649         .init_early     = tegra12x_init_early,
650         .init_irq       = tegra_dt_init_irq,
651         .init_machine   = tegra_bonaire_dt_init,
652         .timer          = &tegra_sys_timer,
653         .dt_compat      = bonaire_dt_board_compat,
654 MACHINE_END