ARM: tegra12: set CPU rate to 2.2GHz for sku 0x87
[linux-3.10.git] / arch / arm / mach-tegra / board-bonaire-sdhci.c
1 /*
2  * arch/arm/mach-tegra/board-bonaire-sdhci.c
3  *
4  * Copyright (C) 2010 Google, Inc.
5  * Copyright (c) 2012-2013, NVIDIA CORPORATION. All rights reserved.
6  *
7  * This software is licensed under the terms of the GNU General Public
8  * License version 2, as published by the Free Software Foundation, and
9  * may be copied, distributed, and modified under those terms.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  * GNU General Public License for more details.
15  *
16  */
17
18 #include <linux/resource.h>
19 #include <linux/platform_device.h>
20 #include <linux/wlan_plat.h>
21 #include <linux/delay.h>
22 #include <linux/gpio.h>
23 #include <linux/clk.h>
24 #include <linux/err.h>
25 #include <linux/mmc/host.h>
26 #include <linux/platform_data/mmc-sdhci-tegra.h>
27
28 #include <asm/mach-types.h>
29 #include <mach/irqs.h>
30 #include <mach/hardware.h>
31 #include "gpio-names.h"
32 #include "board.h"
33 #include "iomap.h"
34
35 #define BONAIRE_SD_CD   TEGRA_GPIO_PV2
36 #define BONAIRE_SD_WP   TEGRA_GPIO_PQ4
37
38 static struct resource sdhci_resource0[] = {
39         [0] = {
40                 .start  = INT_SDMMC1,
41                 .end    = INT_SDMMC1,
42                 .flags  = IORESOURCE_IRQ,
43         },
44         [1] = {
45                 .start  = TEGRA_SDMMC1_BASE,
46                 .end    = TEGRA_SDMMC1_BASE + TEGRA_SDMMC1_SIZE-1,
47                 .flags  = IORESOURCE_MEM,
48         },
49 };
50
51 static struct resource sdhci_resource1[] = {
52         [0] = {
53                 .start  = INT_SDMMC2,
54                 .end    = INT_SDMMC2,
55                 .flags  = IORESOURCE_IRQ,
56         },
57         [1] = {
58                 .start  = TEGRA_SDMMC2_BASE,
59                 .end    = TEGRA_SDMMC2_BASE + TEGRA_SDMMC1_SIZE-1,
60                 .flags  = IORESOURCE_MEM,
61         },
62 };
63
64 static struct resource sdhci_resource2[] = {
65         [0] = {
66                 .start  = INT_SDMMC3,
67                 .end    = INT_SDMMC3,
68                 .flags  = IORESOURCE_IRQ,
69         },
70         [1] = {
71                 .start  = TEGRA_SDMMC3_BASE,
72                 .end    = TEGRA_SDMMC3_BASE + TEGRA_SDMMC3_SIZE-1,
73                 .flags  = IORESOURCE_MEM,
74         },
75 };
76
77 static struct resource sdhci_resource3[] = {
78         [0] = {
79                 .start  = INT_SDMMC4,
80                 .end    = INT_SDMMC4,
81                 .flags  = IORESOURCE_IRQ,
82         },
83         [1] = {
84                 .start  = TEGRA_SDMMC4_BASE,
85                 .end    = TEGRA_SDMMC4_BASE + TEGRA_SDMMC4_SIZE-1,
86                 .flags  = IORESOURCE_MEM,
87         },
88 };
89
90 static struct tegra_sdhci_platform_data tegra_sdhci_platform_data0 = {
91         .cd_gpio = -1,
92         .wp_gpio = -1,
93         .power_gpio = -1,
94         .disable_clock_gate = true,
95 /*      .max_clk = 12000000, */
96 };
97
98 static struct tegra_sdhci_platform_data tegra_sdhci_platform_data1 = {
99         .cd_gpio = -1,
100         .wp_gpio = -1,
101         .power_gpio = -1,
102 /*      .max_clk = 12000000, */
103 };
104
105 static struct tegra_sdhci_platform_data tegra_sdhci_platform_data2 = {
106         .cd_gpio = BONAIRE_SD_CD,
107         .wp_gpio = BONAIRE_SD_WP,
108         .power_gpio = -1,
109 /*      .max_clk = 12000000, */
110 };
111
112 static struct tegra_sdhci_platform_data tegra_sdhci_platform_data3 = {
113         .cd_gpio = -1,
114         .wp_gpio = -1,
115         .power_gpio = -1,
116         .is_8bit = 1,
117 /*      .max_clk = 12000000, */
118 };
119
120 static struct platform_device tegra_sdhci_device0 = {
121         .name           = "sdhci-tegra",
122         .id             = 0,
123         .resource       = sdhci_resource0,
124         .num_resources  = ARRAY_SIZE(sdhci_resource0),
125         .dev = {
126                 .platform_data = &tegra_sdhci_platform_data0,
127         },
128 };
129
130 static struct platform_device tegra_sdhci_device1 = {
131         .name           = "sdhci-tegra",
132         .id             = 1,
133         .resource       = sdhci_resource1,
134         .num_resources  = ARRAY_SIZE(sdhci_resource1),
135         .dev = {
136                 .platform_data = &tegra_sdhci_platform_data1,
137         },
138 };
139
140 static struct platform_device tegra_sdhci_device2 = {
141         .name           = "sdhci-tegra",
142         .id             = 2,
143         .resource       = sdhci_resource2,
144         .num_resources  = ARRAY_SIZE(sdhci_resource2),
145         .dev = {
146                 .platform_data = &tegra_sdhci_platform_data2,
147         },
148 };
149
150 static struct platform_device tegra_sdhci_device3 = {
151         .name           = "sdhci-tegra",
152         .id             = 3,
153         .resource       = sdhci_resource3,
154         .num_resources  = ARRAY_SIZE(sdhci_resource3),
155         .dev = {
156                 .platform_data = &tegra_sdhci_platform_data3,
157         },
158 };
159
160 int __init bonaire_sdhci_init(void)
161 {
162         if (tegra_cpu_is_asim()) {
163                 tegra_sdhci_platform_data0.mmc_data.built_in = 1;
164                 tegra_sdhci_platform_data1.mmc_data.built_in = 1;
165                 tegra_sdhci_platform_data2.mmc_data.built_in = 1;
166                 tegra_sdhci_platform_data3.mmc_data.built_in = 1;
167         }
168         platform_device_register(&tegra_sdhci_device3);
169         platform_device_register(&tegra_sdhci_device2);
170
171         return 0;
172 }