ARM: tegra: Ardbeg: update XUSB HSIC PROD setting
[linux-3.10.git] / arch / arm / mach-tegra / board-ardbeg.c
1 /*
2  * arch/arm/mach-tegra/board-ardbeg.c
3  *
4  * Copyright (c) 2013, NVIDIA CORPORATION.  All rights reserved.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope that it will be useful, but WITHOUT
11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13  * more details.
14  *
15  * You should have received a copy of the GNU General Public License along
16  * with this program; if not, write to the Free Software Foundation, Inc.,
17  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
18  */
19
20 #include <linux/kernel.h>
21 #include <linux/init.h>
22 #include <linux/slab.h>
23 #include <linux/ctype.h>
24 #include <linux/platform_device.h>
25 #include <linux/clk.h>
26 #include <linux/serial_8250.h>
27 #include <linux/i2c.h>
28 #include <linux/i2c/i2c-hid.h>
29 #include <linux/dma-mapping.h>
30 #include <linux/delay.h>
31 #include <linux/i2c-tegra.h>
32 #include <linux/gpio.h>
33 #include <linux/input.h>
34 #include <linux/platform_data/tegra_usb.h>
35 #include <linux/spi/spi.h>
36 #include <linux/spi/rm31080a_ts.h>
37 #include <linux/memblock.h>
38 #include <linux/spi/spi-tegra.h>
39 #include <linux/nfc/pn544.h>
40 #include <linux/rfkill-gpio.h>
41 #include <linux/skbuff.h>
42 #include <linux/ti_wilink_st.h>
43 #include <linux/regulator/consumer.h>
44 #include <linux/smb349-charger.h>
45 #include <linux/max17048_battery.h>
46 #include <linux/leds.h>
47 #include <linux/i2c/at24.h>
48 #include <linux/of_platform.h>
49 #include <linux/i2c.h>
50 #include <linux/i2c-tegra.h>
51 #include <linux/platform_data/serial-tegra.h>
52 #include <linux/edp.h>
53 #include <linux/usb/tegra_usb_phy.h>
54 #include <linux/mfd/palmas.h>
55 #include <linux/clk/tegra.h>
56
57 #include <mach/irqs.h>
58 #include <mach/pci.h>
59 #include <mach/tegra_fiq_debugger.h>
60
61 #include <mach/pinmux.h>
62 #include <mach/pinmux-t12.h>
63 #include <mach/io_dpd.h>
64 #include <mach/i2s.h>
65 #include <mach/isomgr.h>
66 #include <mach/tegra_asoc_pdata.h>
67 #include <asm/mach-types.h>
68 #include <asm/mach/arch.h>
69 #include <mach/gpio-tegra.h>
70 #include <mach/tegra_fiq_debugger.h>
71 #include <mach/xusb.h>
72 #include <linux/platform_data/tegra_usb_modem_power.h>
73
74 #include "board.h"
75 #include "board-ardbeg.h"
76 #include "board-common.h"
77 #include "board-touch-raydium.h"
78 #include "clock.h"
79 #include "common.h"
80 #include "devices.h"
81 #include "fuse.h"
82 #include "gpio-names.h"
83 #include "iomap.h"
84 #include "pm.h"
85 #include "pm-irq.h"
86 #include "tegra-board-id.h"
87
88 static struct board_info board_info, display_board_info;
89
90 static struct resource ardbeg_bluedroid_pm_resources[] = {
91         [0] = {
92                 .name   = "shutdown_gpio",
93                 .start  = TEGRA_GPIO_PR1,
94                 .end    = TEGRA_GPIO_PR1,
95                 .flags  = IORESOURCE_IO,
96         },
97         [1] = {
98                 .name = "host_wake",
99                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
100         },
101         [2] = {
102                 .name = "gpio_ext_wake",
103                 .start  = TEGRA_GPIO_PEE1,
104                 .end    = TEGRA_GPIO_PEE1,
105                 .flags  = IORESOURCE_IO,
106         },
107         [3] = {
108                 .name = "gpio_host_wake",
109                 .start  = TEGRA_GPIO_PU6,
110                 .end    = TEGRA_GPIO_PU6,
111                 .flags  = IORESOURCE_IO,
112         },
113         [4] = {
114                 .name = "reset_gpio",
115                 .start  = TEGRA_GPIO_PX1,
116                 .end    = TEGRA_GPIO_PX1,
117                 .flags  = IORESOURCE_IO,
118         },
119 };
120
121 static struct platform_device ardbeg_bluedroid_pm_device = {
122         .name = "bluedroid_pm",
123         .id             = 0,
124         .num_resources  = ARRAY_SIZE(ardbeg_bluedroid_pm_resources),
125         .resource       = ardbeg_bluedroid_pm_resources,
126 };
127
128 static noinline void __init ardbeg_setup_bluedroid_pm(void)
129 {
130         ardbeg_bluedroid_pm_resources[1].start =
131                 ardbeg_bluedroid_pm_resources[1].end =
132                                 gpio_to_irq(TEGRA_GPIO_PU6);
133         platform_device_register(&ardbeg_bluedroid_pm_device);
134 }
135
136 static struct i2c_board_info __initdata rt5639_board_info = {
137         I2C_BOARD_INFO("rt5639", 0x1c),
138 };
139 static struct i2c_board_info __initdata rt5645_board_info = {
140         I2C_BOARD_INFO("rt5645", 0x1a),
141 };
142
143 static __initdata struct tegra_clk_init_table ardbeg_clk_init_table[] = {
144         /* name         parent          rate            enabled */
145         { "pll_m",      NULL,           0,              false},
146         { "hda",        "pll_p",        108000000,      false},
147         { "hda2codec_2x", "pll_p",      48000000,       false},
148         { "pwm",        "pll_p",        3187500,        false},
149         { "i2s1",       "pll_a_out0",   0,              false},
150         { "i2s3",       "pll_a_out0",   0,              false},
151         { "i2s4",       "pll_a_out0",   0,              false},
152         { "spdif_out",  "pll_a_out0",   0,              false},
153         { "d_audio",    "clk_m",        12000000,       false},
154         { "dam0",       "clk_m",        12000000,       false},
155         { "dam1",       "clk_m",        12000000,       false},
156         { "dam2",       "clk_m",        12000000,       false},
157         { "audio1",     "i2s1_sync",    0,              false},
158         { "audio3",     "i2s3_sync",    0,              false},
159         { "vi_sensor",  "pll_p",        150000000,      false},
160         { "vi_sensor2", "pll_p",        150000000,      false},
161         { "cilab",      "pll_p",        150000000,      false},
162         { "cilcd",      "pll_p",        150000000,      false},
163         { "cile",       "pll_p",        150000000,      false},
164         { "i2c1",       "pll_p",        3200000,        false},
165         { "i2c2",       "pll_p",        3200000,        false},
166         { "i2c3",       "pll_p",        3200000,        false},
167         { "i2c4",       "pll_p",        3200000,        false},
168         { "i2c5",       "pll_p",        3200000,        false},
169         { "sbc1",       "pll_p",        25000000,       false},
170         { "sbc2",       "pll_p",        25000000,       false},
171         { "sbc3",       "pll_p",        25000000,       false},
172         { "sbc4",       "pll_p",        25000000,       false},
173         { "sbc5",       "pll_p",        25000000,       false},
174         { "sbc6",       "pll_p",        25000000,       false},
175         { "uarta",      "pll_p",        408000000,      false},
176         { "uartb",      "pll_p",        408000000,      false},
177         { "uartc",      "pll_p",        408000000,      false},
178         { "uartd",      "pll_p",        408000000,      false},
179         { NULL,         NULL,           0,              0},
180 };
181
182 static struct i2c_hid_platform_data i2c_keyboard_pdata = {
183         .hid_descriptor_address = 0x0,
184 };
185
186 static struct i2c_board_info __initdata i2c_keyboard_board_info = {
187         I2C_BOARD_INFO("hid", 0x3B),
188         .platform_data  = &i2c_keyboard_pdata,
189 };
190
191 static struct i2c_hid_platform_data i2c_touchpad_pdata = {
192         .hid_descriptor_address = 0x20,
193 };
194
195 static struct i2c_board_info __initdata i2c_touchpad_board_info = {
196         I2C_BOARD_INFO("hid", 0x2C),
197         .platform_data  = &i2c_touchpad_pdata,
198 };
199
200 static void ardbeg_i2c_init(void)
201 {
202         struct board_info board_info;
203         tegra_get_board_info(&board_info);
204
205         i2c_register_board_info(0, &rt5639_board_info, 1);
206         i2c_register_board_info(0, &rt5645_board_info, 1);
207
208         if (board_info.board_id == BOARD_PM359 ||
209                         board_info.board_id == BOARD_PM358 ||
210                         board_info.board_id == BOARD_PM363) {
211                 i2c_keyboard_board_info.irq = gpio_to_irq(I2C_KB_IRQ);
212                 i2c_register_board_info(1, &i2c_keyboard_board_info , 1);
213
214                 i2c_touchpad_board_info.irq = gpio_to_irq(I2C_TP_IRQ);
215                 i2c_register_board_info(1, &i2c_touchpad_board_info , 1);
216         }
217 }
218
219 #ifndef CONFIG_USE_OF
220 static struct platform_device *ardbeg_uart_devices[] __initdata = {
221         &tegra_uarta_device,
222         &tegra_uartb_device,
223         &tegra_uartc_device,
224 };
225
226 static struct tegra_serial_platform_data ardbeg_uarta_pdata = {
227         .dma_req_selector = 8,
228         .modem_interrupt = false,
229 };
230
231 static struct tegra_serial_platform_data ardbeg_uartb_pdata = {
232         .dma_req_selector = 9,
233         .modem_interrupt = false,
234 };
235
236 static struct tegra_serial_platform_data ardbeg_uartc_pdata = {
237         .dma_req_selector = 10,
238         .modem_interrupt = false,
239 };
240 #endif
241
242 static struct tegra_serial_platform_data ardbeg_uartd_pdata = {
243         .dma_req_selector = 19,
244         .modem_interrupt = false,
245 };
246
247 static struct tegra_asoc_platform_data ardbeg_audio_pdata_rt5639 = {
248         .gpio_hp_det = TEGRA_GPIO_HP_DET,
249         .gpio_ldo1_en = TEGRA_GPIO_LDO_EN,
250         .gpio_spkr_en = -1,
251         .gpio_int_mic_en = -1,
252         .gpio_ext_mic_en = -1,
253         .gpio_hp_mute = -1,
254         .gpio_codec1 = -1,
255         .gpio_codec2 = -1,
256         .gpio_codec3 = -1,
257         .i2s_param[HIFI_CODEC]       = {
258                 .audio_port_id = 1,
259                 .is_i2s_master = 0,
260                 .i2s_mode = TEGRA_DAIFMT_I2S,
261         },
262         .i2s_param[BT_SCO] = {
263                 .audio_port_id = 3,
264                 .is_i2s_master = 1,
265                 .i2s_mode = TEGRA_DAIFMT_DSP_A,
266         },
267 };
268
269 static struct tegra_asoc_platform_data ardbeg_audio_pdata_rt5645 = {
270         .gpio_hp_det = TEGRA_GPIO_HP_DET,
271         .gpio_ldo1_en = TEGRA_GPIO_LDO_EN,
272         .gpio_spkr_en = -1,
273         .gpio_int_mic_en = -1,
274         .gpio_ext_mic_en = -1,
275         .gpio_hp_mute = -1,
276         .gpio_codec1 = -1,
277         .gpio_codec2 = -1,
278         .gpio_codec3 = -1,
279         .i2s_param[HIFI_CODEC]       = {
280                 .audio_port_id = 1,
281                 .is_i2s_master = 0,
282                 .i2s_mode = TEGRA_DAIFMT_I2S,
283         },
284         .i2s_param[BT_SCO] = {
285                 .audio_port_id = 3,
286                 .is_i2s_master = 1,
287                 .i2s_mode = TEGRA_DAIFMT_DSP_A,
288         },
289 };
290
291 static void ardbeg_audio_init(void)
292 {
293         struct board_info board_info;
294         tegra_get_board_info(&board_info);
295         if (board_info.board_id == BOARD_PM359 ||
296                         board_info.board_id == BOARD_PM358 ||
297                         board_info.board_id == BOARD_PM363) {
298                 /*Laguna*/
299                 ardbeg_audio_pdata_rt5645.gpio_hp_det =
300                         TEGRA_GPIO_HP_DET;
301                 ardbeg_audio_pdata_rt5645.gpio_hp_det_active_high = 1;
302                 if (board_info.board_id != BOARD_PM363)
303                         ardbeg_audio_pdata_rt5645.gpio_ldo1_en = -1;
304         } else {
305                 /*Ardbeg*/
306                 ardbeg_audio_pdata_rt5645.gpio_hp_det =
307                         TEGRA_GPIO_HP_DET;
308                 ardbeg_audio_pdata_rt5645.gpio_hp_det_active_high = 0;
309                 ardbeg_audio_pdata_rt5645.gpio_ldo1_en =
310                         TEGRA_GPIO_LDO_EN;
311         }
312
313         ardbeg_audio_pdata_rt5639.gpio_hp_det =
314                 ardbeg_audio_pdata_rt5645.gpio_hp_det;
315
316         ardbeg_audio_pdata_rt5639.gpio_hp_det_active_high =
317                 ardbeg_audio_pdata_rt5645.gpio_hp_det_active_high;
318
319         ardbeg_audio_pdata_rt5639.gpio_ldo1_en =
320                 ardbeg_audio_pdata_rt5645.gpio_ldo1_en;
321
322         ardbeg_audio_pdata_rt5639.codec_name = "rt5639.0-001c";
323         ardbeg_audio_pdata_rt5639.codec_dai_name = "rt5639-aif1";
324         ardbeg_audio_pdata_rt5645.codec_name = "rt5645.0-001a";
325         ardbeg_audio_pdata_rt5645.codec_dai_name = "rt5645-aif1";
326 }
327
328 static struct platform_device ardbeg_audio_device_rt5645 = {
329         .name = "tegra-snd-rt5645",
330         .id = 0,
331         .dev = {
332                 .platform_data = &ardbeg_audio_pdata_rt5645,
333         },
334 };
335
336 static struct platform_device ardbeg_audio_device_rt5639 = {
337         .name = "tegra-snd-rt5639",
338         .id = 0,
339         .dev = {
340                 .platform_data = &ardbeg_audio_pdata_rt5639,
341         },
342 };
343
344 static void __init ardbeg_uart_init(void)
345 {
346         int debug_port_id;
347
348 #ifndef CONFIG_USE_OF
349         tegra_uarta_device.dev.platform_data = &ardbeg_uarta_pdata;
350         tegra_uartb_device.dev.platform_data = &ardbeg_uartb_pdata;
351         tegra_uartc_device.dev.platform_data = &ardbeg_uartc_pdata;
352         platform_add_devices(ardbeg_uart_devices,
353                         ARRAY_SIZE(ardbeg_uart_devices));
354 #endif
355         tegra_uartd_device.dev.platform_data = &ardbeg_uartd_pdata;
356         if (!is_tegra_debug_uartport_hs()) {
357                 debug_port_id = uart_console_debug_init(3);
358                 if (debug_port_id < 0)
359                         return;
360
361                 platform_device_register(uart_console_debug_device);
362         } else {
363                 tegra_uartd_device.dev.platform_data = &ardbeg_uartd_pdata;
364                 platform_device_register(&tegra_uartd_device);
365         }
366
367 }
368
369 static struct resource tegra_rtc_resources[] = {
370         [0] = {
371                 .start = TEGRA_RTC_BASE,
372                 .end = TEGRA_RTC_BASE + TEGRA_RTC_SIZE - 1,
373                 .flags = IORESOURCE_MEM,
374         },
375         [1] = {
376                 .start = INT_RTC,
377                 .end = INT_RTC,
378                 .flags = IORESOURCE_IRQ,
379         },
380 };
381
382 static struct platform_device tegra_rtc_device = {
383         .name = "tegra_rtc",
384         .id   = -1,
385         .resource = tegra_rtc_resources,
386         .num_resources = ARRAY_SIZE(tegra_rtc_resources),
387 };
388
389 #ifdef CONFIG_SATA_AHCI_TEGRA
390 static void bonaire_sata_init(void)
391 {
392         platform_device_register(&tegra_sata_device);
393 }
394 #else
395 static void bonaire_sata_init(void) { }
396 #endif
397
398 static struct tegra_pci_platform_data laguna_pcie_platform_data = {
399         .port_status[0] = 1,
400         .port_status[1] = 1,
401         .use_dock_detect        = 1,
402         .gpio   = TEGRA_GPIO_PO1,
403         .gpio_x1_slot   = PMU_TCA6416_GPIO(8),
404 };
405
406 static void laguna_pcie_init(void)
407 {
408         struct board_info board_info;
409
410         tegra_get_board_info(&board_info);
411         /* root port 1(x1 slot) is supported only on of ERS-S board */
412         if (board_info.board_id == BOARD_PM358 ||
413                 board_info.board_id == BOARD_PM363)
414                         laguna_pcie_platform_data.port_status[1] = 0;
415
416         tegra_pci_device.dev.platform_data = &laguna_pcie_platform_data;
417         platform_device_register(&tegra_pci_device);
418 }
419
420 static struct platform_device *ardbeg_devices[] __initdata = {
421         &tegra_pmu_device,
422         &tegra_rtc_device,
423         &tegra_udc_device,
424 #if defined(CONFIG_TEGRA_AVP)
425         &tegra_avp_device,
426 #endif
427 #if defined(CONFIG_CRYPTO_DEV_TEGRA_SE)
428         &tegra12_se_device,
429 #endif
430         &tegra_ahub_device,
431         &tegra_dam_device0,
432         &tegra_dam_device1,
433         &tegra_dam_device2,
434         &tegra_i2s_device1,
435         &tegra_i2s_device3,
436         &tegra_i2s_device4,
437         &ardbeg_audio_device_rt5639,
438         &tegra_spdif_device,
439         &spdif_dit_device,
440         &bluetooth_dit_device,
441         &tegra_hda_device,
442 #if defined(CONFIG_CRYPTO_DEV_TEGRA_AES)
443         &tegra_aes_device,
444 #endif
445 };
446
447 static struct tegra_usb_platform_data tegra_udc_pdata = {
448         .port_otg = true,
449         .has_hostpc = true,
450         .unaligned_dma_buf_supported = false,
451         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
452         .op_mode = TEGRA_USB_OPMODE_DEVICE,
453         .u_data.dev = {
454                 .vbus_pmu_irq = 0,
455                 .vbus_gpio = -1,
456                 .charging_supported = false,
457                 .remote_wakeup_supported = false,
458         },
459         .u_cfg.utmi = {
460                 .hssync_start_delay = 0,
461                 .elastic_limit = 16,
462                 .idle_wait_delay = 17,
463                 .term_range_adj = 6,
464                 .xcvr_setup = 8,
465                 .xcvr_lsfslew = 2,
466                 .xcvr_lsrslew = 2,
467                 .xcvr_setup_offset = 0,
468                 .xcvr_use_fuses = 1,
469         },
470 };
471
472 static struct tegra_usb_platform_data tegra_ehci1_utmi_pdata = {
473         .port_otg = true,
474         .has_hostpc = true,
475         .unaligned_dma_buf_supported = false,
476         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
477         .op_mode = TEGRA_USB_OPMODE_HOST,
478         .u_data.host = {
479                 .vbus_gpio = -1,
480                 .hot_plug = false,
481                 .remote_wakeup_supported = true,
482                 .power_off_on_suspend = true,
483         },
484         .u_cfg.utmi = {
485                 .hssync_start_delay = 0,
486                 .elastic_limit = 16,
487                 .idle_wait_delay = 17,
488                 .term_range_adj = 6,
489                 .xcvr_setup = 15,
490                 .xcvr_lsfslew = 0,
491                 .xcvr_lsrslew = 3,
492                 .xcvr_setup_offset = 0,
493                 .xcvr_use_fuses = 0,
494                 .vbus_oc_map = 0x4,
495                 .xcvr_hsslew_lsb = 2,
496         },
497 };
498
499 static struct tegra_usb_platform_data tegra_ehci2_utmi_pdata = {
500         .port_otg = false,
501         .has_hostpc = true,
502         .unaligned_dma_buf_supported = false,
503         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
504         .op_mode = TEGRA_USB_OPMODE_HOST,
505         .u_data.host = {
506                 .vbus_gpio = -1,
507                 .hot_plug = false,
508                 .remote_wakeup_supported = true,
509                 .power_off_on_suspend = true,
510         },
511         .u_cfg.utmi = {
512                 .hssync_start_delay = 0,
513                 .elastic_limit = 16,
514                 .idle_wait_delay = 17,
515                 .term_range_adj = 6,
516                 .xcvr_setup = 8,
517                 .xcvr_lsfslew = 2,
518                 .xcvr_lsrslew = 2,
519                 .xcvr_setup_offset = 0,
520                 .xcvr_use_fuses = 1,
521                 .vbus_oc_map = 0x5,
522         },
523 };
524
525 static struct tegra_usb_platform_data tegra_ehci3_utmi_pdata = {
526         .port_otg = false,
527         .has_hostpc = true,
528         .unaligned_dma_buf_supported = false,
529         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
530         .op_mode = TEGRA_USB_OPMODE_HOST,
531         .u_data.host = {
532                 .vbus_gpio = -1,
533                 .hot_plug = false,
534                 .remote_wakeup_supported = true,
535                 .power_off_on_suspend = true,
536         },
537         .u_cfg.utmi = {
538         .hssync_start_delay = 0,
539                 .elastic_limit = 16,
540                 .idle_wait_delay = 17,
541                 .term_range_adj = 6,
542                 .xcvr_setup = 8,
543                 .xcvr_lsfslew = 2,
544                 .xcvr_lsrslew = 2,
545                 .xcvr_setup_offset = 0,
546                 .xcvr_use_fuses = 1,
547                 .vbus_oc_map = 0x5,
548         },
549 };
550
551 static struct gpio modem_gpios[] = { /* Bruce modem */
552         {MODEM_EN, GPIOF_OUT_INIT_HIGH, "MODEM EN"},
553         {MDM_RST, GPIOF_OUT_INIT_LOW, "MODEM RESET"},
554 };
555
556 static struct tegra_usb_platform_data tegra_ehci2_hsic_baseband_pdata = {
557         .port_otg = false,
558         .has_hostpc = true,
559         .unaligned_dma_buf_supported = false,
560         .phy_intf = TEGRA_USB_PHY_INTF_HSIC,
561         .op_mode = TEGRA_USB_OPMODE_HOST,
562         .u_data.host = {
563                 .vbus_gpio = -1,
564                 .hot_plug = false,
565                 .remote_wakeup_supported = true,
566                 .power_off_on_suspend = true,
567         },
568 };
569
570 static struct tegra_usb_platform_data tegra_ehci2_hsic_smsc_hub_pdata = {
571         .port_otg = false,
572         .has_hostpc = true,
573         .unaligned_dma_buf_supported = false,
574         .phy_intf = TEGRA_USB_PHY_INTF_HSIC,
575         .op_mode        = TEGRA_USB_OPMODE_HOST,
576         .u_data.host = {
577                 .vbus_gpio = -1,
578                 .hot_plug = false,
579                 .remote_wakeup_supported = true,
580                 .power_off_on_suspend = true,
581         },
582 };
583
584
585 static struct tegra_usb_otg_data tegra_otg_pdata = {
586         .ehci_device = &tegra_ehci1_device,
587         .ehci_pdata = &tegra_ehci1_utmi_pdata,
588 };
589
590 static void ardbeg_usb_init(void)
591 {
592         int usb_port_owner_info = tegra_get_usb_port_owner_info();
593         int modem_id = tegra_get_modem_id();
594         struct board_info bi;
595
596         if (board_info.board_id == BOARD_PM359 ||
597                         board_info.board_id == BOARD_PM358 ||
598                         board_info.board_id == BOARD_PM363) {
599                 /* Laguna */
600                 /* Host cable is detected through AMS PMU Interrupt */
601                 tegra_udc_pdata.id_det_type = TEGRA_USB_PMU_ID;
602                 tegra_ehci1_utmi_pdata.id_det_type = TEGRA_USB_PMU_ID;
603                 tegra_otg_pdata.id_extcon_dev_name = "as3722-extcon";
604         } else {
605                 /* Ardbeg */
606                 tegra_get_pmu_board_info(&bi);
607
608                 switch (bi.board_id) {
609                 case BOARD_E1733:
610                         /* Host cable is detected through PMU Interrupt */
611                         tegra_udc_pdata.id_det_type = TEGRA_USB_PMU_ID;
612                         tegra_ehci1_utmi_pdata.id_det_type = TEGRA_USB_PMU_ID;
613                         tegra_otg_pdata.id_extcon_dev_name = "as3722-extcon";
614                         break;
615                 case BOARD_E1736:
616                 case BOARD_E1735:
617                         /* Device cable is detected through PMU Interrupt */
618                         tegra_udc_pdata.support_pmu_vbus = true;
619                         tegra_ehci1_utmi_pdata.support_pmu_vbus = true;
620                         tegra_otg_pdata.vbus_extcon_dev_name = "palmas-extcon";
621                         /* Host cable is detected through PMU Interrupt */
622                         tegra_udc_pdata.id_det_type = TEGRA_USB_PMU_ID;
623                         tegra_ehci1_utmi_pdata.id_det_type = TEGRA_USB_PMU_ID;
624                         tegra_otg_pdata.id_extcon_dev_name = "palmas-extcon";
625                 }
626         }
627
628         if (!(usb_port_owner_info & UTMI1_PORT_OWNER_XUSB)) {
629                 tegra_otg_pdata.is_xhci = false;
630                 tegra_udc_pdata.u_data.dev.is_xhci = false;
631         } else {
632                 tegra_otg_pdata.is_xhci = true;
633                 tegra_udc_pdata.u_data.dev.is_xhci = true;
634         }
635         tegra_otg_device.dev.platform_data = &tegra_otg_pdata;
636         platform_device_register(&tegra_otg_device);
637         /* Setup the udc platform data */
638         tegra_udc_device.dev.platform_data = &tegra_udc_pdata;
639
640         if (!(usb_port_owner_info & UTMI2_PORT_OWNER_XUSB)) {
641                 if (!modem_id) {
642                         tegra_ehci2_device.dev.platform_data =
643                                 &tegra_ehci2_utmi_pdata;
644                         platform_device_register(&tegra_ehci2_device);
645                 }
646         }
647         if (!(usb_port_owner_info & UTMI2_PORT_OWNER_XUSB)) {
648                 tegra_ehci3_device.dev.platform_data = &tegra_ehci3_utmi_pdata;
649                 platform_device_register(&tegra_ehci3_device);
650         }
651 }
652
653 static struct tegra_xusb_board_data xusb_bdata = {
654         .portmap = TEGRA_XUSB_SS_P0 | TEGRA_XUSB_USB2_P0 | TEGRA_XUSB_SS_P1 |
655                         TEGRA_XUSB_USB2_P1 | TEGRA_XUSB_USB2_P2,
656         .supply = {
657                 .s5p0v = "usb_vbus0",
658                 .s5p0v1 = "usb_vbus1",
659                 .s5p0v2 = "usb_vbus2",
660                 .s3p3v = "hvdd_usb",
661                 .s1p8v = "avdd_pll_utmip",
662                 .vddio_hsic = "vddio_hsic",
663                 .s1p05v = "avddio_usb",
664         },
665
666         .hsic[0] = {
667                 .rx_strobe_trim = 0x1,
668                 .rx_data_trim = 0x1,
669                 .tx_rtune_n = 0x8,
670                 .tx_rtune_p = 0xa,
671                 .tx_slew_n = 0,
672                 .tx_slew_p = 0,
673                 .auto_term_en = true,
674                 .strb_trim_val = 0x22,
675                 .pretend_connect = false,
676         },
677         .uses_external_pmic = false,
678         .uses_different_vbus_per_port = true,
679 };
680
681 static void ardbeg_xusb_init(void)
682 {
683         int usb_port_owner_info = tegra_get_usb_port_owner_info();
684
685         xusb_bdata.lane_owner = (u8) tegra_get_lane_owner_info();
686
687         if (board_info.board_id == BOARD_PM359 ||
688                         board_info.board_id == BOARD_PM358 ||
689                         board_info.board_id == BOARD_PM363) {
690                 /* Laguna */
691                 pr_info("Laguna ERS. 0x%x\n", board_info.board_id);
692                 xusb_bdata.gpio_controls_muxed_ss_lanes = true;
693                 /* D[0:15] = gpio number and D[16:31] = output value */
694                 xusb_bdata.gpio_ss1_sata = PMU_TCA6416_GPIO(9) | (0 << 16);
695                 xusb_bdata.ss_portmap = (TEGRA_XUSB_SS_PORT_MAP_USB2_P0 << 0) |
696                         (TEGRA_XUSB_SS_PORT_MAP_USB2_P1 << 4);
697
698                 if (!(usb_port_owner_info & UTMI1_PORT_OWNER_XUSB))
699                         xusb_bdata.portmap &= ~(TEGRA_XUSB_USB2_P0 |
700                                 TEGRA_XUSB_SS_P0);
701
702                 if (!(usb_port_owner_info & UTMI2_PORT_OWNER_XUSB))
703                         xusb_bdata.portmap &= ~(TEGRA_XUSB_USB2_P1 |
704                                 TEGRA_XUSB_SS_P1 | TEGRA_XUSB_USB2_P2);
705
706                 /* FIXME Add for UTMIP2 when have odmdata assigend */
707         } else {
708                 /* Ardbeg */
709                 xusb_bdata.gpio_controls_muxed_ss_lanes = false;
710
711                 if (board_info.board_id == BOARD_E1781) {
712                         pr_info("Shield ERS-S. 0x%x\n", board_info.board_id);
713                         /* Shield ERS-S */
714                         xusb_bdata.ss_portmap =
715                                 (TEGRA_XUSB_SS_PORT_MAP_USB2_P1 << 0) |
716                                 (TEGRA_XUSB_SS_PORT_MAP_USB2_P2 << 4);
717
718                         if (!(usb_port_owner_info & UTMI1_PORT_OWNER_XUSB))
719                                 xusb_bdata.portmap &= ~(TEGRA_XUSB_USB2_P0);
720
721                         if (!(usb_port_owner_info & UTMI2_PORT_OWNER_XUSB))
722                                 xusb_bdata.portmap &= ~(
723                                         TEGRA_XUSB_USB2_P1 | TEGRA_XUSB_SS_P0 |
724                                         TEGRA_XUSB_USB2_P2 | TEGRA_XUSB_SS_P1);
725                 } else {
726                         pr_info("Shield ERS 0x%x\n", board_info.board_id);
727                         /* Shield ERS */
728                         xusb_bdata.ss_portmap =
729                                 (TEGRA_XUSB_SS_PORT_MAP_USB2_P0 << 0) |
730                                 (TEGRA_XUSB_SS_PORT_MAP_USB2_P2 << 4);
731
732                         if (!(usb_port_owner_info & UTMI1_PORT_OWNER_XUSB))
733                                 xusb_bdata.portmap &= ~(TEGRA_XUSB_USB2_P0 |
734                                         TEGRA_XUSB_SS_P0);
735
736                         if (!(usb_port_owner_info & UTMI2_PORT_OWNER_XUSB))
737                                 xusb_bdata.portmap &= ~(TEGRA_XUSB_USB2_P1 |
738                                         TEGRA_XUSB_USB2_P2 | TEGRA_XUSB_SS_P1);
739                 }
740                 /* FIXME Add for UTMIP2 when have odmdata assigend */
741         }
742
743         if (usb_port_owner_info & HSIC1_PORT_OWNER_XUSB)
744                 xusb_bdata.portmap |= TEGRA_XUSB_HSIC_P0;
745
746         if (usb_port_owner_info & HSIC2_PORT_OWNER_XUSB)
747                 xusb_bdata.portmap |= TEGRA_XUSB_HSIC_P1;
748
749         if (xusb_bdata.portmap)
750                 tegra_xusb_init(&xusb_bdata);
751 }
752
753 static int baseband_init(void)
754 {
755         int ret;
756
757         ret = gpio_request_array(modem_gpios, ARRAY_SIZE(modem_gpios));
758         if (ret) {
759                 pr_warn("%s:gpio request failed\n", __func__);
760                 return ret;
761         }
762
763         /* enable pull-down for MDM_COLD_BOOT */
764         tegra_pinmux_set_pullupdown(TEGRA_PINGROUP_ULPI_DATA4,
765                                     TEGRA_PUPD_PULL_DOWN);
766
767         /* export GPIO for user space access through sysfs */
768         gpio_export(MDM_RST, false);
769
770         return 0;
771 }
772
773 static const struct tegra_modem_operations baseband_operations = {
774         .init = baseband_init,
775 };
776
777 static struct tegra_usb_modem_power_platform_data baseband_pdata = {
778         .ops = &baseband_operations,
779         .regulator_name = "vdd_wwan_mdm",
780         .wake_gpio = -1,
781         .boot_gpio = MDM_COLDBOOT,
782         .boot_irq_flags = IRQF_TRIGGER_RISING |
783                                     IRQF_TRIGGER_FALLING |
784                                     IRQF_ONESHOT,
785         .autosuspend_delay = 2000,
786         .short_autosuspend_delay = 50,
787         .tegra_ehci_device = &tegra_ehci2_device,
788         .tegra_ehci_pdata = &tegra_ehci2_hsic_baseband_pdata,
789 };
790
791 static struct platform_device icera_bruce_device = {
792         .name = "tegra_usb_modem_power",
793         .id = -1,
794         .dev = {
795                 .platform_data = &baseband_pdata,
796         },
797 };
798
799 static void ardbeg_modem_init(void)
800 {
801         int modem_id = tegra_get_modem_id();
802         struct board_info board_info;
803         int usb_port_owner_info = tegra_get_usb_port_owner_info();
804
805         tegra_get_board_info(&board_info);
806         pr_info("%s: modem_id = %d\n", __func__, modem_id);
807
808         switch (modem_id) {
809         case TEGRA_BB_BRUCE:
810                 if (!(usb_port_owner_info & HSIC1_PORT_OWNER_XUSB)) {
811                         /* Set specific USB wake source for Ardbeg */
812                         if (board_info.board_id == BOARD_E1780)
813                                 tegra_set_wake_source(42, INT_USB2);
814                         platform_device_register(&icera_bruce_device);
815                 }
816                 break;
817         case TEGRA_BB_HSIC_HUB: /* HSIC hub */
818                 if (!(usb_port_owner_info & HSIC1_PORT_OWNER_XUSB)) {
819                         tegra_ehci2_device.dev.platform_data =
820                                 &tegra_ehci2_hsic_smsc_hub_pdata;
821                         /* Set specific USB wake source for Ardbeg */
822                         if (board_info.board_id == BOARD_E1780)
823                                 tegra_set_wake_source(42, INT_USB2);
824                         platform_device_register(&tegra_ehci2_device);
825                 } else
826                         xusb_bdata.hsic[0].pretend_connect = true;
827                 break;
828         default:
829                 return;
830         }
831 }
832
833 #ifndef CONFIG_USE_OF
834 static struct platform_device *ardbeg_spi_devices[] __initdata = {
835         &tegra11_spi_device1,
836         &tegra11_spi_device4,
837 };
838
839 static struct tegra_spi_platform_data ardbeg_spi1_pdata = {
840         .dma_req_sel            = 15,
841         .spi_max_frequency      = 25000000,
842         .clock_always_on        = false,
843 };
844
845 static struct tegra_spi_platform_data ardbeg_spi4_pdata = {
846         .dma_req_sel            = 18,
847         .spi_max_frequency      = 25000000,
848         .clock_always_on        = false,
849 };
850
851 static void __init ardbeg_spi_init(void)
852 {
853         tegra11_spi_device1.dev.platform_data = &ardbeg_spi1_pdata;
854         tegra11_spi_device4.dev.platform_data = &ardbeg_spi4_pdata;
855         platform_add_devices(ardbeg_spi_devices,
856                         ARRAY_SIZE(ardbeg_spi_devices));
857 }
858 #else
859 static void __init ardbeg_spi_init(void)
860 {
861 }
862 #endif
863
864 #ifdef CONFIG_USE_OF
865 struct of_dev_auxdata ardbeg_auxdata_lookup[] __initdata = {
866         OF_DEV_AUXDATA("nvidia,tegra114-spi", 0x7000d400, "spi-tegra114.0",
867                                 NULL),
868         OF_DEV_AUXDATA("nvidia,tegra114-spi", 0x7000d600, "spi-tegra114.1",
869                                 NULL),
870         OF_DEV_AUXDATA("nvidia,tegra114-spi", 0x7000d800, "spi-tegra114.2",
871                                 NULL),
872         OF_DEV_AUXDATA("nvidia,tegra114-spi", 0x7000da00, "spi-tegra114.3",
873                                 NULL),
874         OF_DEV_AUXDATA("nvidia,tegra114-spi", 0x7000dc00, "spi-tegra114.4",
875                                 NULL),
876         OF_DEV_AUXDATA("nvidia,tegra114-spi", 0x7000de00, "spi-tegra114.5",
877                                 NULL),
878         OF_DEV_AUXDATA("nvidia,tegra124-apbdma", 0x60020000, "tegra-apbdma",
879                                 NULL),
880         OF_DEV_AUXDATA("nvidia,tegra124-host1x", TEGRA_HOST1X_BASE, "host1x",
881                 NULL),
882         OF_DEV_AUXDATA("nvidia,tegra124-gk20a", 0x538F0000, "gk20a", NULL),
883         OF_DEV_AUXDATA("nvidia,tegra124-vic", TEGRA_VIC_BASE, "vic03", NULL),
884         OF_DEV_AUXDATA("nvidia,tegra124-msenc", TEGRA_MSENC_BASE, "msenc",
885                 NULL),
886         OF_DEV_AUXDATA("nvidia,tegra124-vi", TEGRA_VI_BASE, "vi", NULL),
887         OF_DEV_AUXDATA("nvidia,tegra124-isp", TEGRA_ISP_BASE, "isp", NULL),
888         OF_DEV_AUXDATA("nvidia,tegra124-tsec", TEGRA_TSEC_BASE, "tsec", NULL),
889         OF_DEV_AUXDATA("nvidia,tegra114-hsuart", 0x70006000, "serial-tegra.0",
890                                 NULL),
891         OF_DEV_AUXDATA("nvidia,tegra114-hsuart", 0x70006040, "serial-tegra.1",
892                                 NULL),
893         OF_DEV_AUXDATA("nvidia,tegra114-hsuart", 0x70006200, "serial-tegra.2",
894                                 NULL),
895         OF_DEV_AUXDATA("nvidia,tegra124-i2c", 0x7000c000, "tegra12-i2c.0",
896                                 NULL),
897         OF_DEV_AUXDATA("nvidia,tegra124-i2c", 0x7000c400, "tegra12-i2c.1",
898                                 NULL),
899         OF_DEV_AUXDATA("nvidia,tegra124-i2c", 0x7000c500, "tegra12-i2c.2",
900                                 NULL),
901         OF_DEV_AUXDATA("nvidia,tegra124-i2c", 0x7000c700, "tegra12-i2c.3",
902                                 NULL),
903         OF_DEV_AUXDATA("nvidia,tegra124-i2c", 0x7000d000, "tegra12-i2c.4",
904                                 NULL),
905         OF_DEV_AUXDATA("nvidia,tegra124-i2c", 0x7000d100, "tegra12-i2c.5",
906                                 NULL),
907         {}
908 };
909 #endif
910
911 static __initdata struct tegra_clk_init_table touch_clk_init_table[] = {
912         /* name         parent          rate            enabled */
913         { "extern2",    "pll_p",        41000000,       false},
914         { "clk_out_2",  "extern2",      40800000,       false},
915         { NULL,         NULL,           0,              0},
916 };
917
918 struct rm_spi_ts_platform_data rm31080ts_ardbeg_data = {
919         .gpio_reset = TOUCH_GPIO_RST_RAYDIUM_SPI,
920         .config = 0,
921         .platform_id = RM_PLATFORM_A010,
922         .name_of_clock = "clk_out_2",
923         .name_of_clock_con = "extern2",
924 };
925
926 static struct tegra_spi_device_controller_data dev_cdata = {
927         .rx_clk_tap_delay = 16,
928         .tx_clk_tap_delay = 16,
929 };
930
931 struct spi_board_info rm31080a_ardbeg_spi_board[1] = {
932         {
933                 .modalias = "rm_ts_spidev",
934                 .bus_num = TOUCH_SPI_ID,
935                 .chip_select = TOUCH_SPI_CS,
936                 .max_speed_hz = 12 * 1000 * 1000,
937                 .mode = SPI_MODE_0,
938                 .controller_data = &dev_cdata,
939                 .platform_data = &rm31080ts_ardbeg_data,
940         },
941 };
942
943 static int __init ardbeg_touch_init(void)
944 {
945         tegra_clk_init_from_table(touch_clk_init_table);
946         rm31080a_ardbeg_spi_board[0].irq =
947                 gpio_to_irq(TOUCH_GPIO_IRQ_RAYDIUM_SPI);
948         touch_init_raydium(TOUCH_GPIO_IRQ_RAYDIUM_SPI,
949                                 TOUCH_GPIO_RST_RAYDIUM_SPI,
950                                 &rm31080ts_ardbeg_data,
951                                 &rm31080a_ardbeg_spi_board[0],
952                                 ARRAY_SIZE(rm31080a_ardbeg_spi_board));
953         return 0;
954 }
955
956 static void __init tegra_ardbeg_early_init(void)
957 {
958         tegra_clk_init_from_table(ardbeg_clk_init_table);
959         tegra_clk_verify_parents();
960         if (of_machine_is_compatible("nvidia,laguna"))
961                 tegra_soc_device_init("laguna");
962         else if (of_machine_is_compatible("nvidia,tn8"))
963                 tegra_soc_device_init("tn8");
964         else
965                 tegra_soc_device_init("ardbeg");
966 }
967
968 static void __init tegra_ardbeg_late_init(void)
969 {
970         struct board_info board_info;
971         tegra_get_board_info(&board_info);
972         pr_info("board_info: id:sku:fab:major:minor = 0x%04x:0x%04x:0x%02x:0x%02x:0x%02x\n",
973                 board_info.board_id, board_info.sku,
974                 board_info.fab, board_info.major_revision,
975                 board_info.minor_revision);
976         platform_device_register(&tegra_pinmux_device);
977         if (board_info.board_id == BOARD_PM359 ||
978                         board_info.board_id == BOARD_PM358 ||
979                         board_info.board_id == BOARD_PM363)
980                 laguna_pinmux_init();
981         else
982                 ardbeg_pinmux_init();
983         ardbeg_usb_init();
984         ardbeg_modem_init();
985         ardbeg_xusb_init();
986         ardbeg_i2c_init();
987         ardbeg_spi_init();
988         ardbeg_uart_init();
989         ardbeg_audio_init();
990         platform_add_devices(ardbeg_devices, ARRAY_SIZE(ardbeg_devices));
991         //tegra_ram_console_debug_init();
992         tegra_io_dpd_init();
993         ardbeg_sdhci_init();
994         if (board_info.board_id == BOARD_PM359 ||
995                         board_info.board_id == BOARD_PM358 ||
996                         board_info.board_id == BOARD_PM363)
997                 laguna_regulator_init();
998         else
999                 ardbeg_regulator_init();
1000         ardbeg_suspend_init();
1001 /* TODO: add support for laguna board when dvfs table is ready */
1002         if (board_info.board_id == BOARD_E1780)
1003                 ardbeg_emc_init();
1004
1005         ardbeg_edp_init();
1006         isomgr_init();
1007         ardbeg_touch_init();
1008         ardbeg_panel_init();
1009         ardbeg_kbc_init();
1010         if (board_info.board_id == BOARD_PM358)
1011                 laguna_pm358_pmon_init();
1012         else
1013                 ardbeg_pmon_init();
1014         if (board_info.board_id == BOARD_PM359 ||
1015                         board_info.board_id == BOARD_PM358 ||
1016                         board_info.board_id == BOARD_PM363)
1017                 laguna_pcie_init();
1018 #ifdef CONFIG_TEGRA_WDT_RECOVERY
1019         tegra_wdt_recovery_init();
1020 #endif
1021         tegra_serial_debug_init(TEGRA_UARTD_BASE, INT_WDT_CPU, NULL, -1, -1);
1022
1023         ardbeg_sensors_init();
1024
1025         ardbeg_soctherm_init();
1026
1027         ardbeg_setup_bluedroid_pm();
1028         tegra_register_fuse();
1029         bonaire_sata_init();
1030         tegra_serial_debug_init(TEGRA_UARTD_BASE, INT_WDT_CPU, NULL, -1, -1);
1031 }
1032
1033 static void __init ardbeg_ramconsole_reserve(unsigned long size)
1034 {
1035         tegra_ram_console_debug_reserve(SZ_1M);
1036 }
1037
1038 static void __init tegra_ardbeg_init_early(void)
1039 {
1040         ardbeg_rail_alignment_init();
1041         tegra12x_init_early();
1042 }
1043
1044 static void __init tegra_ardbeg_dt_init(void)
1045 {
1046         tegra_get_board_info(&board_info);
1047         tegra_get_display_board_info(&display_board_info);
1048
1049         tegra_ardbeg_early_init();
1050 #ifdef CONFIG_USE_OF
1051         of_platform_populate(NULL,
1052                 of_default_bus_match_table, ardbeg_auxdata_lookup,
1053                 &platform_bus);
1054 #endif
1055
1056         tegra_ardbeg_late_init();
1057 }
1058
1059 static void __init tegra_ardbeg_reserve(void)
1060 {
1061 #if defined(CONFIG_NVMAP_CONVERT_CARVEOUT_TO_IOVMM) || \
1062                 defined(CONFIG_TEGRA_NO_CARVEOUT)
1063         /* 1920*1200*4*2 = 18432000 bytes */
1064         tegra_reserve(0, SZ_16M + SZ_2M, SZ_16M);
1065 #else
1066         tegra_reserve(SZ_1G, SZ_16M + SZ_2M, SZ_4M);
1067 #endif
1068         ardbeg_ramconsole_reserve(SZ_1M);
1069 }
1070
1071 static const char * const ardbeg_dt_board_compat[] = {
1072         "nvidia,ardbeg",
1073         NULL
1074 };
1075
1076 static const char * const laguna_dt_board_compat[] = {
1077         "nvidia,laguna",
1078         NULL
1079 };
1080
1081 static const char * const tn8_dt_board_compat[] = {
1082         "nvidia,tn8",
1083         NULL
1084 };
1085
1086 DT_MACHINE_START(LAGUNA, "laguna")
1087         .atag_offset    = 0x100,
1088         .smp            = smp_ops(tegra_smp_ops),
1089         .map_io         = tegra_map_common_io,
1090         .reserve        = tegra_ardbeg_reserve,
1091         .init_early     = tegra_ardbeg_init_early,
1092         .init_irq       = tegra_dt_init_irq,
1093         .init_time      = tegra_init_timer,
1094         .init_machine   = tegra_ardbeg_dt_init,
1095         .restart        = tegra_assert_system_reset,
1096         .dt_compat      = laguna_dt_board_compat,
1097 MACHINE_END
1098
1099 DT_MACHINE_START(TN8, "tn8")
1100         .atag_offset    = 0x100,
1101         .smp            = smp_ops(tegra_smp_ops),
1102         .map_io         = tegra_map_common_io,
1103         .reserve        = tegra_ardbeg_reserve,
1104         .init_early     = tegra_ardbeg_init_early,
1105         .init_irq       = tegra_dt_init_irq,
1106         .init_time      = tegra_init_timer,
1107         .init_machine   = tegra_ardbeg_dt_init,
1108         .restart        = tegra_assert_system_reset,
1109         .dt_compat      = tn8_dt_board_compat,
1110 MACHINE_END
1111
1112 DT_MACHINE_START(ARDBEG, "ardbeg")
1113         .atag_offset    = 0x100,
1114         .smp            = smp_ops(tegra_smp_ops),
1115         .map_io         = tegra_map_common_io,
1116         .reserve        = tegra_ardbeg_reserve,
1117         .init_early     = tegra_ardbeg_init_early,
1118         .init_irq       = tegra_dt_init_irq,
1119         .init_time      = tegra_init_timer,
1120         .init_machine   = tegra_ardbeg_dt_init,
1121         .restart        = tegra_assert_system_reset,
1122         .dt_compat      = ardbeg_dt_board_compat,
1123         .init_late      = tegra_init_late
1124 MACHINE_END