459872af1176b94a45a477cf5566028859bf96e2
[linux-3.10.git] / arch / arm / mach-tegra / board-ardbeg.c
1 /*
2  * arch/arm/mach-tegra/board-ardbeg.c
3  *
4  * Copyright (c) 2013, NVIDIA CORPORATION.  All rights reserved.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope that it will be useful, but WITHOUT
11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13  * more details.
14  *
15  * You should have received a copy of the GNU General Public License along
16  * with this program; if not, write to the Free Software Foundation, Inc.,
17  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
18  */
19
20 #include <linux/kernel.h>
21 #include <linux/init.h>
22 #include <linux/slab.h>
23 #include <linux/ctype.h>
24 #include <linux/platform_device.h>
25 #include <linux/clk.h>
26 #include <linux/serial_8250.h>
27 #include <linux/i2c.h>
28 #include <linux/i2c/i2c-hid.h>
29 #include <linux/dma-mapping.h>
30 #include <linux/delay.h>
31 #include <linux/i2c-tegra.h>
32 #include <linux/gpio.h>
33 #include <linux/input.h>
34 #include <linux/platform_data/tegra_usb.h>
35 #include <linux/platform_data/tegra_xusb.h>
36 #include <linux/spi/spi.h>
37 #include <linux/spi/rm31080a_ts.h>
38 #include <linux/tegra_uart.h>
39 #include <linux/memblock.h>
40 #include <linux/spi/spi-tegra.h>
41 #include <linux/nfc/pn544.h>
42 #include <linux/rfkill-gpio.h>
43 #include <linux/skbuff.h>
44 #include <linux/ti_wilink_st.h>
45 #include <linux/regulator/consumer.h>
46 #include <linux/smb349-charger.h>
47 #include <linux/max17048_battery.h>
48 #include <linux/leds.h>
49 #include <linux/i2c/at24.h>
50 #include <linux/of_platform.h>
51 #include <linux/i2c.h>
52 #include <linux/i2c-tegra.h>
53 #include <linux/tegra_uart.h>
54 #include <linux/serial_tegra.h>
55 #include <linux/edp.h>
56 #include <linux/usb/tegra_usb_phy.h>
57
58 #include <mach/clk.h>
59 #include <mach/irqs.h>
60 #include <mach/tegra_fiq_debugger.h>
61
62 #include <mach/pinmux.h>
63 #include <mach/io_dpd.h>
64 #include <mach/i2s.h>
65 #include <mach/isomgr.h>
66 #include <mach/tegra_asoc_pdata.h>
67 #include <asm/mach-types.h>
68 #include <asm/mach/arch.h>
69 #include <mach/gpio-tegra.h>
70 #include <mach/tegra_fiq_debugger.h>
71 #include <mach/xusb.h>
72 #include <linux/platform_data/tegra_usb_modem_power.h>
73
74 #include "board.h"
75 #include "board-ardbeg.h"
76 #include "board-common.h"
77 #include "board-touch-raydium.h"
78 #include "clock.h"
79 #include "common.h"
80 #include "devices.h"
81 #include "fuse.h"
82 #include "gpio-names.h"
83 #include "iomap.h"
84 #include "pm.h"
85 #include "pm-irq.h"
86 #include "tegra-board-id.h"
87
88 static struct board_info board_info, display_board_info;
89
90 static struct resource ardbeg_bluedroid_pm_resources[] = {
91         [0] = {
92                 .name   = "shutdown_gpio",
93                 .start  = TEGRA_GPIO_PR1,
94                 .end    = TEGRA_GPIO_PR1,
95                 .flags  = IORESOURCE_IO,
96         },
97         [1] = {
98                 .name = "host_wake",
99                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
100         },
101         [2] = {
102                 .name = "gpio_ext_wake",
103                 .start  = TEGRA_GPIO_PEE1,
104                 .end    = TEGRA_GPIO_PEE1,
105                 .flags  = IORESOURCE_IO,
106         },
107         [3] = {
108                 .name = "gpio_host_wake",
109                 .start  = TEGRA_GPIO_PU6,
110                 .end    = TEGRA_GPIO_PU6,
111                 .flags  = IORESOURCE_IO,
112         },
113         [4] = {
114                 .name = "reset_gpio",
115                 .start  = TEGRA_GPIO_PX1,
116                 .end    = TEGRA_GPIO_PX1,
117                 .flags  = IORESOURCE_IO,
118         },
119 };
120
121 static struct platform_device ardbeg_bluedroid_pm_device = {
122         .name = "bluedroid_pm",
123         .id             = 0,
124         .num_resources  = ARRAY_SIZE(ardbeg_bluedroid_pm_resources),
125         .resource       = ardbeg_bluedroid_pm_resources,
126 };
127
128 static noinline void __init ardbeg_setup_bluedroid_pm(void)
129 {
130         ardbeg_bluedroid_pm_resources[1].start =
131                 ardbeg_bluedroid_pm_resources[1].end =
132                                 gpio_to_irq(TEGRA_GPIO_PU6);
133         platform_device_register(&ardbeg_bluedroid_pm_device);
134 }
135
136 /*use board file for T12x*/
137 #if defined(CONFIG_ARCH_TEGRA_12x_SOC) || !defined(CONFIG_USE_OF)
138 static struct i2c_board_info __initdata rt5639_board_info = {
139         I2C_BOARD_INFO("rt5639", 0x1c),
140 };
141 static struct i2c_board_info __initdata rt5645_board_info = {
142         I2C_BOARD_INFO("rt5645", 0x1a),
143 };
144 #endif
145
146 static __initdata struct tegra_clk_init_table ardbeg_clk_init_table[] = {
147         /* name         parent          rate            enabled */
148         { "pll_m",      NULL,           0,              false},
149         { "hda",        "pll_p",        108000000,      false},
150         { "hda2codec_2x", "pll_p",      48000000,       false},
151         { "pwm",        "pll_p",        3187500,        false},
152         { "blink",      "clk_32k",      32768,          true},
153         { "i2s1",       "pll_a_out0",   0,              false},
154         { "i2s3",       "pll_a_out0",   0,              false},
155         { "i2s4",       "pll_a_out0",   0,              false},
156         { "spdif_out",  "pll_a_out0",   0,              false},
157         { "d_audio",    "clk_m",        12000000,       false},
158         { "dam0",       "clk_m",        12000000,       false},
159         { "dam1",       "clk_m",        12000000,       false},
160         { "dam2",       "clk_m",        12000000,       false},
161         { "audio1",     "i2s1_sync",    0,              false},
162         { "audio3",     "i2s3_sync",    0,              false},
163         /* Setting vi_sensor-clk to true for validation purpose, will imapact
164          * power, later set to be false.*/
165         { "vi_sensor",  "pll_p",        150000000,      false},
166         { "cilab",      "pll_p",        150000000,      false},
167         { "cilcd",      "pll_p",        150000000,      false},
168         { "cile",       "pll_p",        150000000,      false},
169         { "i2c1",       "pll_p",        3200000,        false},
170         { "i2c2",       "pll_p",        3200000,        false},
171         { "i2c3",       "pll_p",        3200000,        false},
172         { "i2c4",       "pll_p",        3200000,        false},
173         { "i2c5",       "pll_p",        3200000,        false},
174         { "sbc1",       "pll_p",        25000000,       false},
175         { "sbc2",       "pll_p",        25000000,       false},
176         { "sbc3",       "pll_p",        25000000,       false},
177         { "sbc4",       "pll_p",        25000000,       false},
178         { "sbc5",       "pll_p",        25000000,       false},
179         { "sbc6",       "pll_p",        25000000,       false},
180         { "uarta",      "pll_p",        408000000,      false},
181         { "uartb",      "pll_p",        408000000,      false},
182         { "uartc",      "pll_p",        408000000,      false},
183         { "uartd",      "pll_p",        408000000,      false},
184         { NULL,         NULL,           0,              0},
185 };
186
187 #ifndef CONFIG_USE_OF
188 static struct tegra_i2c_platform_data ardbeg_i2c1_platform_data = {
189         .bus_clk_rate   = 100000,
190         .scl_gpio       = TEGRA_GPIO_I2C1_SCL,
191         .sda_gpio       = TEGRA_GPIO_I2C1_SDA,
192 };
193
194 static struct tegra_i2c_platform_data ardbeg_i2c2_platform_data = {
195         .bus_clk_rate   = 100000,
196         .is_clkon_always = true,
197         .scl_gpio       = TEGRA_GPIO_I2C2_SCL,
198         .sda_gpio       = TEGRA_GPIO_I2C2_SDA,
199 };
200
201 static struct tegra_i2c_platform_data ardbeg_i2c3_platform_data = {
202         .bus_clk_rate   = 400000,
203         .scl_gpio       = TEGRA_GPIO_I2C3_SCL,
204         .sda_gpio       = TEGRA_GPIO_I2C3_SDA,
205 };
206
207 static struct tegra_i2c_platform_data ardbeg_i2c4_platform_data = {
208         .bus_clk_rate   = 10000,
209         .scl_gpio       = TEGRA_GPIO_I2C4_SCL,
210         .sda_gpio       = TEGRA_GPIO_I2C4_SDA,
211 };
212
213 static struct tegra_i2c_platform_data ardbeg_i2c5_platform_data = {
214         .bus_clk_rate   = 400000,
215         .scl_gpio       = TEGRA_GPIO_I2C5_SCL,
216         .sda_gpio       = TEGRA_GPIO_I2C5_SDA,
217         .needs_cl_dvfs_clock = true,
218 };
219 #endif
220
221 static struct i2c_hid_platform_data i2c_keyboard_pdata = {
222         .hid_descriptor_address = 0x0,
223 };
224
225 static struct i2c_board_info __initdata i2c_keyboard_board_info = {
226         I2C_BOARD_INFO("hid", 0x3B),
227         .platform_data  = &i2c_keyboard_pdata,
228 };
229
230 static struct i2c_hid_platform_data i2c_touchpad_pdata = {
231         .hid_descriptor_address = 0x20,
232 };
233
234 static struct i2c_board_info __initdata i2c_touchpad_board_info = {
235         I2C_BOARD_INFO("hid", 0x2C),
236         .platform_data  = &i2c_touchpad_pdata,
237 };
238
239 static void ardbeg_i2c_init(void)
240 {
241         struct board_info board_info;
242         tegra_get_board_info(&board_info);
243 #ifndef CONFIG_USE_OF
244         tegra11_i2c_device1.dev.platform_data = &ardbeg_i2c1_platform_data;
245         tegra11_i2c_device2.dev.platform_data = &ardbeg_i2c2_platform_data;
246         tegra11_i2c_device3.dev.platform_data = &ardbeg_i2c3_platform_data;
247         tegra11_i2c_device4.dev.platform_data = &ardbeg_i2c4_platform_data;
248         tegra11_i2c_device5.dev.platform_data = &ardbeg_i2c5_platform_data;
249
250         platform_device_register(&tegra11_i2c_device5);
251         platform_device_register(&tegra11_i2c_device4);
252         platform_device_register(&tegra11_i2c_device3);
253         platform_device_register(&tegra11_i2c_device2);
254         platform_device_register(&tegra11_i2c_device1);
255 #endif
256 /*use board file for T12x*/
257 #if defined(CONFIG_ARCH_TEGRA_12x_SOC) || !defined(CONFIG_USE_OF)
258         i2c_register_board_info(0, &rt5639_board_info, 1);
259         i2c_register_board_info(0, &rt5645_board_info, 1);
260 #endif
261
262         if (board_info.board_id == BOARD_PM359 ||
263                         board_info.board_id == BOARD_PM358 ||
264                         board_info.board_id == BOARD_PM363) {
265                 i2c_keyboard_board_info.irq = gpio_to_irq(I2C_KB_IRQ);
266                 i2c_register_board_info(1, &i2c_keyboard_board_info , 1);
267
268                 i2c_touchpad_board_info.irq = gpio_to_irq(I2C_TP_IRQ);
269                 i2c_register_board_info(1, &i2c_touchpad_board_info , 1);
270         }
271 }
272
273 #ifndef CONFIG_USE_OF
274 static struct platform_device *ardbeg_uart_devices[] __initdata = {
275         &tegra_uarta_device,
276         &tegra_uartb_device,
277         &tegra_uartc_device,
278 };
279
280 static struct tegra_serial_platform_data ardbeg_uarta_pdata = {
281         .dma_req_selector = 8,
282         .modem_interrupt = false,
283 };
284
285 static struct tegra_serial_platform_data ardbeg_uartb_pdata = {
286         .dma_req_selector = 9,
287         .modem_interrupt = false,
288 };
289
290 static struct tegra_serial_platform_data ardbeg_uartc_pdata = {
291         .dma_req_selector = 10,
292         .modem_interrupt = false,
293 };
294 #endif
295
296 static struct tegra_serial_platform_data ardbeg_uartd_pdata = {
297         .dma_req_selector = 19,
298         .modem_interrupt = false,
299 };
300
301 /*use board file for T12x*/
302 #if defined(CONFIG_ARCH_TEGRA_12x_SOC) || !defined(CONFIG_USE_OF)
303 static struct tegra_asoc_platform_data ardbeg_audio_pdata_rt5639 = {
304         .gpio_hp_det = TEGRA_GPIO_HP_DET,
305         .gpio_ldo1_en = TEGRA_GPIO_LDO_EN,
306         .gpio_spkr_en = -1,
307         .gpio_int_mic_en = -1,
308         .gpio_ext_mic_en = -1,
309         .gpio_hp_mute = -1,
310         .gpio_codec1 = -1,
311         .gpio_codec2 = -1,
312         .gpio_codec3 = -1,
313         .i2s_param[HIFI_CODEC]       = {
314                 .audio_port_id = 1,
315                 .is_i2s_master = 1,
316                 .i2s_mode = TEGRA_DAIFMT_I2S,
317         },
318         .i2s_param[BT_SCO] = {
319                 .audio_port_id = 3,
320                 .is_i2s_master = 1,
321                 .i2s_mode = TEGRA_DAIFMT_DSP_A,
322         },
323 };
324
325 static struct tegra_asoc_platform_data ardbeg_audio_pdata_rt5645 = {
326         .gpio_hp_det = TEGRA_GPIO_HP_DET,
327         .gpio_ldo1_en = TEGRA_GPIO_LDO_EN,
328         .gpio_spkr_en = -1,
329         .gpio_int_mic_en = -1,
330         .gpio_ext_mic_en = -1,
331         .gpio_hp_mute = -1,
332         .gpio_codec1 = -1,
333         .gpio_codec2 = -1,
334         .gpio_codec3 = -1,
335         .i2s_param[HIFI_CODEC]       = {
336                 .audio_port_id = 1,
337                 .is_i2s_master = 1,
338                 .i2s_mode = TEGRA_DAIFMT_I2S,
339         },
340         .i2s_param[BT_SCO] = {
341                 .audio_port_id = 3,
342                 .is_i2s_master = 1,
343                 .i2s_mode = TEGRA_DAIFMT_DSP_A,
344         },
345 };
346
347 static void ardbeg_audio_init(void)
348 {
349         struct board_info board_info;
350         tegra_get_board_info(&board_info);
351         if (board_info.board_id == BOARD_PM359 ||
352                         board_info.board_id == BOARD_PM358 ||
353                         board_info.board_id == BOARD_PM363) {
354                 /*Laguna*/
355                 ardbeg_audio_pdata_rt5645.gpio_hp_det =
356                         TEGRA_GPIO_HP_DET;
357                 ardbeg_audio_pdata_rt5645.gpio_ldo1_en = -1;
358         } else {
359                 /*Ardbeg*/
360                 ardbeg_audio_pdata_rt5645.gpio_hp_det =
361                         TEGRA_GPIO_HP_DET;
362                 ardbeg_audio_pdata_rt5645.gpio_ldo1_en =
363                         TEGRA_GPIO_LDO_EN;
364         }
365
366         ardbeg_audio_pdata_rt5639.gpio_hp_det =
367                 ardbeg_audio_pdata_rt5645.gpio_hp_det;
368
369         ardbeg_audio_pdata_rt5639.gpio_ldo1_en =
370                 ardbeg_audio_pdata_rt5645.gpio_ldo1_en;
371
372         ardbeg_audio_pdata_rt5639.codec_name = "rt5639.0-001c";
373         ardbeg_audio_pdata_rt5639.codec_dai_name = "rt5639-aif1";
374         ardbeg_audio_pdata_rt5645.codec_name = "rt5645.0-001a";
375         ardbeg_audio_pdata_rt5645.codec_dai_name = "rt5645-aif1";
376 }
377
378 static struct platform_device ardbeg_audio_device_rt5645 = {
379         .name = "tegra-snd-rt5645",
380         .id = 0,
381         .dev = {
382                 .platform_data = &ardbeg_audio_pdata_rt5645,
383         },
384 };
385
386 static struct platform_device ardbeg_audio_device_rt5639 = {
387         .name = "tegra-snd-rt5639",
388         .id = 0,
389         .dev = {
390                 .platform_data = &ardbeg_audio_pdata_rt5639,
391         },
392 };
393
394 #endif
395
396 static void __init ardbeg_uart_init(void)
397 {
398         int debug_port_id;
399
400 #ifndef CONFIG_USE_OF
401         tegra_uarta_device.dev.platform_data = &ardbeg_uarta_pdata;
402         tegra_uartb_device.dev.platform_data = &ardbeg_uartb_pdata;
403         tegra_uartc_device.dev.platform_data = &ardbeg_uartc_pdata;
404         platform_add_devices(ardbeg_uart_devices,
405                         ARRAY_SIZE(ardbeg_uart_devices));
406 #endif
407         tegra_uartd_device.dev.platform_data = &ardbeg_uartd_pdata;
408         if (!is_tegra_debug_uartport_hs()) {
409                 debug_port_id = uart_console_debug_init(3);
410                 if (debug_port_id < 0)
411                         return;
412
413                 platform_device_register(uart_console_debug_device);
414         } else {
415                 tegra_uartd_device.dev.platform_data = &ardbeg_uartd_pdata;
416                 platform_device_register(&tegra_uartd_device);
417         }
418
419 }
420
421 static struct resource tegra_rtc_resources[] = {
422         [0] = {
423                 .start = TEGRA_RTC_BASE,
424                 .end = TEGRA_RTC_BASE + TEGRA_RTC_SIZE - 1,
425                 .flags = IORESOURCE_MEM,
426         },
427         [1] = {
428                 .start = INT_RTC,
429                 .end = INT_RTC,
430                 .flags = IORESOURCE_IRQ,
431         },
432 };
433
434 static struct platform_device tegra_rtc_device = {
435         .name = "tegra_rtc",
436         .id   = -1,
437         .resource = tegra_rtc_resources,
438         .num_resources = ARRAY_SIZE(tegra_rtc_resources),
439 };
440
441 static struct platform_device *ardbeg_devices[] __initdata = {
442         &tegra_pmu_device,
443         &tegra_rtc_device,
444         &tegra_udc_device,
445 #if defined(CONFIG_TEGRA_AVP)
446         &tegra_avp_device,
447 #endif
448 #if defined(CONFIG_CRYPTO_DEV_TEGRA_SE)
449 #ifdef CONFIG_ARCH_TEGRA_12x_SOC
450         &tegra12_se_device,
451 #endif
452 #ifdef CONFIG_ARCH_TEGRA_11x_SOC
453         &tegra11_se_device,
454 #endif
455 #endif
456 /*use board file for T12x*/
457 #if defined(CONFIG_ARCH_TEGRA_12x_SOC) || !defined(CONFIG_USE_OF)
458         &tegra_ahub_device,
459         &tegra_dam_device0,
460         &tegra_dam_device1,
461         &tegra_dam_device2,
462         &tegra_i2s_device1,
463         &tegra_i2s_device3,
464         &tegra_i2s_device4,
465         &ardbeg_audio_device_rt5639,
466         &ardbeg_audio_device_rt5645,
467         &tegra_spdif_device,
468 #endif
469         &spdif_dit_device,
470         &bluetooth_dit_device,
471         &tegra_hda_device,
472 #if defined(CONFIG_CRYPTO_DEV_TEGRA_AES)
473         &tegra_aes_device,
474 #endif
475 };
476
477 static struct tegra_usb_platform_data tegra_udc_pdata = {
478         .port_otg = true,
479         .has_hostpc = true,
480         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
481         .op_mode = TEGRA_USB_OPMODE_DEVICE,
482         .u_data.dev = {
483                 .vbus_pmu_irq = 0,
484                 .vbus_gpio = -1,
485                 .charging_supported = false,
486                 .remote_wakeup_supported = false,
487         },
488         .u_cfg.utmi = {
489                 .hssync_start_delay = 0,
490                 .elastic_limit = 16,
491                 .idle_wait_delay = 17,
492                 .term_range_adj = 6,
493                 .xcvr_setup = 8,
494                 .xcvr_lsfslew = 2,
495                 .xcvr_lsrslew = 2,
496                 .xcvr_setup_offset = 0,
497                 .xcvr_use_fuses = 1,
498         },
499 };
500
501 static struct tegra_usb_platform_data tegra_ehci1_utmi_pdata = {
502         .port_otg = true,
503         .has_hostpc = true,
504         .unaligned_dma_buf_supported = true,
505         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
506         .op_mode = TEGRA_USB_OPMODE_HOST,
507         .u_data.host = {
508                 .vbus_gpio = -1,
509                 .hot_plug = false,
510                 .remote_wakeup_supported = true,
511                 .power_off_on_suspend = true,
512         },
513         .u_cfg.utmi = {
514                 .hssync_start_delay = 0,
515                 .elastic_limit = 16,
516                 .idle_wait_delay = 17,
517                 .term_range_adj = 6,
518                 .xcvr_setup = 15,
519                 .xcvr_lsfslew = 2,
520                 .xcvr_lsrslew = 2,
521                 .xcvr_setup_offset = 0,
522                 .xcvr_use_fuses = 1,
523                 .vbus_oc_map = 0x4,
524         },
525 };
526
527 static struct tegra_usb_platform_data tegra_ehci3_utmi_pdata = {
528         .port_otg = false,
529         .has_hostpc = true,
530         .unaligned_dma_buf_supported = true,
531         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
532         .op_mode = TEGRA_USB_OPMODE_HOST,
533         .u_data.host = {
534                 .vbus_gpio = -1,
535                 .hot_plug = false,
536                 .remote_wakeup_supported = true,
537                 .power_off_on_suspend = true,
538         },
539         .u_cfg.utmi = {
540         .hssync_start_delay = 0,
541                 .elastic_limit = 16,
542                 .idle_wait_delay = 17,
543                 .term_range_adj = 6,
544                 .xcvr_setup = 8,
545                 .xcvr_lsfslew = 2,
546                 .xcvr_lsrslew = 2,
547                 .xcvr_setup_offset = 0,
548                 .xcvr_use_fuses = 1,
549                 .vbus_oc_map = 0x5,
550         },
551 };
552
553 static struct tegra_usb_platform_data tegra_ehci2_hsic_smsc_hub_pdata = {
554         .port_otg = false,
555         .has_hostpc = true,
556         .unaligned_dma_buf_supported = true,
557         .phy_intf = TEGRA_USB_PHY_INTF_HSIC,
558         .op_mode        = TEGRA_USB_OPMODE_HOST,
559         .u_data.host = {
560                 .vbus_gpio = -1,
561                 .hot_plug = false,
562                 .remote_wakeup_supported = true,
563                 .power_off_on_suspend = true,
564         },
565 };
566
567
568 static struct tegra_usb_otg_data tegra_otg_pdata = {
569         .ehci_device = &tegra_ehci1_device,
570         .ehci_pdata = &tegra_ehci1_utmi_pdata,
571 };
572
573 static void ardbeg_usb_init(void)
574 {
575         int usb_port_owner_info = tegra_get_usb_port_owner_info();
576
577         if (!(usb_port_owner_info & UTMI1_PORT_OWNER_XUSB)) {
578                 tegra_otg_device.dev.platform_data = &tegra_otg_pdata;
579                 platform_device_register(&tegra_otg_device);
580                 /* Setup the udc platform data */
581                 tegra_udc_device.dev.platform_data = &tegra_udc_pdata;
582         }
583
584         if (!(usb_port_owner_info & UTMI2_PORT_OWNER_XUSB)) {
585                 tegra_ehci3_device.dev.platform_data = &tegra_ehci3_utmi_pdata;
586                 platform_device_register(&tegra_ehci3_device);
587         }
588 }
589
590 static struct tegra_xusb_board_data xusb_bdata = {
591         .portmap = TEGRA_XUSB_SS_P0 | TEGRA_XUSB_USB2_P0 |
592                         TEGRA_XUSB_SS_P1 | TEGRA_XUSB_USB2_P1,
593         /* ss_portmap[0:3] = SS0 map, ss_portmap[4:7] = SS1 map */
594         .ss_portmap = (TEGRA_XUSB_SS_PORT_MAP_USB2_P0 << 0) |
595                         (TEGRA_XUSB_SS_PORT_MAP_USB2_P1 << 4),
596 };
597
598 static void ardbeg_xusb_init(void)
599 {
600         int usb_port_owner_info = tegra_get_usb_port_owner_info();
601
602         if (!(usb_port_owner_info & UTMI1_PORT_OWNER_XUSB))
603                 xusb_bdata.portmap &= ~(TEGRA_XUSB_USB2_P0 | TEGRA_XUSB_SS_P0);
604
605         if (!(usb_port_owner_info & UTMI2_PORT_OWNER_XUSB))
606                 xusb_bdata.portmap &= ~(TEGRA_XUSB_USB2_P1 | TEGRA_XUSB_SS_P1);
607
608         tegra_xusb_init(&xusb_bdata);
609 }
610
611 static void ardbeg_modem_init(void)
612 {
613         int modem_id = tegra_get_modem_id();
614         struct board_info board_info;
615         int usb_port_owner_info = tegra_get_usb_port_owner_info();
616
617         tegra_get_board_info(&board_info);
618         pr_info("%s: modem_id = %d\n", __func__, modem_id);
619
620         switch (modem_id) {
621         case TEGRA_BB_HSIC_HUB: /* HSIC hub */
622                 if (!(usb_port_owner_info & HSIC1_PORT_OWNER_XUSB)) {
623                         tegra_ehci2_device.dev.platform_data =
624                                 &tegra_ehci2_hsic_smsc_hub_pdata;
625                         platform_device_register(&tegra_ehci2_device);
626                 }
627                 break;
628         default:
629                 return;
630         }
631 }
632
633 #ifndef CONFIG_USE_OF
634 static struct platform_device *ardbeg_spi_devices[] __initdata = {
635         &tegra11_spi_device4,
636 };
637
638 static struct tegra_spi_platform_data ardbeg_spi_pdata = {
639         .dma_req_sel            = 0,
640         .spi_max_frequency      = 25000000,
641         .clock_always_on        = false,
642 };
643
644 static void __init ardbeg_spi_init(void)
645 {
646         tegra11_spi_device4.dev.platform_data = &ardbeg_spi_pdata;
647         platform_add_devices(ardbeg_spi_devices,
648                         ARRAY_SIZE(ardbeg_spi_devices));
649 }
650 #else
651 static void __init ardbeg_spi_init(void)
652 {
653 }
654 #endif
655
656 #ifdef CONFIG_USE_OF
657 struct of_dev_auxdata ardbeg_auxdata_lookup[] __initdata = {
658         OF_DEV_AUXDATA("nvidia,tegra114-sdhci", 0x78000600, "sdhci-tegra.3",
659                                 NULL),
660         OF_DEV_AUXDATA("nvidia,tegra114-sdhci", 0x78000400, "sdhci-tegra.2",
661                                 NULL),
662 #if 0
663         OF_DEV_AUXDATA("nvidia,tegra114-sdhci", 0x78000000, "sdhci-tegra.0",
664                                 &ardbeg_tegra_sdhci_platform_data0),
665 #endif
666         OF_DEV_AUXDATA("nvidia,tegra114-camera", 0x0, "tegra_camera",
667                                 NULL),
668         OF_DEV_AUXDATA("nvidia,tegra114-host1x", TEGRA_HOST1X_BASE, "host1x",
669                                 NULL),
670         OF_DEV_AUXDATA("nvidia,tegra114-gr3d", TEGRA_GR3D_BASE, "gr3d",
671                                 NULL),
672         OF_DEV_AUXDATA("nvidia,tegra114-gr2d", TEGRA_GR2D_BASE, "gr2d",
673                                 NULL),
674         OF_DEV_AUXDATA("nvidia,tegra114-msenc", TEGRA_MSENC_BASE, "msenc",
675                                 NULL),
676         OF_DEV_AUXDATA("nvidia,tegra114-vi", TEGRA_VI_BASE, "vi",
677                                 NULL),
678         OF_DEV_AUXDATA("nvidia,tegra114-isp", TEGRA_ISP_BASE, "isp",
679                                 NULL),
680         OF_DEV_AUXDATA("nvidia,tegra114-tsec", TEGRA_TSEC_BASE, "tsec",
681                                 NULL),
682
683         OF_DEV_AUXDATA("nvidia,tegra114-i2c", 0x7000c000, "tegra11-i2c.0",
684                                 NULL),
685         OF_DEV_AUXDATA("nvidia,tegra114-i2c", 0x7000c400, "tegra11-i2c.1",
686                                 NULL),
687         OF_DEV_AUXDATA("nvidia,tegra114-i2c", 0x7000c500, "tegra11-i2c.2",
688                                 NULL),
689         OF_DEV_AUXDATA("nvidia,tegra114-i2c", 0x7000c700, "tegra11-i2c.3",
690                                 NULL),
691         OF_DEV_AUXDATA("nvidia,tegra114-i2c", 0x7000d000, "tegra11-i2c.4",
692                                 NULL),
693         OF_DEV_AUXDATA("nvidia,tegra114-spi", 0x7000d400, "spi-tegra114.0",
694                                 NULL),
695         OF_DEV_AUXDATA("nvidia,tegra114-spi", 0x7000d600, "spi-tegra114.1",
696                                 NULL),
697         OF_DEV_AUXDATA("nvidia,tegra114-spi", 0x7000d800, "spi-tegra114.2",
698                                 NULL),
699         OF_DEV_AUXDATA("nvidia,tegra114-spi", 0x7000da00, "spi-tegra114.3",
700                                 NULL),
701         OF_DEV_AUXDATA("nvidia,tegra114-spi", 0x7000dc00, "spi-tegra114.4",
702                                 NULL),
703         OF_DEV_AUXDATA("nvidia,tegra114-spi", 0x7000de00, "spi-tegra114.5",
704                                 NULL),
705         OF_DEV_AUXDATA("nvidia,tegra114-apbdma", 0x6000a000, "tegra-apbdma",
706                                 NULL),
707         OF_DEV_AUXDATA("nvidia,tegra30-ahub", 0x70080000, "tegra30-ahub",
708                                 NULL),
709         OF_DEV_AUXDATA("nvidia,tegra-audio-rt5645", 0x0, "tegra-snd-rt5645",
710                                 NULL),
711         OF_DEV_AUXDATA("nvidia,tegra-audio-rt5639", 0x0, "tegra-snd-rt5639",
712                                 NULL),
713         OF_DEV_AUXDATA("nvidia,tegra114-hsuart", 0x70006000, "serial-tegra.0",
714                                 NULL),
715         OF_DEV_AUXDATA("nvidia,tegra114-hsuart", 0x70006040, "serial-tegra.1",
716                                 NULL),
717         OF_DEV_AUXDATA("nvidia,tegra114-hsuart", 0x70006200, "serial-tegra.2",
718                                 NULL),
719         {}
720 };
721 #endif
722
723 static __initdata struct tegra_clk_init_table touch_clk_init_table[] = {
724         /* name         parent          rate            enabled */
725         { "extern2",    "pll_p",        41000000,       false},
726         { "clk_out_2",  "extern2",      40800000,       false},
727         { NULL,         NULL,           0,              0},
728 };
729
730 struct rm_spi_ts_platform_data rm31080ts_ardbeg_data = {
731         .gpio_reset = TOUCH_GPIO_RST_RAYDIUM_SPI,
732         .config = 0,
733         .platform_id = RM_PLATFORM_D010,
734         .name_of_clock = "clk_out_2",
735         .name_of_clock_con = "extern2",
736 };
737
738 static struct tegra_spi_device_controller_data dev_cdata = {
739         .rx_clk_tap_delay = 0,
740         .tx_clk_tap_delay = 16,
741 };
742
743 struct spi_board_info rm31080a_ardbeg_spi_board[1] = {
744         {
745                 .modalias = "rm_ts_spidev",
746                 .bus_num = TOUCH_SPI_ID,
747                 .chip_select = TOUCH_SPI_CS,
748                 .max_speed_hz = 12 * 1000 * 1000,
749                 .mode = SPI_MODE_0,
750                 .controller_data = &dev_cdata,
751                 .platform_data = &rm31080ts_ardbeg_data,
752         },
753 };
754
755 static int __init ardbeg_touch_init(void)
756 {
757         tegra_clk_init_from_table(touch_clk_init_table);
758         rm31080a_ardbeg_spi_board[0].irq =
759                 gpio_to_irq(TOUCH_GPIO_IRQ_RAYDIUM_SPI);
760         touch_init_raydium(TOUCH_GPIO_IRQ_RAYDIUM_SPI,
761                                 TOUCH_GPIO_RST_RAYDIUM_SPI,
762                                 &rm31080ts_ardbeg_data,
763                                 &rm31080a_ardbeg_spi_board[0],
764                                 ARRAY_SIZE(rm31080a_ardbeg_spi_board));
765         return 0;
766 }
767
768 static void __init tegra_ardbeg_early_init(void)
769 {
770         tegra_clk_init_from_table(ardbeg_clk_init_table);
771         tegra_clk_verify_parents();
772         tegra_soc_device_init("ardbeg");
773 }
774
775 static void __init tegra_ardbeg_late_init(void)
776 {
777         struct board_info board_info;
778         tegra_get_board_info(&board_info);
779         pr_info("board_info: id:sku:fab:major:minor = 0x%04x:0x%04x:0x%02x:0x%02x:0x%02x\n",
780                 board_info.board_id, board_info.sku,
781                 board_info.fab, board_info.major_revision,
782                 board_info.minor_revision);
783         platform_device_register(&tegra_pinmux_device);
784         if (board_info.board_id == BOARD_PM359 ||
785                         board_info.board_id == BOARD_PM358 ||
786                         board_info.board_id == BOARD_PM363)
787                 laguna_pinmux_init();
788         else
789                 ardbeg_pinmux_init();
790         ardbeg_usb_init();
791         ardbeg_modem_init();
792         ardbeg_xusb_init();
793         ardbeg_i2c_init();
794         ardbeg_spi_init();
795         ardbeg_uart_init();
796 /*use board file for T12x*/
797 #if defined(CONFIG_ARCH_TEGRA_12x_SOC) || !defined(CONFIG_USE_OF)
798         ardbeg_audio_init();
799 #endif
800         platform_add_devices(ardbeg_devices, ARRAY_SIZE(ardbeg_devices));
801         //tegra_ram_console_debug_init();
802         tegra_io_dpd_init();
803         ardbeg_sdhci_init();
804         if (board_info.board_id == BOARD_PM359 ||
805                         board_info.board_id == BOARD_PM358 ||
806                         board_info.board_id == BOARD_PM363)
807                 laguna_regulator_init();
808         else
809                 ardbeg_regulator_init();
810         ardbeg_suspend_init();
811 #if 0
812         ardbeg_emc_init();
813         ardbeg_edp_init();
814 #endif
815         isomgr_init();
816         ardbeg_touch_init();
817         ardbeg_panel_init();
818         ardbeg_kbc_init();
819         ardbeg_pmon_init();
820         tegra_release_bootloader_fb();
821 #ifdef CONFIG_TEGRA_WDT_RECOVERY
822         tegra_wdt_recovery_init();
823 #endif
824         tegra_serial_debug_init(TEGRA_UARTD_BASE, INT_WDT_CPU, NULL, -1, -1);
825 #if 0
826         ardbeg_sensors_init();
827         ardbeg_soctherm_init();
828 #endif
829         ardbeg_setup_bluedroid_pm();
830         tegra_register_fuse();
831         tegra_serial_debug_init(TEGRA_UARTD_BASE, INT_WDT_CPU, NULL, -1, -1);
832 }
833
834 static void __init ardbeg_ramconsole_reserve(unsigned long size)
835 {
836         tegra_ram_console_debug_reserve(SZ_1M);
837 }
838
839 static void __init tegra_ardbeg_dt_init(void)
840 {
841         tegra_get_board_info(&board_info);
842         tegra_get_display_board_info(&display_board_info);
843
844         tegra_ardbeg_early_init();
845 #ifdef CONFIG_USE_OF
846         of_platform_populate(NULL,
847                 of_default_bus_match_table, ardbeg_auxdata_lookup,
848                 &platform_bus);
849 #else
850         platform_device_register(&tegra_gpio_device);
851 #endif
852
853         tegra_ardbeg_late_init();
854 }
855
856 static void __init tegra_ardbeg_reserve(void)
857 {
858 #if defined(CONFIG_NVMAP_CONVERT_CARVEOUT_TO_IOVMM)
859         /* 1920*1200*4*2 = 18432000 bytes */
860         tegra_reserve(0, SZ_16M + SZ_2M, SZ_16M);
861 #else
862         tegra_reserve(SZ_128M, SZ_16M + SZ_2M, SZ_4M);
863 #endif
864         ardbeg_ramconsole_reserve(SZ_1M);
865 }
866
867 static const char * const ardbeg_dt_board_compat[] = {
868         "nvidia,ardbeg",
869         NULL
870 };
871
872 DT_MACHINE_START(ARDBEG, "ardbeg")
873         .atag_offset    = 0x100,
874         .smp            = smp_ops(tegra_smp_ops),
875         .map_io         = tegra_map_common_io,
876         .reserve        = tegra_ardbeg_reserve,
877 #ifdef CONFIG_ARCH_TEGRA_12x_SOC
878         .init_early     = tegra12x_init_early,
879 #else
880         .init_early     = tegra11x_init_early,
881 #endif
882         .init_irq       = tegra_dt_init_irq,
883         .init_time      = tegra_init_timer,
884         .init_machine   = tegra_ardbeg_dt_init,
885         .restart        = tegra_assert_system_reset,
886         .dt_compat      = ardbeg_dt_board_compat,
887 MACHINE_END