ARM: tegra: ardbeg: rename productized power monitor
[linux-3.10.git] / arch / arm / mach-tegra / board-ardbeg-powermon.c
1 /*
2  * arch/arm/mach-tegra/board-ardbeg-powermon.c
3  *
4  * Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved.
5  *
6  * This program is free software; you can redistribute it and/or modify it
7  * under the terms and conditions of the GNU General Public License,
8  * version 2, as published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope it will be useful, but WITHOUT
11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13  * more details.
14  *
15  * You should have received a copy of the GNU General Public License
16  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
17  *
18  */
19
20 #include <linux/i2c.h>
21 #include <linux/platform_data/ina230.h>
22 #include <linux/i2c/pca954x.h>
23
24 #include "board.h"
25 #include "board-ardbeg.h"
26 #include "tegra-board-id.h"
27
28 #define PRECISION_MULTIPLIER_ARDBEG     1000
29 #define ARDBEG_POWER_REWORKED_CONFIG    0x10
30 #define VDD_SOC_SD1_REWORKED            10
31 #define VDD_CPU_BUCKCPU_REWORKED        10
32 #define VDD_1V35_SD2_REWORKED           10
33
34 #define AVG_SAMPLES (2 << 9) /* 16 samples */
35
36 /* AVG is specified from platform data */
37 #define INA230_CONT_CONFIG      (AVG_SAMPLES | INA230_VBUS_CT | \
38                                 INA230_VSH_CT | INA230_CONT_MODE)
39 #define INA230_TRIG_CONFIG      (AVG_SAMPLES | INA230_VBUS_CT | \
40                                 INA230_VSH_CT | INA230_TRIG_MODE)
41
42 /* rails on i2c2_0 */
43 enum {
44         VDD_BAT_0,
45         VDD_SYS_BUCKCPU_0,
46         VDD_SYS_BUCKSOC_0,
47         VDD_SYS_BUCKGPU_0,
48 };
49
50 /* following rails are present on Ardbeg */
51 /* rails on i2c2_1 */
52 enum {
53         VDD_SYS_BAT,
54         VDD_RTC_LDO5,
55         VDD_3V3A_SMPS1_2,
56         VDD_SOC_SMPS1_2,
57         VDD_SYS_BUCKCPU,
58         VDD_CPU_BUCKCPU,
59         VDD_1V8A_SMPS3,
60         VDD_1V8B_SMPS9,
61         VDD_GPU_BUCKGPU,
62         VDD_1V35_SMPS6,
63         VDD_3V3A_SMPS1_2_2,
64         VDD_3V3B_SMPS9,
65         VDD_LCD_1V8B_DIS,
66         VDD_1V05_SMPS8,
67 };
68
69 /* rails on i2c2_2 */
70 enum {
71         VDD_SYS_BL,
72         AVDD_1V05_LDO2,
73 };
74
75 /* following rails are present on Ardbeg A01 and onward boards */
76 /* rails on i2c2_1 */
77 enum {
78         ARDBEG_A01_VDD_SYS_BAT,
79         ARDBEG_A01_VDD_RTC_LDO3,
80         ARDBEG_A01_VDD_SYS_BUCKSOC,
81         ARDBEG_A01_VDD_SOC_SD1,
82         ARDBEG_A01_VDD_SYS_BUCKCPU,
83         ARDBEG_A01_VDD_CPU_BUCKCPU,
84         ARDBEG_A01_VDD_1V8_SD5,
85         ARDBEG_A01_VDD_3V3A_LDO1_6,
86         ARDBEG_A01_VDD_DIS_3V3_LCD,
87         ARDBEG_A01_VDD_1V35_SD2,
88         ARDBEG_A01_VDD_SYS_BUCKGPU,
89         ARDBEG_A01_VDD_LCD_1V8B_DIS,
90         ARDBEG_A01_VDD_1V05_LDO0,
91 };
92
93 /* rails on i2c2_2 */
94 enum {
95         ARDBEG_A01_VDD_1V05_SD4,
96         ARDBEG_A01_VDD_1V8A_LDO2_5_7,
97         ARDBEG_A01_VDD_SYS_BL,
98 };
99
100 static struct ina230_platform_data power_mon_info_0[] = {
101         /* E1780-A02 (Shield ERS) */
102         [VDD_BAT_0] = {
103                 .calibration_data = 0x1366,
104                 .power_lsb = 2.577527185 * PRECISION_MULTIPLIER_ARDBEG,
105                 .rail_name = "__VDD_BAT",
106                 .trig_conf = INA230_TRIG_CONFIG,
107                 .cont_conf = INA230_CONT_CONFIG,
108                 .divisor = 25,
109                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
110                 .resistor = 10,
111         },
112         [VDD_SYS_BUCKCPU_0] = {
113                 .calibration_data = 0x1AC5,
114                 .power_lsb = 1.867795126 * PRECISION_MULTIPLIER_ARDBEG,
115                 .rail_name = "__VDD_SYS_BUCKCPU",
116                 .trig_conf = INA230_TRIG_CONFIG,
117                 .cont_conf = INA230_CONT_CONFIG,
118                 .divisor = 25,
119                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
120                 .resistor = 10,
121         },
122         [VDD_SYS_BUCKSOC_0] = {
123                 .calibration_data = 0x2802,
124                 .power_lsb = 0.624877954 * PRECISION_MULTIPLIER_ARDBEG,
125                 .rail_name = "__VDD_SYS_BUCKSOC",
126                 .trig_conf = INA230_TRIG_CONFIG,
127                 .cont_conf = INA230_CONT_CONFIG,
128                 .divisor = 25,
129                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
130                 .resistor = 20,
131         },
132         [VDD_SYS_BUCKGPU_0] = {
133                 .calibration_data = 0x1F38,
134                 .power_lsb = 1.601601602 * PRECISION_MULTIPLIER_ARDBEG,
135                 .rail_name = "__VDD_SYS_BUCKGPU",
136                 .trig_conf = INA230_TRIG_CONFIG,
137                 .cont_conf = INA230_CONT_CONFIG,
138                 .divisor = 25,
139                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
140                 .resistor = 10,
141         },
142 };
143
144 /* following are power monitor parameters for Ardbeg */
145 static struct ina230_platform_data power_mon_info_1[] = {
146         [VDD_SYS_BAT] = {
147                 .calibration_data  = 0x1366,
148                 .power_lsb = 2.577527185 * PRECISION_MULTIPLIER_ARDBEG,
149                 .rail_name = "VDD_SYS_BAT",
150                 .trig_conf = INA230_TRIG_CONFIG,
151                 .cont_conf = INA230_CONT_CONFIG,
152                 .divisor = 25,
153                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
154         },
155
156         [VDD_RTC_LDO5] = {
157                 .calibration_data  = 0x7FFF,
158                 .power_lsb = 0.078127384 * PRECISION_MULTIPLIER_ARDBEG,
159                 .rail_name = "VDD_RTC_LDO5",
160                 .trig_conf = INA230_TRIG_CONFIG,
161                 .cont_conf = INA230_CONT_CONFIG,
162                 .divisor = 25,
163                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
164         },
165
166         [VDD_3V3A_SMPS1_2] = {
167                 .calibration_data  = 0x4759,
168                 .power_lsb = 1.401587736 * PRECISION_MULTIPLIER_ARDBEG,
169                 .rail_name = "VDD_3V3A_SMPS1_2",
170                 .trig_conf = INA230_TRIG_CONFIG,
171                 .cont_conf = INA230_CONT_CONFIG,
172                 .divisor = 25,
173                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
174         },
175
176         [VDD_SOC_SMPS1_2] = {
177                 .calibration_data  = 0x7FFF,
178                 .power_lsb = 3.906369213 * PRECISION_MULTIPLIER_ARDBEG,
179                 .rail_name = "VDD_SOC_SMPS1_2",
180                 .trig_conf = INA230_TRIG_CONFIG,
181                 .cont_conf = INA230_CONT_CONFIG,
182                 .divisor = 25,
183                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
184         },
185
186         [VDD_SYS_BUCKCPU] = {
187                 .calibration_data  = 0x1AC5,
188                 .power_lsb = 1.867795126 * PRECISION_MULTIPLIER_ARDBEG,
189                 .rail_name = "VDD_SYS_BUCKCPU",
190                 .trig_conf = INA230_TRIG_CONFIG,
191                 .cont_conf = INA230_CONT_CONFIG,
192                 .divisor = 25,
193                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
194         },
195
196         [VDD_CPU_BUCKCPU] = {
197                 .calibration_data  = 0x2ECF,
198                 .power_lsb = 10.68179922 * PRECISION_MULTIPLIER_ARDBEG,
199                 .rail_name = "VDD_CPU_BUCKCPU",
200                 .trig_conf = INA230_TRIG_CONFIG,
201                 .cont_conf = INA230_CONT_CONFIG,
202                 .divisor = 25,
203                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
204         },
205
206         [VDD_1V8A_SMPS3] = {
207                 .calibration_data  = 0x5BA7,
208                 .power_lsb = 0.545539786 * PRECISION_MULTIPLIER_ARDBEG,
209                 .rail_name = "VDD_1V8A_SMPS3",
210                 .trig_conf = INA230_TRIG_CONFIG,
211                 .cont_conf = INA230_CONT_CONFIG,
212                 .divisor = 25,
213                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
214         },
215
216         [VDD_1V8B_SMPS9] = {
217                 .calibration_data  = 0x50B4,
218                 .power_lsb = 0.309777348 * PRECISION_MULTIPLIER_ARDBEG,
219                 .rail_name = "VDD_1V8B_SMPS9",
220                 .trig_conf = INA230_TRIG_CONFIG,
221                 .cont_conf = INA230_CONT_CONFIG,
222                 .divisor = 25,
223                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
224         },
225
226         [VDD_GPU_BUCKGPU] = {
227                 .calibration_data  = 0x369C,
228                 .power_lsb = 9.155937053 * PRECISION_MULTIPLIER_ARDBEG,
229                 .rail_name = "VDD_GPU_BUCKGPU",
230                 .trig_conf = INA230_TRIG_CONFIG,
231                 .cont_conf = INA230_CONT_CONFIG,
232                 .divisor = 25,
233                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
234         },
235
236         [VDD_1V35_SMPS6] = {
237                 .calibration_data  = 0x7FFF,
238                 .power_lsb = 3.906369213 * PRECISION_MULTIPLIER_ARDBEG,
239                 .rail_name = "VDD_1V35_SMPS6",
240                 .trig_conf = INA230_TRIG_CONFIG,
241                 .cont_conf = INA230_CONT_CONFIG,
242                 .divisor = 25,
243                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
244         },
245
246         /* following rail is duplicate of VDD_3V3A_SMPS1_2 hence mark unused */
247         [VDD_3V3A_SMPS1_2_2] = {
248                 .calibration_data  = 0x4759,
249                 .power_lsb = 1.401587736 * PRECISION_MULTIPLIER_ARDBEG,
250                 .rail_name = "unused_rail",
251                 .trig_conf = INA230_TRIG_CONFIG,
252                 .cont_conf = INA230_CONT_CONFIG,
253                 .divisor = 25,
254                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
255         },
256
257         [VDD_3V3B_SMPS9] = {
258                 .calibration_data  = 0x3269,
259                 .power_lsb = 0.198372724 * PRECISION_MULTIPLIER_ARDBEG,
260                 .rail_name = "VDD_3V3B_SMPS9",
261                 .trig_conf = INA230_TRIG_CONFIG,
262                 .cont_conf = INA230_CONT_CONFIG,
263                 .divisor = 25,
264                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
265         },
266
267         [VDD_LCD_1V8B_DIS] = {
268                 .calibration_data  = 0x7FFF,
269                 .power_lsb = 0.039063692 * PRECISION_MULTIPLIER_ARDBEG,
270                 .rail_name = "VDD_LCD_1V8B_DIS",
271                 .trig_conf = INA230_TRIG_CONFIG,
272                 .cont_conf = INA230_CONT_CONFIG,
273                 .divisor = 25,
274                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
275         },
276
277         [VDD_1V05_SMPS8] = {
278                 .calibration_data  = 0x7FFF,
279                 .power_lsb = 0.130212307 * PRECISION_MULTIPLIER_ARDBEG,
280                 .rail_name = "VDD_1V05_SMPS8",
281                 .trig_conf = INA230_TRIG_CONFIG,
282                 .cont_conf = INA230_CONT_CONFIG,
283                 .divisor = 25,
284                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
285         },
286 };
287
288 static struct ina230_platform_data power_mon_info_2[] = {
289         [VDD_SYS_BL] = {
290                 .calibration_data  = 0x1A29,
291                 .power_lsb = 0.63710119 * PRECISION_MULTIPLIER_ARDBEG,
292                 .rail_name = "VDD_SYS_BL",
293                 .trig_conf = INA230_TRIG_CONFIG,
294                 .cont_conf = INA230_CONT_CONFIG,
295                 .divisor = 25,
296                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
297         },
298
299         [AVDD_1V05_LDO2] = {
300                 .calibration_data  = 0x7FFF,
301                 .power_lsb = 0.390636921 * PRECISION_MULTIPLIER_ARDBEG,
302                 .rail_name = "AVDD_1V05_LDO2",
303                 .trig_conf = INA230_TRIG_CONFIG,
304                 .cont_conf = INA230_CONT_CONFIG,
305                 .divisor = 25,
306                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
307         },
308 };
309
310 /* following are power monitor parameters for Ardbeg A01*/
311 static struct ina230_platform_data ardbeg_A01_power_mon_info_1[] = {
312         [ARDBEG_A01_VDD_SYS_BAT] = {
313                 .calibration_data  = 0x1366,
314                 .power_lsb = 2.577527185 * PRECISION_MULTIPLIER_ARDBEG,
315                 .rail_name = "VDD_SYS_BAT",
316                 .trig_conf = INA230_TRIG_CONFIG,
317                 .cont_conf = INA230_CONT_CONFIG,
318                 .divisor = 25,
319                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
320                 .resistor = 10,
321         },
322
323         [ARDBEG_A01_VDD_RTC_LDO3] = {
324                 .calibration_data  = 0x7FFF,
325                 .power_lsb = 0.078127384 * PRECISION_MULTIPLIER_ARDBEG,
326                 .rail_name = "VDD_RTC_LDO3",
327                 .trig_conf = INA230_TRIG_CONFIG,
328                 .cont_conf = INA230_CONT_CONFIG,
329                 .divisor = 25,
330                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
331                 .resistor = 50,
332         },
333
334         [ARDBEG_A01_VDD_SYS_BUCKSOC] = {
335                 .calibration_data  = 0x1AAC,
336                 .power_lsb = 0.624877954 * PRECISION_MULTIPLIER_ARDBEG,
337                 .rail_name = "VDD_SYS_BUCKSOC",
338                 .trig_conf = INA230_TRIG_CONFIG,
339                 .cont_conf = INA230_CONT_CONFIG,
340                 .divisor = 25,
341                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
342                 .resistor = 30,
343         },
344
345         [ARDBEG_A01_VDD_SOC_SD1] = {
346                 .calibration_data  = 0x7FFF,
347                 .power_lsb = 3.906369213 * PRECISION_MULTIPLIER_ARDBEG,
348                 .rail_name = "VDD_SOC_SD1",
349                 .trig_conf = INA230_TRIG_CONFIG,
350                 .cont_conf = INA230_CONT_CONFIG,
351                 .divisor = 25,
352                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
353                 .resistor = 1,
354         },
355
356         [ARDBEG_A01_VDD_SYS_BUCKCPU] = {
357                 .calibration_data  = 0x1AC5,
358                 .power_lsb = 1.867795126 * PRECISION_MULTIPLIER_ARDBEG,
359                 .rail_name = "VDD_SYS_BUCKCPU",
360                 .trig_conf = INA230_TRIG_CONFIG,
361                 .cont_conf = INA230_CONT_CONFIG,
362                 .divisor = 25,
363                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
364                 .resistor = 10,
365         },
366
367         [ARDBEG_A01_VDD_CPU_BUCKCPU] = {
368                 .calibration_data  = 0x2ECF,
369                 .power_lsb = 10.68179922 * PRECISION_MULTIPLIER_ARDBEG,
370                 .rail_name = "VDD_CPU_BUCKCPU",
371                 .trig_conf = INA230_TRIG_CONFIG,
372                 .cont_conf = INA230_CONT_CONFIG,
373                 .divisor = 25,
374                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
375                 .resistor = 1,
376         },
377
378         [ARDBEG_A01_VDD_1V8_SD5] = {
379                 .calibration_data  = 0x45F0,
380                 .power_lsb = 0.714924039 * PRECISION_MULTIPLIER_ARDBEG,
381                 .rail_name = "VDD_1V8_SD5",
382                 .trig_conf = INA230_TRIG_CONFIG,
383                 .cont_conf = INA230_CONT_CONFIG,
384                 .divisor = 25,
385                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
386                 .resistor = 10,
387         },
388
389         [ARDBEG_A01_VDD_3V3A_LDO1_6] = {
390                 .calibration_data  = 0x3A83,
391                 .power_lsb = 0.042726484 * PRECISION_MULTIPLIER_ARDBEG,
392                 .rail_name = "VDD_3V3A_LDO1_6",
393                 .trig_conf = INA230_TRIG_CONFIG,
394                 .cont_conf = INA230_CONT_CONFIG,
395                 .divisor = 25,
396                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
397                 .resistor = 200,
398         },
399
400         [ARDBEG_A01_VDD_DIS_3V3_LCD] = {
401                 .calibration_data  = 0x7FFF,
402                 .power_lsb = 0.390636921 * PRECISION_MULTIPLIER_ARDBEG,
403                 .rail_name = "VDD_DIS_3V3_LCD",
404                 .trig_conf = INA230_TRIG_CONFIG,
405                 .cont_conf = INA230_CONT_CONFIG,
406                 .divisor = 25,
407                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
408                 .resistor = 10,
409         },
410
411         [ARDBEG_A01_VDD_1V35_SD2] = {
412                 .calibration_data  = 0x7FFF,
413                 .power_lsb = 3.906369213 * PRECISION_MULTIPLIER_ARDBEG,
414                 .rail_name = "VDD_1V35_SD2",
415                 .trig_conf = INA230_TRIG_CONFIG,
416                 .cont_conf = INA230_CONT_CONFIG,
417                 .divisor = 25,
418                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
419                 .resistor = 1,
420         },
421
422         [ARDBEG_A01_VDD_SYS_BUCKGPU] = {
423                 .calibration_data  = 0x1F38,
424                 .power_lsb = 1.601601602 * PRECISION_MULTIPLIER_ARDBEG,
425                 .rail_name = "VDD_SYS_BUCKGPU",
426                 .trig_conf = INA230_TRIG_CONFIG,
427                 .cont_conf = INA230_CONT_CONFIG,
428                 .divisor = 25,
429                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
430                 .resistor = 10,
431         },
432
433         [ARDBEG_A01_VDD_LCD_1V8B_DIS] = {
434                 .calibration_data  = 0x7FFF,
435                 .power_lsb = 0.039063692 * PRECISION_MULTIPLIER_ARDBEG,
436                 .rail_name = "VDD_LCD_1V8B_DIS",
437                 .trig_conf = INA230_TRIG_CONFIG,
438                 .cont_conf = INA230_CONT_CONFIG,
439                 .divisor = 25,
440                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
441                 .resistor = 100,
442         },
443
444         [ARDBEG_A01_VDD_1V05_LDO0] = {
445                 .calibration_data  = 0x7FFF,
446                 .power_lsb = 0.130212307 * PRECISION_MULTIPLIER_ARDBEG,
447                 .rail_name = "VDD_1V05_LDO0",
448                 .trig_conf = INA230_TRIG_CONFIG,
449                 .cont_conf = INA230_CONT_CONFIG,
450                 .divisor = 25,
451                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
452                 .resistor = 30,
453         },
454 };
455
456 static struct ina230_platform_data ardbeg_A01_power_mon_info_2[] = {
457         [ARDBEG_A01_VDD_1V05_SD4] = {
458                 .calibration_data  = 0x7FFF,
459                 .power_lsb = 0.390636921 * PRECISION_MULTIPLIER_ARDBEG,
460                 .rail_name = "VDD_1V05_SD4",
461                 .trig_conf = INA230_TRIG_CONFIG,
462                 .cont_conf = INA230_CONT_CONFIG,
463                 .divisor = 25,
464                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
465                 .resistor = 10,
466         },
467
468         [ARDBEG_A01_VDD_1V8A_LDO2_5_7] = {
469                 .calibration_data  = 0x5A04,
470                 .power_lsb = 0.277729561 * PRECISION_MULTIPLIER_ARDBEG,
471                 .rail_name = "VDD_1V8A_LDO2_5_7",
472                 .trig_conf = INA230_TRIG_CONFIG,
473                 .cont_conf = INA230_CONT_CONFIG,
474                 .divisor = 25,
475                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
476                 .resistor = 20,
477         },
478
479         [ARDBEG_A01_VDD_SYS_BL] = {
480                 .calibration_data  = 0x2468,
481                 .power_lsb = 0.274678112 * PRECISION_MULTIPLIER_ARDBEG,
482                 .rail_name = "VDD_SYS_BL",
483                 .trig_conf = INA230_TRIG_CONFIG,
484                 .cont_conf = INA230_CONT_CONFIG,
485                 .divisor = 25,
486                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
487                 .resistor = 50,
488         },
489 };
490
491 /* i2c addresses of rails present on Ardbeg */
492 /* addresses on i2c2_0 */
493 enum {
494         INA_I2C_2_0_ADDR_40,
495         INA_I2C_2_0_ADDR_41,
496         INA_I2C_2_0_ADDR_42,
497         INA_I2C_2_0_ADDR_43,
498 };
499
500 /* addresses on i2c2_1 */
501 enum {
502         INA_I2C_2_1_ADDR_40,
503         INA_I2C_2_1_ADDR_41,
504         INA_I2C_2_1_ADDR_42,
505         INA_I2C_2_1_ADDR_43,
506         INA_I2C_2_1_ADDR_44,
507         INA_I2C_2_1_ADDR_45,
508         INA_I2C_2_1_ADDR_46,
509         INA_I2C_2_1_ADDR_47,
510         INA_I2C_2_1_ADDR_48,
511         INA_I2C_2_1_ADDR_49,
512         INA_I2C_2_1_ADDR_4B,
513         INA_I2C_2_1_ADDR_4C,
514         INA_I2C_2_1_ADDR_4E,
515         INA_I2C_2_1_ADDR_4F,
516 };
517
518 /* addresses on i2c2_2 */
519 enum {
520         INA_I2C_2_2_ADDR_49,
521         INA_I2C_2_2_ADDR_4C,
522 };
523
524 /* i2c addresses of rails present on Ardbeg A01*/
525 /* addresses on i2c2_1 */
526 enum {
527         ARDBEG_A01_INA_I2C_2_1_ADDR_40,
528         ARDBEG_A01_INA_I2C_2_1_ADDR_41,
529         ARDBEG_A01_INA_I2C_2_1_ADDR_42,
530         ARDBEG_A01_INA_I2C_2_1_ADDR_43,
531         ARDBEG_A01_INA_I2C_2_1_ADDR_44,
532         ARDBEG_A01_INA_I2C_2_1_ADDR_45,
533         ARDBEG_A01_INA_I2C_2_1_ADDR_46,
534         ARDBEG_A01_INA_I2C_2_1_ADDR_47,
535         ARDBEG_A01_INA_I2C_2_1_ADDR_48,
536         ARDBEG_A01_INA_I2C_2_1_ADDR_49,
537         ARDBEG_A01_INA_I2C_2_1_ADDR_4B,
538         ARDBEG_A01_INA_I2C_2_1_ADDR_4E,
539         ARDBEG_A01_INA_I2C_2_1_ADDR_4F,
540 };
541
542 /* addresses on i2c2_2 */
543 enum {
544         ARDBEG_A01_INA_I2C_2_2_ADDR_40,
545         ARDBEG_A01_INA_I2C_2_2_ADDR_41,
546         ARDBEG_A01_INA_I2C_2_2_ADDR_49,
547 };
548
549 /* following is the i2c board info for Ardbeg */
550 static struct i2c_board_info ardbeg_i2c2_0_ina230_board_info[] = {
551         [INA_I2C_2_0_ADDR_40] = {
552                 I2C_BOARD_INFO("ina230", 0x40),
553                 .platform_data = &power_mon_info_0[VDD_BAT_0],
554                 .irq = -1,
555         },
556
557         [INA_I2C_2_0_ADDR_41] = {
558                 I2C_BOARD_INFO("ina230", 0x41),
559                 .platform_data = &power_mon_info_0[VDD_SYS_BUCKCPU_0],
560                 .irq = -1,
561         },
562
563         [INA_I2C_2_0_ADDR_42] = {
564                 I2C_BOARD_INFO("ina230", 0x42),
565                 .platform_data = &power_mon_info_0[VDD_SYS_BUCKSOC_0],
566                 .irq = -1,
567         },
568
569         [INA_I2C_2_0_ADDR_43] = {
570                 I2C_BOARD_INFO("ina230", 0x43),
571                 .platform_data = &power_mon_info_0[VDD_SYS_BUCKGPU_0],
572                 .irq = -1,
573         },
574 };
575
576 static struct i2c_board_info ardbeg_i2c2_1_ina230_board_info[] = {
577         [INA_I2C_2_1_ADDR_40] = {
578                 I2C_BOARD_INFO("ina230", 0x40),
579                 .platform_data = &power_mon_info_1[VDD_SYS_BAT],
580                 .irq = -1,
581         },
582
583         [INA_I2C_2_1_ADDR_41] = {
584                 I2C_BOARD_INFO("ina230", 0x41),
585                 .platform_data = &power_mon_info_1[VDD_RTC_LDO5],
586                 .irq = -1,
587         },
588
589         [INA_I2C_2_1_ADDR_42] = {
590                 I2C_BOARD_INFO("ina230", 0x42),
591                 .platform_data = &power_mon_info_1[VDD_3V3A_SMPS1_2],
592                 .irq = -1,
593         },
594
595         [INA_I2C_2_1_ADDR_43] = {
596                 I2C_BOARD_INFO("ina230", 0x43),
597                 .platform_data = &power_mon_info_1[VDD_SOC_SMPS1_2],
598                 .irq = -1,
599         },
600
601         [INA_I2C_2_1_ADDR_44] = {
602                 I2C_BOARD_INFO("ina230", 0x44),
603                 .platform_data = &power_mon_info_1[VDD_SYS_BUCKCPU],
604                 .irq = -1,
605         },
606
607         [INA_I2C_2_1_ADDR_45] = {
608                 I2C_BOARD_INFO("ina230", 0x45),
609                 .platform_data = &power_mon_info_1[VDD_CPU_BUCKCPU],
610                 .irq = -1,
611         },
612
613         [INA_I2C_2_1_ADDR_46] = {
614                 I2C_BOARD_INFO("ina230", 0x46),
615                 .platform_data = &power_mon_info_1[VDD_1V8A_SMPS3],
616                 .irq = -1,
617         },
618
619         [INA_I2C_2_1_ADDR_47] = {
620                 I2C_BOARD_INFO("ina230", 0x47),
621                 .platform_data = &power_mon_info_1[VDD_1V8B_SMPS9],
622                 .irq = -1,
623         },
624
625         [INA_I2C_2_1_ADDR_48] = {
626                 I2C_BOARD_INFO("ina230", 0x48),
627                 .platform_data = &power_mon_info_1[VDD_GPU_BUCKGPU],
628                 .irq = -1,
629         },
630
631         [INA_I2C_2_1_ADDR_49] = {
632                 I2C_BOARD_INFO("ina230", 0x49),
633                 .platform_data = &power_mon_info_1[VDD_1V35_SMPS6],
634                 .irq = -1,
635         },
636
637         [INA_I2C_2_1_ADDR_4B] = {
638                 I2C_BOARD_INFO("ina230", 0x4B),
639                 .platform_data = &power_mon_info_1[VDD_3V3A_SMPS1_2_2],
640                 .irq = -1,
641         },
642
643         [INA_I2C_2_1_ADDR_4C] = {
644                 I2C_BOARD_INFO("ina230", 0x4C),
645                 .platform_data = &power_mon_info_1[VDD_3V3B_SMPS9],
646                 .irq = -1,
647         },
648
649         [INA_I2C_2_1_ADDR_4E] = {
650                 I2C_BOARD_INFO("ina230", 0x4E),
651                 .platform_data = &power_mon_info_1[VDD_LCD_1V8B_DIS],
652                 .irq = -1,
653         },
654
655         [INA_I2C_2_1_ADDR_4F] = {
656                 I2C_BOARD_INFO("ina230", 0x4F),
657                 .platform_data = &power_mon_info_1[VDD_1V05_SMPS8],
658                 .irq = -1,
659         },
660 };
661
662 static struct i2c_board_info ardbeg_i2c2_2_ina230_board_info[] = {
663         [INA_I2C_2_2_ADDR_49] = {
664                 I2C_BOARD_INFO("ina230", 0x49),
665                 .platform_data = &power_mon_info_2[VDD_SYS_BL],
666                 .irq = -1,
667         },
668
669         [INA_I2C_2_2_ADDR_4C] = {
670                 I2C_BOARD_INFO("ina230", 0x4C),
671                 .platform_data = &power_mon_info_2[AVDD_1V05_LDO2],
672                 .irq = -1,
673         },
674
675 };
676
677 /* following is the i2c board info for Ardbeg A01 */
678 static struct i2c_board_info ardbeg_A01_i2c2_1_ina230_board_info[] = {
679         [ARDBEG_A01_INA_I2C_2_1_ADDR_40] = {
680                 I2C_BOARD_INFO("ina230", 0x40),
681                 .platform_data =
682                         &ardbeg_A01_power_mon_info_1[ARDBEG_A01_VDD_SYS_BAT],
683                 .irq = -1,
684         },
685
686         [ARDBEG_A01_INA_I2C_2_1_ADDR_41] = {
687                 I2C_BOARD_INFO("ina230", 0x41),
688                 .platform_data =
689                         &ardbeg_A01_power_mon_info_1[ARDBEG_A01_VDD_RTC_LDO3],
690                 .irq = -1,
691         },
692
693         [ARDBEG_A01_INA_I2C_2_1_ADDR_42] = {
694                 I2C_BOARD_INFO("ina230", 0x42),
695                 .platform_data =
696                 &ardbeg_A01_power_mon_info_1[ARDBEG_A01_VDD_SYS_BUCKSOC],
697                 .irq = -1,
698         },
699
700         [ARDBEG_A01_INA_I2C_2_1_ADDR_43] = {
701                 I2C_BOARD_INFO("ina230", 0x43),
702                 .platform_data =
703                         &ardbeg_A01_power_mon_info_1[ARDBEG_A01_VDD_SOC_SD1],
704                 .irq = -1,
705         },
706
707         [ARDBEG_A01_INA_I2C_2_1_ADDR_44] = {
708                 I2C_BOARD_INFO("ina230", 0x44),
709                 .platform_data =
710                 &ardbeg_A01_power_mon_info_1[ARDBEG_A01_VDD_SYS_BUCKCPU],
711                 .irq = -1,
712         },
713
714         [ARDBEG_A01_INA_I2C_2_1_ADDR_45] = {
715                 I2C_BOARD_INFO("ina230", 0x45),
716                 .platform_data =
717                 &ardbeg_A01_power_mon_info_1[ARDBEG_A01_VDD_CPU_BUCKCPU],
718                 .irq = -1,
719         },
720
721         [ARDBEG_A01_INA_I2C_2_1_ADDR_46] = {
722                 I2C_BOARD_INFO("ina230", 0x46),
723                 .platform_data =
724                         &ardbeg_A01_power_mon_info_1[ARDBEG_A01_VDD_1V8_SD5],
725                 .irq = -1,
726         },
727
728         [ARDBEG_A01_INA_I2C_2_1_ADDR_47] = {
729                 I2C_BOARD_INFO("ina230", 0x47),
730                 .platform_data =
731                 &ardbeg_A01_power_mon_info_1[ARDBEG_A01_VDD_3V3A_LDO1_6],
732                 .irq = -1,
733         },
734
735         [ARDBEG_A01_INA_I2C_2_1_ADDR_48] = {
736                 I2C_BOARD_INFO("ina230", 0x48),
737                 .platform_data =
738                 &ardbeg_A01_power_mon_info_1[ARDBEG_A01_VDD_DIS_3V3_LCD],
739                 .irq = -1,
740         },
741
742         [ARDBEG_A01_INA_I2C_2_1_ADDR_49] = {
743                 I2C_BOARD_INFO("ina230", 0x49),
744                 .platform_data =
745                         &ardbeg_A01_power_mon_info_1[ARDBEG_A01_VDD_1V35_SD2],
746                 .irq = -1,
747         },
748
749         [ARDBEG_A01_INA_I2C_2_1_ADDR_4B] = {
750                 I2C_BOARD_INFO("ina230", 0x4B),
751                 .platform_data =
752                 &ardbeg_A01_power_mon_info_1[ARDBEG_A01_VDD_SYS_BUCKGPU],
753                 .irq = -1,
754         },
755
756         [ARDBEG_A01_INA_I2C_2_1_ADDR_4E] = {
757                 I2C_BOARD_INFO("ina230", 0x4E),
758                 .platform_data =
759                 &ardbeg_A01_power_mon_info_1[ARDBEG_A01_VDD_LCD_1V8B_DIS],
760                 .irq = -1,
761         },
762
763         [ARDBEG_A01_INA_I2C_2_1_ADDR_4F] = {
764                 I2C_BOARD_INFO("ina230", 0x4F),
765                 .platform_data =
766                         &ardbeg_A01_power_mon_info_1[ARDBEG_A01_VDD_1V05_LDO0],
767                 .irq = -1,
768         },
769 };
770
771 static struct i2c_board_info ardbeg_A01_i2c2_2_ina230_board_info[] = {
772         [ARDBEG_A01_INA_I2C_2_2_ADDR_40] = {
773                 I2C_BOARD_INFO("ina230", 0x40),
774                 .platform_data =
775                         &ardbeg_A01_power_mon_info_2[ARDBEG_A01_VDD_1V05_SD4],
776                 .irq = -1,
777         },
778
779         [ARDBEG_A01_INA_I2C_2_2_ADDR_41] = {
780                 I2C_BOARD_INFO("ina230", 0x41),
781                 .platform_data =
782                 &ardbeg_A01_power_mon_info_2[ARDBEG_A01_VDD_1V8A_LDO2_5_7],
783                 .irq = -1,
784         },
785
786         [ARDBEG_A01_INA_I2C_2_2_ADDR_49] = {
787                 I2C_BOARD_INFO("ina230", 0x49),
788                 .platform_data =
789                         &ardbeg_A01_power_mon_info_2[ARDBEG_A01_VDD_SYS_BL],
790                 .irq = -1,
791         },
792 };
793
794 static struct pca954x_platform_mode ardbeg_pca954x_modes[] = {
795         { .adap_id = PCA954x_I2C_BUS0, .deselect_on_exit = true, },
796         { .adap_id = PCA954x_I2C_BUS1, .deselect_on_exit = true, },
797         { .adap_id = PCA954x_I2C_BUS2, .deselect_on_exit = true, },
798         { .adap_id = PCA954x_I2C_BUS3, .deselect_on_exit = true, },
799 };
800
801 static struct pca954x_platform_data ardbeg_pca954x_data = {
802         .modes    = ardbeg_pca954x_modes,
803         .num_modes      = ARRAY_SIZE(ardbeg_pca954x_modes),
804 };
805
806 static const struct i2c_board_info ardbeg_i2c2_board_info[] = {
807         {
808                 I2C_BOARD_INFO("pca9546", 0x71),
809                 .platform_data = &ardbeg_pca954x_data,
810         },
811 };
812
813 static void __init register_devices_ardbeg_A01(void)
814 {
815         i2c_register_board_info(PCA954x_I2C_BUS1,
816                         ardbeg_A01_i2c2_1_ina230_board_info,
817                         ARRAY_SIZE(ardbeg_A01_i2c2_1_ina230_board_info));
818
819         i2c_register_board_info(PCA954x_I2C_BUS2,
820                         ardbeg_A01_i2c2_2_ina230_board_info,
821                         ARRAY_SIZE(ardbeg_A01_i2c2_2_ina230_board_info));
822 }
823
824 static void __init register_devices_ardbeg(void)
825 {
826         i2c_register_board_info(PCA954x_I2C_BUS1,
827                         ardbeg_i2c2_1_ina230_board_info,
828                         ARRAY_SIZE(ardbeg_i2c2_1_ina230_board_info));
829
830         i2c_register_board_info(PCA954x_I2C_BUS2,
831                         ardbeg_i2c2_2_ina230_board_info,
832                         ARRAY_SIZE(ardbeg_i2c2_2_ina230_board_info));
833 }
834
835 static void modify_reworked_rail_data(void)
836 {
837         ardbeg_A01_power_mon_info_1[ARDBEG_A01_VDD_1V35_SD2].resistor
838                                         = VDD_1V35_SD2_REWORKED;
839         ardbeg_A01_power_mon_info_1[ARDBEG_A01_VDD_CPU_BUCKCPU].resistor
840                                         = VDD_CPU_BUCKCPU_REWORKED;
841         ardbeg_A01_power_mon_info_1[ARDBEG_A01_VDD_SOC_SD1].resistor
842                                         = VDD_SOC_SD1_REWORKED;
843 }
844
845 static void modify_tn8_rail_data(void)
846 {
847         /* E1780-A02 TN8 w/ E1736-A00 PMU*/
848         ardbeg_A01_power_mon_info_1[ARDBEG_A01_VDD_SYS_BAT]
849                 .calibration_data  = 0x3547;
850         ardbeg_A01_power_mon_info_1[ARDBEG_A01_VDD_SYS_BAT]
851                 .power_lsb = 3.128284087 * PRECISION_MULTIPLIER_ARDBEG;
852         ardbeg_A01_power_mon_info_1[ARDBEG_A01_VDD_SYS_BAT]
853                 .resistor = 3;
854
855         ardbeg_A01_power_mon_info_1[ARDBEG_A01_VDD_SYS_BUCKSOC]
856                 .calibration_data  = 0x2ED7;
857         ardbeg_A01_power_mon_info_1[ARDBEG_A01_VDD_SYS_BUCKSOC]
858                 .power_lsb = 1.067467267 * PRECISION_MULTIPLIER_ARDBEG;
859         ardbeg_A01_power_mon_info_1[ARDBEG_A01_VDD_SYS_BUCKSOC]
860                 .resistor = 10;
861
862         ardbeg_A01_power_mon_info_1[ARDBEG_A01_VDD_3V3A_LDO1_6]
863                 .calibration_data  = 0x7FFF;
864         ardbeg_A01_power_mon_info_1[ARDBEG_A01_VDD_3V3A_LDO1_6]
865                 .power_lsb = 0.390636921 * PRECISION_MULTIPLIER_ARDBEG;
866         ardbeg_A01_power_mon_info_1[ARDBEG_A01_VDD_3V3A_LDO1_6]
867                 .resistor = 10;
868
869         ardbeg_A01_power_mon_info_2[ARDBEG_A01_VDD_1V8A_LDO2_5_7]
870                 .calibration_data  = 0x7FFF;
871         ardbeg_A01_power_mon_info_2[ARDBEG_A01_VDD_1V8A_LDO2_5_7]
872                 .power_lsb = 0.390636921 * PRECISION_MULTIPLIER_ARDBEG;
873         ardbeg_A01_power_mon_info_2[ARDBEG_A01_VDD_1V8A_LDO2_5_7]
874                 .resistor = 10;
875
876         power_mon_info_0[VDD_BAT_0]
877                 .calibration_data = 0x1FF7;
878         power_mon_info_0[VDD_BAT_0]
879                 .power_lsb = 3.128437004 * PRECISION_MULTIPLIER_ARDBEG;
880         power_mon_info_0[VDD_BAT_0]
881                 .resistor = 5;
882
883         power_mon_info_0[VDD_SYS_BUCKSOC_0]
884                 .calibration_data = 0x2ED7;
885         power_mon_info_0[VDD_SYS_BUCKSOC_0]
886                 .power_lsb = 1.067467267 * PRECISION_MULTIPLIER_ARDBEG;
887         power_mon_info_0[VDD_SYS_BUCKSOC_0]
888                 .resistor = 10;
889 }
890
891 int __init ardbeg_pmon_init(void)
892 {
893         /*
894         * Get power_config of board and check whether
895         * board is power reworked or not.
896         * In case board is reworked, modify rail data
897         * for which rework was done.
898         */
899         u8 power_config;
900         struct board_info bi;
901         power_config = get_power_config();
902         if (power_config & ARDBEG_POWER_REWORKED_CONFIG)
903                 modify_reworked_rail_data();
904
905         tegra_get_board_info(&bi);
906
907         if (bi.sku == 1100)
908                 modify_tn8_rail_data();
909
910         i2c_register_board_info(1, ardbeg_i2c2_board_info,
911                 ARRAY_SIZE(ardbeg_i2c2_board_info));
912
913         i2c_register_board_info(PCA954x_I2C_BUS0,
914                         ardbeg_i2c2_0_ina230_board_info,
915                         ARRAY_SIZE(ardbeg_i2c2_0_ina230_board_info));
916
917         if (bi.fab >= BOARD_FAB_A01)
918                 register_devices_ardbeg_A01();
919         else
920                 register_devices_ardbeg();
921
922         return 0;
923 }
924