ARM: tegra: ardbeg: add power monitor devices for Ardbeg A01 boards
[linux-3.10.git] / arch / arm / mach-tegra / board-ardbeg-powermon.c
1 /*
2  * arch/arm/mach-tegra/board-ardbeg-powermon.c
3  *
4  * Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved.
5  *
6  * This program is free software; you can redistribute it and/or modify it
7  * under the terms and conditions of the GNU General Public License,
8  * version 2, as published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope it will be useful, but WITHOUT
11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13  * more details.
14  *
15  * You should have received a copy of the GNU General Public License
16  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
17  *
18  */
19
20 #include <linux/i2c.h>
21 #include <linux/ina219.h>
22 #include <linux/platform_data/ina230.h>
23 #include <linux/i2c/pca954x.h>
24
25 #include "board.h"
26 #include "board-ardbeg.h"
27 #include "tegra-board-id.h"
28
29 #define PRECISION_MULTIPLIER_ARDBEG     1000
30
31 /* unused rail */
32 enum {
33         UNUSED_RAIL,
34 };
35
36 /* following rails are present on Ardbeg */
37 /* rails on i2c2_1 */
38 enum {
39         VDD_SYS_BAT,
40         VDD_RTC_LDO5,
41         VDD_3V3A_SMPS1_2,
42         VDD_SOC_SMPS1_2,
43         VDD_SYS_BUCKCPU,
44         VDD_CPU_BUCKCPU,
45         VDD_1V8A_SMPS3,
46         VDD_1V8B_SMPS9,
47         VDD_GPU_BUCKGPU,
48         VDD_1V35_SMPS6,
49         VDD_3V3A_SMPS1_2_2,
50         VDD_3V3B_SMPS9,
51         VDD_LCD_1V8B_DIS,
52         VDD_1V05_SMPS8,
53 };
54
55 /* rails on i2c2_2 */
56 enum {
57         VDD_SYS_BL,
58         AVDD_1V05_LDO2,
59 };
60
61 /* following rails are present on Ardbeg A01 and onward boards */
62 /* rails on i2c2_1 */
63 enum {
64         ARDBEG_A01_VDD_SYS_BAT,
65         ARDBEG_A01_VDD_RTC_LDO3,
66         ARDBEG_A01_VDD_SYS_BUCKSOC,
67         ARDBEG_A01_VDD_SOC_SD1,
68         ARDBEG_A01_VDD_SYS_BUCKCPU,
69         ARDBEG_A01_VDD_CPU_BUCKCPU,
70         ARDBEG_A01_VDD_1V8_SD5,
71         ARDBEG_A01_VDD_3V3A_LDO1_6,
72         ARDBEG_A01_VDD_DIS_3V3_LCD,
73         ARDBEG_A01_VDD_1V35_SD2,
74         ARDBEG_A01_VDD_SYS_BUCKGPU,
75         ARDBEG_A01_VDD_LCD_1V8B_DIS,
76         ARDBEG_A01_VDD_1V05_LDO0,
77 };
78
79 /* rails on i2c2_2 */
80 enum {
81         ARDBEG_A01_VDD_1V05_SD4,
82         ARDBEG_A01_VDD_1V8A_LDO2_5_7,
83         ARDBEG_A01_VDD_SYS_BL,
84 };
85
86 static struct ina219_platform_data power_mon_info_0[] = {
87         /* All unused INA219 devices use below data */
88         [UNUSED_RAIL] = {
89                 .calibration_data = 0x369c,
90                 .power_lsb = 3.051979018 * PRECISION_MULTIPLIER_ARDBEG,
91                 .rail_name = "unused_rail",
92                 .divisor = 20,
93                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
94         },
95 };
96
97 /* following are power monitor parameters for Ardbeg */
98 static struct ina230_platform_data power_mon_info_1[] = {
99         [VDD_SYS_BAT] = {
100                 .calibration_data  = 0x1366,
101                 .power_lsb = 2.577527185 * PRECISION_MULTIPLIER_ARDBEG,
102                 .rail_name = "VDD_SYS_BAT",
103                 .divisor = 25,
104                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
105         },
106
107         [VDD_RTC_LDO5] = {
108                 .calibration_data  = 0x7FFF,
109                 .power_lsb = 0.078127384 * PRECISION_MULTIPLIER_ARDBEG,
110                 .rail_name = "VDD_RTC_LDO5",
111                 .divisor = 25,
112                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
113         },
114
115         [VDD_3V3A_SMPS1_2] = {
116                 .calibration_data  = 0x4759,
117                 .power_lsb = 1.401587736 * PRECISION_MULTIPLIER_ARDBEG,
118                 .rail_name = "VDD_3V3A_SMPS1_2",
119                 .divisor = 25,
120                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
121         },
122
123         [VDD_SOC_SMPS1_2] = {
124                 .calibration_data  = 0x7FFF,
125                 .power_lsb = 3.906369213 * PRECISION_MULTIPLIER_ARDBEG,
126                 .rail_name = "VDD_SOC_SMPS1_2",
127                 .divisor = 25,
128                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
129         },
130
131         [VDD_SYS_BUCKCPU] = {
132                 .calibration_data  = 0x1AC5,
133                 .power_lsb = 1.867795126 * PRECISION_MULTIPLIER_ARDBEG,
134                 .rail_name = "VDD_SYS_BUCKCPU",
135                 .divisor = 25,
136                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
137         },
138
139         [VDD_CPU_BUCKCPU] = {
140                 .calibration_data  = 0x2ECF,
141                 .power_lsb = 10.68179922 * PRECISION_MULTIPLIER_ARDBEG,
142                 .rail_name = "VDD_CPU_BUCKCPU",
143                 .divisor = 25,
144                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
145         },
146
147         [VDD_1V8A_SMPS3] = {
148                 .calibration_data  = 0x5BA7,
149                 .power_lsb = 0.545539786 * PRECISION_MULTIPLIER_ARDBEG,
150                 .rail_name = "VDD_1V8A_SMPS3",
151                 .divisor = 25,
152                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
153         },
154
155         [VDD_1V8B_SMPS9] = {
156                 .calibration_data  = 0x50B4,
157                 .power_lsb = 0.309777348 * PRECISION_MULTIPLIER_ARDBEG,
158                 .rail_name = "VDD_1V8B_SMPS9",
159                 .divisor = 25,
160                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
161         },
162
163         [VDD_GPU_BUCKGPU] = {
164                 .calibration_data  = 0x369C,
165                 .power_lsb = 9.155937053 * PRECISION_MULTIPLIER_ARDBEG,
166                 .rail_name = "VDD_GPU_BUCKGPU",
167                 .divisor = 25,
168                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
169         },
170
171         [VDD_1V35_SMPS6] = {
172                 .calibration_data  = 0x7FFF,
173                 .power_lsb = 3.906369213 * PRECISION_MULTIPLIER_ARDBEG,
174                 .rail_name = "VDD_1V35_SMPS6",
175                 .divisor = 25,
176                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
177         },
178
179         /* following rail is duplicate of VDD_3V3A_SMPS1_2 hence mark unused */
180         [VDD_3V3A_SMPS1_2_2] = {
181                 .calibration_data  = 0x4759,
182                 .power_lsb = 1.401587736 * PRECISION_MULTIPLIER_ARDBEG,
183                 .rail_name = "unused_rail",
184                 .divisor = 25,
185                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
186         },
187
188         [VDD_3V3B_SMPS9] = {
189                 .calibration_data  = 0x3269,
190                 .power_lsb = 0.198372724 * PRECISION_MULTIPLIER_ARDBEG,
191                 .rail_name = "VDD_3V3B_SMPS9",
192                 .divisor = 25,
193                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
194         },
195
196         [VDD_LCD_1V8B_DIS] = {
197                 .calibration_data  = 0x7FFF,
198                 .power_lsb = 0.039063692 * PRECISION_MULTIPLIER_ARDBEG,
199                 .rail_name = "VDD_LCD_1V8B_DIS",
200                 .divisor = 25,
201                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
202         },
203
204         [VDD_1V05_SMPS8] = {
205                 .calibration_data  = 0x7FFF,
206                 .power_lsb = 0.130212307 * PRECISION_MULTIPLIER_ARDBEG,
207                 .rail_name = "VDD_1V05_SMPS8",
208                 .divisor = 25,
209                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
210         },
211 };
212
213 static struct ina230_platform_data power_mon_info_2[] = {
214         [VDD_SYS_BL] = {
215                 .calibration_data  = 0x1A29,
216                 .power_lsb = 0.63710119 * PRECISION_MULTIPLIER_ARDBEG,
217                 .rail_name = "VDD_SYS_BL",
218                 .divisor = 25,
219                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
220         },
221
222         [AVDD_1V05_LDO2] = {
223                 .calibration_data  = 0x7FFF,
224                 .power_lsb = 0.390636921 * PRECISION_MULTIPLIER_ARDBEG,
225                 .rail_name = "AVDD_1V05_LDO2",
226                 .divisor = 25,
227                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
228         },
229 };
230
231 /* following are power monitor parameters for Ardbeg A01*/
232 static struct ina230_platform_data ardbeg_A01_power_mon_info_1[] = {
233         [ARDBEG_A01_VDD_SYS_BAT] = {
234                 .calibration_data  = 0x1366,
235                 .power_lsb = 2.577527185 * PRECISION_MULTIPLIER_ARDBEG,
236                 .rail_name = "VDD_SYS_BAT",
237                 .divisor = 25,
238                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
239                 .resistor = 10,
240         },
241
242         [ARDBEG_A01_VDD_RTC_LDO3] = {
243                 .calibration_data  = 0x7FFF,
244                 .power_lsb = 0.078127384 * PRECISION_MULTIPLIER_ARDBEG,
245                 .rail_name = "VDD_RTC_LDO3",
246                 .divisor = 25,
247                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
248                 .resistor = 50,
249         },
250
251         [ARDBEG_A01_VDD_SYS_BUCKSOC] = {
252                 .calibration_data  = 0x1AAC,
253                 .power_lsb = 0.624877954 * PRECISION_MULTIPLIER_ARDBEG,
254                 .rail_name = "VDD_SYS_BUCKSOC",
255                 .divisor = 25,
256                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
257                 .resistor = 30,
258         },
259
260         [ARDBEG_A01_VDD_SOC_SD1] = {
261                 .calibration_data  = 0x7FFF,
262                 .power_lsb = 3.906369213 * PRECISION_MULTIPLIER_ARDBEG,
263                 .rail_name = "VDD_SOC_SD1",
264                 .divisor = 25,
265                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
266                 .resistor = 1,
267         },
268
269         [ARDBEG_A01_VDD_SYS_BUCKCPU] = {
270                 .calibration_data  = 0x1AC5,
271                 .power_lsb = 1.867795126 * PRECISION_MULTIPLIER_ARDBEG,
272                 .rail_name = "VDD_SYS_BUCKCPU",
273                 .divisor = 25,
274                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
275                 .resistor = 10,
276         },
277
278         [ARDBEG_A01_VDD_CPU_BUCKCPU] = {
279                 .calibration_data  = 0x2ECF,
280                 .power_lsb = 10.68179922 * PRECISION_MULTIPLIER_ARDBEG,
281                 .rail_name = "VDD_CPU_BUCKCPU",
282                 .divisor = 25,
283                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
284                 .resistor = 1,
285         },
286
287         [ARDBEG_A01_VDD_1V8_SD5] = {
288                 .calibration_data  = 0x45F0,
289                 .power_lsb = 0.714924039 * PRECISION_MULTIPLIER_ARDBEG,
290                 .rail_name = "VDD_1V8_SD5",
291                 .divisor = 25,
292                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
293                 .resistor = 10,
294         },
295
296         [ARDBEG_A01_VDD_3V3A_LDO1_6] = {
297                 .calibration_data  = 0x3A83,
298                 .power_lsb = 0.042726484 * PRECISION_MULTIPLIER_ARDBEG,
299                 .rail_name = "VDD_3V3A_LDO1_6",
300                 .divisor = 25,
301                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
302                 .resistor = 200,
303         },
304
305         [ARDBEG_A01_VDD_DIS_3V3_LCD] = {
306                 .calibration_data  = 0x7FFF,
307                 .power_lsb = 0.390636921 * PRECISION_MULTIPLIER_ARDBEG,
308                 .rail_name = "VDD_DIS_3V3_LCD",
309                 .divisor = 25,
310                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
311                 .resistor = 10,
312         },
313
314         [ARDBEG_A01_VDD_1V35_SD2] = {
315                 .calibration_data  = 0x7FFF,
316                 .power_lsb = 3.906369213 * PRECISION_MULTIPLIER_ARDBEG,
317                 .rail_name = "VDD_1V35_SD2",
318                 .divisor = 25,
319                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
320                 .resistor = 1,
321         },
322
323         [ARDBEG_A01_VDD_SYS_BUCKGPU] = {
324                 .calibration_data  = 0x1F38,
325                 .power_lsb = 1.601601602 * PRECISION_MULTIPLIER_ARDBEG,
326                 .rail_name = "VDD_SYS_BUCKGPU",
327                 .divisor = 25,
328                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
329                 .resistor = 10,
330         },
331
332         [ARDBEG_A01_VDD_LCD_1V8B_DIS] = {
333                 .calibration_data  = 0x7FFF,
334                 .power_lsb = 0.039063692 * PRECISION_MULTIPLIER_ARDBEG,
335                 .rail_name = "VDD_LCD_1V8B_DIS",
336                 .divisor = 25,
337                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
338                 .resistor = 100,
339         },
340
341         [ARDBEG_A01_VDD_1V05_LDO0] = {
342                 .calibration_data  = 0x7FFF,
343                 .power_lsb = 0.130212307 * PRECISION_MULTIPLIER_ARDBEG,
344                 .rail_name = "VDD_1V05_LDO0",
345                 .divisor = 25,
346                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
347                 .resistor = 30,
348         },
349 };
350
351 static struct ina230_platform_data ardbeg_A01_power_mon_info_2[] = {
352         [ARDBEG_A01_VDD_1V05_SD4] = {
353                 .calibration_data  = 0x7FFF,
354                 .power_lsb = 0.390636921 * PRECISION_MULTIPLIER_ARDBEG,
355                 .rail_name = "VDD_1V05_SD4",
356                 .divisor = 25,
357                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
358                 .resistor = 10,
359         },
360
361         [ARDBEG_A01_VDD_1V8A_LDO2_5_7] = {
362                 .calibration_data  = 0x5A04,
363                 .power_lsb = 0.277729561 * PRECISION_MULTIPLIER_ARDBEG,
364                 .rail_name = "VDD_1V8A_LDO2_5_7",
365                 .divisor = 25,
366                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
367                 .resistor = 20,
368         },
369
370         [ARDBEG_A01_VDD_SYS_BL] = {
371                 .calibration_data  = 0x2468,
372                 .power_lsb = 0.274678112 * PRECISION_MULTIPLIER_ARDBEG,
373                 .rail_name = "VDD_SYS_BL",
374                 .divisor = 25,
375                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
376                 .resistor = 50,
377         },
378 };
379
380 /* i2c addresses of rails present on Ardbeg */
381 /* addresses on i2c2_0 */
382 enum {
383         INA_I2C_2_0_ADDR_40,
384         INA_I2C_2_0_ADDR_41,
385         INA_I2C_2_0_ADDR_42,
386         INA_I2C_2_0_ADDR_43,
387 };
388
389 /* addresses on i2c2_1 */
390 enum {
391         INA_I2C_2_1_ADDR_40,
392         INA_I2C_2_1_ADDR_41,
393         INA_I2C_2_1_ADDR_42,
394         INA_I2C_2_1_ADDR_43,
395         INA_I2C_2_1_ADDR_44,
396         INA_I2C_2_1_ADDR_45,
397         INA_I2C_2_1_ADDR_46,
398         INA_I2C_2_1_ADDR_47,
399         INA_I2C_2_1_ADDR_48,
400         INA_I2C_2_1_ADDR_49,
401         INA_I2C_2_1_ADDR_4B,
402         INA_I2C_2_1_ADDR_4C,
403         INA_I2C_2_1_ADDR_4E,
404         INA_I2C_2_1_ADDR_4F,
405 };
406
407 /* addresses on i2c2_2 */
408 enum {
409         INA_I2C_2_2_ADDR_49,
410         INA_I2C_2_2_ADDR_4C,
411 };
412
413 /* i2c addresses of rails present on Ardbeg A01*/
414 /* addresses on i2c2_1 */
415 enum {
416         ARDBEG_A01_INA_I2C_2_1_ADDR_40,
417         ARDBEG_A01_INA_I2C_2_1_ADDR_41,
418         ARDBEG_A01_INA_I2C_2_1_ADDR_42,
419         ARDBEG_A01_INA_I2C_2_1_ADDR_43,
420         ARDBEG_A01_INA_I2C_2_1_ADDR_44,
421         ARDBEG_A01_INA_I2C_2_1_ADDR_45,
422         ARDBEG_A01_INA_I2C_2_1_ADDR_46,
423         ARDBEG_A01_INA_I2C_2_1_ADDR_47,
424         ARDBEG_A01_INA_I2C_2_1_ADDR_48,
425         ARDBEG_A01_INA_I2C_2_1_ADDR_49,
426         ARDBEG_A01_INA_I2C_2_1_ADDR_4B,
427         ARDBEG_A01_INA_I2C_2_1_ADDR_4E,
428         ARDBEG_A01_INA_I2C_2_1_ADDR_4F,
429 };
430
431 /* addresses on i2c2_2 */
432 enum {
433         ARDBEG_A01_INA_I2C_2_2_ADDR_40,
434         ARDBEG_A01_INA_I2C_2_2_ADDR_41,
435         ARDBEG_A01_INA_I2C_2_2_ADDR_49,
436 };
437
438 /* following is the i2c board info for Ardbeg */
439 static struct i2c_board_info ardbeg_i2c2_0_ina219_board_info[] = {
440         [INA_I2C_2_0_ADDR_40] = {
441                 I2C_BOARD_INFO("ina219", 0x40),
442                 .platform_data = &power_mon_info_0[UNUSED_RAIL],
443                 .irq = -1,
444         },
445
446         [INA_I2C_2_0_ADDR_41] = {
447                 I2C_BOARD_INFO("ina219", 0x41),
448                 .platform_data = &power_mon_info_0[UNUSED_RAIL],
449                 .irq = -1,
450         },
451
452         [INA_I2C_2_0_ADDR_42] = {
453                 I2C_BOARD_INFO("ina219", 0x42),
454                 .platform_data = &power_mon_info_0[UNUSED_RAIL],
455                 .irq = -1,
456         },
457
458         [INA_I2C_2_0_ADDR_43] = {
459                 I2C_BOARD_INFO("ina219", 0x43),
460                 .platform_data = &power_mon_info_0[UNUSED_RAIL],
461                 .irq = -1,
462         },
463 };
464
465 static struct i2c_board_info ardbeg_i2c2_1_ina230_board_info[] = {
466         [INA_I2C_2_1_ADDR_40] = {
467                 I2C_BOARD_INFO("ina230", 0x40),
468                 .platform_data = &power_mon_info_1[VDD_SYS_BAT],
469                 .irq = -1,
470         },
471
472         [INA_I2C_2_1_ADDR_41] = {
473                 I2C_BOARD_INFO("ina230", 0x41),
474                 .platform_data = &power_mon_info_1[VDD_RTC_LDO5],
475                 .irq = -1,
476         },
477
478         [INA_I2C_2_1_ADDR_42] = {
479                 I2C_BOARD_INFO("ina230", 0x42),
480                 .platform_data = &power_mon_info_1[VDD_3V3A_SMPS1_2],
481                 .irq = -1,
482         },
483
484         [INA_I2C_2_1_ADDR_43] = {
485                 I2C_BOARD_INFO("ina230", 0x43),
486                 .platform_data = &power_mon_info_1[VDD_SOC_SMPS1_2],
487                 .irq = -1,
488         },
489
490         [INA_I2C_2_1_ADDR_44] = {
491                 I2C_BOARD_INFO("ina230", 0x44),
492                 .platform_data = &power_mon_info_1[VDD_SYS_BUCKCPU],
493                 .irq = -1,
494         },
495
496         [INA_I2C_2_1_ADDR_45] = {
497                 I2C_BOARD_INFO("ina230", 0x45),
498                 .platform_data = &power_mon_info_1[VDD_CPU_BUCKCPU],
499                 .irq = -1,
500         },
501
502         [INA_I2C_2_1_ADDR_46] = {
503                 I2C_BOARD_INFO("ina230", 0x46),
504                 .platform_data = &power_mon_info_1[VDD_1V8A_SMPS3],
505                 .irq = -1,
506         },
507
508         [INA_I2C_2_1_ADDR_47] = {
509                 I2C_BOARD_INFO("ina230", 0x47),
510                 .platform_data = &power_mon_info_1[VDD_1V8B_SMPS9],
511                 .irq = -1,
512         },
513
514         [INA_I2C_2_1_ADDR_48] = {
515                 I2C_BOARD_INFO("ina230", 0x48),
516                 .platform_data = &power_mon_info_1[VDD_GPU_BUCKGPU],
517                 .irq = -1,
518         },
519
520         [INA_I2C_2_1_ADDR_49] = {
521                 I2C_BOARD_INFO("ina230", 0x49),
522                 .platform_data = &power_mon_info_1[VDD_1V35_SMPS6],
523                 .irq = -1,
524         },
525
526         [INA_I2C_2_1_ADDR_4B] = {
527                 I2C_BOARD_INFO("ina230", 0x4B),
528                 .platform_data = &power_mon_info_1[VDD_3V3A_SMPS1_2_2],
529                 .irq = -1,
530         },
531
532         [INA_I2C_2_1_ADDR_4C] = {
533                 I2C_BOARD_INFO("ina230", 0x4C),
534                 .platform_data = &power_mon_info_1[VDD_3V3B_SMPS9],
535                 .irq = -1,
536         },
537
538         [INA_I2C_2_1_ADDR_4E] = {
539                 I2C_BOARD_INFO("ina230", 0x4E),
540                 .platform_data = &power_mon_info_1[VDD_LCD_1V8B_DIS],
541                 .irq = -1,
542         },
543
544         [INA_I2C_2_1_ADDR_4F] = {
545                 I2C_BOARD_INFO("ina230", 0x4F),
546                 .platform_data = &power_mon_info_1[VDD_1V05_SMPS8],
547                 .irq = -1,
548         },
549 };
550
551 static struct i2c_board_info ardbeg_i2c2_2_ina230_board_info[] = {
552         [INA_I2C_2_2_ADDR_49] = {
553                 I2C_BOARD_INFO("ina230", 0x49),
554                 .platform_data = &power_mon_info_2[VDD_SYS_BL],
555                 .irq = -1,
556         },
557
558         [INA_I2C_2_2_ADDR_4C] = {
559                 I2C_BOARD_INFO("ina230", 0x4C),
560                 .platform_data = &power_mon_info_2[AVDD_1V05_LDO2],
561                 .irq = -1,
562         },
563
564 };
565
566 /* following is the i2c board info for Ardbeg A01 */
567 static struct i2c_board_info ardbeg_A01_i2c2_1_ina230_board_info[] = {
568         [ARDBEG_A01_INA_I2C_2_1_ADDR_40] = {
569                 I2C_BOARD_INFO("ina230", 0x40),
570                 .platform_data =
571                         &ardbeg_A01_power_mon_info_1[ARDBEG_A01_VDD_SYS_BAT],
572                 .irq = -1,
573         },
574
575         [ARDBEG_A01_INA_I2C_2_1_ADDR_41] = {
576                 I2C_BOARD_INFO("ina230", 0x41),
577                 .platform_data =
578                         &ardbeg_A01_power_mon_info_1[ARDBEG_A01_VDD_RTC_LDO3],
579                 .irq = -1,
580         },
581
582         [ARDBEG_A01_INA_I2C_2_1_ADDR_42] = {
583                 I2C_BOARD_INFO("ina230", 0x42),
584                 .platform_data =
585                 &ardbeg_A01_power_mon_info_1[ARDBEG_A01_VDD_SYS_BUCKSOC],
586                 .irq = -1,
587         },
588
589         [ARDBEG_A01_INA_I2C_2_1_ADDR_43] = {
590                 I2C_BOARD_INFO("ina230", 0x43),
591                 .platform_data =
592                         &ardbeg_A01_power_mon_info_1[ARDBEG_A01_VDD_SOC_SD1],
593                 .irq = -1,
594         },
595
596         [ARDBEG_A01_INA_I2C_2_1_ADDR_44] = {
597                 I2C_BOARD_INFO("ina230", 0x44),
598                 .platform_data =
599                 &ardbeg_A01_power_mon_info_1[ARDBEG_A01_VDD_SYS_BUCKCPU],
600                 .irq = -1,
601         },
602
603         [ARDBEG_A01_INA_I2C_2_1_ADDR_45] = {
604                 I2C_BOARD_INFO("ina230", 0x45),
605                 .platform_data =
606                 &ardbeg_A01_power_mon_info_1[ARDBEG_A01_VDD_CPU_BUCKCPU],
607                 .irq = -1,
608         },
609
610         [ARDBEG_A01_INA_I2C_2_1_ADDR_46] = {
611                 I2C_BOARD_INFO("ina230", 0x46),
612                 .platform_data =
613                         &ardbeg_A01_power_mon_info_1[ARDBEG_A01_VDD_1V8_SD5],
614                 .irq = -1,
615         },
616
617         [ARDBEG_A01_INA_I2C_2_1_ADDR_47] = {
618                 I2C_BOARD_INFO("ina230", 0x47),
619                 .platform_data =
620                 &ardbeg_A01_power_mon_info_1[ARDBEG_A01_VDD_3V3A_LDO1_6],
621                 .irq = -1,
622         },
623
624         [ARDBEG_A01_INA_I2C_2_1_ADDR_48] = {
625                 I2C_BOARD_INFO("ina230", 0x48),
626                 .platform_data =
627                 &ardbeg_A01_power_mon_info_1[ARDBEG_A01_VDD_DIS_3V3_LCD],
628                 .irq = -1,
629         },
630
631         [ARDBEG_A01_INA_I2C_2_1_ADDR_49] = {
632                 I2C_BOARD_INFO("ina230", 0x49),
633                 .platform_data =
634                         &ardbeg_A01_power_mon_info_1[ARDBEG_A01_VDD_1V35_SD2],
635                 .irq = -1,
636         },
637
638         [ARDBEG_A01_INA_I2C_2_1_ADDR_4B] = {
639                 I2C_BOARD_INFO("ina230", 0x4B),
640                 .platform_data =
641                 &ardbeg_A01_power_mon_info_1[ARDBEG_A01_VDD_SYS_BUCKGPU],
642                 .irq = -1,
643         },
644
645         [ARDBEG_A01_INA_I2C_2_1_ADDR_4E] = {
646                 I2C_BOARD_INFO("ina230", 0x4E),
647                 .platform_data =
648                 &ardbeg_A01_power_mon_info_1[ARDBEG_A01_VDD_LCD_1V8B_DIS],
649                 .irq = -1,
650         },
651
652         [ARDBEG_A01_INA_I2C_2_1_ADDR_4F] = {
653                 I2C_BOARD_INFO("ina230", 0x4F),
654                 .platform_data =
655                         &ardbeg_A01_power_mon_info_1[ARDBEG_A01_VDD_1V05_LDO0],
656                 .irq = -1,
657         },
658 };
659
660 static struct i2c_board_info ardbeg_A01_i2c2_2_ina230_board_info[] = {
661         [ARDBEG_A01_INA_I2C_2_2_ADDR_40] = {
662                 I2C_BOARD_INFO("ina230", 0x40),
663                 .platform_data =
664                         &ardbeg_A01_power_mon_info_2[ARDBEG_A01_VDD_1V05_SD4],
665                 .irq = -1,
666         },
667
668         [ARDBEG_A01_INA_I2C_2_2_ADDR_41] = {
669                 I2C_BOARD_INFO("ina230", 0x41),
670                 .platform_data =
671                 &ardbeg_A01_power_mon_info_2[ARDBEG_A01_VDD_1V8A_LDO2_5_7],
672                 .irq = -1,
673         },
674
675         [ARDBEG_A01_INA_I2C_2_2_ADDR_49] = {
676                 I2C_BOARD_INFO("ina230", 0x49),
677                 .platform_data =
678                         &ardbeg_A01_power_mon_info_2[ARDBEG_A01_VDD_SYS_BL],
679                 .irq = -1,
680         },
681 };
682
683 static struct pca954x_platform_mode ardbeg_pca954x_modes[] = {
684         { .adap_id = PCA954x_I2C_BUS0, .deselect_on_exit = true, },
685         { .adap_id = PCA954x_I2C_BUS1, .deselect_on_exit = true, },
686         { .adap_id = PCA954x_I2C_BUS2, .deselect_on_exit = true, },
687         { .adap_id = PCA954x_I2C_BUS3, .deselect_on_exit = true, },
688 };
689
690 static struct pca954x_platform_data ardbeg_pca954x_data = {
691         .modes    = ardbeg_pca954x_modes,
692         .num_modes      = ARRAY_SIZE(ardbeg_pca954x_modes),
693 };
694
695 static const struct i2c_board_info ardbeg_i2c2_board_info[] = {
696         {
697                 I2C_BOARD_INFO("pca9546", 0x71),
698                 .platform_data = &ardbeg_pca954x_data,
699         },
700 };
701
702 static void __init register_devices_ardbeg_A01(void)
703 {
704         i2c_register_board_info(PCA954x_I2C_BUS1,
705                         ardbeg_A01_i2c2_1_ina230_board_info,
706                         ARRAY_SIZE(ardbeg_A01_i2c2_1_ina230_board_info));
707
708         i2c_register_board_info(PCA954x_I2C_BUS2,
709                         ardbeg_A01_i2c2_2_ina230_board_info,
710                         ARRAY_SIZE(ardbeg_A01_i2c2_2_ina230_board_info));
711 }
712
713 static void __init register_devices_ardbeg(void)
714 {
715         i2c_register_board_info(PCA954x_I2C_BUS1,
716                         ardbeg_i2c2_1_ina230_board_info,
717                         ARRAY_SIZE(ardbeg_i2c2_1_ina230_board_info));
718
719         i2c_register_board_info(PCA954x_I2C_BUS2,
720                         ardbeg_i2c2_2_ina230_board_info,
721                         ARRAY_SIZE(ardbeg_i2c2_2_ina230_board_info));
722 }
723
724 int __init ardbeg_pmon_init(void)
725 {
726         struct board_info bi;
727
728         tegra_get_board_info(&bi);
729
730         i2c_register_board_info(1, ardbeg_i2c2_board_info,
731                 ARRAY_SIZE(ardbeg_i2c2_board_info));
732
733         i2c_register_board_info(PCA954x_I2C_BUS0,
734                         ardbeg_i2c2_0_ina219_board_info,
735                         ARRAY_SIZE(ardbeg_i2c2_0_ina219_board_info));
736
737         if (bi.fab >= BOARD_FAB_A01)
738                 register_devices_ardbeg_A01();
739         else
740                 register_devices_ardbeg();
741
742         return 0;
743 }
744