ARM: tegra: ardbeg: add productized power monitor devices
[linux-3.10.git] / arch / arm / mach-tegra / board-ardbeg-powermon.c
1 /*
2  * arch/arm/mach-tegra/board-ardbeg-powermon.c
3  *
4  * Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved.
5  *
6  * This program is free software; you can redistribute it and/or modify it
7  * under the terms and conditions of the GNU General Public License,
8  * version 2, as published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope it will be useful, but WITHOUT
11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13  * more details.
14  *
15  * You should have received a copy of the GNU General Public License
16  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
17  *
18  */
19
20 #include <linux/i2c.h>
21 #include <linux/platform_data/ina230.h>
22 #include <linux/i2c/pca954x.h>
23
24 #include "board.h"
25 #include "board-ardbeg.h"
26 #include "tegra-board-id.h"
27
28 #define PRECISION_MULTIPLIER_ARDBEG     1000
29 #define ARDBEG_POWER_REWORKED_CONFIG    0x10
30 #define VDD_SOC_SD1_REWORKED            10
31 #define VDD_CPU_BUCKCPU_REWORKED        10
32 #define VDD_1V35_SD2_REWORKED           10
33
34 #define AVG_32_SAMPLES (4 << 9)
35
36 /* AVG is specified from platform data */
37 #define INA230_CONT_CONFIG      (AVG_32_SAMPLES | INA230_VBUS_CT | \
38                                 INA230_VSH_CT | INA230_CONT_MODE)
39 #define INA230_TRIG_CONFIG      (AVG_32_SAMPLES | INA230_VBUS_CT | \
40                                 INA230_VSH_CT | INA230_TRIG_MODE)
41
42 /* rails on i2c2_0 */
43 enum {
44         VDD_BAT_0,
45         VDD_SYS_BUCKCPU_0,
46         VDD_SYS_BUCKSOC_0,
47         VDD_SYS_BUCKGPU_0,
48 };
49
50 /* following rails are present on Ardbeg */
51 /* rails on i2c2_1 */
52 enum {
53         VDD_SYS_BAT,
54         VDD_RTC_LDO5,
55         VDD_3V3A_SMPS1_2,
56         VDD_SOC_SMPS1_2,
57         VDD_SYS_BUCKCPU,
58         VDD_CPU_BUCKCPU,
59         VDD_1V8A_SMPS3,
60         VDD_1V8B_SMPS9,
61         VDD_GPU_BUCKGPU,
62         VDD_1V35_SMPS6,
63         VDD_3V3A_SMPS1_2_2,
64         VDD_3V3B_SMPS9,
65         VDD_LCD_1V8B_DIS,
66         VDD_1V05_SMPS8,
67 };
68
69 /* rails on i2c2_2 */
70 enum {
71         VDD_SYS_BL,
72         AVDD_1V05_LDO2,
73 };
74
75 /* following rails are present on Ardbeg A01 and onward boards */
76 /* rails on i2c2_1 */
77 enum {
78         ARDBEG_A01_VDD_SYS_BAT,
79         ARDBEG_A01_VDD_RTC_LDO3,
80         ARDBEG_A01_VDD_SYS_BUCKSOC,
81         ARDBEG_A01_VDD_SOC_SD1,
82         ARDBEG_A01_VDD_SYS_BUCKCPU,
83         ARDBEG_A01_VDD_CPU_BUCKCPU,
84         ARDBEG_A01_VDD_1V8_SD5,
85         ARDBEG_A01_VDD_3V3A_LDO1_6,
86         ARDBEG_A01_VDD_DIS_3V3_LCD,
87         ARDBEG_A01_VDD_1V35_SD2,
88         ARDBEG_A01_VDD_SYS_BUCKGPU,
89         ARDBEG_A01_VDD_LCD_1V8B_DIS,
90         ARDBEG_A01_VDD_1V05_LDO0,
91 };
92
93 /* rails on i2c2_2 */
94 enum {
95         ARDBEG_A01_VDD_1V05_SD4,
96         ARDBEG_A01_VDD_1V8A_LDO2_5_7,
97         ARDBEG_A01_VDD_SYS_BL,
98 };
99
100 static struct ina230_platform_data power_mon_info_0[] = {
101         /* E1780-A02 (Shield ERS) */
102         [VDD_BAT_0] = {
103                 .calibration_data = 0x1366,
104                 .power_lsb = 2.577527185 * PRECISION_MULTIPLIER_ARDBEG,
105                 .rail_name = "VDD_BAT",
106                 .divisor = 25,
107                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
108                 .resistor = 10,
109         },
110         [VDD_SYS_BUCKCPU_0] = {
111                 .calibration_data = 0x1AC5,
112                 .power_lsb = 1.867795126 * PRECISION_MULTIPLIER_ARDBEG,
113                 .rail_name = "VDD_SYS_BUCKCPU",
114                 .divisor = 25,
115                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
116                 .resistor = 10,
117         },
118         [VDD_SYS_BUCKSOC_0] = {
119                 .calibration_data = 0x2802,
120                 .power_lsb = 0.624877954 * PRECISION_MULTIPLIER_ARDBEG,
121                 .rail_name = "VDD_SYS_BUCKSOC",
122                 .divisor = 25,
123                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
124                 .resistor = 20,
125         },
126         [VDD_SYS_BUCKGPU_0] = {
127                 .calibration_data = 0x1F38,
128                 .power_lsb = 1.601601602 * PRECISION_MULTIPLIER_ARDBEG,
129                 .rail_name = "VDD_SYS_BUCKCPU",
130                 .divisor = 25,
131                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
132                 .resistor = 10,
133         },
134 };
135
136 /* following are power monitor parameters for Ardbeg */
137 static struct ina230_platform_data power_mon_info_1[] = {
138         [VDD_SYS_BAT] = {
139                 .calibration_data  = 0x1366,
140                 .power_lsb = 2.577527185 * PRECISION_MULTIPLIER_ARDBEG,
141                 .rail_name = "VDD_SYS_BAT",
142                 .trig_conf = INA230_TRIG_CONFIG,
143                 .cont_conf = INA230_CONT_CONFIG,
144                 .divisor = 25,
145                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
146         },
147
148         [VDD_RTC_LDO5] = {
149                 .calibration_data  = 0x7FFF,
150                 .power_lsb = 0.078127384 * PRECISION_MULTIPLIER_ARDBEG,
151                 .rail_name = "VDD_RTC_LDO5",
152                 .trig_conf = INA230_TRIG_CONFIG,
153                 .cont_conf = INA230_CONT_CONFIG,
154                 .divisor = 25,
155                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
156         },
157
158         [VDD_3V3A_SMPS1_2] = {
159                 .calibration_data  = 0x4759,
160                 .power_lsb = 1.401587736 * PRECISION_MULTIPLIER_ARDBEG,
161                 .rail_name = "VDD_3V3A_SMPS1_2",
162                 .trig_conf = INA230_TRIG_CONFIG,
163                 .cont_conf = INA230_CONT_CONFIG,
164                 .divisor = 25,
165                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
166         },
167
168         [VDD_SOC_SMPS1_2] = {
169                 .calibration_data  = 0x7FFF,
170                 .power_lsb = 3.906369213 * PRECISION_MULTIPLIER_ARDBEG,
171                 .rail_name = "VDD_SOC_SMPS1_2",
172                 .trig_conf = INA230_TRIG_CONFIG,
173                 .cont_conf = INA230_CONT_CONFIG,
174                 .divisor = 25,
175                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
176         },
177
178         [VDD_SYS_BUCKCPU] = {
179                 .calibration_data  = 0x1AC5,
180                 .power_lsb = 1.867795126 * PRECISION_MULTIPLIER_ARDBEG,
181                 .rail_name = "VDD_SYS_BUCKCPU",
182                 .trig_conf = INA230_TRIG_CONFIG,
183                 .cont_conf = INA230_CONT_CONFIG,
184                 .divisor = 25,
185                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
186         },
187
188         [VDD_CPU_BUCKCPU] = {
189                 .calibration_data  = 0x2ECF,
190                 .power_lsb = 10.68179922 * PRECISION_MULTIPLIER_ARDBEG,
191                 .rail_name = "VDD_CPU_BUCKCPU",
192                 .trig_conf = INA230_TRIG_CONFIG,
193                 .cont_conf = INA230_CONT_CONFIG,
194                 .divisor = 25,
195                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
196         },
197
198         [VDD_1V8A_SMPS3] = {
199                 .calibration_data  = 0x5BA7,
200                 .power_lsb = 0.545539786 * PRECISION_MULTIPLIER_ARDBEG,
201                 .rail_name = "VDD_1V8A_SMPS3",
202                 .trig_conf = INA230_TRIG_CONFIG,
203                 .cont_conf = INA230_CONT_CONFIG,
204                 .divisor = 25,
205                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
206         },
207
208         [VDD_1V8B_SMPS9] = {
209                 .calibration_data  = 0x50B4,
210                 .power_lsb = 0.309777348 * PRECISION_MULTIPLIER_ARDBEG,
211                 .rail_name = "VDD_1V8B_SMPS9",
212                 .trig_conf = INA230_TRIG_CONFIG,
213                 .cont_conf = INA230_CONT_CONFIG,
214                 .divisor = 25,
215                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
216         },
217
218         [VDD_GPU_BUCKGPU] = {
219                 .calibration_data  = 0x369C,
220                 .power_lsb = 9.155937053 * PRECISION_MULTIPLIER_ARDBEG,
221                 .rail_name = "VDD_GPU_BUCKGPU",
222                 .trig_conf = INA230_TRIG_CONFIG,
223                 .cont_conf = INA230_CONT_CONFIG,
224                 .divisor = 25,
225                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
226         },
227
228         [VDD_1V35_SMPS6] = {
229                 .calibration_data  = 0x7FFF,
230                 .power_lsb = 3.906369213 * PRECISION_MULTIPLIER_ARDBEG,
231                 .rail_name = "VDD_1V35_SMPS6",
232                 .trig_conf = INA230_TRIG_CONFIG,
233                 .cont_conf = INA230_CONT_CONFIG,
234                 .divisor = 25,
235                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
236         },
237
238         /* following rail is duplicate of VDD_3V3A_SMPS1_2 hence mark unused */
239         [VDD_3V3A_SMPS1_2_2] = {
240                 .calibration_data  = 0x4759,
241                 .power_lsb = 1.401587736 * PRECISION_MULTIPLIER_ARDBEG,
242                 .rail_name = "unused_rail",
243                 .trig_conf = INA230_TRIG_CONFIG,
244                 .cont_conf = INA230_CONT_CONFIG,
245                 .divisor = 25,
246                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
247         },
248
249         [VDD_3V3B_SMPS9] = {
250                 .calibration_data  = 0x3269,
251                 .power_lsb = 0.198372724 * PRECISION_MULTIPLIER_ARDBEG,
252                 .rail_name = "VDD_3V3B_SMPS9",
253                 .trig_conf = INA230_TRIG_CONFIG,
254                 .cont_conf = INA230_CONT_CONFIG,
255                 .divisor = 25,
256                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
257         },
258
259         [VDD_LCD_1V8B_DIS] = {
260                 .calibration_data  = 0x7FFF,
261                 .power_lsb = 0.039063692 * PRECISION_MULTIPLIER_ARDBEG,
262                 .rail_name = "VDD_LCD_1V8B_DIS",
263                 .trig_conf = INA230_TRIG_CONFIG,
264                 .cont_conf = INA230_CONT_CONFIG,
265                 .divisor = 25,
266                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
267         },
268
269         [VDD_1V05_SMPS8] = {
270                 .calibration_data  = 0x7FFF,
271                 .power_lsb = 0.130212307 * PRECISION_MULTIPLIER_ARDBEG,
272                 .rail_name = "VDD_1V05_SMPS8",
273                 .trig_conf = INA230_TRIG_CONFIG,
274                 .cont_conf = INA230_CONT_CONFIG,
275                 .divisor = 25,
276                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
277         },
278 };
279
280 static struct ina230_platform_data power_mon_info_2[] = {
281         [VDD_SYS_BL] = {
282                 .calibration_data  = 0x1A29,
283                 .power_lsb = 0.63710119 * PRECISION_MULTIPLIER_ARDBEG,
284                 .rail_name = "VDD_SYS_BL",
285                 .trig_conf = INA230_TRIG_CONFIG,
286                 .cont_conf = INA230_CONT_CONFIG,
287                 .divisor = 25,
288                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
289         },
290
291         [AVDD_1V05_LDO2] = {
292                 .calibration_data  = 0x7FFF,
293                 .power_lsb = 0.390636921 * PRECISION_MULTIPLIER_ARDBEG,
294                 .rail_name = "AVDD_1V05_LDO2",
295                 .trig_conf = INA230_TRIG_CONFIG,
296                 .cont_conf = INA230_CONT_CONFIG,
297                 .divisor = 25,
298                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
299         },
300 };
301
302 /* following are power monitor parameters for Ardbeg A01*/
303 static struct ina230_platform_data ardbeg_A01_power_mon_info_1[] = {
304         [ARDBEG_A01_VDD_SYS_BAT] = {
305                 .calibration_data  = 0x1366,
306                 .power_lsb = 2.577527185 * PRECISION_MULTIPLIER_ARDBEG,
307                 .rail_name = "VDD_SYS_BAT",
308                 .trig_conf = INA230_TRIG_CONFIG,
309                 .cont_conf = INA230_CONT_CONFIG,
310                 .divisor = 25,
311                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
312                 .resistor = 10,
313         },
314
315         [ARDBEG_A01_VDD_RTC_LDO3] = {
316                 .calibration_data  = 0x7FFF,
317                 .power_lsb = 0.078127384 * PRECISION_MULTIPLIER_ARDBEG,
318                 .rail_name = "VDD_RTC_LDO3",
319                 .trig_conf = INA230_TRIG_CONFIG,
320                 .cont_conf = INA230_CONT_CONFIG,
321                 .divisor = 25,
322                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
323                 .resistor = 50,
324         },
325
326         [ARDBEG_A01_VDD_SYS_BUCKSOC] = {
327                 .calibration_data  = 0x1AAC,
328                 .power_lsb = 0.624877954 * PRECISION_MULTIPLIER_ARDBEG,
329                 .rail_name = "VDD_SYS_BUCKSOC",
330                 .trig_conf = INA230_TRIG_CONFIG,
331                 .cont_conf = INA230_CONT_CONFIG,
332                 .divisor = 25,
333                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
334                 .resistor = 30,
335         },
336
337         [ARDBEG_A01_VDD_SOC_SD1] = {
338                 .calibration_data  = 0x7FFF,
339                 .power_lsb = 3.906369213 * PRECISION_MULTIPLIER_ARDBEG,
340                 .rail_name = "VDD_SOC_SD1",
341                 .trig_conf = INA230_TRIG_CONFIG,
342                 .cont_conf = INA230_CONT_CONFIG,
343                 .divisor = 25,
344                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
345                 .resistor = 1,
346         },
347
348         [ARDBEG_A01_VDD_SYS_BUCKCPU] = {
349                 .calibration_data  = 0x1AC5,
350                 .power_lsb = 1.867795126 * PRECISION_MULTIPLIER_ARDBEG,
351                 .rail_name = "VDD_SYS_BUCKCPU",
352                 .trig_conf = INA230_TRIG_CONFIG,
353                 .cont_conf = INA230_CONT_CONFIG,
354                 .divisor = 25,
355                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
356                 .resistor = 10,
357         },
358
359         [ARDBEG_A01_VDD_CPU_BUCKCPU] = {
360                 .calibration_data  = 0x2ECF,
361                 .power_lsb = 10.68179922 * PRECISION_MULTIPLIER_ARDBEG,
362                 .rail_name = "VDD_CPU_BUCKCPU",
363                 .trig_conf = INA230_TRIG_CONFIG,
364                 .cont_conf = INA230_CONT_CONFIG,
365                 .divisor = 25,
366                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
367                 .resistor = 1,
368         },
369
370         [ARDBEG_A01_VDD_1V8_SD5] = {
371                 .calibration_data  = 0x45F0,
372                 .power_lsb = 0.714924039 * PRECISION_MULTIPLIER_ARDBEG,
373                 .rail_name = "VDD_1V8_SD5",
374                 .trig_conf = INA230_TRIG_CONFIG,
375                 .cont_conf = INA230_CONT_CONFIG,
376                 .divisor = 25,
377                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
378                 .resistor = 10,
379         },
380
381         [ARDBEG_A01_VDD_3V3A_LDO1_6] = {
382                 .calibration_data  = 0x3A83,
383                 .power_lsb = 0.042726484 * PRECISION_MULTIPLIER_ARDBEG,
384                 .rail_name = "VDD_3V3A_LDO1_6",
385                 .trig_conf = INA230_TRIG_CONFIG,
386                 .cont_conf = INA230_CONT_CONFIG,
387                 .divisor = 25,
388                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
389                 .resistor = 200,
390         },
391
392         [ARDBEG_A01_VDD_DIS_3V3_LCD] = {
393                 .calibration_data  = 0x7FFF,
394                 .power_lsb = 0.390636921 * PRECISION_MULTIPLIER_ARDBEG,
395                 .rail_name = "VDD_DIS_3V3_LCD",
396                 .trig_conf = INA230_TRIG_CONFIG,
397                 .cont_conf = INA230_CONT_CONFIG,
398                 .divisor = 25,
399                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
400                 .resistor = 10,
401         },
402
403         [ARDBEG_A01_VDD_1V35_SD2] = {
404                 .calibration_data  = 0x7FFF,
405                 .power_lsb = 3.906369213 * PRECISION_MULTIPLIER_ARDBEG,
406                 .rail_name = "VDD_1V35_SD2",
407                 .trig_conf = INA230_TRIG_CONFIG,
408                 .cont_conf = INA230_CONT_CONFIG,
409                 .divisor = 25,
410                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
411                 .resistor = 1,
412         },
413
414         [ARDBEG_A01_VDD_SYS_BUCKGPU] = {
415                 .calibration_data  = 0x1F38,
416                 .power_lsb = 1.601601602 * PRECISION_MULTIPLIER_ARDBEG,
417                 .rail_name = "VDD_SYS_BUCKGPU",
418                 .trig_conf = INA230_TRIG_CONFIG,
419                 .cont_conf = INA230_CONT_CONFIG,
420                 .divisor = 25,
421                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
422                 .resistor = 10,
423         },
424
425         [ARDBEG_A01_VDD_LCD_1V8B_DIS] = {
426                 .calibration_data  = 0x7FFF,
427                 .power_lsb = 0.039063692 * PRECISION_MULTIPLIER_ARDBEG,
428                 .rail_name = "VDD_LCD_1V8B_DIS",
429                 .trig_conf = INA230_TRIG_CONFIG,
430                 .cont_conf = INA230_CONT_CONFIG,
431                 .divisor = 25,
432                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
433                 .resistor = 100,
434         },
435
436         [ARDBEG_A01_VDD_1V05_LDO0] = {
437                 .calibration_data  = 0x7FFF,
438                 .power_lsb = 0.130212307 * PRECISION_MULTIPLIER_ARDBEG,
439                 .rail_name = "VDD_1V05_LDO0",
440                 .trig_conf = INA230_TRIG_CONFIG,
441                 .cont_conf = INA230_CONT_CONFIG,
442                 .divisor = 25,
443                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
444                 .resistor = 30,
445         },
446 };
447
448 static struct ina230_platform_data ardbeg_A01_power_mon_info_2[] = {
449         [ARDBEG_A01_VDD_1V05_SD4] = {
450                 .calibration_data  = 0x7FFF,
451                 .power_lsb = 0.390636921 * PRECISION_MULTIPLIER_ARDBEG,
452                 .rail_name = "VDD_1V05_SD4",
453                 .trig_conf = INA230_TRIG_CONFIG,
454                 .cont_conf = INA230_CONT_CONFIG,
455                 .divisor = 25,
456                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
457                 .resistor = 10,
458         },
459
460         [ARDBEG_A01_VDD_1V8A_LDO2_5_7] = {
461                 .calibration_data  = 0x5A04,
462                 .power_lsb = 0.277729561 * PRECISION_MULTIPLIER_ARDBEG,
463                 .rail_name = "VDD_1V8A_LDO2_5_7",
464                 .trig_conf = INA230_TRIG_CONFIG,
465                 .cont_conf = INA230_CONT_CONFIG,
466                 .divisor = 25,
467                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
468                 .resistor = 20,
469         },
470
471         [ARDBEG_A01_VDD_SYS_BL] = {
472                 .calibration_data  = 0x2468,
473                 .power_lsb = 0.274678112 * PRECISION_MULTIPLIER_ARDBEG,
474                 .rail_name = "VDD_SYS_BL",
475                 .trig_conf = INA230_TRIG_CONFIG,
476                 .cont_conf = INA230_CONT_CONFIG,
477                 .divisor = 25,
478                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
479                 .resistor = 50,
480         },
481 };
482
483 /* i2c addresses of rails present on Ardbeg */
484 /* addresses on i2c2_0 */
485 enum {
486         INA_I2C_2_0_ADDR_40,
487         INA_I2C_2_0_ADDR_41,
488         INA_I2C_2_0_ADDR_42,
489         INA_I2C_2_0_ADDR_43,
490 };
491
492 /* addresses on i2c2_1 */
493 enum {
494         INA_I2C_2_1_ADDR_40,
495         INA_I2C_2_1_ADDR_41,
496         INA_I2C_2_1_ADDR_42,
497         INA_I2C_2_1_ADDR_43,
498         INA_I2C_2_1_ADDR_44,
499         INA_I2C_2_1_ADDR_45,
500         INA_I2C_2_1_ADDR_46,
501         INA_I2C_2_1_ADDR_47,
502         INA_I2C_2_1_ADDR_48,
503         INA_I2C_2_1_ADDR_49,
504         INA_I2C_2_1_ADDR_4B,
505         INA_I2C_2_1_ADDR_4C,
506         INA_I2C_2_1_ADDR_4E,
507         INA_I2C_2_1_ADDR_4F,
508 };
509
510 /* addresses on i2c2_2 */
511 enum {
512         INA_I2C_2_2_ADDR_49,
513         INA_I2C_2_2_ADDR_4C,
514 };
515
516 /* i2c addresses of rails present on Ardbeg A01*/
517 /* addresses on i2c2_1 */
518 enum {
519         ARDBEG_A01_INA_I2C_2_1_ADDR_40,
520         ARDBEG_A01_INA_I2C_2_1_ADDR_41,
521         ARDBEG_A01_INA_I2C_2_1_ADDR_42,
522         ARDBEG_A01_INA_I2C_2_1_ADDR_43,
523         ARDBEG_A01_INA_I2C_2_1_ADDR_44,
524         ARDBEG_A01_INA_I2C_2_1_ADDR_45,
525         ARDBEG_A01_INA_I2C_2_1_ADDR_46,
526         ARDBEG_A01_INA_I2C_2_1_ADDR_47,
527         ARDBEG_A01_INA_I2C_2_1_ADDR_48,
528         ARDBEG_A01_INA_I2C_2_1_ADDR_49,
529         ARDBEG_A01_INA_I2C_2_1_ADDR_4B,
530         ARDBEG_A01_INA_I2C_2_1_ADDR_4E,
531         ARDBEG_A01_INA_I2C_2_1_ADDR_4F,
532 };
533
534 /* addresses on i2c2_2 */
535 enum {
536         ARDBEG_A01_INA_I2C_2_2_ADDR_40,
537         ARDBEG_A01_INA_I2C_2_2_ADDR_41,
538         ARDBEG_A01_INA_I2C_2_2_ADDR_49,
539 };
540
541 /* following is the i2c board info for Ardbeg */
542 static struct i2c_board_info ardbeg_i2c2_0_ina230_board_info[] = {
543         [INA_I2C_2_0_ADDR_40] = {
544                 I2C_BOARD_INFO("ina230", 0x40),
545                 .platform_data = &power_mon_info_0[VDD_BAT_0],
546                 .irq = -1,
547         },
548
549         [INA_I2C_2_0_ADDR_41] = {
550                 I2C_BOARD_INFO("ina230", 0x41),
551                 .platform_data = &power_mon_info_0[VDD_SYS_BUCKCPU_0],
552                 .irq = -1,
553         },
554
555         [INA_I2C_2_0_ADDR_42] = {
556                 I2C_BOARD_INFO("ina230", 0x42),
557                 .platform_data = &power_mon_info_0[VDD_SYS_BUCKSOC_0],
558                 .irq = -1,
559         },
560
561         [INA_I2C_2_0_ADDR_43] = {
562                 I2C_BOARD_INFO("ina230", 0x43),
563                 .platform_data = &power_mon_info_0[VDD_SYS_BUCKGPU_0],
564                 .irq = -1,
565         },
566 };
567
568 static struct i2c_board_info ardbeg_i2c2_1_ina230_board_info[] = {
569         [INA_I2C_2_1_ADDR_40] = {
570                 I2C_BOARD_INFO("ina230", 0x40),
571                 .platform_data = &power_mon_info_1[VDD_SYS_BAT],
572                 .irq = -1,
573         },
574
575         [INA_I2C_2_1_ADDR_41] = {
576                 I2C_BOARD_INFO("ina230", 0x41),
577                 .platform_data = &power_mon_info_1[VDD_RTC_LDO5],
578                 .irq = -1,
579         },
580
581         [INA_I2C_2_1_ADDR_42] = {
582                 I2C_BOARD_INFO("ina230", 0x42),
583                 .platform_data = &power_mon_info_1[VDD_3V3A_SMPS1_2],
584                 .irq = -1,
585         },
586
587         [INA_I2C_2_1_ADDR_43] = {
588                 I2C_BOARD_INFO("ina230", 0x43),
589                 .platform_data = &power_mon_info_1[VDD_SOC_SMPS1_2],
590                 .irq = -1,
591         },
592
593         [INA_I2C_2_1_ADDR_44] = {
594                 I2C_BOARD_INFO("ina230", 0x44),
595                 .platform_data = &power_mon_info_1[VDD_SYS_BUCKCPU],
596                 .irq = -1,
597         },
598
599         [INA_I2C_2_1_ADDR_45] = {
600                 I2C_BOARD_INFO("ina230", 0x45),
601                 .platform_data = &power_mon_info_1[VDD_CPU_BUCKCPU],
602                 .irq = -1,
603         },
604
605         [INA_I2C_2_1_ADDR_46] = {
606                 I2C_BOARD_INFO("ina230", 0x46),
607                 .platform_data = &power_mon_info_1[VDD_1V8A_SMPS3],
608                 .irq = -1,
609         },
610
611         [INA_I2C_2_1_ADDR_47] = {
612                 I2C_BOARD_INFO("ina230", 0x47),
613                 .platform_data = &power_mon_info_1[VDD_1V8B_SMPS9],
614                 .irq = -1,
615         },
616
617         [INA_I2C_2_1_ADDR_48] = {
618                 I2C_BOARD_INFO("ina230", 0x48),
619                 .platform_data = &power_mon_info_1[VDD_GPU_BUCKGPU],
620                 .irq = -1,
621         },
622
623         [INA_I2C_2_1_ADDR_49] = {
624                 I2C_BOARD_INFO("ina230", 0x49),
625                 .platform_data = &power_mon_info_1[VDD_1V35_SMPS6],
626                 .irq = -1,
627         },
628
629         [INA_I2C_2_1_ADDR_4B] = {
630                 I2C_BOARD_INFO("ina230", 0x4B),
631                 .platform_data = &power_mon_info_1[VDD_3V3A_SMPS1_2_2],
632                 .irq = -1,
633         },
634
635         [INA_I2C_2_1_ADDR_4C] = {
636                 I2C_BOARD_INFO("ina230", 0x4C),
637                 .platform_data = &power_mon_info_1[VDD_3V3B_SMPS9],
638                 .irq = -1,
639         },
640
641         [INA_I2C_2_1_ADDR_4E] = {
642                 I2C_BOARD_INFO("ina230", 0x4E),
643                 .platform_data = &power_mon_info_1[VDD_LCD_1V8B_DIS],
644                 .irq = -1,
645         },
646
647         [INA_I2C_2_1_ADDR_4F] = {
648                 I2C_BOARD_INFO("ina230", 0x4F),
649                 .platform_data = &power_mon_info_1[VDD_1V05_SMPS8],
650                 .irq = -1,
651         },
652 };
653
654 static struct i2c_board_info ardbeg_i2c2_2_ina230_board_info[] = {
655         [INA_I2C_2_2_ADDR_49] = {
656                 I2C_BOARD_INFO("ina230", 0x49),
657                 .platform_data = &power_mon_info_2[VDD_SYS_BL],
658                 .irq = -1,
659         },
660
661         [INA_I2C_2_2_ADDR_4C] = {
662                 I2C_BOARD_INFO("ina230", 0x4C),
663                 .platform_data = &power_mon_info_2[AVDD_1V05_LDO2],
664                 .irq = -1,
665         },
666
667 };
668
669 /* following is the i2c board info for Ardbeg A01 */
670 static struct i2c_board_info ardbeg_A01_i2c2_1_ina230_board_info[] = {
671         [ARDBEG_A01_INA_I2C_2_1_ADDR_40] = {
672                 I2C_BOARD_INFO("ina230", 0x40),
673                 .platform_data =
674                         &ardbeg_A01_power_mon_info_1[ARDBEG_A01_VDD_SYS_BAT],
675                 .irq = -1,
676         },
677
678         [ARDBEG_A01_INA_I2C_2_1_ADDR_41] = {
679                 I2C_BOARD_INFO("ina230", 0x41),
680                 .platform_data =
681                         &ardbeg_A01_power_mon_info_1[ARDBEG_A01_VDD_RTC_LDO3],
682                 .irq = -1,
683         },
684
685         [ARDBEG_A01_INA_I2C_2_1_ADDR_42] = {
686                 I2C_BOARD_INFO("ina230", 0x42),
687                 .platform_data =
688                 &ardbeg_A01_power_mon_info_1[ARDBEG_A01_VDD_SYS_BUCKSOC],
689                 .irq = -1,
690         },
691
692         [ARDBEG_A01_INA_I2C_2_1_ADDR_43] = {
693                 I2C_BOARD_INFO("ina230", 0x43),
694                 .platform_data =
695                         &ardbeg_A01_power_mon_info_1[ARDBEG_A01_VDD_SOC_SD1],
696                 .irq = -1,
697         },
698
699         [ARDBEG_A01_INA_I2C_2_1_ADDR_44] = {
700                 I2C_BOARD_INFO("ina230", 0x44),
701                 .platform_data =
702                 &ardbeg_A01_power_mon_info_1[ARDBEG_A01_VDD_SYS_BUCKCPU],
703                 .irq = -1,
704         },
705
706         [ARDBEG_A01_INA_I2C_2_1_ADDR_45] = {
707                 I2C_BOARD_INFO("ina230", 0x45),
708                 .platform_data =
709                 &ardbeg_A01_power_mon_info_1[ARDBEG_A01_VDD_CPU_BUCKCPU],
710                 .irq = -1,
711         },
712
713         [ARDBEG_A01_INA_I2C_2_1_ADDR_46] = {
714                 I2C_BOARD_INFO("ina230", 0x46),
715                 .platform_data =
716                         &ardbeg_A01_power_mon_info_1[ARDBEG_A01_VDD_1V8_SD5],
717                 .irq = -1,
718         },
719
720         [ARDBEG_A01_INA_I2C_2_1_ADDR_47] = {
721                 I2C_BOARD_INFO("ina230", 0x47),
722                 .platform_data =
723                 &ardbeg_A01_power_mon_info_1[ARDBEG_A01_VDD_3V3A_LDO1_6],
724                 .irq = -1,
725         },
726
727         [ARDBEG_A01_INA_I2C_2_1_ADDR_48] = {
728                 I2C_BOARD_INFO("ina230", 0x48),
729                 .platform_data =
730                 &ardbeg_A01_power_mon_info_1[ARDBEG_A01_VDD_DIS_3V3_LCD],
731                 .irq = -1,
732         },
733
734         [ARDBEG_A01_INA_I2C_2_1_ADDR_49] = {
735                 I2C_BOARD_INFO("ina230", 0x49),
736                 .platform_data =
737                         &ardbeg_A01_power_mon_info_1[ARDBEG_A01_VDD_1V35_SD2],
738                 .irq = -1,
739         },
740
741         [ARDBEG_A01_INA_I2C_2_1_ADDR_4B] = {
742                 I2C_BOARD_INFO("ina230", 0x4B),
743                 .platform_data =
744                 &ardbeg_A01_power_mon_info_1[ARDBEG_A01_VDD_SYS_BUCKGPU],
745                 .irq = -1,
746         },
747
748         [ARDBEG_A01_INA_I2C_2_1_ADDR_4E] = {
749                 I2C_BOARD_INFO("ina230", 0x4E),
750                 .platform_data =
751                 &ardbeg_A01_power_mon_info_1[ARDBEG_A01_VDD_LCD_1V8B_DIS],
752                 .irq = -1,
753         },
754
755         [ARDBEG_A01_INA_I2C_2_1_ADDR_4F] = {
756                 I2C_BOARD_INFO("ina230", 0x4F),
757                 .platform_data =
758                         &ardbeg_A01_power_mon_info_1[ARDBEG_A01_VDD_1V05_LDO0],
759                 .irq = -1,
760         },
761 };
762
763 static struct i2c_board_info ardbeg_A01_i2c2_2_ina230_board_info[] = {
764         [ARDBEG_A01_INA_I2C_2_2_ADDR_40] = {
765                 I2C_BOARD_INFO("ina230", 0x40),
766                 .platform_data =
767                         &ardbeg_A01_power_mon_info_2[ARDBEG_A01_VDD_1V05_SD4],
768                 .irq = -1,
769         },
770
771         [ARDBEG_A01_INA_I2C_2_2_ADDR_41] = {
772                 I2C_BOARD_INFO("ina230", 0x41),
773                 .platform_data =
774                 &ardbeg_A01_power_mon_info_2[ARDBEG_A01_VDD_1V8A_LDO2_5_7],
775                 .irq = -1,
776         },
777
778         [ARDBEG_A01_INA_I2C_2_2_ADDR_49] = {
779                 I2C_BOARD_INFO("ina230", 0x49),
780                 .platform_data =
781                         &ardbeg_A01_power_mon_info_2[ARDBEG_A01_VDD_SYS_BL],
782                 .irq = -1,
783         },
784 };
785
786 static struct pca954x_platform_mode ardbeg_pca954x_modes[] = {
787         { .adap_id = PCA954x_I2C_BUS0, .deselect_on_exit = true, },
788         { .adap_id = PCA954x_I2C_BUS1, .deselect_on_exit = true, },
789         { .adap_id = PCA954x_I2C_BUS2, .deselect_on_exit = true, },
790         { .adap_id = PCA954x_I2C_BUS3, .deselect_on_exit = true, },
791 };
792
793 static struct pca954x_platform_data ardbeg_pca954x_data = {
794         .modes    = ardbeg_pca954x_modes,
795         .num_modes      = ARRAY_SIZE(ardbeg_pca954x_modes),
796 };
797
798 static const struct i2c_board_info ardbeg_i2c2_board_info[] = {
799         {
800                 I2C_BOARD_INFO("pca9546", 0x71),
801                 .platform_data = &ardbeg_pca954x_data,
802         },
803 };
804
805 static void __init register_devices_ardbeg_A01(void)
806 {
807         i2c_register_board_info(PCA954x_I2C_BUS1,
808                         ardbeg_A01_i2c2_1_ina230_board_info,
809                         ARRAY_SIZE(ardbeg_A01_i2c2_1_ina230_board_info));
810
811         i2c_register_board_info(PCA954x_I2C_BUS2,
812                         ardbeg_A01_i2c2_2_ina230_board_info,
813                         ARRAY_SIZE(ardbeg_A01_i2c2_2_ina230_board_info));
814 }
815
816 static void __init register_devices_ardbeg(void)
817 {
818         i2c_register_board_info(PCA954x_I2C_BUS1,
819                         ardbeg_i2c2_1_ina230_board_info,
820                         ARRAY_SIZE(ardbeg_i2c2_1_ina230_board_info));
821
822         i2c_register_board_info(PCA954x_I2C_BUS2,
823                         ardbeg_i2c2_2_ina230_board_info,
824                         ARRAY_SIZE(ardbeg_i2c2_2_ina230_board_info));
825 }
826
827 static void modify_reworked_rail_data(void)
828 {
829         ardbeg_A01_power_mon_info_1[ARDBEG_A01_VDD_1V35_SD2].resistor
830                                         = VDD_1V35_SD2_REWORKED;
831         ardbeg_A01_power_mon_info_1[ARDBEG_A01_VDD_CPU_BUCKCPU].resistor
832                                         = VDD_CPU_BUCKCPU_REWORKED;
833         ardbeg_A01_power_mon_info_1[ARDBEG_A01_VDD_SOC_SD1].resistor
834                                         = VDD_SOC_SD1_REWORKED;
835 }
836
837 static void modify_tn8_rail_data(void)
838 {
839         /* E1780-A02 TN8 w/ E1736-A00 PMU*/
840         ardbeg_A01_power_mon_info_1[ARDBEG_A01_VDD_SYS_BAT]
841                 .calibration_data  = 0x3547;
842         ardbeg_A01_power_mon_info_1[ARDBEG_A01_VDD_SYS_BAT]
843                 .power_lsb = 3.128284087 * PRECISION_MULTIPLIER_ARDBEG;
844         ardbeg_A01_power_mon_info_1[ARDBEG_A01_VDD_SYS_BAT]
845                 .resistor = 3;
846
847         ardbeg_A01_power_mon_info_1[ARDBEG_A01_VDD_SYS_BUCKSOC]
848                 .calibration_data  = 0x2ED7;
849         ardbeg_A01_power_mon_info_1[ARDBEG_A01_VDD_SYS_BUCKSOC]
850                 .power_lsb = 1.067467267 * PRECISION_MULTIPLIER_ARDBEG;
851         ardbeg_A01_power_mon_info_1[ARDBEG_A01_VDD_SYS_BUCKSOC]
852                 .resistor = 10;
853
854         ardbeg_A01_power_mon_info_1[ARDBEG_A01_VDD_3V3A_LDO1_6]
855                 .calibration_data  = 0x7FFF;
856         ardbeg_A01_power_mon_info_1[ARDBEG_A01_VDD_3V3A_LDO1_6]
857                 .power_lsb = 0.390636921 * PRECISION_MULTIPLIER_ARDBEG;
858         ardbeg_A01_power_mon_info_1[ARDBEG_A01_VDD_3V3A_LDO1_6]
859                 .resistor = 10;
860
861         ardbeg_A01_power_mon_info_2[ARDBEG_A01_VDD_1V8A_LDO2_5_7]
862                 .calibration_data  = 0x7FFF;
863         ardbeg_A01_power_mon_info_2[ARDBEG_A01_VDD_1V8A_LDO2_5_7]
864                 .power_lsb = 0.390636921 * PRECISION_MULTIPLIER_ARDBEG;
865         ardbeg_A01_power_mon_info_2[ARDBEG_A01_VDD_1V8A_LDO2_5_7]
866                 .resistor = 10;
867
868         power_mon_info_0[VDD_BAT_0]
869                 .calibration_data = 0x1FF7;
870         power_mon_info_0[VDD_BAT_0]
871                 .power_lsb = 3.128437004 * PRECISION_MULTIPLIER_ARDBEG;
872         power_mon_info_0[VDD_BAT_0]
873                 .resistor = 5;
874
875         power_mon_info_0[VDD_SYS_BUCKSOC_0]
876                 .calibration_data = 0x2ED7;
877         power_mon_info_0[VDD_SYS_BUCKSOC_0]
878                 .power_lsb = 1.067467267 * PRECISION_MULTIPLIER_ARDBEG;
879         power_mon_info_0[VDD_SYS_BUCKSOC_0]
880                 .resistor = 10;
881 }
882
883 int __init ardbeg_pmon_init(void)
884 {
885         /*
886         * Get power_config of board and check whether
887         * board is power reworked or not.
888         * In case board is reworked, modify rail data
889         * for which rework was done.
890         */
891         u8 power_config;
892         struct board_info bi;
893         power_config = get_power_config();
894         if (power_config & ARDBEG_POWER_REWORKED_CONFIG)
895                 modify_reworked_rail_data();
896
897         tegra_get_board_info(&bi);
898
899         if (bi.sku == 1100)
900                 modify_tn8_rail_data();
901
902         i2c_register_board_info(1, ardbeg_i2c2_board_info,
903                 ARRAY_SIZE(ardbeg_i2c2_board_info));
904
905         i2c_register_board_info(PCA954x_I2C_BUS0,
906                         ardbeg_i2c2_0_ina230_board_info,
907                         ARRAY_SIZE(ardbeg_i2c2_0_ina230_board_info));
908
909         if (bi.fab >= BOARD_FAB_A01)
910                 register_devices_ardbeg_A01();
911         else
912                 register_devices_ardbeg();
913
914         return 0;
915 }
916