5e881955d1032fabdc767f404cfc12120c22d401
[linux-3.10.git] / arch / arm / mach-tegra / board-ardbeg-powermon.c
1 /*
2  * arch/arm/mach-tegra/board-ardbeg-powermon.c
3  *
4  * Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved.
5  *
6  * This program is free software; you can redistribute it and/or modify it
7  * under the terms and conditions of the GNU General Public License,
8  * version 2, as published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope it will be useful, but WITHOUT
11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13  * more details.
14  *
15  * You should have received a copy of the GNU General Public License
16  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
17  *
18  */
19
20 #include <linux/i2c.h>
21 #include <linux/ina219.h>
22 #include <linux/platform_data/ina230.h>
23 #include <linux/i2c/pca954x.h>
24
25 #include "board.h"
26 #include "board-ardbeg.h"
27 #include "tegra-board-id.h"
28
29 #define PRECISION_MULTIPLIER_ARDBEG     1000
30 #define ARDBEG_POWER_REWORKED_CONFIG    0x10
31 #define VDD_SOC_SD1_REWORKED            10
32 #define VDD_CPU_BUCKCPU_REWORKED        10
33 #define VDD_1V35_SD2_REWORKED           10
34
35 #define AVG_32_SAMPLES (4 << 9)
36
37 /* AVG is specified from platform data */
38 #define INA230_CONT_CONFIG      (AVG_32_SAMPLES | INA230_VBUS_CT | \
39                                 INA230_VSH_CT | INA230_CONT_MODE)
40 #define INA230_TRIG_CONFIG      (AVG_32_SAMPLES | INA230_VBUS_CT | \
41                                 INA230_VSH_CT | INA230_TRIG_MODE)
42
43 /* unused rail */
44 enum {
45         UNUSED_RAIL,
46 };
47
48 /* following rails are present on Ardbeg */
49 /* rails on i2c2_1 */
50 enum {
51         VDD_SYS_BAT,
52         VDD_RTC_LDO5,
53         VDD_3V3A_SMPS1_2,
54         VDD_SOC_SMPS1_2,
55         VDD_SYS_BUCKCPU,
56         VDD_CPU_BUCKCPU,
57         VDD_1V8A_SMPS3,
58         VDD_1V8B_SMPS9,
59         VDD_GPU_BUCKGPU,
60         VDD_1V35_SMPS6,
61         VDD_3V3A_SMPS1_2_2,
62         VDD_3V3B_SMPS9,
63         VDD_LCD_1V8B_DIS,
64         VDD_1V05_SMPS8,
65 };
66
67 /* rails on i2c2_2 */
68 enum {
69         VDD_SYS_BL,
70         AVDD_1V05_LDO2,
71 };
72
73 /* following rails are present on Ardbeg A01 and onward boards */
74 /* rails on i2c2_1 */
75 enum {
76         ARDBEG_A01_VDD_SYS_BAT,
77         ARDBEG_A01_VDD_RTC_LDO3,
78         ARDBEG_A01_VDD_SYS_BUCKSOC,
79         ARDBEG_A01_VDD_SOC_SD1,
80         ARDBEG_A01_VDD_SYS_BUCKCPU,
81         ARDBEG_A01_VDD_CPU_BUCKCPU,
82         ARDBEG_A01_VDD_1V8_SD5,
83         ARDBEG_A01_VDD_3V3A_LDO1_6,
84         ARDBEG_A01_VDD_DIS_3V3_LCD,
85         ARDBEG_A01_VDD_1V35_SD2,
86         ARDBEG_A01_VDD_SYS_BUCKGPU,
87         ARDBEG_A01_VDD_LCD_1V8B_DIS,
88         ARDBEG_A01_VDD_1V05_LDO0,
89 };
90
91 /* rails on i2c2_2 */
92 enum {
93         ARDBEG_A01_VDD_1V05_SD4,
94         ARDBEG_A01_VDD_1V8A_LDO2_5_7,
95         ARDBEG_A01_VDD_SYS_BL,
96 };
97
98 static struct ina219_platform_data power_mon_info_0[] = {
99         /* All unused INA219 devices use below data */
100         [UNUSED_RAIL] = {
101                 .calibration_data = 0x369c,
102                 .power_lsb = 3.051979018 * PRECISION_MULTIPLIER_ARDBEG,
103                 .rail_name = "unused_rail",
104                 .divisor = 20,
105                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
106         },
107 };
108
109 /* following are power monitor parameters for Ardbeg */
110 static struct ina230_platform_data power_mon_info_1[] = {
111         [VDD_SYS_BAT] = {
112                 .calibration_data  = 0x1366,
113                 .power_lsb = 2.577527185 * PRECISION_MULTIPLIER_ARDBEG,
114                 .rail_name = "VDD_SYS_BAT",
115                 .trig_conf = INA230_TRIG_CONFIG,
116                 .cont_conf = INA230_CONT_CONFIG,
117                 .divisor = 25,
118                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
119         },
120
121         [VDD_RTC_LDO5] = {
122                 .calibration_data  = 0x7FFF,
123                 .power_lsb = 0.078127384 * PRECISION_MULTIPLIER_ARDBEG,
124                 .rail_name = "VDD_RTC_LDO5",
125                 .trig_conf = INA230_TRIG_CONFIG,
126                 .cont_conf = INA230_CONT_CONFIG,
127                 .divisor = 25,
128                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
129         },
130
131         [VDD_3V3A_SMPS1_2] = {
132                 .calibration_data  = 0x4759,
133                 .power_lsb = 1.401587736 * PRECISION_MULTIPLIER_ARDBEG,
134                 .rail_name = "VDD_3V3A_SMPS1_2",
135                 .trig_conf = INA230_TRIG_CONFIG,
136                 .cont_conf = INA230_CONT_CONFIG,
137                 .divisor = 25,
138                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
139         },
140
141         [VDD_SOC_SMPS1_2] = {
142                 .calibration_data  = 0x7FFF,
143                 .power_lsb = 3.906369213 * PRECISION_MULTIPLIER_ARDBEG,
144                 .rail_name = "VDD_SOC_SMPS1_2",
145                 .trig_conf = INA230_TRIG_CONFIG,
146                 .cont_conf = INA230_CONT_CONFIG,
147                 .divisor = 25,
148                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
149         },
150
151         [VDD_SYS_BUCKCPU] = {
152                 .calibration_data  = 0x1AC5,
153                 .power_lsb = 1.867795126 * PRECISION_MULTIPLIER_ARDBEG,
154                 .rail_name = "VDD_SYS_BUCKCPU",
155                 .trig_conf = INA230_TRIG_CONFIG,
156                 .cont_conf = INA230_CONT_CONFIG,
157                 .divisor = 25,
158                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
159         },
160
161         [VDD_CPU_BUCKCPU] = {
162                 .calibration_data  = 0x2ECF,
163                 .power_lsb = 10.68179922 * PRECISION_MULTIPLIER_ARDBEG,
164                 .rail_name = "VDD_CPU_BUCKCPU",
165                 .trig_conf = INA230_TRIG_CONFIG,
166                 .cont_conf = INA230_CONT_CONFIG,
167                 .divisor = 25,
168                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
169         },
170
171         [VDD_1V8A_SMPS3] = {
172                 .calibration_data  = 0x5BA7,
173                 .power_lsb = 0.545539786 * PRECISION_MULTIPLIER_ARDBEG,
174                 .rail_name = "VDD_1V8A_SMPS3",
175                 .trig_conf = INA230_TRIG_CONFIG,
176                 .cont_conf = INA230_CONT_CONFIG,
177                 .divisor = 25,
178                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
179         },
180
181         [VDD_1V8B_SMPS9] = {
182                 .calibration_data  = 0x50B4,
183                 .power_lsb = 0.309777348 * PRECISION_MULTIPLIER_ARDBEG,
184                 .rail_name = "VDD_1V8B_SMPS9",
185                 .trig_conf = INA230_TRIG_CONFIG,
186                 .cont_conf = INA230_CONT_CONFIG,
187                 .divisor = 25,
188                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
189         },
190
191         [VDD_GPU_BUCKGPU] = {
192                 .calibration_data  = 0x369C,
193                 .power_lsb = 9.155937053 * PRECISION_MULTIPLIER_ARDBEG,
194                 .rail_name = "VDD_GPU_BUCKGPU",
195                 .trig_conf = INA230_TRIG_CONFIG,
196                 .cont_conf = INA230_CONT_CONFIG,
197                 .divisor = 25,
198                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
199         },
200
201         [VDD_1V35_SMPS6] = {
202                 .calibration_data  = 0x7FFF,
203                 .power_lsb = 3.906369213 * PRECISION_MULTIPLIER_ARDBEG,
204                 .rail_name = "VDD_1V35_SMPS6",
205                 .trig_conf = INA230_TRIG_CONFIG,
206                 .cont_conf = INA230_CONT_CONFIG,
207                 .divisor = 25,
208                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
209         },
210
211         /* following rail is duplicate of VDD_3V3A_SMPS1_2 hence mark unused */
212         [VDD_3V3A_SMPS1_2_2] = {
213                 .calibration_data  = 0x4759,
214                 .power_lsb = 1.401587736 * PRECISION_MULTIPLIER_ARDBEG,
215                 .rail_name = "unused_rail",
216                 .trig_conf = INA230_TRIG_CONFIG,
217                 .cont_conf = INA230_CONT_CONFIG,
218                 .divisor = 25,
219                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
220         },
221
222         [VDD_3V3B_SMPS9] = {
223                 .calibration_data  = 0x3269,
224                 .power_lsb = 0.198372724 * PRECISION_MULTIPLIER_ARDBEG,
225                 .rail_name = "VDD_3V3B_SMPS9",
226                 .trig_conf = INA230_TRIG_CONFIG,
227                 .cont_conf = INA230_CONT_CONFIG,
228                 .divisor = 25,
229                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
230         },
231
232         [VDD_LCD_1V8B_DIS] = {
233                 .calibration_data  = 0x7FFF,
234                 .power_lsb = 0.039063692 * PRECISION_MULTIPLIER_ARDBEG,
235                 .rail_name = "VDD_LCD_1V8B_DIS",
236                 .trig_conf = INA230_TRIG_CONFIG,
237                 .cont_conf = INA230_CONT_CONFIG,
238                 .divisor = 25,
239                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
240         },
241
242         [VDD_1V05_SMPS8] = {
243                 .calibration_data  = 0x7FFF,
244                 .power_lsb = 0.130212307 * PRECISION_MULTIPLIER_ARDBEG,
245                 .rail_name = "VDD_1V05_SMPS8",
246                 .trig_conf = INA230_TRIG_CONFIG,
247                 .cont_conf = INA230_CONT_CONFIG,
248                 .divisor = 25,
249                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
250         },
251 };
252
253 static struct ina230_platform_data power_mon_info_2[] = {
254         [VDD_SYS_BL] = {
255                 .calibration_data  = 0x1A29,
256                 .power_lsb = 0.63710119 * PRECISION_MULTIPLIER_ARDBEG,
257                 .rail_name = "VDD_SYS_BL",
258                 .trig_conf = INA230_TRIG_CONFIG,
259                 .cont_conf = INA230_CONT_CONFIG,
260                 .divisor = 25,
261                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
262         },
263
264         [AVDD_1V05_LDO2] = {
265                 .calibration_data  = 0x7FFF,
266                 .power_lsb = 0.390636921 * PRECISION_MULTIPLIER_ARDBEG,
267                 .rail_name = "AVDD_1V05_LDO2",
268                 .trig_conf = INA230_TRIG_CONFIG,
269                 .cont_conf = INA230_CONT_CONFIG,
270                 .divisor = 25,
271                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
272         },
273 };
274
275 /* following are power monitor parameters for Ardbeg A01*/
276 static struct ina230_platform_data ardbeg_A01_power_mon_info_1[] = {
277         [ARDBEG_A01_VDD_SYS_BAT] = {
278                 .calibration_data  = 0x1366,
279                 .power_lsb = 2.577527185 * PRECISION_MULTIPLIER_ARDBEG,
280                 .rail_name = "VDD_SYS_BAT",
281                 .trig_conf = INA230_TRIG_CONFIG,
282                 .cont_conf = INA230_CONT_CONFIG,
283                 .divisor = 25,
284                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
285                 .resistor = 10,
286         },
287
288         [ARDBEG_A01_VDD_RTC_LDO3] = {
289                 .calibration_data  = 0x7FFF,
290                 .power_lsb = 0.078127384 * PRECISION_MULTIPLIER_ARDBEG,
291                 .rail_name = "VDD_RTC_LDO3",
292                 .trig_conf = INA230_TRIG_CONFIG,
293                 .cont_conf = INA230_CONT_CONFIG,
294                 .divisor = 25,
295                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
296                 .resistor = 50,
297         },
298
299         [ARDBEG_A01_VDD_SYS_BUCKSOC] = {
300                 .calibration_data  = 0x1AAC,
301                 .power_lsb = 0.624877954 * PRECISION_MULTIPLIER_ARDBEG,
302                 .rail_name = "VDD_SYS_BUCKSOC",
303                 .trig_conf = INA230_TRIG_CONFIG,
304                 .cont_conf = INA230_CONT_CONFIG,
305                 .divisor = 25,
306                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
307                 .resistor = 30,
308         },
309
310         [ARDBEG_A01_VDD_SOC_SD1] = {
311                 .calibration_data  = 0x7FFF,
312                 .power_lsb = 3.906369213 * PRECISION_MULTIPLIER_ARDBEG,
313                 .rail_name = "VDD_SOC_SD1",
314                 .trig_conf = INA230_TRIG_CONFIG,
315                 .cont_conf = INA230_CONT_CONFIG,
316                 .divisor = 25,
317                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
318                 .resistor = 1,
319         },
320
321         [ARDBEG_A01_VDD_SYS_BUCKCPU] = {
322                 .calibration_data  = 0x1AC5,
323                 .power_lsb = 1.867795126 * PRECISION_MULTIPLIER_ARDBEG,
324                 .rail_name = "VDD_SYS_BUCKCPU",
325                 .trig_conf = INA230_TRIG_CONFIG,
326                 .cont_conf = INA230_CONT_CONFIG,
327                 .divisor = 25,
328                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
329                 .resistor = 10,
330         },
331
332         [ARDBEG_A01_VDD_CPU_BUCKCPU] = {
333                 .calibration_data  = 0x2ECF,
334                 .power_lsb = 10.68179922 * PRECISION_MULTIPLIER_ARDBEG,
335                 .rail_name = "VDD_CPU_BUCKCPU",
336                 .trig_conf = INA230_TRIG_CONFIG,
337                 .cont_conf = INA230_CONT_CONFIG,
338                 .divisor = 25,
339                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
340                 .resistor = 1,
341         },
342
343         [ARDBEG_A01_VDD_1V8_SD5] = {
344                 .calibration_data  = 0x45F0,
345                 .power_lsb = 0.714924039 * PRECISION_MULTIPLIER_ARDBEG,
346                 .rail_name = "VDD_1V8_SD5",
347                 .trig_conf = INA230_TRIG_CONFIG,
348                 .cont_conf = INA230_CONT_CONFIG,
349                 .divisor = 25,
350                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
351                 .resistor = 10,
352         },
353
354         [ARDBEG_A01_VDD_3V3A_LDO1_6] = {
355                 .calibration_data  = 0x3A83,
356                 .power_lsb = 0.042726484 * PRECISION_MULTIPLIER_ARDBEG,
357                 .rail_name = "VDD_3V3A_LDO1_6",
358                 .trig_conf = INA230_TRIG_CONFIG,
359                 .cont_conf = INA230_CONT_CONFIG,
360                 .divisor = 25,
361                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
362                 .resistor = 200,
363         },
364
365         [ARDBEG_A01_VDD_DIS_3V3_LCD] = {
366                 .calibration_data  = 0x7FFF,
367                 .power_lsb = 0.390636921 * PRECISION_MULTIPLIER_ARDBEG,
368                 .rail_name = "VDD_DIS_3V3_LCD",
369                 .trig_conf = INA230_TRIG_CONFIG,
370                 .cont_conf = INA230_CONT_CONFIG,
371                 .divisor = 25,
372                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
373                 .resistor = 10,
374         },
375
376         [ARDBEG_A01_VDD_1V35_SD2] = {
377                 .calibration_data  = 0x7FFF,
378                 .power_lsb = 3.906369213 * PRECISION_MULTIPLIER_ARDBEG,
379                 .rail_name = "VDD_1V35_SD2",
380                 .trig_conf = INA230_TRIG_CONFIG,
381                 .cont_conf = INA230_CONT_CONFIG,
382                 .divisor = 25,
383                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
384                 .resistor = 1,
385         },
386
387         [ARDBEG_A01_VDD_SYS_BUCKGPU] = {
388                 .calibration_data  = 0x1F38,
389                 .power_lsb = 1.601601602 * PRECISION_MULTIPLIER_ARDBEG,
390                 .rail_name = "VDD_SYS_BUCKGPU",
391                 .trig_conf = INA230_TRIG_CONFIG,
392                 .cont_conf = INA230_CONT_CONFIG,
393                 .divisor = 25,
394                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
395                 .resistor = 10,
396         },
397
398         [ARDBEG_A01_VDD_LCD_1V8B_DIS] = {
399                 .calibration_data  = 0x7FFF,
400                 .power_lsb = 0.039063692 * PRECISION_MULTIPLIER_ARDBEG,
401                 .rail_name = "VDD_LCD_1V8B_DIS",
402                 .trig_conf = INA230_TRIG_CONFIG,
403                 .cont_conf = INA230_CONT_CONFIG,
404                 .divisor = 25,
405                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
406                 .resistor = 100,
407         },
408
409         [ARDBEG_A01_VDD_1V05_LDO0] = {
410                 .calibration_data  = 0x7FFF,
411                 .power_lsb = 0.130212307 * PRECISION_MULTIPLIER_ARDBEG,
412                 .rail_name = "VDD_1V05_LDO0",
413                 .trig_conf = INA230_TRIG_CONFIG,
414                 .cont_conf = INA230_CONT_CONFIG,
415                 .divisor = 25,
416                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
417                 .resistor = 30,
418         },
419 };
420
421 static struct ina230_platform_data ardbeg_A01_power_mon_info_2[] = {
422         [ARDBEG_A01_VDD_1V05_SD4] = {
423                 .calibration_data  = 0x7FFF,
424                 .power_lsb = 0.390636921 * PRECISION_MULTIPLIER_ARDBEG,
425                 .rail_name = "VDD_1V05_SD4",
426                 .trig_conf = INA230_TRIG_CONFIG,
427                 .cont_conf = INA230_CONT_CONFIG,
428                 .divisor = 25,
429                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
430                 .resistor = 10,
431         },
432
433         [ARDBEG_A01_VDD_1V8A_LDO2_5_7] = {
434                 .calibration_data  = 0x5A04,
435                 .power_lsb = 0.277729561 * PRECISION_MULTIPLIER_ARDBEG,
436                 .rail_name = "VDD_1V8A_LDO2_5_7",
437                 .trig_conf = INA230_TRIG_CONFIG,
438                 .cont_conf = INA230_CONT_CONFIG,
439                 .divisor = 25,
440                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
441                 .resistor = 20,
442         },
443
444         [ARDBEG_A01_VDD_SYS_BL] = {
445                 .calibration_data  = 0x2468,
446                 .power_lsb = 0.274678112 * PRECISION_MULTIPLIER_ARDBEG,
447                 .rail_name = "VDD_SYS_BL",
448                 .trig_conf = INA230_TRIG_CONFIG,
449                 .cont_conf = INA230_CONT_CONFIG,
450                 .divisor = 25,
451                 .precision_multiplier = PRECISION_MULTIPLIER_ARDBEG,
452                 .resistor = 50,
453         },
454 };
455
456 /* i2c addresses of rails present on Ardbeg */
457 /* addresses on i2c2_0 */
458 enum {
459         INA_I2C_2_0_ADDR_40,
460         INA_I2C_2_0_ADDR_41,
461         INA_I2C_2_0_ADDR_42,
462         INA_I2C_2_0_ADDR_43,
463 };
464
465 /* addresses on i2c2_1 */
466 enum {
467         INA_I2C_2_1_ADDR_40,
468         INA_I2C_2_1_ADDR_41,
469         INA_I2C_2_1_ADDR_42,
470         INA_I2C_2_1_ADDR_43,
471         INA_I2C_2_1_ADDR_44,
472         INA_I2C_2_1_ADDR_45,
473         INA_I2C_2_1_ADDR_46,
474         INA_I2C_2_1_ADDR_47,
475         INA_I2C_2_1_ADDR_48,
476         INA_I2C_2_1_ADDR_49,
477         INA_I2C_2_1_ADDR_4B,
478         INA_I2C_2_1_ADDR_4C,
479         INA_I2C_2_1_ADDR_4E,
480         INA_I2C_2_1_ADDR_4F,
481 };
482
483 /* addresses on i2c2_2 */
484 enum {
485         INA_I2C_2_2_ADDR_49,
486         INA_I2C_2_2_ADDR_4C,
487 };
488
489 /* i2c addresses of rails present on Ardbeg A01*/
490 /* addresses on i2c2_1 */
491 enum {
492         ARDBEG_A01_INA_I2C_2_1_ADDR_40,
493         ARDBEG_A01_INA_I2C_2_1_ADDR_41,
494         ARDBEG_A01_INA_I2C_2_1_ADDR_42,
495         ARDBEG_A01_INA_I2C_2_1_ADDR_43,
496         ARDBEG_A01_INA_I2C_2_1_ADDR_44,
497         ARDBEG_A01_INA_I2C_2_1_ADDR_45,
498         ARDBEG_A01_INA_I2C_2_1_ADDR_46,
499         ARDBEG_A01_INA_I2C_2_1_ADDR_47,
500         ARDBEG_A01_INA_I2C_2_1_ADDR_48,
501         ARDBEG_A01_INA_I2C_2_1_ADDR_49,
502         ARDBEG_A01_INA_I2C_2_1_ADDR_4B,
503         ARDBEG_A01_INA_I2C_2_1_ADDR_4E,
504         ARDBEG_A01_INA_I2C_2_1_ADDR_4F,
505 };
506
507 /* addresses on i2c2_2 */
508 enum {
509         ARDBEG_A01_INA_I2C_2_2_ADDR_40,
510         ARDBEG_A01_INA_I2C_2_2_ADDR_41,
511         ARDBEG_A01_INA_I2C_2_2_ADDR_49,
512 };
513
514 /* following is the i2c board info for Ardbeg */
515 static struct i2c_board_info ardbeg_i2c2_0_ina219_board_info[] = {
516         [INA_I2C_2_0_ADDR_40] = {
517                 I2C_BOARD_INFO("ina219", 0x40),
518                 .platform_data = &power_mon_info_0[UNUSED_RAIL],
519                 .irq = -1,
520         },
521
522         [INA_I2C_2_0_ADDR_41] = {
523                 I2C_BOARD_INFO("ina219", 0x41),
524                 .platform_data = &power_mon_info_0[UNUSED_RAIL],
525                 .irq = -1,
526         },
527
528         [INA_I2C_2_0_ADDR_42] = {
529                 I2C_BOARD_INFO("ina219", 0x42),
530                 .platform_data = &power_mon_info_0[UNUSED_RAIL],
531                 .irq = -1,
532         },
533
534         [INA_I2C_2_0_ADDR_43] = {
535                 I2C_BOARD_INFO("ina219", 0x43),
536                 .platform_data = &power_mon_info_0[UNUSED_RAIL],
537                 .irq = -1,
538         },
539 };
540
541 static struct i2c_board_info ardbeg_i2c2_1_ina230_board_info[] = {
542         [INA_I2C_2_1_ADDR_40] = {
543                 I2C_BOARD_INFO("ina230", 0x40),
544                 .platform_data = &power_mon_info_1[VDD_SYS_BAT],
545                 .irq = -1,
546         },
547
548         [INA_I2C_2_1_ADDR_41] = {
549                 I2C_BOARD_INFO("ina230", 0x41),
550                 .platform_data = &power_mon_info_1[VDD_RTC_LDO5],
551                 .irq = -1,
552         },
553
554         [INA_I2C_2_1_ADDR_42] = {
555                 I2C_BOARD_INFO("ina230", 0x42),
556                 .platform_data = &power_mon_info_1[VDD_3V3A_SMPS1_2],
557                 .irq = -1,
558         },
559
560         [INA_I2C_2_1_ADDR_43] = {
561                 I2C_BOARD_INFO("ina230", 0x43),
562                 .platform_data = &power_mon_info_1[VDD_SOC_SMPS1_2],
563                 .irq = -1,
564         },
565
566         [INA_I2C_2_1_ADDR_44] = {
567                 I2C_BOARD_INFO("ina230", 0x44),
568                 .platform_data = &power_mon_info_1[VDD_SYS_BUCKCPU],
569                 .irq = -1,
570         },
571
572         [INA_I2C_2_1_ADDR_45] = {
573                 I2C_BOARD_INFO("ina230", 0x45),
574                 .platform_data = &power_mon_info_1[VDD_CPU_BUCKCPU],
575                 .irq = -1,
576         },
577
578         [INA_I2C_2_1_ADDR_46] = {
579                 I2C_BOARD_INFO("ina230", 0x46),
580                 .platform_data = &power_mon_info_1[VDD_1V8A_SMPS3],
581                 .irq = -1,
582         },
583
584         [INA_I2C_2_1_ADDR_47] = {
585                 I2C_BOARD_INFO("ina230", 0x47),
586                 .platform_data = &power_mon_info_1[VDD_1V8B_SMPS9],
587                 .irq = -1,
588         },
589
590         [INA_I2C_2_1_ADDR_48] = {
591                 I2C_BOARD_INFO("ina230", 0x48),
592                 .platform_data = &power_mon_info_1[VDD_GPU_BUCKGPU],
593                 .irq = -1,
594         },
595
596         [INA_I2C_2_1_ADDR_49] = {
597                 I2C_BOARD_INFO("ina230", 0x49),
598                 .platform_data = &power_mon_info_1[VDD_1V35_SMPS6],
599                 .irq = -1,
600         },
601
602         [INA_I2C_2_1_ADDR_4B] = {
603                 I2C_BOARD_INFO("ina230", 0x4B),
604                 .platform_data = &power_mon_info_1[VDD_3V3A_SMPS1_2_2],
605                 .irq = -1,
606         },
607
608         [INA_I2C_2_1_ADDR_4C] = {
609                 I2C_BOARD_INFO("ina230", 0x4C),
610                 .platform_data = &power_mon_info_1[VDD_3V3B_SMPS9],
611                 .irq = -1,
612         },
613
614         [INA_I2C_2_1_ADDR_4E] = {
615                 I2C_BOARD_INFO("ina230", 0x4E),
616                 .platform_data = &power_mon_info_1[VDD_LCD_1V8B_DIS],
617                 .irq = -1,
618         },
619
620         [INA_I2C_2_1_ADDR_4F] = {
621                 I2C_BOARD_INFO("ina230", 0x4F),
622                 .platform_data = &power_mon_info_1[VDD_1V05_SMPS8],
623                 .irq = -1,
624         },
625 };
626
627 static struct i2c_board_info ardbeg_i2c2_2_ina230_board_info[] = {
628         [INA_I2C_2_2_ADDR_49] = {
629                 I2C_BOARD_INFO("ina230", 0x49),
630                 .platform_data = &power_mon_info_2[VDD_SYS_BL],
631                 .irq = -1,
632         },
633
634         [INA_I2C_2_2_ADDR_4C] = {
635                 I2C_BOARD_INFO("ina230", 0x4C),
636                 .platform_data = &power_mon_info_2[AVDD_1V05_LDO2],
637                 .irq = -1,
638         },
639
640 };
641
642 /* following is the i2c board info for Ardbeg A01 */
643 static struct i2c_board_info ardbeg_A01_i2c2_1_ina230_board_info[] = {
644         [ARDBEG_A01_INA_I2C_2_1_ADDR_40] = {
645                 I2C_BOARD_INFO("ina230", 0x40),
646                 .platform_data =
647                         &ardbeg_A01_power_mon_info_1[ARDBEG_A01_VDD_SYS_BAT],
648                 .irq = -1,
649         },
650
651         [ARDBEG_A01_INA_I2C_2_1_ADDR_41] = {
652                 I2C_BOARD_INFO("ina230", 0x41),
653                 .platform_data =
654                         &ardbeg_A01_power_mon_info_1[ARDBEG_A01_VDD_RTC_LDO3],
655                 .irq = -1,
656         },
657
658         [ARDBEG_A01_INA_I2C_2_1_ADDR_42] = {
659                 I2C_BOARD_INFO("ina230", 0x42),
660                 .platform_data =
661                 &ardbeg_A01_power_mon_info_1[ARDBEG_A01_VDD_SYS_BUCKSOC],
662                 .irq = -1,
663         },
664
665         [ARDBEG_A01_INA_I2C_2_1_ADDR_43] = {
666                 I2C_BOARD_INFO("ina230", 0x43),
667                 .platform_data =
668                         &ardbeg_A01_power_mon_info_1[ARDBEG_A01_VDD_SOC_SD1],
669                 .irq = -1,
670         },
671
672         [ARDBEG_A01_INA_I2C_2_1_ADDR_44] = {
673                 I2C_BOARD_INFO("ina230", 0x44),
674                 .platform_data =
675                 &ardbeg_A01_power_mon_info_1[ARDBEG_A01_VDD_SYS_BUCKCPU],
676                 .irq = -1,
677         },
678
679         [ARDBEG_A01_INA_I2C_2_1_ADDR_45] = {
680                 I2C_BOARD_INFO("ina230", 0x45),
681                 .platform_data =
682                 &ardbeg_A01_power_mon_info_1[ARDBEG_A01_VDD_CPU_BUCKCPU],
683                 .irq = -1,
684         },
685
686         [ARDBEG_A01_INA_I2C_2_1_ADDR_46] = {
687                 I2C_BOARD_INFO("ina230", 0x46),
688                 .platform_data =
689                         &ardbeg_A01_power_mon_info_1[ARDBEG_A01_VDD_1V8_SD5],
690                 .irq = -1,
691         },
692
693         [ARDBEG_A01_INA_I2C_2_1_ADDR_47] = {
694                 I2C_BOARD_INFO("ina230", 0x47),
695                 .platform_data =
696                 &ardbeg_A01_power_mon_info_1[ARDBEG_A01_VDD_3V3A_LDO1_6],
697                 .irq = -1,
698         },
699
700         [ARDBEG_A01_INA_I2C_2_1_ADDR_48] = {
701                 I2C_BOARD_INFO("ina230", 0x48),
702                 .platform_data =
703                 &ardbeg_A01_power_mon_info_1[ARDBEG_A01_VDD_DIS_3V3_LCD],
704                 .irq = -1,
705         },
706
707         [ARDBEG_A01_INA_I2C_2_1_ADDR_49] = {
708                 I2C_BOARD_INFO("ina230", 0x49),
709                 .platform_data =
710                         &ardbeg_A01_power_mon_info_1[ARDBEG_A01_VDD_1V35_SD2],
711                 .irq = -1,
712         },
713
714         [ARDBEG_A01_INA_I2C_2_1_ADDR_4B] = {
715                 I2C_BOARD_INFO("ina230", 0x4B),
716                 .platform_data =
717                 &ardbeg_A01_power_mon_info_1[ARDBEG_A01_VDD_SYS_BUCKGPU],
718                 .irq = -1,
719         },
720
721         [ARDBEG_A01_INA_I2C_2_1_ADDR_4E] = {
722                 I2C_BOARD_INFO("ina230", 0x4E),
723                 .platform_data =
724                 &ardbeg_A01_power_mon_info_1[ARDBEG_A01_VDD_LCD_1V8B_DIS],
725                 .irq = -1,
726         },
727
728         [ARDBEG_A01_INA_I2C_2_1_ADDR_4F] = {
729                 I2C_BOARD_INFO("ina230", 0x4F),
730                 .platform_data =
731                         &ardbeg_A01_power_mon_info_1[ARDBEG_A01_VDD_1V05_LDO0],
732                 .irq = -1,
733         },
734 };
735
736 static struct i2c_board_info ardbeg_A01_i2c2_2_ina230_board_info[] = {
737         [ARDBEG_A01_INA_I2C_2_2_ADDR_40] = {
738                 I2C_BOARD_INFO("ina230", 0x40),
739                 .platform_data =
740                         &ardbeg_A01_power_mon_info_2[ARDBEG_A01_VDD_1V05_SD4],
741                 .irq = -1,
742         },
743
744         [ARDBEG_A01_INA_I2C_2_2_ADDR_41] = {
745                 I2C_BOARD_INFO("ina230", 0x41),
746                 .platform_data =
747                 &ardbeg_A01_power_mon_info_2[ARDBEG_A01_VDD_1V8A_LDO2_5_7],
748                 .irq = -1,
749         },
750
751         [ARDBEG_A01_INA_I2C_2_2_ADDR_49] = {
752                 I2C_BOARD_INFO("ina230", 0x49),
753                 .platform_data =
754                         &ardbeg_A01_power_mon_info_2[ARDBEG_A01_VDD_SYS_BL],
755                 .irq = -1,
756         },
757 };
758
759 static struct pca954x_platform_mode ardbeg_pca954x_modes[] = {
760         { .adap_id = PCA954x_I2C_BUS0, .deselect_on_exit = true, },
761         { .adap_id = PCA954x_I2C_BUS1, .deselect_on_exit = true, },
762         { .adap_id = PCA954x_I2C_BUS2, .deselect_on_exit = true, },
763         { .adap_id = PCA954x_I2C_BUS3, .deselect_on_exit = true, },
764 };
765
766 static struct pca954x_platform_data ardbeg_pca954x_data = {
767         .modes    = ardbeg_pca954x_modes,
768         .num_modes      = ARRAY_SIZE(ardbeg_pca954x_modes),
769 };
770
771 static const struct i2c_board_info ardbeg_i2c2_board_info[] = {
772         {
773                 I2C_BOARD_INFO("pca9546", 0x71),
774                 .platform_data = &ardbeg_pca954x_data,
775         },
776 };
777
778 static void __init register_devices_ardbeg_A01(void)
779 {
780         i2c_register_board_info(PCA954x_I2C_BUS1,
781                         ardbeg_A01_i2c2_1_ina230_board_info,
782                         ARRAY_SIZE(ardbeg_A01_i2c2_1_ina230_board_info));
783
784         i2c_register_board_info(PCA954x_I2C_BUS2,
785                         ardbeg_A01_i2c2_2_ina230_board_info,
786                         ARRAY_SIZE(ardbeg_A01_i2c2_2_ina230_board_info));
787 }
788
789 static void __init register_devices_ardbeg(void)
790 {
791         i2c_register_board_info(PCA954x_I2C_BUS1,
792                         ardbeg_i2c2_1_ina230_board_info,
793                         ARRAY_SIZE(ardbeg_i2c2_1_ina230_board_info));
794
795         i2c_register_board_info(PCA954x_I2C_BUS2,
796                         ardbeg_i2c2_2_ina230_board_info,
797                         ARRAY_SIZE(ardbeg_i2c2_2_ina230_board_info));
798 }
799
800 static void modify_reworked_rail_data(void)
801 {
802         ardbeg_A01_power_mon_info_1[ARDBEG_A01_VDD_1V35_SD2].resistor
803                                         = VDD_1V35_SD2_REWORKED;
804         ardbeg_A01_power_mon_info_1[ARDBEG_A01_VDD_CPU_BUCKCPU].resistor
805                                         = VDD_CPU_BUCKCPU_REWORKED;
806         ardbeg_A01_power_mon_info_1[ARDBEG_A01_VDD_SOC_SD1].resistor
807                                         = VDD_SOC_SD1_REWORKED;
808 }
809
810 int __init ardbeg_pmon_init(void)
811 {
812         /*
813         * Get power_config of board and check whether
814         * board is power reworked or not.
815         * In case board is reworked, modify rail data
816         * for which rework was done.
817         */
818         u8 power_config;
819         struct board_info bi;
820         power_config = get_power_config();
821         if (power_config & ARDBEG_POWER_REWORKED_CONFIG)
822                 modify_reworked_rail_data();
823
824         tegra_get_board_info(&bi);
825
826         i2c_register_board_info(1, ardbeg_i2c2_board_info,
827                 ARRAY_SIZE(ardbeg_i2c2_board_info));
828
829         i2c_register_board_info(PCA954x_I2C_BUS0,
830                         ardbeg_i2c2_0_ina219_board_info,
831                         ARRAY_SIZE(ardbeg_i2c2_0_ina219_board_info));
832
833         if (bi.fab >= BOARD_FAB_A01)
834                 register_devices_ardbeg_A01();
835         else
836                 register_devices_ardbeg();
837
838         return 0;
839 }
840