2 * arch/arm/mach-tegra/board-ardbeg-panel.c
4 * Copyright (c) 2013, NVIDIA Corporation. All rights reserved
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
20 #include <linux/ioport.h>
22 #include <linux/nvmap.h>
23 #include <linux/nvhost.h>
24 #include <linux/init.h>
25 #include <linux/delay.h>
26 #include <linux/gpio.h>
27 #include <linux/tegra_pwm_bl.h>
28 #include <linux/regulator/consumer.h>
29 #include <linux/pwm_backlight.h>
32 #include <mach/irqs.h>
37 #include "gpio-names.h"
38 #include "board-ardbeg.h"
39 #include "board-panel.h"
43 #ifdef CONFIG_ARCH_TEGRA_11x_SOC
44 #include "tegra11_host1x_devices.h"
46 #include "tegra12_host1x_devices.h"
49 #ifdef CONFIG_ARCH_TEGRA_11x_SOC
50 #define DSI_PANEL_RST_GPIO TEGRA_GPIO_PH3
51 #define DSI_PANEL_BL_PWM_GPIO TEGRA_GPIO_PH1
53 /* TODO: update gpio for t124 ardbeg */
54 #define DSI_PANEL_RST_GPIO TEGRA_GPIO_PH3
55 #define DSI_PANEL_BL_PWM_GPIO TEGRA_GPIO_PH1
58 struct platform_device * __init ardbeg_host1x_init(void)
60 struct platform_device *pdev = NULL;
62 #ifdef CONFIG_TEGRA_GRHOST
63 if (!of_have_populated_dt()) {
64 #ifdef CONFIG_ARCH_TEGRA_11x_SOC
65 pdev = tegra11_register_host1x_devices();
67 pdev = tegra12_register_host1x_devices();
70 pdev = to_platform_device(bus_find_device_by_name(
71 &platform_bus_type, NULL, "host1x"));
75 pr_err("host1x devices registration failed\n");
82 #ifdef CONFIG_TEGRA_DC
84 /* HDMI Hotplug detection pin */
85 #ifdef CONFIG_ARCH_TEGRA_11x_SOC
86 #define ardbeg_hdmi_hpd TEGRA_GPIO_PN7
88 /* TODO: update for t124 ardbeg */
89 #define ardbeg_hdmi_hpd TEGRA_GPIO_PN7
92 /* hdmi related regulators */
93 static struct regulator *ardbeg_hdmi_vddio;
95 static struct resource ardbeg_disp1_resources[] = {
98 .start = INT_DISPLAY_GENERAL,
99 .end = INT_DISPLAY_GENERAL,
100 .flags = IORESOURCE_IRQ,
104 .start = TEGRA_DISPLAY_BASE,
105 .end = TEGRA_DISPLAY_BASE + TEGRA_DISPLAY_SIZE - 1,
106 .flags = IORESOURCE_MEM,
110 .start = 0, /* Filled in by ardbeg_panel_init() */
111 .end = 0, /* Filled in by ardbeg_panel_init() */
112 .flags = IORESOURCE_MEM,
115 .name = "ganged_dsia_regs",
116 .start = 0, /* Filled in the panel file by init_resources() */
117 .end = 0, /* Filled in the panel file by init_resources() */
118 .flags = IORESOURCE_MEM,
121 .name = "ganged_dsib_regs",
122 .start = 0, /* Filled in the panel file by init_resources() */
123 .end = 0, /* Filled in the panel file by init_resources() */
124 .flags = IORESOURCE_MEM,
128 .start = 0, /* Filled in the panel file by init_resources() */
129 .end = 0, /* Filled in the panel file by init_resources() */
130 .flags = IORESOURCE_MEM,
134 .start = TEGRA_MIPI_CAL_BASE,
135 .end = TEGRA_MIPI_CAL_BASE + TEGRA_MIPI_CAL_SIZE - 1,
136 .flags = IORESOURCE_MEM,
140 static struct resource ardbeg_disp2_resources[] = {
143 .start = INT_DISPLAY_B_GENERAL,
144 .end = INT_DISPLAY_B_GENERAL,
145 .flags = IORESOURCE_IRQ,
149 .start = TEGRA_DISPLAY2_BASE,
150 .end = TEGRA_DISPLAY2_BASE + TEGRA_DISPLAY2_SIZE - 1,
151 .flags = IORESOURCE_MEM,
155 .start = 0, /* Filled in by ardbeg_panel_init() */
156 .end = 0, /* Filled in by ardbeg_panel_init() */
157 .flags = IORESOURCE_MEM,
161 .start = TEGRA_HDMI_BASE,
162 .end = TEGRA_HDMI_BASE + TEGRA_HDMI_SIZE - 1,
163 .flags = IORESOURCE_MEM,
168 static struct tegra_dc_sd_settings sd_settings;
170 static struct tegra_dc_out ardbeg_disp1_out = {
171 .type = TEGRA_DC_OUT_DSI,
172 .sd_settings = &sd_settings,
175 static int ardbeg_hdmi_enable(struct device *dev)
181 static int ardbeg_hdmi_disable(void)
187 static int ardbeg_hdmi_postsuspend(void)
189 if (ardbeg_hdmi_vddio) {
190 regulator_disable(ardbeg_hdmi_vddio);
191 regulator_put(ardbeg_hdmi_vddio);
192 ardbeg_hdmi_vddio = NULL;
197 static int ardbeg_hdmi_hotplug_init(struct device *dev)
199 if (!ardbeg_hdmi_vddio) {
200 ardbeg_hdmi_vddio = regulator_get(dev, "vdd_hdmi_5v0");
201 if (WARN_ON(IS_ERR(ardbeg_hdmi_vddio))) {
202 pr_err("%s: couldn't get regulator vdd_hdmi_5v0: %ld\n",
203 __func__, PTR_ERR(ardbeg_hdmi_vddio));
204 ardbeg_hdmi_vddio = NULL;
206 regulator_enable(ardbeg_hdmi_vddio);
213 static struct tegra_dc_out ardbeg_disp2_out = {
214 .type = TEGRA_DC_OUT_HDMI,
215 .flags = TEGRA_DC_OUT_HOTPLUG_HIGH,
216 .parent_clk = "pll_d2_out0",
219 .hotplug_gpio = ardbeg_hdmi_hpd,
221 /* TODO: update max pclk to POR */
222 .max_pixclock = KHZ2PICOS(297000),
224 .align = TEGRA_DC_ALIGN_MSB,
225 .order = TEGRA_DC_ORDER_RED_BLUE,
227 .enable = ardbeg_hdmi_enable,
228 .disable = ardbeg_hdmi_disable,
229 .postsuspend = ardbeg_hdmi_postsuspend,
230 .hotplug_init = ardbeg_hdmi_hotplug_init,
233 static struct tegra_fb_data ardbeg_disp1_fb_data = {
235 .bits_per_pixel = 32,
236 .flags = TEGRA_FB_FLIP_ON_PROBE,
239 static struct tegra_dc_platform_data ardbeg_disp1_pdata = {
240 .flags = TEGRA_DC_FLAG_ENABLED,
241 .default_out = &ardbeg_disp1_out,
242 .fb = &ardbeg_disp1_fb_data,
243 .emc_clk_rate = 204000000,
244 #ifdef CONFIG_TEGRA_DC_CMU
249 static struct tegra_fb_data ardbeg_disp2_fb_data = {
253 .bits_per_pixel = 32,
254 .flags = TEGRA_FB_FLIP_ON_PROBE,
257 static struct tegra_dc_platform_data ardbeg_disp2_pdata = {
258 .flags = TEGRA_DC_FLAG_ENABLED,
259 .default_out = &ardbeg_disp2_out,
260 .fb = &ardbeg_disp2_fb_data,
261 .emc_clk_rate = 300000000,
264 static struct platform_device ardbeg_disp2_device = {
267 .resource = ardbeg_disp2_resources,
268 .num_resources = ARRAY_SIZE(ardbeg_disp2_resources),
270 .platform_data = &ardbeg_disp2_pdata,
274 static struct platform_device ardbeg_disp1_device = {
277 .resource = ardbeg_disp1_resources,
278 .num_resources = ARRAY_SIZE(ardbeg_disp1_resources),
280 .platform_data = &ardbeg_disp1_pdata,
284 static struct nvmap_platform_carveout ardbeg_carveouts[] = {
287 .usage_mask = NVMAP_HEAP_CARVEOUT_IRAM,
288 .base = TEGRA_IRAM_BASE + TEGRA_RESET_HANDLER_SIZE,
289 .size = TEGRA_IRAM_SIZE - TEGRA_RESET_HANDLER_SIZE,
290 .buddy_size = 0, /* no buddy allocation for IRAM */
294 .usage_mask = NVMAP_HEAP_CARVEOUT_GENERIC,
295 .base = 0, /* Filled in by ardbeg_panel_init() */
296 .size = 0, /* Filled in by ardbeg_panel_init() */
297 .buddy_size = SZ_32K,
301 .usage_mask = NVMAP_HEAP_CARVEOUT_VPR,
302 .base = 0, /* Filled in by ardbeg_panel_init() */
303 .size = 0, /* Filled in by ardbeg_panel_init() */
304 .buddy_size = SZ_32K,
308 static struct nvmap_platform_data ardbeg_nvmap_data = {
309 .carveouts = ardbeg_carveouts,
310 .nr_carveouts = ARRAY_SIZE(ardbeg_carveouts),
312 static struct platform_device ardbeg_nvmap_device __initdata = {
313 .name = "tegra-nvmap",
316 .platform_data = &ardbeg_nvmap_data,
320 static struct tegra_dc_sd_settings ardbeg_sd_settings = {
321 .enable = 1, /* enabled by default. */
322 .use_auto_pwm = false,
323 .hw_update_delay = 0,
326 .use_vid_luma = false,
327 .phase_in_adjustments = 0,
328 .k_limit_enable = true,
330 .sd_window_enable = false,
331 .soft_clipping_enable = true,
332 /* Low soft clipping threshold to compensate for aggressive k_limit */
333 .soft_clipping_threshold = 128,
334 .smooth_k_enable = false,
336 /* Default video coefficients */
339 /* Immediate backlight changes */
341 /* Gammas: R: 2.2 G: 2.2 B: 2.2 */
347 {138, 150, 164, 178},
348 {193, 208, 224, 241},
365 .sd_brightness = &sd_brightness,
369 static void ardbeg_panel_select(void)
371 struct tegra_panel *panel = NULL;
372 struct board_info board;
375 tegra_get_display_board_info(&board);
377 switch (board.board_id) {
379 panel = &dsi_s_wqxga_10_1;
380 dsi_instance = DSI_INSTANCE_0;
385 panel = &dsi_p_wuxga_10_1;
386 dsi_instance = DSI_INSTANCE_0;
391 if (panel->init_sd_settings)
392 panel->init_sd_settings(&sd_settings);
394 if (panel->init_dc_out) {
395 panel->init_dc_out(&ardbeg_disp1_out);
396 ardbeg_disp1_out.dsi->dsi_instance = dsi_instance;
397 ardbeg_disp1_out.dsi->dsi_panel_rst_gpio =
399 ardbeg_disp1_out.dsi->dsi_panel_bl_pwm_gpio =
400 DSI_PANEL_BL_PWM_GPIO;
403 if (panel->init_fb_data)
404 panel->init_fb_data(&ardbeg_disp1_fb_data);
406 if (panel->init_cmu_data)
407 panel->init_cmu_data(&ardbeg_disp1_pdata);
409 if (panel->set_disp_device)
410 panel->set_disp_device(&ardbeg_disp1_device);
412 tegra_dsi_resources_init(dsi_instance, ardbeg_disp1_resources,
413 ARRAY_SIZE(ardbeg_disp1_resources));
415 if (panel->register_bl_dev)
416 panel->register_bl_dev();
418 if (panel->register_i2c_bridge)
419 panel->register_i2c_bridge();
423 int __init ardbeg_panel_init(void)
426 struct resource __maybe_unused *res;
427 struct platform_device *phost1x = NULL;
429 sd_settings = ardbeg_sd_settings;
431 ardbeg_panel_select();
433 #ifdef CONFIG_TEGRA_NVMAP
434 ardbeg_carveouts[1].base = tegra_carveout_start;
435 ardbeg_carveouts[1].size = tegra_carveout_size;
436 ardbeg_carveouts[2].base = tegra_vpr_start;
437 ardbeg_carveouts[2].size = tegra_vpr_size;
439 err = platform_device_register(&ardbeg_nvmap_device);
441 pr_err("nvmap device registration failed\n");
446 phost1x = ardbeg_host1x_init();
448 pr_err("host1x devices registration failed\n");
452 res = platform_get_resource_byname(&ardbeg_disp1_device,
453 IORESOURCE_MEM, "fbmem");
454 res->start = tegra_fb_start;
455 res->end = tegra_fb_start + tegra_fb_size - 1;
457 /* Copy the bootloader fb to the fb. */
458 __tegra_move_framebuffer(&ardbeg_nvmap_device,
459 tegra_fb_start, tegra_bootloader_fb_start,
460 min(tegra_fb_size, tegra_bootloader_fb_size));
462 res = platform_get_resource_byname(&ardbeg_disp2_device,
463 IORESOURCE_MEM, "fbmem");
465 res->start = tegra_fb2_start;
466 res->end = tegra_fb2_start + tegra_fb2_size - 1;
468 ardbeg_disp1_device.dev.parent = &phost1x->dev;
469 err = platform_device_register(&ardbeg_disp1_device);
471 pr_err("disp1 device registration failed\n");
475 ardbeg_disp2_device.dev.parent = &phost1x->dev;
476 err = platform_device_register(&ardbeg_disp2_device);
478 pr_err("disp2 device registration failed\n");
482 #ifdef CONFIG_TEGRA_NVAVP
483 nvavp_device.dev.parent = &phost1x->dev;
484 err = platform_device_register(&nvavp_device);
486 pr_err("nvavp device registration failed\n");
493 int __init ardbeg_panel_init(void)
495 if (ardbeg_host1x_init())