Merge branch 'spear/pinctrl' into spear/clock
[linux-3.10.git] / arch / arm / mach-spear3xx / include / mach / spear.h
1 /*
2  * arch/arm/mach-spear3xx/include/mach/spear.h
3  *
4  * SPEAr3xx Machine family specific definition
5  *
6  * Copyright (C) 2009 ST Microelectronics
7  * Viresh Kumar<viresh.kumar@st.com>
8  *
9  * This file is licensed under the terms of the GNU General Public
10  * License version 2. This program is licensed "as is" without any
11  * warranty of any kind, whether express or implied.
12  */
13
14 #ifndef __MACH_SPEAR3XX_H
15 #define __MACH_SPEAR3XX_H
16
17 #include <asm/memory.h>
18 #include <mach/spear300.h>
19 #include <mach/spear310.h>
20 #include <mach/spear320.h>
21
22 #define SPEAR3XX_ML_SDRAM_BASE          UL(0x00000000)
23
24 #define SPEAR3XX_ICM9_BASE              UL(0xC0000000)
25
26 /* ICM1 - Low speed connection */
27 #define SPEAR3XX_ICM1_2_BASE            UL(0xD0000000)
28 #define VA_SPEAR3XX_ICM1_2_BASE         UL(0xFD000000)
29 #define SPEAR3XX_ICM1_UART_BASE         UL(0xD0000000)
30 #define VA_SPEAR3XX_ICM1_UART_BASE      (VA_SPEAR3XX_ICM1_2_BASE | SPEAR3XX_ICM1_UART_BASE)
31 #define SPEAR3XX_ICM1_ADC_BASE          UL(0xD0080000)
32 #define SPEAR3XX_ICM1_SSP_BASE          UL(0xD0100000)
33 #define SPEAR3XX_ICM1_I2C_BASE          UL(0xD0180000)
34 #define SPEAR3XX_ICM1_JPEG_BASE         UL(0xD0800000)
35 #define SPEAR3XX_ICM1_IRDA_BASE         UL(0xD1000000)
36 #define SPEAR3XX_ICM1_SRAM_BASE         UL(0xD2800000)
37
38 /* ICM2 - Application Subsystem */
39 #define SPEAR3XX_ICM2_HWACCEL0_BASE     UL(0xD8800000)
40 #define SPEAR3XX_ICM2_HWACCEL1_BASE     UL(0xD9000000)
41
42 /* ICM4 - High Speed Connection */
43 #define SPEAR3XX_ICM4_BASE              UL(0xE0000000)
44 #define SPEAR3XX_ICM4_MII_BASE          UL(0xE0800000)
45 #define SPEAR3XX_ICM4_USBD_FIFO_BASE    UL(0xE1000000)
46 #define SPEAR3XX_ICM4_USBD_CSR_BASE     UL(0xE1100000)
47 #define SPEAR3XX_ICM4_USBD_PLDT_BASE    UL(0xE1200000)
48 #define SPEAR3XX_ICM4_USB_EHCI0_1_BASE  UL(0xE1800000)
49 #define SPEAR3XX_ICM4_USB_OHCI0_BASE    UL(0xE1900000)
50 #define SPEAR3XX_ICM4_USB_OHCI1_BASE    UL(0xE2100000)
51 #define SPEAR3XX_ICM4_USB_ARB_BASE      UL(0xE2800000)
52
53 /* ML1 - Multi Layer CPU Subsystem */
54 #define SPEAR3XX_ICM3_ML1_2_BASE        UL(0xF0000000)
55 #define SPEAR3XX_ML1_TMR_BASE           UL(0xF0000000)
56 #define SPEAR3XX_ML1_VIC_BASE           UL(0xF1100000)
57
58 /* ICM3 - Basic Subsystem */
59 #define SPEAR3XX_ICM3_SMEM_BASE         UL(0xF8000000)
60 #define SPEAR3XX_ICM3_SMI_CTRL_BASE     UL(0xFC000000)
61 #define VA_SPEAR3XX_ICM3_SMI_CTRL_BASE  UL(0xFC000000)
62 #define SPEAR3XX_ICM3_DMA_BASE          UL(0xFC400000)
63 #define SPEAR3XX_ICM3_SDRAM_CTRL_BASE   UL(0xFC600000)
64 #define SPEAR3XX_ICM3_TMR0_BASE         UL(0xFC800000)
65 #define SPEAR3XX_ICM3_WDT_BASE          UL(0xFC880000)
66 #define SPEAR3XX_ICM3_RTC_BASE          UL(0xFC900000)
67 #define SPEAR3XX_ICM3_GPIO_BASE         UL(0xFC980000)
68 #define SPEAR3XX_ICM3_SYS_CTRL_BASE     UL(0xFCA00000)
69 #define VA_SPEAR3XX_ICM3_SYS_CTRL_BASE  (VA_SPEAR3XX_ICM3_SMI_CTRL_BASE | SPEAR3XX_ICM3_SYS_CTRL_BASE)
70 #define SPEAR3XX_ICM3_MISC_REG_BASE     UL(0xFCA80000)
71 #define VA_SPEAR3XX_ICM3_MISC_REG_BASE  (VA_SPEAR3XX_ICM3_SMI_CTRL_BASE | SPEAR3XX_ICM3_MISC_REG_BASE)
72 #define SPEAR3XX_ICM3_TMR1_BASE         UL(0xFCB00000)
73
74 /* Debug uart for linux, will be used for debug and uncompress messages */
75 #define SPEAR_DBG_UART_BASE             SPEAR3XX_ICM1_UART_BASE
76 #define VA_SPEAR_DBG_UART_BASE          VA_SPEAR3XX_ICM1_UART_BASE
77
78 /* Sysctl base for spear platform */
79 #define SPEAR_SYS_CTRL_BASE             SPEAR3XX_ICM3_SYS_CTRL_BASE
80 #define VA_SPEAR_SYS_CTRL_BASE          VA_SPEAR3XX_ICM3_SYS_CTRL_BASE
81
82 /* SPEAr320 Macros */
83 #define SPEAR320_SOC_CONFIG_BASE        UL(0xB3000000)
84 #define VA_SPEAR320_SOC_CONFIG_BASE     UL(0xFE000000)
85 #define SPEAR320_CONTROL_REG            IOMEM(VA_SPEAR320_SOC_CONFIG_BASE)
86 #define SPEAR320_EXT_CTRL_REG           IOMEM(VA_SPEAR320_SOC_CONFIG_BASE + 0x0018)
87         #define SPEAR320_UARTX_PCLK_MASK                0x1
88         #define SPEAR320_UART2_PCLK_SHIFT               8
89         #define SPEAR320_UART3_PCLK_SHIFT               9
90         #define SPEAR320_UART4_PCLK_SHIFT               10
91         #define SPEAR320_UART5_PCLK_SHIFT               11
92         #define SPEAR320_UART6_PCLK_SHIFT               12
93         #define SPEAR320_RS485_PCLK_SHIFT               13
94
95 #endif /* __MACH_SPEAR3XX_H */