ARM: 5910/1: ARM: Add tmp register for addruart and loadsp
[linux-3.10.git] / arch / arm / mach-sa1100 / include / mach / debug-macro.S
1 /* arch/arm/mach-sa1100/include/mach/debug-macro.S
2  *
3  * Debugging macro include header
4  *
5  *  Copyright (C) 1994-1999 Russell King
6  *  Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License version 2 as
10  * published by the Free Software Foundation.
11  *
12 */
13 #include <mach/hardware.h>
14
15                 .macro  addruart, rx, tmp
16                 mrc     p15, 0, \rx, c1, c0
17                 tst     \rx, #1                 @ MMU enabled?
18                 moveq   \rx, #0x80000000        @ physical base address
19                 movne   \rx, #0xf8000000        @ virtual address
20
21                 @ We probe for the active serial port here, coherently with
22                 @ the comment in arch/arm/mach-sa1100/include/mach/uncompress.h.
23                 @ We assume r1 can be clobbered.
24
25                 @ see if Ser3 is active
26                 add     \rx, \rx, #0x00050000
27                 ldr     r1, [\rx, #UTCR3]
28                 tst     r1, #UTCR3_TXE
29
30                 @ if Ser3 is inactive, then try Ser1
31                 addeq   \rx, \rx, #(0x00010000 - 0x00050000)
32                 ldreq   r1, [\rx, #UTCR3]
33                 tsteq   r1, #UTCR3_TXE
34
35                 @ if Ser1 is inactive, then try Ser2
36                 addeq   \rx, \rx, #(0x00030000 - 0x00010000)
37                 ldreq   r1, [\rx, #UTCR3]
38                 tsteq   r1, #UTCR3_TXE
39
40                 @ if all ports are inactive, then there is nothing we can do
41                 moveq   pc, lr
42                 .endm
43
44                 .macro  senduart,rd,rx
45                 str     \rd, [\rx, #UTDR]
46                 .endm
47
48                 .macro  waituart,rd,rx
49 1001:           ldr     \rd, [\rx, #UTSR1]
50                 tst     \rd, #UTSR1_TNF
51                 beq     1001b
52                 .endm
53
54                 .macro  busyuart,rd,rx
55 1001:           ldr     \rd, [\rx, #UTSR1]
56                 tst     \rd, #UTSR1_TBY
57                 bne     1001b
58                 .endm