OMAP3 clock: initialize SDRC timings at kernel start
[linux-3.10.git] / arch / arm / mach-omap2 / io.c
1 /*
2  * linux/arch/arm/mach-omap2/io.c
3  *
4  * OMAP2 I/O mapping code
5  *
6  * Copyright (C) 2005 Nokia Corporation
7  * Copyright (C) 2007-2009 Texas Instruments
8  *
9  * Author:
10  *      Juha Yrjola <juha.yrjola@nokia.com>
11  *      Syed Khasim <x0khasim@ti.com>
12  *
13  * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
14  *
15  * This program is free software; you can redistribute it and/or modify
16  * it under the terms of the GNU General Public License version 2 as
17  * published by the Free Software Foundation.
18  */
19
20 #include <linux/module.h>
21 #include <linux/kernel.h>
22 #include <linux/init.h>
23 #include <linux/io.h>
24 #include <linux/clk.h>
25
26 #include <asm/tlb.h>
27
28 #include <asm/mach/map.h>
29
30 #include <mach/mux.h>
31 #include <mach/omapfb.h>
32 #include <mach/sram.h>
33 #include <mach/sdrc.h>
34 #include <mach/gpmc.h>
35
36 #ifndef CONFIG_ARCH_OMAP4       /* FIXME: Remove this once clkdev is ready */
37 #include "clock.h"
38
39 #include <mach/powerdomain.h>
40
41 #include "powerdomains.h"
42
43 #include <mach/clockdomain.h>
44 #include "clockdomains.h"
45 #endif
46 /*
47  * The machine specific code may provide the extra mapping besides the
48  * default mapping provided here.
49  */
50
51 #ifdef CONFIG_ARCH_OMAP24XX
52 static struct map_desc omap24xx_io_desc[] __initdata = {
53         {
54                 .virtual        = L3_24XX_VIRT,
55                 .pfn            = __phys_to_pfn(L3_24XX_PHYS),
56                 .length         = L3_24XX_SIZE,
57                 .type           = MT_DEVICE
58         },
59         {
60                 .virtual        = L4_24XX_VIRT,
61                 .pfn            = __phys_to_pfn(L4_24XX_PHYS),
62                 .length         = L4_24XX_SIZE,
63                 .type           = MT_DEVICE
64         },
65 };
66
67 #ifdef CONFIG_ARCH_OMAP2420
68 static struct map_desc omap242x_io_desc[] __initdata = {
69         {
70                 .virtual        = DSP_MEM_24XX_VIRT,
71                 .pfn            = __phys_to_pfn(DSP_MEM_24XX_PHYS),
72                 .length         = DSP_MEM_24XX_SIZE,
73                 .type           = MT_DEVICE
74         },
75         {
76                 .virtual        = DSP_IPI_24XX_VIRT,
77                 .pfn            = __phys_to_pfn(DSP_IPI_24XX_PHYS),
78                 .length         = DSP_IPI_24XX_SIZE,
79                 .type           = MT_DEVICE
80         },
81         {
82                 .virtual        = DSP_MMU_24XX_VIRT,
83                 .pfn            = __phys_to_pfn(DSP_MMU_24XX_PHYS),
84                 .length         = DSP_MMU_24XX_SIZE,
85                 .type           = MT_DEVICE
86         },
87 };
88
89 #endif
90
91 #ifdef CONFIG_ARCH_OMAP2430
92 static struct map_desc omap243x_io_desc[] __initdata = {
93         {
94                 .virtual        = L4_WK_243X_VIRT,
95                 .pfn            = __phys_to_pfn(L4_WK_243X_PHYS),
96                 .length         = L4_WK_243X_SIZE,
97                 .type           = MT_DEVICE
98         },
99         {
100                 .virtual        = OMAP243X_GPMC_VIRT,
101                 .pfn            = __phys_to_pfn(OMAP243X_GPMC_PHYS),
102                 .length         = OMAP243X_GPMC_SIZE,
103                 .type           = MT_DEVICE
104         },
105         {
106                 .virtual        = OMAP243X_SDRC_VIRT,
107                 .pfn            = __phys_to_pfn(OMAP243X_SDRC_PHYS),
108                 .length         = OMAP243X_SDRC_SIZE,
109                 .type           = MT_DEVICE
110         },
111         {
112                 .virtual        = OMAP243X_SMS_VIRT,
113                 .pfn            = __phys_to_pfn(OMAP243X_SMS_PHYS),
114                 .length         = OMAP243X_SMS_SIZE,
115                 .type           = MT_DEVICE
116         },
117 };
118 #endif
119 #endif
120
121 #ifdef  CONFIG_ARCH_OMAP34XX
122 static struct map_desc omap34xx_io_desc[] __initdata = {
123         {
124                 .virtual        = L3_34XX_VIRT,
125                 .pfn            = __phys_to_pfn(L3_34XX_PHYS),
126                 .length         = L3_34XX_SIZE,
127                 .type           = MT_DEVICE
128         },
129         {
130                 .virtual        = L4_34XX_VIRT,
131                 .pfn            = __phys_to_pfn(L4_34XX_PHYS),
132                 .length         = L4_34XX_SIZE,
133                 .type           = MT_DEVICE
134         },
135         {
136                 .virtual        = L4_WK_34XX_VIRT,
137                 .pfn            = __phys_to_pfn(L4_WK_34XX_PHYS),
138                 .length         = L4_WK_34XX_SIZE,
139                 .type           = MT_DEVICE
140         },
141         {
142                 .virtual        = OMAP34XX_GPMC_VIRT,
143                 .pfn            = __phys_to_pfn(OMAP34XX_GPMC_PHYS),
144                 .length         = OMAP34XX_GPMC_SIZE,
145                 .type           = MT_DEVICE
146         },
147         {
148                 .virtual        = OMAP343X_SMS_VIRT,
149                 .pfn            = __phys_to_pfn(OMAP343X_SMS_PHYS),
150                 .length         = OMAP343X_SMS_SIZE,
151                 .type           = MT_DEVICE
152         },
153         {
154                 .virtual        = OMAP343X_SDRC_VIRT,
155                 .pfn            = __phys_to_pfn(OMAP343X_SDRC_PHYS),
156                 .length         = OMAP343X_SDRC_SIZE,
157                 .type           = MT_DEVICE
158         },
159         {
160                 .virtual        = L4_PER_34XX_VIRT,
161                 .pfn            = __phys_to_pfn(L4_PER_34XX_PHYS),
162                 .length         = L4_PER_34XX_SIZE,
163                 .type           = MT_DEVICE
164         },
165         {
166                 .virtual        = L4_EMU_34XX_VIRT,
167                 .pfn            = __phys_to_pfn(L4_EMU_34XX_PHYS),
168                 .length         = L4_EMU_34XX_SIZE,
169                 .type           = MT_DEVICE
170         },
171 };
172 #endif
173 #ifdef  CONFIG_ARCH_OMAP4
174 static struct map_desc omap44xx_io_desc[] __initdata = {
175         {
176                 .virtual        = L3_44XX_VIRT,
177                 .pfn            = __phys_to_pfn(L3_44XX_PHYS),
178                 .length         = L3_44XX_SIZE,
179                 .type           = MT_DEVICE,
180         },
181         {
182                 .virtual        = L4_44XX_VIRT,
183                 .pfn            = __phys_to_pfn(L4_44XX_PHYS),
184                 .length         = L4_44XX_SIZE,
185                 .type           = MT_DEVICE,
186         },
187         {
188                 .virtual        = L4_WK_44XX_VIRT,
189                 .pfn            = __phys_to_pfn(L4_WK_44XX_PHYS),
190                 .length         = L4_WK_44XX_SIZE,
191                 .type           = MT_DEVICE,
192         },
193         {
194                 .virtual        = OMAP44XX_GPMC_VIRT,
195                 .pfn            = __phys_to_pfn(OMAP44XX_GPMC_PHYS),
196                 .length         = OMAP44XX_GPMC_SIZE,
197                 .type           = MT_DEVICE,
198         },
199         {
200                 .virtual        = L4_PER_44XX_VIRT,
201                 .pfn            = __phys_to_pfn(L4_PER_44XX_PHYS),
202                 .length         = L4_PER_44XX_SIZE,
203                 .type           = MT_DEVICE,
204         },
205         {
206                 .virtual        = L4_EMU_44XX_VIRT,
207                 .pfn            = __phys_to_pfn(L4_EMU_44XX_PHYS),
208                 .length         = L4_EMU_44XX_SIZE,
209                 .type           = MT_DEVICE,
210         },
211 };
212 #endif
213
214 void __init omap2_map_common_io(void)
215 {
216 #if defined(CONFIG_ARCH_OMAP2420)
217         iotable_init(omap24xx_io_desc, ARRAY_SIZE(omap24xx_io_desc));
218         iotable_init(omap242x_io_desc, ARRAY_SIZE(omap242x_io_desc));
219 #endif
220
221 #if defined(CONFIG_ARCH_OMAP2430)
222         iotable_init(omap24xx_io_desc, ARRAY_SIZE(omap24xx_io_desc));
223         iotable_init(omap243x_io_desc, ARRAY_SIZE(omap243x_io_desc));
224 #endif
225
226 #if defined(CONFIG_ARCH_OMAP34XX)
227         iotable_init(omap34xx_io_desc, ARRAY_SIZE(omap34xx_io_desc));
228 #endif
229
230 #if defined(CONFIG_ARCH_OMAP4)
231         iotable_init(omap44xx_io_desc, ARRAY_SIZE(omap44xx_io_desc));
232 #endif
233         /* Normally devicemaps_init() would flush caches and tlb after
234          * mdesc->map_io(), but we must also do it here because of the CPU
235          * revision check below.
236          */
237         local_flush_tlb_all();
238         flush_cache_all();
239
240         omap2_check_revision();
241         omap_sram_init();
242         omapfb_reserve_sdram();
243 }
244
245 /*
246  * omap2_init_reprogram_sdrc - reprogram SDRC timing parameters
247  *
248  * Sets the CORE DPLL3 M2 divider to the same value that it's at
249  * currently.  This has the effect of setting the SDRC SDRAM AC timing
250  * registers to the values currently defined by the kernel.  Currently
251  * only defined for OMAP3; will return 0 if called on OMAP2.  Returns
252  * -EINVAL if the dpll3_m2_ck cannot be found, 0 if called on OMAP2,
253  * or passes along the return value of clk_set_rate().
254  */
255 static int __init _omap2_init_reprogram_sdrc(void)
256 {
257         struct clk *dpll3_m2_ck;
258         int v = -EINVAL;
259         long rate;
260
261         if (!cpu_is_omap34xx())
262                 return 0;
263
264         dpll3_m2_ck = clk_get(NULL, "dpll3_m2_ck");
265         if (!dpll3_m2_ck)
266                 return -EINVAL;
267
268         rate = clk_get_rate(dpll3_m2_ck);
269         pr_info("Reprogramming SDRC clock to %ld Hz\n", rate);
270         v = clk_set_rate(dpll3_m2_ck, rate);
271         if (v)
272                 pr_err("dpll3_m2_clk rate change failed: %d\n", v);
273
274         clk_put(dpll3_m2_ck);
275
276         return v;
277 }
278
279 void __init omap2_init_common_hw(struct omap_sdrc_params *sp)
280 {
281         omap2_mux_init();
282 #ifndef CONFIG_ARCH_OMAP4 /* FIXME: Remove this once the clkdev is ready */
283         pwrdm_init(powerdomains_omap);
284         clkdm_init(clockdomains_omap, clkdm_pwrdm_autodeps);
285         omap2_clk_init();
286         omap2_sdrc_init(sp);
287         _omap2_init_reprogram_sdrc();
288 #endif
289         gpmc_init();
290 }