omap: Use separate init_irq functions to avoid cpu_is_omap tests early
[linux-3.10.git] / arch / arm / mach-omap2 / board-3430sdp.c
1 /*
2  * linux/arch/arm/mach-omap2/board-3430sdp.c
3  *
4  * Copyright (C) 2007 Texas Instruments
5  *
6  * Modified from mach-omap2/board-generic.c
7  *
8  * Initial code: Syed Mohammed Khasim
9  *
10  * This program is free software; you can redistribute it and/or modify
11  * it under the terms of the GNU General Public License version 2 as
12  * published by the Free Software Foundation.
13  */
14
15 #include <linux/kernel.h>
16 #include <linux/init.h>
17 #include <linux/platform_device.h>
18 #include <linux/delay.h>
19 #include <linux/input.h>
20 #include <linux/input/matrix_keypad.h>
21 #include <linux/spi/spi.h>
22 #include <linux/i2c/twl.h>
23 #include <linux/regulator/machine.h>
24 #include <linux/io.h>
25 #include <linux/gpio.h>
26 #include <linux/mmc/host.h>
27
28 #include <mach/hardware.h>
29 #include <asm/mach-types.h>
30 #include <asm/mach/arch.h>
31 #include <asm/mach/map.h>
32
33 #include <plat/mcspi.h>
34 #include <plat/board.h>
35 #include <plat/usb.h>
36 #include <plat/common.h>
37 #include <plat/dma.h>
38 #include <plat/gpmc.h>
39 #include <video/omapdss.h>
40 #include <video/omap-panel-generic-dpi.h>
41
42 #include <plat/gpmc-smc91x.h>
43
44 #include "board-flash.h"
45 #include "mux.h"
46 #include "sdram-qimonda-hyb18m512160af-6.h"
47 #include "hsmmc.h"
48 #include "pm.h"
49 #include "control.h"
50 #include "common-board-devices.h"
51
52 #define CONFIG_DISABLE_HFCLK 1
53
54 #define SDP3430_TS_GPIO_IRQ_SDPV1       3
55 #define SDP3430_TS_GPIO_IRQ_SDPV2       2
56
57 #define ENABLE_VAUX3_DEDICATED  0x03
58 #define ENABLE_VAUX3_DEV_GRP    0x20
59
60 #define TWL4030_MSECURE_GPIO 22
61
62 static uint32_t board_keymap[] = {
63         KEY(0, 0, KEY_LEFT),
64         KEY(0, 1, KEY_RIGHT),
65         KEY(0, 2, KEY_A),
66         KEY(0, 3, KEY_B),
67         KEY(0, 4, KEY_C),
68         KEY(1, 0, KEY_DOWN),
69         KEY(1, 1, KEY_UP),
70         KEY(1, 2, KEY_E),
71         KEY(1, 3, KEY_F),
72         KEY(1, 4, KEY_G),
73         KEY(2, 0, KEY_ENTER),
74         KEY(2, 1, KEY_I),
75         KEY(2, 2, KEY_J),
76         KEY(2, 3, KEY_K),
77         KEY(2, 4, KEY_3),
78         KEY(3, 0, KEY_M),
79         KEY(3, 1, KEY_N),
80         KEY(3, 2, KEY_O),
81         KEY(3, 3, KEY_P),
82         KEY(3, 4, KEY_Q),
83         KEY(4, 0, KEY_R),
84         KEY(4, 1, KEY_4),
85         KEY(4, 2, KEY_T),
86         KEY(4, 3, KEY_U),
87         KEY(4, 4, KEY_D),
88         KEY(5, 0, KEY_V),
89         KEY(5, 1, KEY_W),
90         KEY(5, 2, KEY_L),
91         KEY(5, 3, KEY_S),
92         KEY(5, 4, KEY_H),
93         0
94 };
95
96 static struct matrix_keymap_data board_map_data = {
97         .keymap                 = board_keymap,
98         .keymap_size            = ARRAY_SIZE(board_keymap),
99 };
100
101 static struct twl4030_keypad_data sdp3430_kp_data = {
102         .keymap_data    = &board_map_data,
103         .rows           = 5,
104         .cols           = 6,
105         .rep            = 1,
106 };
107
108 #define SDP3430_LCD_PANEL_BACKLIGHT_GPIO        8
109 #define SDP3430_LCD_PANEL_ENABLE_GPIO           5
110
111 static struct gpio sdp3430_dss_gpios[] __initdata = {
112         {SDP3430_LCD_PANEL_ENABLE_GPIO,    GPIOF_OUT_INIT_LOW, "LCD reset"    },
113         {SDP3430_LCD_PANEL_BACKLIGHT_GPIO, GPIOF_OUT_INIT_LOW, "LCD Backlight"},
114 };
115
116 static int lcd_enabled;
117 static int dvi_enabled;
118
119 static void __init sdp3430_display_init(void)
120 {
121         int r;
122
123         r = gpio_request_array(sdp3430_dss_gpios,
124                                ARRAY_SIZE(sdp3430_dss_gpios));
125         if (r)
126                 printk(KERN_ERR "failed to get LCD control GPIOs\n");
127
128 }
129
130 static int sdp3430_panel_enable_lcd(struct omap_dss_device *dssdev)
131 {
132         if (dvi_enabled) {
133                 printk(KERN_ERR "cannot enable LCD, DVI is enabled\n");
134                 return -EINVAL;
135         }
136
137         gpio_direction_output(SDP3430_LCD_PANEL_ENABLE_GPIO, 1);
138         gpio_direction_output(SDP3430_LCD_PANEL_BACKLIGHT_GPIO, 1);
139
140         lcd_enabled = 1;
141
142         return 0;
143 }
144
145 static void sdp3430_panel_disable_lcd(struct omap_dss_device *dssdev)
146 {
147         lcd_enabled = 0;
148
149         gpio_direction_output(SDP3430_LCD_PANEL_ENABLE_GPIO, 0);
150         gpio_direction_output(SDP3430_LCD_PANEL_BACKLIGHT_GPIO, 0);
151 }
152
153 static int sdp3430_panel_enable_dvi(struct omap_dss_device *dssdev)
154 {
155         if (lcd_enabled) {
156                 printk(KERN_ERR "cannot enable DVI, LCD is enabled\n");
157                 return -EINVAL;
158         }
159
160         dvi_enabled = 1;
161
162         return 0;
163 }
164
165 static void sdp3430_panel_disable_dvi(struct omap_dss_device *dssdev)
166 {
167         dvi_enabled = 0;
168 }
169
170 static int sdp3430_panel_enable_tv(struct omap_dss_device *dssdev)
171 {
172         return 0;
173 }
174
175 static void sdp3430_panel_disable_tv(struct omap_dss_device *dssdev)
176 {
177 }
178
179
180 static struct omap_dss_device sdp3430_lcd_device = {
181         .name                   = "lcd",
182         .driver_name            = "sharp_ls_panel",
183         .type                   = OMAP_DISPLAY_TYPE_DPI,
184         .phy.dpi.data_lines     = 16,
185         .platform_enable        = sdp3430_panel_enable_lcd,
186         .platform_disable       = sdp3430_panel_disable_lcd,
187 };
188
189 static struct panel_generic_dpi_data dvi_panel = {
190         .name                   = "generic",
191         .platform_enable        = sdp3430_panel_enable_dvi,
192         .platform_disable       = sdp3430_panel_disable_dvi,
193 };
194
195 static struct omap_dss_device sdp3430_dvi_device = {
196         .name                   = "dvi",
197         .type                   = OMAP_DISPLAY_TYPE_DPI,
198         .driver_name            = "generic_dpi_panel",
199         .data                   = &dvi_panel,
200         .phy.dpi.data_lines     = 24,
201 };
202
203 static struct omap_dss_device sdp3430_tv_device = {
204         .name                   = "tv",
205         .driver_name            = "venc",
206         .type                   = OMAP_DISPLAY_TYPE_VENC,
207         .phy.venc.type          = OMAP_DSS_VENC_TYPE_SVIDEO,
208         .platform_enable        = sdp3430_panel_enable_tv,
209         .platform_disable       = sdp3430_panel_disable_tv,
210 };
211
212
213 static struct omap_dss_device *sdp3430_dss_devices[] = {
214         &sdp3430_lcd_device,
215         &sdp3430_dvi_device,
216         &sdp3430_tv_device,
217 };
218
219 static struct omap_dss_board_info sdp3430_dss_data = {
220         .num_devices    = ARRAY_SIZE(sdp3430_dss_devices),
221         .devices        = sdp3430_dss_devices,
222         .default_device = &sdp3430_lcd_device,
223 };
224
225 static struct omap_board_config_kernel sdp3430_config[] __initdata = {
226 };
227
228 static void __init omap_3430sdp_init_early(void)
229 {
230         omap2_init_common_infrastructure();
231         omap2_init_common_devices(hyb18m512160af6_sdrc_params, NULL);
232 }
233
234 static int sdp3430_batt_table[] = {
235 /* 0 C*/
236 30800, 29500, 28300, 27100,
237 26000, 24900, 23900, 22900, 22000, 21100, 20300, 19400, 18700, 17900,
238 17200, 16500, 15900, 15300, 14700, 14100, 13600, 13100, 12600, 12100,
239 11600, 11200, 10800, 10400, 10000, 9630,   9280,   8950,   8620,   8310,
240 8020,   7730,   7460,   7200,   6950,   6710,   6470,   6250,   6040,   5830,
241 5640,   5450,   5260,   5090,   4920,   4760,   4600,   4450,   4310,   4170,
242 4040,   3910,   3790,   3670,   3550
243 };
244
245 static struct twl4030_bci_platform_data sdp3430_bci_data = {
246         .battery_tmp_tbl        = sdp3430_batt_table,
247         .tblsize                = ARRAY_SIZE(sdp3430_batt_table),
248 };
249
250 static struct omap2_hsmmc_info mmc[] = {
251         {
252                 .mmc            = 1,
253                 /* 8 bits (default) requires S6.3 == ON,
254                  * so the SIM card isn't used; else 4 bits.
255                  */
256                 .caps           = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
257                 .gpio_wp        = 4,
258         },
259         {
260                 .mmc            = 2,
261                 .caps           = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
262                 .gpio_wp        = 7,
263         },
264         {}      /* Terminator */
265 };
266
267 static int sdp3430_twl_gpio_setup(struct device *dev,
268                 unsigned gpio, unsigned ngpio)
269 {
270         /* gpio + 0 is "mmc0_cd" (input/IRQ),
271          * gpio + 1 is "mmc1_cd" (input/IRQ)
272          */
273         mmc[0].gpio_cd = gpio + 0;
274         mmc[1].gpio_cd = gpio + 1;
275         omap2_hsmmc_init(mmc);
276
277         /* gpio + 7 is "sub_lcd_en_bkl" (output/PWM1) */
278         gpio_request_one(gpio + 7, GPIOF_OUT_INIT_LOW, "sub_lcd_en_bkl");
279
280         /* gpio + 15 is "sub_lcd_nRST" (output) */
281         gpio_request_one(gpio + 15, GPIOF_OUT_INIT_LOW, "sub_lcd_nRST");
282
283         return 0;
284 }
285
286 static struct twl4030_gpio_platform_data sdp3430_gpio_data = {
287         .gpio_base      = OMAP_MAX_GPIO_LINES,
288         .irq_base       = TWL4030_GPIO_IRQ_BASE,
289         .irq_end        = TWL4030_GPIO_IRQ_END,
290         .pulldowns      = BIT(2) | BIT(6) | BIT(8) | BIT(13)
291                                 | BIT(16) | BIT(17),
292         .setup          = sdp3430_twl_gpio_setup,
293 };
294
295 static struct twl4030_usb_data sdp3430_usb_data = {
296         .usb_mode       = T2_USB_MODE_ULPI,
297 };
298
299 static struct twl4030_madc_platform_data sdp3430_madc_data = {
300         .irq_line       = 1,
301 };
302
303 /* regulator consumer mappings */
304
305 /* ads7846 on SPI */
306 static struct regulator_consumer_supply sdp3430_vaux3_supplies[] = {
307         REGULATOR_SUPPLY("vcc", "spi1.0"),
308 };
309
310 static struct regulator_consumer_supply sdp3430_vdda_dac_supplies[] = {
311         REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"),
312 };
313
314 /* VPLL2 for digital video outputs */
315 static struct regulator_consumer_supply sdp3430_vpll2_supplies[] = {
316         REGULATOR_SUPPLY("vdds_dsi", "omapdss"),
317         REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"),
318 };
319
320 static struct regulator_consumer_supply sdp3430_vmmc1_supplies[] = {
321         REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
322 };
323
324 static struct regulator_consumer_supply sdp3430_vsim_supplies[] = {
325         REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"),
326 };
327
328 static struct regulator_consumer_supply sdp3430_vmmc2_supplies[] = {
329         REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"),
330 };
331
332 /*
333  * Apply all the fixed voltages since most versions of U-Boot
334  * don't bother with that initialization.
335  */
336
337 /* VAUX1 for mainboard (irda and sub-lcd) */
338 static struct regulator_init_data sdp3430_vaux1 = {
339         .constraints = {
340                 .min_uV                 = 2800000,
341                 .max_uV                 = 2800000,
342                 .apply_uV               = true,
343                 .valid_modes_mask       = REGULATOR_MODE_NORMAL
344                                         | REGULATOR_MODE_STANDBY,
345                 .valid_ops_mask         = REGULATOR_CHANGE_MODE
346                                         | REGULATOR_CHANGE_STATUS,
347         },
348 };
349
350 /* VAUX2 for camera module */
351 static struct regulator_init_data sdp3430_vaux2 = {
352         .constraints = {
353                 .min_uV                 = 2800000,
354                 .max_uV                 = 2800000,
355                 .apply_uV               = true,
356                 .valid_modes_mask       = REGULATOR_MODE_NORMAL
357                                         | REGULATOR_MODE_STANDBY,
358                 .valid_ops_mask         = REGULATOR_CHANGE_MODE
359                                         | REGULATOR_CHANGE_STATUS,
360         },
361 };
362
363 /* VAUX3 for LCD board */
364 static struct regulator_init_data sdp3430_vaux3 = {
365         .constraints = {
366                 .min_uV                 = 2800000,
367                 .max_uV                 = 2800000,
368                 .apply_uV               = true,
369                 .valid_modes_mask       = REGULATOR_MODE_NORMAL
370                                         | REGULATOR_MODE_STANDBY,
371                 .valid_ops_mask         = REGULATOR_CHANGE_MODE
372                                         | REGULATOR_CHANGE_STATUS,
373         },
374         .num_consumer_supplies          = ARRAY_SIZE(sdp3430_vaux3_supplies),
375         .consumer_supplies              = sdp3430_vaux3_supplies,
376 };
377
378 /* VAUX4 for OMAP VDD_CSI2 (camera) */
379 static struct regulator_init_data sdp3430_vaux4 = {
380         .constraints = {
381                 .min_uV                 = 1800000,
382                 .max_uV                 = 1800000,
383                 .apply_uV               = true,
384                 .valid_modes_mask       = REGULATOR_MODE_NORMAL
385                                         | REGULATOR_MODE_STANDBY,
386                 .valid_ops_mask         = REGULATOR_CHANGE_MODE
387                                         | REGULATOR_CHANGE_STATUS,
388         },
389 };
390
391 /* VMMC1 for OMAP VDD_MMC1 (i/o) and MMC1 card */
392 static struct regulator_init_data sdp3430_vmmc1 = {
393         .constraints = {
394                 .min_uV                 = 1850000,
395                 .max_uV                 = 3150000,
396                 .valid_modes_mask       = REGULATOR_MODE_NORMAL
397                                         | REGULATOR_MODE_STANDBY,
398                 .valid_ops_mask         = REGULATOR_CHANGE_VOLTAGE
399                                         | REGULATOR_CHANGE_MODE
400                                         | REGULATOR_CHANGE_STATUS,
401         },
402         .num_consumer_supplies  = ARRAY_SIZE(sdp3430_vmmc1_supplies),
403         .consumer_supplies      = sdp3430_vmmc1_supplies,
404 };
405
406 /* VMMC2 for MMC2 card */
407 static struct regulator_init_data sdp3430_vmmc2 = {
408         .constraints = {
409                 .min_uV                 = 1850000,
410                 .max_uV                 = 1850000,
411                 .apply_uV               = true,
412                 .valid_modes_mask       = REGULATOR_MODE_NORMAL
413                                         | REGULATOR_MODE_STANDBY,
414                 .valid_ops_mask         = REGULATOR_CHANGE_MODE
415                                         | REGULATOR_CHANGE_STATUS,
416         },
417         .num_consumer_supplies  = ARRAY_SIZE(sdp3430_vmmc2_supplies),
418         .consumer_supplies      = sdp3430_vmmc2_supplies,
419 };
420
421 /* VSIM for OMAP VDD_MMC1A (i/o for DAT4..DAT7) */
422 static struct regulator_init_data sdp3430_vsim = {
423         .constraints = {
424                 .min_uV                 = 1800000,
425                 .max_uV                 = 3000000,
426                 .valid_modes_mask       = REGULATOR_MODE_NORMAL
427                                         | REGULATOR_MODE_STANDBY,
428                 .valid_ops_mask         = REGULATOR_CHANGE_VOLTAGE
429                                         | REGULATOR_CHANGE_MODE
430                                         | REGULATOR_CHANGE_STATUS,
431         },
432         .num_consumer_supplies  = ARRAY_SIZE(sdp3430_vsim_supplies),
433         .consumer_supplies      = sdp3430_vsim_supplies,
434 };
435
436 /* VDAC for DSS driving S-Video */
437 static struct regulator_init_data sdp3430_vdac = {
438         .constraints = {
439                 .min_uV                 = 1800000,
440                 .max_uV                 = 1800000,
441                 .apply_uV               = true,
442                 .valid_modes_mask       = REGULATOR_MODE_NORMAL
443                                         | REGULATOR_MODE_STANDBY,
444                 .valid_ops_mask         = REGULATOR_CHANGE_MODE
445                                         | REGULATOR_CHANGE_STATUS,
446         },
447         .num_consumer_supplies  = ARRAY_SIZE(sdp3430_vdda_dac_supplies),
448         .consumer_supplies      = sdp3430_vdda_dac_supplies,
449 };
450
451 static struct regulator_init_data sdp3430_vpll2 = {
452         .constraints = {
453                 .name                   = "VDVI",
454                 .min_uV                 = 1800000,
455                 .max_uV                 = 1800000,
456                 .apply_uV               = true,
457                 .valid_modes_mask       = REGULATOR_MODE_NORMAL
458                                         | REGULATOR_MODE_STANDBY,
459                 .valid_ops_mask         = REGULATOR_CHANGE_MODE
460                                         | REGULATOR_CHANGE_STATUS,
461         },
462         .num_consumer_supplies  = ARRAY_SIZE(sdp3430_vpll2_supplies),
463         .consumer_supplies      = sdp3430_vpll2_supplies,
464 };
465
466 static struct twl4030_codec_audio_data sdp3430_audio;
467
468 static struct twl4030_codec_data sdp3430_codec = {
469         .audio_mclk = 26000000,
470         .audio = &sdp3430_audio,
471 };
472
473 static struct twl4030_platform_data sdp3430_twldata = {
474         .irq_base       = TWL4030_IRQ_BASE,
475         .irq_end        = TWL4030_IRQ_END,
476
477         /* platform_data for children goes here */
478         .bci            = &sdp3430_bci_data,
479         .gpio           = &sdp3430_gpio_data,
480         .madc           = &sdp3430_madc_data,
481         .keypad         = &sdp3430_kp_data,
482         .usb            = &sdp3430_usb_data,
483         .codec          = &sdp3430_codec,
484
485         .vaux1          = &sdp3430_vaux1,
486         .vaux2          = &sdp3430_vaux2,
487         .vaux3          = &sdp3430_vaux3,
488         .vaux4          = &sdp3430_vaux4,
489         .vmmc1          = &sdp3430_vmmc1,
490         .vmmc2          = &sdp3430_vmmc2,
491         .vsim           = &sdp3430_vsim,
492         .vdac           = &sdp3430_vdac,
493         .vpll2          = &sdp3430_vpll2,
494 };
495
496 static int __init omap3430_i2c_init(void)
497 {
498         /* i2c1 for PMIC only */
499         omap3_pmic_init("twl4030", &sdp3430_twldata);
500         /* i2c2 on camera connector (for sensor control) and optional isp1301 */
501         omap_register_i2c_bus(2, 400, NULL, 0);
502         /* i2c3 on display connector (for DVI, tfp410) */
503         omap_register_i2c_bus(3, 400, NULL, 0);
504         return 0;
505 }
506
507 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
508
509 static struct omap_smc91x_platform_data board_smc91x_data = {
510         .cs             = 3,
511         .flags          = GPMC_MUX_ADD_DATA | GPMC_TIMINGS_SMC91C96 |
512                                 IORESOURCE_IRQ_LOWLEVEL,
513 };
514
515 static void __init board_smc91x_init(void)
516 {
517         if (omap_rev() > OMAP3430_REV_ES1_0)
518                 board_smc91x_data.gpio_irq = 6;
519         else
520                 board_smc91x_data.gpio_irq = 29;
521
522         gpmc_smc91x_init(&board_smc91x_data);
523 }
524
525 #else
526
527 static inline void board_smc91x_init(void)
528 {
529 }
530
531 #endif
532
533 static void enable_board_wakeup_source(void)
534 {
535         /* T2 interrupt line (keypad) */
536         omap_mux_init_signal("sys_nirq",
537                 OMAP_WAKEUP_EN | OMAP_PIN_INPUT_PULLUP);
538 }
539
540 static const struct usbhs_omap_board_data usbhs_bdata __initconst = {
541
542         .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
543         .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
544         .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
545
546         .phy_reset  = true,
547         .reset_gpio_port[0]  = 57,
548         .reset_gpio_port[1]  = 61,
549         .reset_gpio_port[2]  = -EINVAL
550 };
551
552 #ifdef CONFIG_OMAP_MUX
553 static struct omap_board_mux board_mux[] __initdata = {
554         { .reg_offset = OMAP_MUX_TERMINATOR },
555 };
556
557 static struct omap_device_pad serial1_pads[] __initdata = {
558         /*
559          * Note that off output enable is an active low
560          * signal. So setting this means pin is a
561          * input enabled in off mode
562          */
563         OMAP_MUX_STATIC("uart1_cts.uart1_cts",
564                          OMAP_PIN_INPUT |
565                          OMAP_PIN_OFF_INPUT_PULLDOWN |
566                          OMAP_OFFOUT_EN |
567                          OMAP_MUX_MODE0),
568         OMAP_MUX_STATIC("uart1_rts.uart1_rts",
569                          OMAP_PIN_OUTPUT |
570                          OMAP_OFF_EN |
571                          OMAP_MUX_MODE0),
572         OMAP_MUX_STATIC("uart1_rx.uart1_rx",
573                          OMAP_PIN_INPUT |
574                          OMAP_PIN_OFF_INPUT_PULLDOWN |
575                          OMAP_OFFOUT_EN |
576                          OMAP_MUX_MODE0),
577         OMAP_MUX_STATIC("uart1_tx.uart1_tx",
578                          OMAP_PIN_OUTPUT |
579                          OMAP_OFF_EN |
580                          OMAP_MUX_MODE0),
581 };
582
583 static struct omap_device_pad serial2_pads[] __initdata = {
584         OMAP_MUX_STATIC("uart2_cts.uart2_cts",
585                          OMAP_PIN_INPUT_PULLUP |
586                          OMAP_PIN_OFF_INPUT_PULLDOWN |
587                          OMAP_OFFOUT_EN |
588                          OMAP_MUX_MODE0),
589         OMAP_MUX_STATIC("uart2_rts.uart2_rts",
590                          OMAP_PIN_OUTPUT |
591                          OMAP_OFF_EN |
592                          OMAP_MUX_MODE0),
593         OMAP_MUX_STATIC("uart2_rx.uart2_rx",
594                          OMAP_PIN_INPUT |
595                          OMAP_PIN_OFF_INPUT_PULLDOWN |
596                          OMAP_OFFOUT_EN |
597                          OMAP_MUX_MODE0),
598         OMAP_MUX_STATIC("uart2_tx.uart2_tx",
599                          OMAP_PIN_OUTPUT |
600                          OMAP_OFF_EN |
601                          OMAP_MUX_MODE0),
602 };
603
604 static struct omap_device_pad serial3_pads[] __initdata = {
605         OMAP_MUX_STATIC("uart3_cts_rctx.uart3_cts_rctx",
606                          OMAP_PIN_INPUT_PULLDOWN |
607                          OMAP_PIN_OFF_INPUT_PULLDOWN |
608                          OMAP_OFFOUT_EN |
609                          OMAP_MUX_MODE0),
610         OMAP_MUX_STATIC("uart3_rts_sd.uart3_rts_sd",
611                          OMAP_PIN_OUTPUT |
612                          OMAP_OFF_EN |
613                          OMAP_MUX_MODE0),
614         OMAP_MUX_STATIC("uart3_rx_irrx.uart3_rx_irrx",
615                          OMAP_PIN_INPUT |
616                          OMAP_PIN_OFF_INPUT_PULLDOWN |
617                          OMAP_OFFOUT_EN |
618                          OMAP_MUX_MODE0),
619         OMAP_MUX_STATIC("uart3_tx_irtx.uart3_tx_irtx",
620                          OMAP_PIN_OUTPUT |
621                          OMAP_OFF_EN |
622                          OMAP_MUX_MODE0),
623 };
624
625 static struct omap_board_data serial1_data __initdata = {
626         .id             = 0,
627         .pads           = serial1_pads,
628         .pads_cnt       = ARRAY_SIZE(serial1_pads),
629 };
630
631 static struct omap_board_data serial2_data __initdata = {
632         .id             = 1,
633         .pads           = serial2_pads,
634         .pads_cnt       = ARRAY_SIZE(serial2_pads),
635 };
636
637 static struct omap_board_data serial3_data __initdata = {
638         .id             = 2,
639         .pads           = serial3_pads,
640         .pads_cnt       = ARRAY_SIZE(serial3_pads),
641 };
642
643 static inline void board_serial_init(void)
644 {
645         omap_serial_init_port(&serial1_data);
646         omap_serial_init_port(&serial2_data);
647         omap_serial_init_port(&serial3_data);
648 }
649 #else
650 #define board_mux       NULL
651
652 static inline void board_serial_init(void)
653 {
654         omap_serial_init();
655 }
656 #endif
657
658 /*
659  * SDP3430 V2 Board CS organization
660  * Different from SDP3430 V1. Now 4 switches used to specify CS
661  *
662  * See also the Switch S8 settings in the comments.
663  */
664 static char chip_sel_3430[][GPMC_CS_NUM] = {
665         {PDC_NOR, PDC_NAND, PDC_ONENAND, DBG_MPDB, 0, 0, 0, 0}, /* S8:1111 */
666         {PDC_ONENAND, PDC_NAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1110 */
667         {PDC_NAND, PDC_ONENAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1101 */
668 };
669
670 static struct mtd_partition sdp_nor_partitions[] = {
671         /* bootloader (U-Boot, etc) in first sector */
672         {
673                 .name           = "Bootloader-NOR",
674                 .offset         = 0,
675                 .size           = SZ_256K,
676                 .mask_flags     = MTD_WRITEABLE, /* force read-only */
677         },
678         /* bootloader params in the next sector */
679         {
680                 .name           = "Params-NOR",
681                 .offset         = MTDPART_OFS_APPEND,
682                 .size           = SZ_256K,
683                 .mask_flags     = 0,
684         },
685         /* kernel */
686         {
687                 .name           = "Kernel-NOR",
688                 .offset         = MTDPART_OFS_APPEND,
689                 .size           = SZ_2M,
690                 .mask_flags     = 0
691         },
692         /* file system */
693         {
694                 .name           = "Filesystem-NOR",
695                 .offset         = MTDPART_OFS_APPEND,
696                 .size           = MTDPART_SIZ_FULL,
697                 .mask_flags     = 0
698         }
699 };
700
701 static struct mtd_partition sdp_onenand_partitions[] = {
702         {
703                 .name           = "X-Loader-OneNAND",
704                 .offset         = 0,
705                 .size           = 4 * (64 * 2048),
706                 .mask_flags     = MTD_WRITEABLE  /* force read-only */
707         },
708         {
709                 .name           = "U-Boot-OneNAND",
710                 .offset         = MTDPART_OFS_APPEND,
711                 .size           = 2 * (64 * 2048),
712                 .mask_flags     = MTD_WRITEABLE  /* force read-only */
713         },
714         {
715                 .name           = "U-Boot Environment-OneNAND",
716                 .offset         = MTDPART_OFS_APPEND,
717                 .size           = 1 * (64 * 2048),
718         },
719         {
720                 .name           = "Kernel-OneNAND",
721                 .offset         = MTDPART_OFS_APPEND,
722                 .size           = 16 * (64 * 2048),
723         },
724         {
725                 .name           = "File System-OneNAND",
726                 .offset         = MTDPART_OFS_APPEND,
727                 .size           = MTDPART_SIZ_FULL,
728         },
729 };
730
731 static struct mtd_partition sdp_nand_partitions[] = {
732         /* All the partition sizes are listed in terms of NAND block size */
733         {
734                 .name           = "X-Loader-NAND",
735                 .offset         = 0,
736                 .size           = 4 * (64 * 2048),
737                 .mask_flags     = MTD_WRITEABLE,        /* force read-only */
738         },
739         {
740                 .name           = "U-Boot-NAND",
741                 .offset         = MTDPART_OFS_APPEND,   /* Offset = 0x80000 */
742                 .size           = 10 * (64 * 2048),
743                 .mask_flags     = MTD_WRITEABLE,        /* force read-only */
744         },
745         {
746                 .name           = "Boot Env-NAND",
747
748                 .offset         = MTDPART_OFS_APPEND,   /* Offset = 0x1c0000 */
749                 .size           = 6 * (64 * 2048),
750         },
751         {
752                 .name           = "Kernel-NAND",
753                 .offset         = MTDPART_OFS_APPEND,   /* Offset = 0x280000 */
754                 .size           = 40 * (64 * 2048),
755         },
756         {
757                 .name           = "File System - NAND",
758                 .size           = MTDPART_SIZ_FULL,
759                 .offset         = MTDPART_OFS_APPEND,   /* Offset = 0x780000 */
760         },
761 };
762
763 static struct flash_partitions sdp_flash_partitions[] = {
764         {
765                 .parts = sdp_nor_partitions,
766                 .nr_parts = ARRAY_SIZE(sdp_nor_partitions),
767         },
768         {
769                 .parts = sdp_onenand_partitions,
770                 .nr_parts = ARRAY_SIZE(sdp_onenand_partitions),
771         },
772         {
773                 .parts = sdp_nand_partitions,
774                 .nr_parts = ARRAY_SIZE(sdp_nand_partitions),
775         },
776 };
777
778 static void __init omap_3430sdp_init(void)
779 {
780         int gpio_pendown;
781
782         omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
783         omap_board_config = sdp3430_config;
784         omap_board_config_size = ARRAY_SIZE(sdp3430_config);
785         omap3430_i2c_init();
786         omap_display_init(&sdp3430_dss_data);
787         if (omap_rev() > OMAP3430_REV_ES1_0)
788                 gpio_pendown = SDP3430_TS_GPIO_IRQ_SDPV2;
789         else
790                 gpio_pendown = SDP3430_TS_GPIO_IRQ_SDPV1;
791         omap_ads7846_init(1, gpio_pendown, 310, NULL);
792         board_serial_init();
793         usb_musb_init(NULL);
794         board_smc91x_init();
795         board_flash_init(sdp_flash_partitions, chip_sel_3430, 0);
796         sdp3430_display_init();
797         enable_board_wakeup_source();
798         usbhs_init(&usbhs_bdata);
799 }
800
801 MACHINE_START(OMAP_3430SDP, "OMAP3430 3430SDP board")
802         /* Maintainer: Syed Khasim - Texas Instruments Inc */
803         .boot_params    = 0x80000100,
804         .reserve        = omap_reserve,
805         .map_io         = omap3_map_io,
806         .init_early     = omap_3430sdp_init_early,
807         .init_irq       = omap3_init_irq,
808         .init_machine   = omap_3430sdp_init,
809         .timer          = &omap_timer,
810 MACHINE_END