]> nv-tegra.nvidia Code Review - linux-3.10.git/blob - arch/arm/mach-netx/nxdb500.c
Merge branch 'restart' into for-linus
[linux-3.10.git] / arch / arm / mach-netx / nxdb500.c
1 /*
2  * arch/arm/mach-netx/nxdb500.c
3  *
4  * Copyright (c) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2
8  * as published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope that it will be useful,
11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13  * GNU General Public License for more details.
14  *
15  * You should have received a copy of the GNU General Public License
16  * along with this program; if not, write to the Free Software
17  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
18  */
19
20 #include <linux/dma-mapping.h>
21 #include <linux/init.h>
22 #include <linux/interrupt.h>
23 #include <linux/mtd/plat-ram.h>
24 #include <linux/platform_device.h>
25 #include <linux/amba/bus.h>
26 #include <linux/amba/clcd.h>
27
28 #include <mach/hardware.h>
29 #include <asm/mach-types.h>
30 #include <asm/mach/arch.h>
31 #include <asm/hardware/vic.h>
32 #include <mach/netx-regs.h>
33 #include <mach/eth.h>
34
35 #include "generic.h"
36 #include "fb.h"
37
38 static struct clcd_panel qvga = {
39         .mode           = {
40                 .name           = "QVGA",
41                 .refresh        = 60,
42                 .xres           = 240,
43                 .yres           = 320,
44                 .pixclock       = 187617,
45                 .left_margin    = 6,
46                 .right_margin   = 26,
47                 .upper_margin   = 0,
48                 .lower_margin   = 6,
49                 .hsync_len      = 6,
50                 .vsync_len      = 1,
51                 .sync           = 0,
52                 .vmode          = FB_VMODE_NONINTERLACED,
53         },
54         .width          = -1,
55         .height         = -1,
56         .tim2           =  16,
57         .cntl           = CNTL_LCDTFT | CNTL_BGR,
58         .bpp            = 16,
59         .grayscale      = 0,
60 };
61
62 static inline int nxdb500_check(struct clcd_fb *fb, struct fb_var_screeninfo *var)
63 {
64         var->green.length = 5;
65         var->green.msb_right = 0;
66
67         return clcdfb_check(fb, var);
68 }
69
70 static int nxdb500_clcd_setup(struct clcd_fb *fb)
71 {
72         unsigned int val;
73
74         fb->fb.var.green.length = 5;
75         fb->fb.var.green.msb_right = 0;
76
77         /* enable asic control */
78         val = readl(NETX_SYSTEM_IOC_ACCESS_KEY);
79         writel(val, NETX_SYSTEM_IOC_ACCESS_KEY);
80
81         writel(3, NETX_SYSTEM_IOC_CR);
82
83         val = readl(NETX_PIO_OUTPIO);
84         writel(val | 1, NETX_PIO_OUTPIO);
85
86         val = readl(NETX_PIO_OEPIO);
87         writel(val | 1, NETX_PIO_OEPIO);
88         return netx_clcd_setup(fb);
89 }
90
91 static struct clcd_board clcd_data = {
92         .name           = "netX",
93         .check          = nxdb500_check,
94         .decode         = clcdfb_decode,
95         .enable         = netx_clcd_enable,
96         .setup          = nxdb500_clcd_setup,
97         .mmap           = netx_clcd_mmap,
98         .remove         = netx_clcd_remove,
99 };
100
101 static struct netxeth_platform_data eth0_platform_data = {
102         .xcno = 0,
103 };
104
105 static struct platform_device netx_eth0_device = {
106         .name           = "netx-eth",
107         .id             = 0,
108         .num_resources  = 0,
109         .resource       = NULL,
110         .dev = {
111                 .platform_data = &eth0_platform_data,
112         }
113 };
114
115 static struct netxeth_platform_data eth1_platform_data = {
116         .xcno = 1,
117 };
118
119 static struct platform_device netx_eth1_device = {
120         .name           = "netx-eth",
121         .id             = 1,
122         .num_resources  = 0,
123         .resource       = NULL,
124         .dev = {
125                 .platform_data = &eth1_platform_data,
126         }
127 };
128
129 static struct resource netx_uart0_resources[] = {
130         [0] = {
131                 .start  = 0x00100A00,
132                 .end    = 0x00100A3F,
133                 .flags  = IORESOURCE_MEM,
134         },
135         [1] = {
136                 .start  = (NETX_IRQ_UART0),
137                 .end    = (NETX_IRQ_UART0),
138                 .flags  = IORESOURCE_IRQ,
139         },
140 };
141
142 static struct platform_device netx_uart0_device = {
143         .name           = "netx-uart",
144         .id             = 0,
145         .num_resources  = ARRAY_SIZE(netx_uart0_resources),
146         .resource       = netx_uart0_resources,
147 };
148
149 static struct resource netx_uart1_resources[] = {
150         [0] = {
151                 .start  = 0x00100A40,
152                 .end    = 0x00100A7F,
153                 .flags  = IORESOURCE_MEM,
154         },
155         [1] = {
156                 .start  = (NETX_IRQ_UART1),
157                 .end    = (NETX_IRQ_UART1),
158                 .flags  = IORESOURCE_IRQ,
159         },
160 };
161
162 static struct platform_device netx_uart1_device = {
163         .name           = "netx-uart",
164         .id             = 1,
165         .num_resources  = ARRAY_SIZE(netx_uart1_resources),
166         .resource       = netx_uart1_resources,
167 };
168
169 static struct resource netx_uart2_resources[] = {
170         [0] = {
171                 .start  = 0x00100A80,
172                 .end    = 0x00100ABF,
173                 .flags  = IORESOURCE_MEM,
174         },
175         [1] = {
176                 .start  = (NETX_IRQ_UART2),
177                 .end    = (NETX_IRQ_UART2),
178                 .flags  = IORESOURCE_IRQ,
179         },
180 };
181
182 static struct platform_device netx_uart2_device = {
183         .name           = "netx-uart",
184         .id             = 2,
185         .num_resources  = ARRAY_SIZE(netx_uart2_resources),
186         .resource       = netx_uart2_resources,
187 };
188
189 static struct platform_device *devices[] __initdata = {
190         &netx_eth0_device,
191         &netx_eth1_device,
192         &netx_uart0_device,
193         &netx_uart1_device,
194         &netx_uart2_device,
195 };
196
197 static void __init nxdb500_init(void)
198 {
199         netx_fb_init(&clcd_data, &qvga);
200         platform_add_devices(devices, ARRAY_SIZE(devices));
201 }
202
203 MACHINE_START(NXDB500, "Hilscher nxdb500")
204         .atag_offset    = 0x100,
205         .map_io         = netx_map_io,
206         .init_irq       = netx_init_irq,
207         .handle_irq     = vic_handle_irq,
208         .timer          = &netx_timer,
209         .init_machine   = nxdb500_init,
210         .restart        = netx_restart,
211 MACHINE_END