[ARM] add Marvell Kirkwood (88F6000) SoC support
[linux-3.10.git] / arch / arm / mach-kirkwood / addr-map.c
1 /*
2  * arch/arm/mach-kirkwood/addr-map.c
3  *
4  * Address map functions for Marvell Kirkwood SoCs
5  *
6  * This file is licensed under the terms of the GNU General Public
7  * License version 2.  This program is licensed "as is" without any
8  * warranty of any kind, whether express or implied.
9  */
10
11 #include <linux/kernel.h>
12 #include <linux/init.h>
13 #include <linux/mbus.h>
14 #include <linux/io.h>
15 #include <asm/hardware.h>
16 #include "common.h"
17
18 /*
19  * Generic Address Decode Windows bit settings
20  */
21 #define TARGET_DDR              0
22 #define TARGET_DEV_BUS          1
23 #define TARGET_PCIE             4
24 #define ATTR_DEV_SPI_ROM        0x1e
25 #define ATTR_DEV_BOOT           0x1d
26 #define ATTR_DEV_NAND           0x2f
27 #define ATTR_DEV_CS3            0x37
28 #define ATTR_DEV_CS2            0x3b
29 #define ATTR_DEV_CS1            0x3d
30 #define ATTR_DEV_CS0            0x3e
31 #define ATTR_PCIE_IO            0xe0
32 #define ATTR_PCIE_MEM           0xe8
33
34 /*
35  * Helpers to get DDR bank info
36  */
37 #define DDR_BASE_CS_OFF(n)      (0x0000 + ((n) << 3))
38 #define DDR_SIZE_CS_OFF(n)      (0x0004 + ((n) << 3))
39
40 /*
41  * CPU Address Decode Windows registers
42  */
43 #define WIN_OFF(n)              (BRIDGE_VIRT_BASE + 0x0000 + ((n) << 4))
44 #define WIN_CTRL_OFF            0x0000
45 #define WIN_BASE_OFF            0x0004
46 #define WIN_REMAP_LO_OFF        0x0008
47 #define WIN_REMAP_HI_OFF        0x000c
48
49
50 struct mbus_dram_target_info kirkwood_mbus_dram_info;
51
52 static int __init cpu_win_can_remap(int win)
53 {
54         if (win < 4)
55                 return 1;
56
57         return 0;
58 }
59
60 static void __init setup_cpu_win(int win, u32 base, u32 size,
61                                  u8 target, u8 attr, int remap)
62 {
63         void __iomem *addr = (void __iomem *)WIN_OFF(win);
64         u32 ctrl;
65
66         base &= 0xffff0000;
67         ctrl = ((size - 1) & 0xffff0000) | (attr << 8) | (target << 4) | 1;
68
69         writel(base, addr + WIN_BASE_OFF);
70         writel(ctrl, addr + WIN_CTRL_OFF);
71         if (cpu_win_can_remap(win)) {
72                 if (remap < 0)
73                         remap = base;
74
75                 writel(remap & 0xffff0000, addr + WIN_REMAP_LO_OFF);
76                 writel(0, addr + WIN_REMAP_HI_OFF);
77         }
78 }
79
80 void __init kirkwood_setup_cpu_mbus(void)
81 {
82         void __iomem *addr;
83         int i;
84         int cs;
85
86         /*
87          * First, disable and clear windows.
88          */
89         for (i = 0; i < 8; i++) {
90                 addr = (void __iomem *)WIN_OFF(i);
91
92                 writel(0, addr + WIN_BASE_OFF);
93                 writel(0, addr + WIN_CTRL_OFF);
94                 if (cpu_win_can_remap(i)) {
95                         writel(0, addr + WIN_REMAP_LO_OFF);
96                         writel(0, addr + WIN_REMAP_HI_OFF);
97                 }
98         }
99
100         /*
101          * Setup windows for PCIe IO+MEM space.
102          */
103         setup_cpu_win(0, KIRKWOOD_PCIE_IO_PHYS_BASE, KIRKWOOD_PCIE_IO_SIZE,
104                       TARGET_PCIE, ATTR_PCIE_IO, KIRKWOOD_PCIE_IO_BUS_BASE);
105         setup_cpu_win(1, KIRKWOOD_PCIE_MEM_PHYS_BASE, KIRKWOOD_PCIE_MEM_SIZE,
106                       TARGET_PCIE, ATTR_PCIE_MEM, -1);
107
108         /*
109          * Setup window for NAND controller.
110          */
111         setup_cpu_win(2, KIRKWOOD_NAND_MEM_PHYS_BASE, KIRKWOOD_NAND_MEM_SIZE,
112                       TARGET_DEV_BUS, ATTR_DEV_NAND, -1);
113
114         /*
115          * Setup MBUS dram target info.
116          */
117         kirkwood_mbus_dram_info.mbus_dram_target_id = TARGET_DDR;
118
119         addr = (void __iomem *)DDR_WINDOW_CPU_BASE;
120
121         for (i = 0, cs = 0; i < 4; i++) {
122                 u32 base = readl(addr + DDR_BASE_CS_OFF(i));
123                 u32 size = readl(addr + DDR_SIZE_CS_OFF(i));
124
125                 /*
126                  * Chip select enabled?
127                  */
128                 if (size & 1) {
129                         struct mbus_dram_window *w;
130
131                         w = &kirkwood_mbus_dram_info.cs[cs++];
132                         w->cs_index = i;
133                         w->mbus_attr = 0xf & ~(1 << i);
134                         w->base = base & 0xffff0000;
135                         w->size = (size | 0x0000ffff) + 1;
136                 }
137         }
138         kirkwood_mbus_dram_info.num_cs = cs;
139 }