5c147fb66a013f809dbc92a4180fb2e89f6d4f22
[linux-3.10.git] / arch / arm / mach-iop13xx / setup.c
1 /*
2  * iop13xx platform Initialization
3  * Copyright (c) 2005-2006, Intel Corporation.
4  *
5  * This program is free software; you can redistribute it and/or modify it
6  * under the terms and conditions of the GNU General Public License,
7  * version 2, as published by the Free Software Foundation.
8  *
9  * This program is distributed in the hope it will be useful, but WITHOUT
10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
12  * more details.
13  *
14  * You should have received a copy of the GNU General Public License along with
15  * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
16  * Place - Suite 330, Boston, MA 02111-1307 USA.
17  *
18  */
19
20 #include <linux/serial_8250.h>
21 #include <linux/io.h>
22 #ifdef CONFIG_MTD_PHYSMAP
23 #include <linux/mtd/physmap.h>
24 #endif
25 #include <asm/mach/map.h>
26 #include <mach/hardware.h>
27 #include <asm/irq.h>
28 #include <asm/hardware/iop_adma.h>
29
30 #define IOP13XX_UART_XTAL 33334000
31 #define IOP13XX_SETUP_DEBUG 0
32 #define PRINTK(x...) ((void)(IOP13XX_SETUP_DEBUG && printk(x)))
33
34 /* Standard IO mapping for all IOP13XX based systems
35  */
36 static struct map_desc iop13xx_std_desc[] __initdata = {
37         {    /* mem mapped registers */
38                 .virtual = IOP13XX_PMMR_VIRT_MEM_BASE,
39                 .pfn     = __phys_to_pfn(IOP13XX_PMMR_PHYS_MEM_BASE),
40                 .length  = IOP13XX_PMMR_SIZE,
41                 .type    = MT_DEVICE,
42         }, { /* PCIE IO space */
43                 .virtual = IOP13XX_PCIE_LOWER_IO_VA,
44                 .pfn     = __phys_to_pfn(IOP13XX_PCIE_LOWER_IO_PA),
45                 .length  = IOP13XX_PCIX_IO_WINDOW_SIZE,
46                 .type    = MT_DEVICE,
47         }, { /* PCIX IO space */
48                 .virtual = IOP13XX_PCIX_LOWER_IO_VA,
49                 .pfn     = __phys_to_pfn(IOP13XX_PCIX_LOWER_IO_PA),
50                 .length  = IOP13XX_PCIX_IO_WINDOW_SIZE,
51                 .type    = MT_DEVICE,
52         },
53 };
54
55 static struct resource iop13xx_uart0_resources[] = {
56         [0] = {
57                 .start = IOP13XX_UART0_PHYS,
58                 .end = IOP13XX_UART0_PHYS + 0x3f,
59                 .flags = IORESOURCE_MEM,
60         },
61         [1] = {
62                 .start = IRQ_IOP13XX_UART0,
63                 .end = IRQ_IOP13XX_UART0,
64                 .flags = IORESOURCE_IRQ
65         }
66 };
67
68 static struct resource iop13xx_uart1_resources[] = {
69         [0] = {
70                 .start = IOP13XX_UART1_PHYS,
71                 .end = IOP13XX_UART1_PHYS + 0x3f,
72                 .flags = IORESOURCE_MEM,
73         },
74         [1] = {
75                 .start = IRQ_IOP13XX_UART1,
76                 .end = IRQ_IOP13XX_UART1,
77                 .flags = IORESOURCE_IRQ
78         }
79 };
80
81 static struct plat_serial8250_port iop13xx_uart0_data[] = {
82         {
83        .membase     = (char*)(IOP13XX_UART0_VIRT),
84        .mapbase     = (IOP13XX_UART0_PHYS),
85        .irq         = IRQ_IOP13XX_UART0,
86        .uartclk     = IOP13XX_UART_XTAL,
87        .regshift    = 2,
88        .iotype      = UPIO_MEM,
89        .flags       = UPF_SKIP_TEST,
90         },
91         {  },
92 };
93
94 static struct plat_serial8250_port iop13xx_uart1_data[] = {
95         {
96        .membase     = (char*)(IOP13XX_UART1_VIRT),
97        .mapbase     = (IOP13XX_UART1_PHYS),
98        .irq         = IRQ_IOP13XX_UART1,
99        .uartclk     = IOP13XX_UART_XTAL,
100        .regshift    = 2,
101        .iotype      = UPIO_MEM,
102        .flags       = UPF_SKIP_TEST,
103         },
104         {  },
105 };
106
107 /* The ids are fixed up later in iop13xx_platform_init */
108 static struct platform_device iop13xx_uart0 = {
109        .name = "serial8250",
110        .id = 0,
111        .dev.platform_data = iop13xx_uart0_data,
112        .num_resources = 2,
113        .resource = iop13xx_uart0_resources,
114 };
115
116 static struct platform_device iop13xx_uart1 = {
117        .name = "serial8250",
118        .id = 0,
119        .dev.platform_data = iop13xx_uart1_data,
120        .num_resources = 2,
121        .resource = iop13xx_uart1_resources
122 };
123
124 static struct resource iop13xx_i2c_0_resources[] = {
125         [0] = {
126                 .start = IOP13XX_I2C0_PHYS,
127                 .end = IOP13XX_I2C0_PHYS + 0x18,
128                 .flags = IORESOURCE_MEM,
129         },
130         [1] = {
131                 .start = IRQ_IOP13XX_I2C_0,
132                 .end = IRQ_IOP13XX_I2C_0,
133                 .flags = IORESOURCE_IRQ
134         }
135 };
136
137 static struct resource iop13xx_i2c_1_resources[] = {
138         [0] = {
139                 .start = IOP13XX_I2C1_PHYS,
140                 .end = IOP13XX_I2C1_PHYS + 0x18,
141                 .flags = IORESOURCE_MEM,
142         },
143         [1] = {
144                 .start = IRQ_IOP13XX_I2C_1,
145                 .end = IRQ_IOP13XX_I2C_1,
146                 .flags = IORESOURCE_IRQ
147         }
148 };
149
150 static struct resource iop13xx_i2c_2_resources[] = {
151         [0] = {
152                 .start = IOP13XX_I2C2_PHYS,
153                 .end = IOP13XX_I2C2_PHYS + 0x18,
154                 .flags = IORESOURCE_MEM,
155         },
156         [1] = {
157                 .start = IRQ_IOP13XX_I2C_2,
158                 .end = IRQ_IOP13XX_I2C_2,
159                 .flags = IORESOURCE_IRQ
160         }
161 };
162
163 /* I2C controllers. The IOP13XX uses the same block as the IOP3xx, so
164  * we just use the same device name.
165  */
166
167 /* The ids are fixed up later in iop13xx_platform_init */
168 static struct platform_device iop13xx_i2c_0_controller = {
169         .name = "IOP3xx-I2C",
170         .id = 0,
171         .num_resources = 2,
172         .resource = iop13xx_i2c_0_resources
173 };
174
175 static struct platform_device iop13xx_i2c_1_controller = {
176         .name = "IOP3xx-I2C",
177         .id = 0,
178         .num_resources = 2,
179         .resource = iop13xx_i2c_1_resources
180 };
181
182 static struct platform_device iop13xx_i2c_2_controller = {
183         .name = "IOP3xx-I2C",
184         .id = 0,
185         .num_resources = 2,
186         .resource = iop13xx_i2c_2_resources
187 };
188
189 #ifdef CONFIG_MTD_PHYSMAP
190 /* PBI Flash Device
191  */
192 static struct physmap_flash_data iq8134x_flash_data = {
193         .width = 2,
194 };
195
196 static struct resource iq8134x_flash_resource = {
197         .start = IQ81340_FLASHBASE,
198         .end   = 0,
199         .flags = IORESOURCE_MEM,
200 };
201
202 static struct platform_device iq8134x_flash = {
203         .name           = "physmap-flash",
204         .id             = 0,
205         .dev            = { .platform_data  = &iq8134x_flash_data, },
206         .num_resources  = 1,
207         .resource       = &iq8134x_flash_resource,
208 };
209
210 static unsigned long iq8134x_probe_flash_size(void)
211 {
212         uint8_t __iomem *flash_addr = ioremap(IQ81340_FLASHBASE, PAGE_SIZE);
213         int i;
214         char query[3];
215         unsigned long size = 0;
216         int width = iq8134x_flash_data.width;
217
218         if (flash_addr) {
219                 /* send CFI 'query' command */
220                 writew(0x98, flash_addr);
221
222                 /* check for CFI compliance */
223                 for (i = 0; i < 3 * width; i += width)
224                         query[i / width] = readb(flash_addr + (0x10 * width) + i);
225
226                 /* read the size */
227                 if (memcmp(query, "QRY", 3) == 0)
228                         size = 1 << readb(flash_addr + (0x27 * width));
229
230                 /* send CFI 'read array' command */
231                 writew(0xff, flash_addr);
232
233                 iounmap(flash_addr);
234         }
235
236         return size;
237 }
238 #endif
239
240 /* ADMA Channels */
241 static struct resource iop13xx_adma_0_resources[] = {
242         [0] = {
243                 .start = IOP13XX_ADMA_PHYS_BASE(0),
244                 .end = IOP13XX_ADMA_UPPER_PA(0),
245                 .flags = IORESOURCE_MEM,
246         },
247         [1] = {
248                 .start = IRQ_IOP13XX_ADMA0_EOT,
249                 .end = IRQ_IOP13XX_ADMA0_EOT,
250                 .flags = IORESOURCE_IRQ
251         },
252         [2] = {
253                 .start = IRQ_IOP13XX_ADMA0_EOC,
254                 .end = IRQ_IOP13XX_ADMA0_EOC,
255                 .flags = IORESOURCE_IRQ
256         },
257         [3] = {
258                 .start = IRQ_IOP13XX_ADMA0_ERR,
259                 .end = IRQ_IOP13XX_ADMA0_ERR,
260                 .flags = IORESOURCE_IRQ
261         }
262 };
263
264 static struct resource iop13xx_adma_1_resources[] = {
265         [0] = {
266                 .start = IOP13XX_ADMA_PHYS_BASE(1),
267                 .end = IOP13XX_ADMA_UPPER_PA(1),
268                 .flags = IORESOURCE_MEM,
269         },
270         [1] = {
271                 .start = IRQ_IOP13XX_ADMA1_EOT,
272                 .end = IRQ_IOP13XX_ADMA1_EOT,
273                 .flags = IORESOURCE_IRQ
274         },
275         [2] = {
276                 .start = IRQ_IOP13XX_ADMA1_EOC,
277                 .end = IRQ_IOP13XX_ADMA1_EOC,
278                 .flags = IORESOURCE_IRQ
279         },
280         [3] = {
281                 .start = IRQ_IOP13XX_ADMA1_ERR,
282                 .end = IRQ_IOP13XX_ADMA1_ERR,
283                 .flags = IORESOURCE_IRQ
284         }
285 };
286
287 static struct resource iop13xx_adma_2_resources[] = {
288         [0] = {
289                 .start = IOP13XX_ADMA_PHYS_BASE(2),
290                 .end = IOP13XX_ADMA_UPPER_PA(2),
291                 .flags = IORESOURCE_MEM,
292         },
293         [1] = {
294                 .start = IRQ_IOP13XX_ADMA2_EOT,
295                 .end = IRQ_IOP13XX_ADMA2_EOT,
296                 .flags = IORESOURCE_IRQ
297         },
298         [2] = {
299                 .start = IRQ_IOP13XX_ADMA2_EOC,
300                 .end = IRQ_IOP13XX_ADMA2_EOC,
301                 .flags = IORESOURCE_IRQ
302         },
303         [3] = {
304                 .start = IRQ_IOP13XX_ADMA2_ERR,
305                 .end = IRQ_IOP13XX_ADMA2_ERR,
306                 .flags = IORESOURCE_IRQ
307         }
308 };
309
310 static u64 iop13xx_adma_dmamask = DMA_BIT_MASK(64);
311 static struct iop_adma_platform_data iop13xx_adma_0_data = {
312         .hw_id = 0,
313         .pool_size = PAGE_SIZE,
314 };
315
316 static struct iop_adma_platform_data iop13xx_adma_1_data = {
317         .hw_id = 1,
318         .pool_size = PAGE_SIZE,
319 };
320
321 static struct iop_adma_platform_data iop13xx_adma_2_data = {
322         .hw_id = 2,
323         .pool_size = PAGE_SIZE,
324 };
325
326 /* The ids are fixed up later in iop13xx_platform_init */
327 static struct platform_device iop13xx_adma_0_channel = {
328         .name = "iop-adma",
329         .id = 0,
330         .num_resources = 4,
331         .resource = iop13xx_adma_0_resources,
332         .dev = {
333                 .dma_mask = &iop13xx_adma_dmamask,
334                 .coherent_dma_mask = DMA_BIT_MASK(64),
335                 .platform_data = (void *) &iop13xx_adma_0_data,
336         },
337 };
338
339 static struct platform_device iop13xx_adma_1_channel = {
340         .name = "iop-adma",
341         .id = 0,
342         .num_resources = 4,
343         .resource = iop13xx_adma_1_resources,
344         .dev = {
345                 .dma_mask = &iop13xx_adma_dmamask,
346                 .coherent_dma_mask = DMA_BIT_MASK(64),
347                 .platform_data = (void *) &iop13xx_adma_1_data,
348         },
349 };
350
351 static struct platform_device iop13xx_adma_2_channel = {
352         .name = "iop-adma",
353         .id = 0,
354         .num_resources = 4,
355         .resource = iop13xx_adma_2_resources,
356         .dev = {
357                 .dma_mask = &iop13xx_adma_dmamask,
358                 .coherent_dma_mask = DMA_BIT_MASK(64),
359                 .platform_data = (void *) &iop13xx_adma_2_data,
360         },
361 };
362
363 void __init iop13xx_map_io(void)
364 {
365         /* Initialize the Static Page Table maps */
366         iotable_init(iop13xx_std_desc, ARRAY_SIZE(iop13xx_std_desc));
367 }
368
369 static int init_uart;
370 static int init_i2c;
371 static int init_adma;
372
373 void __init iop13xx_platform_init(void)
374 {
375         int i;
376         u32 uart_idx, i2c_idx, adma_idx, plat_idx;
377         struct platform_device *iop13xx_devices[IQ81340_MAX_PLAT_DEVICES];
378
379         /* set the bases so we can read the device id */
380         iop13xx_set_atu_mmr_bases();
381
382         memset(iop13xx_devices, 0, sizeof(iop13xx_devices));
383
384         if (init_uart == IOP13XX_INIT_UART_DEFAULT) {
385                 switch (iop13xx_dev_id()) {
386                 /* enable both uarts on iop341 */
387                 case 0x3380:
388                 case 0x3384:
389                 case 0x3388:
390                 case 0x338c:
391                         init_uart |= IOP13XX_INIT_UART_0;
392                         init_uart |= IOP13XX_INIT_UART_1;
393                         break;
394                 /* only enable uart 1 */
395                 default:
396                         init_uart |= IOP13XX_INIT_UART_1;
397                 }
398         }
399
400         if (init_i2c == IOP13XX_INIT_I2C_DEFAULT) {
401                 switch (iop13xx_dev_id()) {
402                 /* enable all i2c units on iop341 and iop342 */
403                 case 0x3380:
404                 case 0x3384:
405                 case 0x3388:
406                 case 0x338c:
407                 case 0x3382:
408                 case 0x3386:
409                 case 0x338a:
410                 case 0x338e:
411                         init_i2c |= IOP13XX_INIT_I2C_0;
412                         init_i2c |= IOP13XX_INIT_I2C_1;
413                         init_i2c |= IOP13XX_INIT_I2C_2;
414                         break;
415                 /* only enable i2c 1 and 2 */
416                 default:
417                         init_i2c |= IOP13XX_INIT_I2C_1;
418                         init_i2c |= IOP13XX_INIT_I2C_2;
419                 }
420         }
421
422         if (init_adma == IOP13XX_INIT_ADMA_DEFAULT) {
423                 init_adma |= IOP13XX_INIT_ADMA_0;
424                 init_adma |= IOP13XX_INIT_ADMA_1;
425                 init_adma |= IOP13XX_INIT_ADMA_2;
426         }
427
428         plat_idx = 0;
429         uart_idx = 0;
430         i2c_idx = 0;
431
432         /* uart 1 (if enabled) is ttyS0 */
433         if (init_uart & IOP13XX_INIT_UART_1) {
434                 PRINTK("Adding uart1 to platform device list\n");
435                 iop13xx_uart1.id = uart_idx++;
436                 iop13xx_devices[plat_idx++] = &iop13xx_uart1;
437         }
438         if (init_uart & IOP13XX_INIT_UART_0) {
439                 PRINTK("Adding uart0 to platform device list\n");
440                 iop13xx_uart0.id = uart_idx++;
441                 iop13xx_devices[plat_idx++] = &iop13xx_uart0;
442         }
443
444         for(i = 0; i < IQ81340_NUM_I2C; i++) {
445                 if ((init_i2c & (1 << i)) && IOP13XX_SETUP_DEBUG)
446                         printk("Adding i2c%d to platform device list\n", i);
447                 switch(init_i2c & (1 << i)) {
448                 case IOP13XX_INIT_I2C_0:
449                         iop13xx_i2c_0_controller.id = i2c_idx++;
450                         iop13xx_devices[plat_idx++] =
451                                 &iop13xx_i2c_0_controller;
452                         break;
453                 case IOP13XX_INIT_I2C_1:
454                         iop13xx_i2c_1_controller.id = i2c_idx++;
455                         iop13xx_devices[plat_idx++] =
456                                 &iop13xx_i2c_1_controller;
457                         break;
458                 case IOP13XX_INIT_I2C_2:
459                         iop13xx_i2c_2_controller.id = i2c_idx++;
460                         iop13xx_devices[plat_idx++] =
461                                 &iop13xx_i2c_2_controller;
462                         break;
463                 }
464         }
465
466         /* initialize adma channel ids and capabilities */
467         adma_idx = 0;
468         for (i = 0; i < IQ81340_NUM_ADMA; i++) {
469                 struct iop_adma_platform_data *plat_data;
470                 if ((init_adma & (1 << i)) && IOP13XX_SETUP_DEBUG)
471                         printk(KERN_INFO
472                                 "Adding adma%d to platform device list\n", i);
473                 switch (init_adma & (1 << i)) {
474                 case IOP13XX_INIT_ADMA_0:
475                         iop13xx_adma_0_channel.id = adma_idx++;
476                         iop13xx_devices[plat_idx++] = &iop13xx_adma_0_channel;
477                         plat_data = &iop13xx_adma_0_data;
478                         dma_cap_set(DMA_MEMCPY, plat_data->cap_mask);
479                         dma_cap_set(DMA_XOR, plat_data->cap_mask);
480                         dma_cap_set(DMA_XOR_VAL, plat_data->cap_mask);
481                         dma_cap_set(DMA_MEMSET, plat_data->cap_mask);
482                         dma_cap_set(DMA_INTERRUPT, plat_data->cap_mask);
483                         break;
484                 case IOP13XX_INIT_ADMA_1:
485                         iop13xx_adma_1_channel.id = adma_idx++;
486                         iop13xx_devices[plat_idx++] = &iop13xx_adma_1_channel;
487                         plat_data = &iop13xx_adma_1_data;
488                         dma_cap_set(DMA_MEMCPY, plat_data->cap_mask);
489                         dma_cap_set(DMA_XOR, plat_data->cap_mask);
490                         dma_cap_set(DMA_XOR_VAL, plat_data->cap_mask);
491                         dma_cap_set(DMA_MEMSET, plat_data->cap_mask);
492                         dma_cap_set(DMA_INTERRUPT, plat_data->cap_mask);
493                         break;
494                 case IOP13XX_INIT_ADMA_2:
495                         iop13xx_adma_2_channel.id = adma_idx++;
496                         iop13xx_devices[plat_idx++] = &iop13xx_adma_2_channel;
497                         plat_data = &iop13xx_adma_2_data;
498                         dma_cap_set(DMA_MEMCPY, plat_data->cap_mask);
499                         dma_cap_set(DMA_XOR, plat_data->cap_mask);
500                         dma_cap_set(DMA_XOR_VAL, plat_data->cap_mask);
501                         dma_cap_set(DMA_MEMSET, plat_data->cap_mask);
502                         dma_cap_set(DMA_INTERRUPT, plat_data->cap_mask);
503                         dma_cap_set(DMA_PQ, plat_data->cap_mask);
504                         dma_cap_set(DMA_PQ_VAL, plat_data->cap_mask);
505                         break;
506                 }
507         }
508
509 #ifdef CONFIG_MTD_PHYSMAP
510         iq8134x_flash_resource.end = iq8134x_flash_resource.start +
511                                 iq8134x_probe_flash_size() - 1;
512         if (iq8134x_flash_resource.end > iq8134x_flash_resource.start)
513                 iop13xx_devices[plat_idx++] = &iq8134x_flash;
514         else
515                 printk(KERN_ERR "%s: Failed to probe flash size\n", __func__);
516 #endif
517
518         platform_add_devices(iop13xx_devices, plat_idx);
519 }
520
521 static int __init iop13xx_init_uart_setup(char *str)
522 {
523         if (str) {
524                 while (*str != '\0') {
525                         switch(*str) {
526                         case '0':
527                                 init_uart |= IOP13XX_INIT_UART_0;
528                                 break;
529                         case '1':
530                                 init_uart |= IOP13XX_INIT_UART_1;
531                                 break;
532                         case ',':
533                         case '=':
534                                 break;
535                         default:
536                                 PRINTK("\"iop13xx_init_uart\" malformed"
537                                             " at character: \'%c\'", *str);
538                                 *(str + 1) = '\0';
539                                 init_uart = IOP13XX_INIT_UART_DEFAULT;
540                         }
541                         str++;
542                 }
543         }
544         return 1;
545 }
546
547 static int __init iop13xx_init_i2c_setup(char *str)
548 {
549         if (str) {
550                 while (*str != '\0') {
551                         switch(*str) {
552                         case '0':
553                                 init_i2c |= IOP13XX_INIT_I2C_0;
554                                 break;
555                         case '1':
556                                 init_i2c |= IOP13XX_INIT_I2C_1;
557                                 break;
558                         case '2':
559                                 init_i2c |= IOP13XX_INIT_I2C_2;
560                                 break;
561                         case ',':
562                         case '=':
563                                 break;
564                         default:
565                                 PRINTK("\"iop13xx_init_i2c\" malformed"
566                                             " at character: \'%c\'", *str);
567                                 *(str + 1) = '\0';
568                                 init_i2c = IOP13XX_INIT_I2C_DEFAULT;
569                         }
570                         str++;
571                 }
572         }
573         return 1;
574 }
575
576 static int __init iop13xx_init_adma_setup(char *str)
577 {
578         if (str)        {
579                 while (*str != '\0') {
580                         switch (*str) {
581                         case '0':
582                                 init_adma |= IOP13XX_INIT_ADMA_0;
583                                 break;
584                         case '1':
585                                 init_adma |= IOP13XX_INIT_ADMA_1;
586                                 break;
587                         case '2':
588                                 init_adma |= IOP13XX_INIT_ADMA_2;
589                                 break;
590                         case ',':
591                         case '=':
592                                 break;
593                         default:
594                                 PRINTK("\"iop13xx_init_adma\" malformed"
595                                             " at character: \'%c\'", *str);
596                                 *(str + 1) = '\0';
597                                 init_adma = IOP13XX_INIT_ADMA_DEFAULT;
598                         }
599                         str++;
600                 }
601         }
602         return 1;
603 }
604
605 __setup("iop13xx_init_adma", iop13xx_init_adma_setup);
606 __setup("iop13xx_init_uart", iop13xx_init_uart_setup);
607 __setup("iop13xx_init_i2c", iop13xx_init_i2c_setup);