ARM: drivers: remove __dev* attributes.
[linux-3.10.git] / arch / arm / kernel / perf_event_cpu.c
1 /*
2  * This program is free software; you can redistribute it and/or modify
3  * it under the terms of the GNU General Public License version 2 as
4  * published by the Free Software Foundation.
5  *
6  * This program is distributed in the hope that it will be useful,
7  * but WITHOUT ANY WARRANTY; without even the implied warranty of
8  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
9  * GNU General Public License for more details.
10  *
11  * You should have received a copy of the GNU General Public License
12  * along with this program; if not, write to the Free Software
13  * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
14  *
15  * Copyright (C) 2012 ARM Limited
16  *
17  * Author: Will Deacon <will.deacon@arm.com>
18  */
19 #define pr_fmt(fmt) "CPU PMU: " fmt
20
21 #include <linux/bitmap.h>
22 #include <linux/export.h>
23 #include <linux/kernel.h>
24 #include <linux/of.h>
25 #include <linux/platform_device.h>
26 #include <linux/slab.h>
27 #include <linux/spinlock.h>
28
29 #include <asm/cputype.h>
30 #include <asm/irq_regs.h>
31 #include <asm/pmu.h>
32
33 /* Set at runtime when we know what CPU type we are. */
34 static struct arm_pmu *cpu_pmu;
35
36 static DEFINE_PER_CPU(struct perf_event * [ARMPMU_MAX_HWEVENTS], hw_events);
37 static DEFINE_PER_CPU(unsigned long [BITS_TO_LONGS(ARMPMU_MAX_HWEVENTS)], used_mask);
38 static DEFINE_PER_CPU(struct pmu_hw_events, cpu_hw_events);
39
40 /*
41  * Despite the names, these two functions are CPU-specific and are used
42  * by the OProfile/perf code.
43  */
44 const char *perf_pmu_name(void)
45 {
46         if (!cpu_pmu)
47                 return NULL;
48
49         return cpu_pmu->name;
50 }
51 EXPORT_SYMBOL_GPL(perf_pmu_name);
52
53 int perf_num_counters(void)
54 {
55         int max_events = 0;
56
57         if (cpu_pmu != NULL)
58                 max_events = cpu_pmu->num_events;
59
60         return max_events;
61 }
62 EXPORT_SYMBOL_GPL(perf_num_counters);
63
64 /* Include the PMU-specific implementations. */
65 #include "perf_event_xscale.c"
66 #include "perf_event_v6.c"
67 #include "perf_event_v7.c"
68
69 static struct pmu_hw_events *cpu_pmu_get_cpu_events(void)
70 {
71         return &__get_cpu_var(cpu_hw_events);
72 }
73
74 static void cpu_pmu_free_irq(struct arm_pmu *cpu_pmu)
75 {
76         int i, irq, irqs;
77         struct platform_device *pmu_device = cpu_pmu->plat_device;
78
79         irqs = min(pmu_device->num_resources, num_possible_cpus());
80
81         for (i = 0; i < irqs; ++i) {
82                 if (!cpumask_test_and_clear_cpu(i, &cpu_pmu->active_irqs))
83                         continue;
84                 irq = platform_get_irq(pmu_device, i);
85                 if (irq >= 0)
86                         free_irq(irq, cpu_pmu);
87         }
88 }
89
90 static int cpu_pmu_request_irq(struct arm_pmu *cpu_pmu, irq_handler_t handler)
91 {
92         int i, err, irq, irqs;
93         struct platform_device *pmu_device = cpu_pmu->plat_device;
94
95         if (!pmu_device)
96                 return -ENODEV;
97
98         irqs = min(pmu_device->num_resources, num_possible_cpus());
99         if (irqs < 1) {
100                 pr_err("no irqs for PMUs defined\n");
101                 return -ENODEV;
102         }
103
104         for (i = 0; i < irqs; ++i) {
105                 err = 0;
106                 irq = platform_get_irq(pmu_device, i);
107                 if (irq < 0)
108                         continue;
109
110                 /*
111                  * If we have a single PMU interrupt that we can't shift,
112                  * assume that we're running on a uniprocessor machine and
113                  * continue. Otherwise, continue without this interrupt.
114                  */
115                 if (irq_set_affinity(irq, cpumask_of(i)) && irqs > 1) {
116                         pr_warning("unable to set irq affinity (irq=%d, cpu=%u)\n",
117                                     irq, i);
118                         continue;
119                 }
120
121                 err = request_irq(irq, handler, IRQF_NOBALANCING, "arm-pmu",
122                                   cpu_pmu);
123                 if (err) {
124                         pr_err("unable to request IRQ%d for ARM PMU counters\n",
125                                 irq);
126                         return err;
127                 }
128
129                 cpumask_set_cpu(i, &cpu_pmu->active_irqs);
130         }
131
132         return 0;
133 }
134
135 static void cpu_pmu_init(struct arm_pmu *cpu_pmu)
136 {
137         int cpu;
138         for_each_possible_cpu(cpu) {
139                 struct pmu_hw_events *events = &per_cpu(cpu_hw_events, cpu);
140                 events->events = per_cpu(hw_events, cpu);
141                 events->used_mask = per_cpu(used_mask, cpu);
142                 raw_spin_lock_init(&events->pmu_lock);
143         }
144
145         cpu_pmu->get_hw_events  = cpu_pmu_get_cpu_events;
146         cpu_pmu->request_irq    = cpu_pmu_request_irq;
147         cpu_pmu->free_irq       = cpu_pmu_free_irq;
148
149         /* Ensure the PMU has sane values out of reset. */
150         if (cpu_pmu && cpu_pmu->reset)
151                 on_each_cpu(cpu_pmu->reset, cpu_pmu, 1);
152 }
153
154 /*
155  * PMU hardware loses all context when a CPU goes offline.
156  * When a CPU is hotplugged back in, since some hardware registers are
157  * UNKNOWN at reset, the PMU must be explicitly reset to avoid reading
158  * junk values out of them.
159  */
160 static int __cpuinit cpu_pmu_notify(struct notifier_block *b,
161                                     unsigned long action, void *hcpu)
162 {
163         if ((action & ~CPU_TASKS_FROZEN) != CPU_STARTING)
164                 return NOTIFY_DONE;
165
166         if (cpu_pmu && cpu_pmu->reset)
167                 cpu_pmu->reset(cpu_pmu);
168         else
169                 return NOTIFY_DONE;
170
171         return NOTIFY_OK;
172 }
173
174 static struct notifier_block __cpuinitdata cpu_pmu_hotplug_notifier = {
175         .notifier_call = cpu_pmu_notify,
176 };
177
178 /*
179  * PMU platform driver and devicetree bindings.
180  */
181 static struct of_device_id cpu_pmu_of_device_ids[] = {
182         {.compatible = "arm,cortex-a15-pmu",    .data = armv7_a15_pmu_init},
183         {.compatible = "arm,cortex-a9-pmu",     .data = armv7_a9_pmu_init},
184         {.compatible = "arm,cortex-a8-pmu",     .data = armv7_a8_pmu_init},
185         {.compatible = "arm,cortex-a7-pmu",     .data = armv7_a7_pmu_init},
186         {.compatible = "arm,cortex-a5-pmu",     .data = armv7_a5_pmu_init},
187         {.compatible = "arm,arm11mpcore-pmu",   .data = armv6mpcore_pmu_init},
188         {.compatible = "arm,arm1176-pmu",       .data = armv6pmu_init},
189         {.compatible = "arm,arm1136-pmu",       .data = armv6pmu_init},
190         {},
191 };
192
193 static struct platform_device_id cpu_pmu_plat_device_ids[] = {
194         {.name = "arm-pmu"},
195         {},
196 };
197
198 /*
199  * CPU PMU identification and probing.
200  */
201 static int probe_current_pmu(struct arm_pmu *pmu)
202 {
203         int cpu = get_cpu();
204         unsigned long cpuid = read_cpuid_id();
205         unsigned long implementor = (cpuid & 0xFF000000) >> 24;
206         unsigned long part_number = (cpuid & 0xFFF0);
207         int ret = -ENODEV;
208
209         pr_info("probing PMU on CPU %d\n", cpu);
210
211         /* ARM Ltd CPUs. */
212         if (0x41 == implementor) {
213                 switch (part_number) {
214                 case 0xB360:    /* ARM1136 */
215                 case 0xB560:    /* ARM1156 */
216                 case 0xB760:    /* ARM1176 */
217                         ret = armv6pmu_init(pmu);
218                         break;
219                 case 0xB020:    /* ARM11mpcore */
220                         ret = armv6mpcore_pmu_init(pmu);
221                         break;
222                 case 0xC080:    /* Cortex-A8 */
223                         ret = armv7_a8_pmu_init(pmu);
224                         break;
225                 case 0xC090:    /* Cortex-A9 */
226                         ret = armv7_a9_pmu_init(pmu);
227                         break;
228                 case 0xC050:    /* Cortex-A5 */
229                         ret = armv7_a5_pmu_init(pmu);
230                         break;
231                 case 0xC0F0:    /* Cortex-A15 */
232                         ret = armv7_a15_pmu_init(pmu);
233                         break;
234                 case 0xC070:    /* Cortex-A7 */
235                         ret = armv7_a7_pmu_init(pmu);
236                         break;
237                 }
238         /* Intel CPUs [xscale]. */
239         } else if (0x69 == implementor) {
240                 part_number = (cpuid >> 13) & 0x7;
241                 switch (part_number) {
242                 case 1:
243                         ret = xscale1pmu_init(pmu);
244                         break;
245                 case 2:
246                         ret = xscale2pmu_init(pmu);
247                         break;
248                 }
249         }
250
251         put_cpu();
252         return ret;
253 }
254
255 static int cpu_pmu_device_probe(struct platform_device *pdev)
256 {
257         const struct of_device_id *of_id;
258         int (*init_fn)(struct arm_pmu *);
259         struct device_node *node = pdev->dev.of_node;
260         struct arm_pmu *pmu;
261         int ret = -ENODEV;
262
263         if (cpu_pmu) {
264                 pr_info("attempt to register multiple PMU devices!");
265                 return -ENOSPC;
266         }
267
268         pmu = kzalloc(sizeof(struct arm_pmu), GFP_KERNEL);
269         if (!pmu) {
270                 pr_info("failed to allocate PMU device!");
271                 return -ENOMEM;
272         }
273
274         if (node && (of_id = of_match_node(cpu_pmu_of_device_ids, pdev->dev.of_node))) {
275                 init_fn = of_id->data;
276                 ret = init_fn(pmu);
277         } else {
278                 ret = probe_current_pmu(pmu);
279         }
280
281         if (ret) {
282                 pr_info("failed to register PMU devices!");
283                 kfree(pmu);
284                 return ret;
285         }
286
287         cpu_pmu = pmu;
288         cpu_pmu->plat_device = pdev;
289         cpu_pmu_init(cpu_pmu);
290         armpmu_register(cpu_pmu, PERF_TYPE_RAW);
291
292         return 0;
293 }
294
295 static struct platform_driver cpu_pmu_driver = {
296         .driver         = {
297                 .name   = "arm-pmu",
298                 .pm     = &armpmu_dev_pm_ops,
299                 .of_match_table = cpu_pmu_of_device_ids,
300         },
301         .probe          = cpu_pmu_device_probe,
302         .id_table       = cpu_pmu_plat_device_ids,
303 };
304
305 static int __init register_pmu_driver(void)
306 {
307         int err;
308
309         err = register_cpu_notifier(&cpu_pmu_hotplug_notifier);
310         if (err)
311                 return err;
312
313         err = platform_driver_register(&cpu_pmu_driver);
314         if (err)
315                 unregister_cpu_notifier(&cpu_pmu_hotplug_notifier);
316
317         return err;
318 }
319 device_initcall(register_pmu_driver);