ARM: at91/dts: correct comment in at91sam9x5.dtsi for mii
[linux-3.10.git] / arch / arm / boot / dts / at91sam9x5.dtsi
1 /*
2  * at91sam9x5.dtsi - Device Tree Include file for AT91SAM9x5 family SoC
3  *                   applies to AT91SAM9G15, AT91SAM9G25, AT91SAM9G35,
4  *                   AT91SAM9X25, AT91SAM9X35 SoC
5  *
6  *  Copyright (C) 2012 Atmel,
7  *                2012 Nicolas Ferre <nicolas.ferre@atmel.com>
8  *
9  * Licensed under GPLv2 or later.
10  */
11
12 /include/ "skeleton.dtsi"
13
14 / {
15         model = "Atmel AT91SAM9x5 family SoC";
16         compatible = "atmel,at91sam9x5";
17         interrupt-parent = <&aic>;
18
19         aliases {
20                 serial0 = &dbgu;
21                 serial1 = &usart0;
22                 serial2 = &usart1;
23                 serial3 = &usart2;
24                 gpio0 = &pioA;
25                 gpio1 = &pioB;
26                 gpio2 = &pioC;
27                 gpio3 = &pioD;
28                 tcb0 = &tcb0;
29                 tcb1 = &tcb1;
30                 i2c0 = &i2c0;
31                 i2c1 = &i2c1;
32                 i2c2 = &i2c2;
33                 ssc0 = &ssc0;
34         };
35         cpus {
36                 cpu@0 {
37                         compatible = "arm,arm926ejs";
38                 };
39         };
40
41         memory {
42                 reg = <0x20000000 0x10000000>;
43         };
44
45         ahb {
46                 compatible = "simple-bus";
47                 #address-cells = <1>;
48                 #size-cells = <1>;
49                 ranges;
50
51                 apb {
52                         compatible = "simple-bus";
53                         #address-cells = <1>;
54                         #size-cells = <1>;
55                         ranges;
56
57                         aic: interrupt-controller@fffff000 {
58                                 #interrupt-cells = <3>;
59                                 compatible = "atmel,at91rm9200-aic";
60                                 interrupt-controller;
61                                 reg = <0xfffff000 0x200>;
62                                 atmel,external-irqs = <31>;
63                         };
64
65                         ramc0: ramc@ffffe800 {
66                                 compatible = "atmel,at91sam9g45-ddramc";
67                                 reg = <0xffffe800 0x200>;
68                         };
69
70                         pmc: pmc@fffffc00 {
71                                 compatible = "atmel,at91rm9200-pmc";
72                                 reg = <0xfffffc00 0x100>;
73                         };
74
75                         rstc@fffffe00 {
76                                 compatible = "atmel,at91sam9g45-rstc";
77                                 reg = <0xfffffe00 0x10>;
78                         };
79
80                         shdwc@fffffe10 {
81                                 compatible = "atmel,at91sam9x5-shdwc";
82                                 reg = <0xfffffe10 0x10>;
83                         };
84
85                         pit: timer@fffffe30 {
86                                 compatible = "atmel,at91sam9260-pit";
87                                 reg = <0xfffffe30 0xf>;
88                                 interrupts = <1 4 7>;
89                         };
90
91                         tcb0: timer@f8008000 {
92                                 compatible = "atmel,at91sam9x5-tcb";
93                                 reg = <0xf8008000 0x100>;
94                                 interrupts = <17 4 0>;
95                         };
96
97                         tcb1: timer@f800c000 {
98                                 compatible = "atmel,at91sam9x5-tcb";
99                                 reg = <0xf800c000 0x100>;
100                                 interrupts = <17 4 0>;
101                         };
102
103                         dma0: dma-controller@ffffec00 {
104                                 compatible = "atmel,at91sam9g45-dma";
105                                 reg = <0xffffec00 0x200>;
106                                 interrupts = <20 4 0>;
107                         };
108
109                         dma1: dma-controller@ffffee00 {
110                                 compatible = "atmel,at91sam9g45-dma";
111                                 reg = <0xffffee00 0x200>;
112                                 interrupts = <21 4 0>;
113                         };
114
115                         pinctrl@fffff400 {
116                                 #address-cells = <1>;
117                                 #size-cells = <1>;
118                                 compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
119                                 ranges = <0xfffff400 0xfffff400 0x800>;
120
121                                 /* shared pinctrl settings */
122                                 dbgu {
123                                         pinctrl_dbgu: dbgu-0 {
124                                                 atmel,pins =
125                                                         <0 9 0x1 0x0    /* PA9 periph A */
126                                                          0 10 0x1 0x1>; /* PA10 periph A with pullup */
127                                         };
128                                 };
129
130                                 usart0 {
131                                         pinctrl_usart0: usart0-0 {
132                                                 atmel,pins =
133                                                         <0 0 0x1 0x1    /* PA0 periph A with pullup */
134                                                          0 1 0x1 0x0>;  /* PA1 periph A */
135                                         };
136
137                                         pinctrl_usart0_rts: usart0_rts-0 {
138                                                 atmel,pins =
139                                                         <0 2 0x1 0x0>;  /* PA2 periph A */
140                                         };
141
142                                         pinctrl_usart0_cts: usart0_cts-0 {
143                                                 atmel,pins =
144                                                         <0 3 0x1 0x0>;  /* PA3 periph A */
145                                         };
146
147                                         pinctrl_usart0_sck: usart0_sck-0 {
148                                                 atmel,pins =
149                                                         <0 4 0x1 0x0>;  /* PA4 periph A */
150                                         };
151                                 };
152
153                                 usart1 {
154                                         pinctrl_usart1: usart1-0 {
155                                                 atmel,pins =
156                                                         <0 5 0x1 0x1    /* PA5 periph A with pullup */
157                                                          0 6 0x1 0x0>;  /* PA6 periph A */
158                                         };
159
160                                         pinctrl_usart1_rts: usart1_rts-0 {
161                                                 atmel,pins =
162                                                         <2 27 0x3 0x0>; /* PC27 periph C */
163                                         };
164
165                                         pinctrl_usart1_cts: usart1_cts-0 {
166                                                 atmel,pins =
167                                                         <2 28 0x3 0x0>; /* PC28 periph C */
168                                         };
169
170                                         pinctrl_usart1_sck: usart1_sck-0 {
171                                                 atmel,pins =
172                                                         <2 28 0x3 0x0>; /* PC29 periph C */
173                                         };
174                                 };
175
176                                 usart2 {
177                                         pinctrl_usart2: usart2-0 {
178                                                 atmel,pins =
179                                                         <0 7 0x1 0x1    /* PA7 periph A with pullup */
180                                                          0 8 0x1 0x0>;  /* PA8 periph A */
181                                         };
182
183                                         pinctrl_uart2_rts: uart2_rts-0 {
184                                                 atmel,pins =
185                                                         <1 0 0x2 0x0>;  /* PB0 periph B */
186                                         };
187
188                                         pinctrl_uart2_cts: uart2_cts-0 {
189                                                 atmel,pins =
190                                                         <1 1 0x2 0x0>;  /* PB1 periph B */
191                                         };
192
193                                         pinctrl_usart2_sck: usart2_sck-0 {
194                                                 atmel,pins =
195                                                         <1 2 0x2 0x0>;  /* PB2 periph B */
196                                         };
197                                 };
198
199                                 usart3 {
200                                         pinctrl_uart3: usart3-0 {
201                                                 atmel,pins =
202                                                         <2 23 0x2 0x1   /* PC22 periph B with pullup */
203                                                          2 23 0x2 0x0>; /* PC23 periph B */
204                                         };
205
206                                         pinctrl_usart3_rts: usart3_rts-0 {
207                                                 atmel,pins =
208                                                         <2 24 0x2 0x0>; /* PC24 periph B */
209                                         };
210
211                                         pinctrl_usart3_cts: usart3_cts-0 {
212                                                 atmel,pins =
213                                                         <2 25 0x2 0x0>; /* PC25 periph B */
214                                         };
215
216                                         pinctrl_usart3_sck: usart3_sck-0 {
217                                                 atmel,pins =
218                                                         <2 26 0x2 0x0>; /* PC26 periph B */
219                                         };
220                                 };
221
222                                 uart0 {
223                                         pinctrl_uart0: uart0-0 {
224                                                 atmel,pins =
225                                                         <2 8 0x3 0x0    /* PC8 periph C */
226                                                          2 9 0x3 0x1>;  /* PC9 periph C with pullup */
227                                         };
228                                 };
229
230                                 uart1 {
231                                         pinctrl_uart1: uart1-0 {
232                                                 atmel,pins =
233                                                         <2 16 0x3 0x0   /* PC16 periph C */
234                                                          2 17 0x3 0x1>; /* PC17 periph C with pullup */
235                                         };
236                                 };
237
238                                 nand {
239                                         pinctrl_nand: nand-0 {
240                                                 atmel,pins =
241                                                         <3 4 0x0 0x1    /* PD5 gpio RDY pin pull_up */
242                                                          3 5 0x0 0x1>;  /* PD4 gpio enable pin pull_up */
243                                         };
244                                 };
245
246                                 macb0 {
247                                         pinctrl_macb0_rmii: macb0_rmii-0 {
248                                                 atmel,pins =
249                                                         <1 0 0x1 0x0    /* PB0 periph A */
250                                                          1 1 0x1 0x0    /* PB1 periph A */
251                                                          1 2 0x1 0x0    /* PB2 periph A */
252                                                          1 3 0x1 0x0    /* PB3 periph A */
253                                                          1 4 0x1 0x0    /* PB4 periph A */
254                                                          1 5 0x1 0x0    /* PB5 periph A */
255                                                          1 6 0x1 0x0    /* PB6 periph A */
256                                                          1 7 0x1 0x0    /* PB7 periph A */
257                                                          1 9 0x1 0x0    /* PB9 periph A */
258                                                          1 10 0x1 0x0>; /* PB10 periph A */
259                                         };
260
261                                         pinctrl_macb0_rmii_mii: macb0_rmii_mii-0 {
262                                                 atmel,pins =
263                                                         <1 8 0x1 0x0    /* PB8 periph A */
264                                                          1 11 0x1 0x0   /* PB11 periph A */
265                                                          1 12 0x1 0x0   /* PB12 periph A */
266                                                          1 13 0x1 0x0   /* PB13 periph A */
267                                                          1 14 0x1 0x0   /* PB14 periph A */
268                                                          1 15 0x1 0x0   /* PB15 periph A */
269                                                          1 16 0x1 0x0   /* PB16 periph A */
270                                                          1 17 0x1 0x0>; /* PB17 periph A */
271                                         };
272                                 };
273
274                                 mmc0 {
275                                         pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
276                                                 atmel,pins =
277                                                         <0 17 0x1 0x0   /* PA17 periph A */
278                                                          0 16 0x1 0x1   /* PA16 periph A with pullup */
279                                                          0 15 0x1 0x1>; /* PA15 periph A with pullup */
280                                         };
281
282                                         pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
283                                                 atmel,pins =
284                                                         <0 18 0x1 0x1   /* PA18 periph A with pullup */
285                                                          0 19 0x1 0x1   /* PA19 periph A with pullup */
286                                                          0 20 0x1 0x1>; /* PA20 periph A with pullup */
287                                         };
288                                 };
289
290                                 mmc1 {
291                                         pinctrl_mmc1_slot0_clk_cmd_dat0: mmc1_slot0_clk_cmd_dat0-0 {
292                                                 atmel,pins =
293                                                         <0 13 0x2 0x0   /* PA13 periph B */
294                                                          0 12 0x2 0x1   /* PA12 periph B with pullup */
295                                                          0 11 0x2 0x1>; /* PA11 periph B with pullup */
296                                         };
297
298                                         pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
299                                                 atmel,pins =
300                                                         <0 2 0x2 0x1    /* PA2 periph B with pullup */
301                                                          0 3 0x2 0x1    /* PA3 periph B with pullup */
302                                                          0 4 0x2 0x1>;  /* PA4 periph B with pullup */
303                                         };
304                                 };
305
306                                 ssc0 {
307                                         pinctrl_ssc0_tx: ssc0_tx-0 {
308                                                 atmel,pins =
309                                                         <0 24 0x2 0x0   /* PA24 periph B */
310                                                          0 25 0x2 0x0   /* PA25 periph B */
311                                                          0 26 0x2 0x0>; /* PA26 periph B */
312                                         };
313
314                                         pinctrl_ssc0_rx: ssc0_rx-0 {
315                                                 atmel,pins =
316                                                         <0 27 0x2 0x0   /* PA27 periph B */
317                                                          0 28 0x2 0x0   /* PA28 periph B */
318                                                          0 29 0x2 0x0>; /* PA29 periph B */
319                                         };
320                                 };
321
322                                 pioA: gpio@fffff400 {
323                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
324                                         reg = <0xfffff400 0x200>;
325                                         interrupts = <2 4 1>;
326                                         #gpio-cells = <2>;
327                                         gpio-controller;
328                                         interrupt-controller;
329                                         #interrupt-cells = <2>;
330                                 };
331
332                                 pioB: gpio@fffff600 {
333                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
334                                         reg = <0xfffff600 0x200>;
335                                         interrupts = <2 4 1>;
336                                         #gpio-cells = <2>;
337                                         gpio-controller;
338                                         #gpio-lines = <19>;
339                                         interrupt-controller;
340                                         #interrupt-cells = <2>;
341                                 };
342
343                                 pioC: gpio@fffff800 {
344                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
345                                         reg = <0xfffff800 0x200>;
346                                         interrupts = <3 4 1>;
347                                         #gpio-cells = <2>;
348                                         gpio-controller;
349                                         interrupt-controller;
350                                         #interrupt-cells = <2>;
351                                 };
352
353                                 pioD: gpio@fffffa00 {
354                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
355                                         reg = <0xfffffa00 0x200>;
356                                         interrupts = <3 4 1>;
357                                         #gpio-cells = <2>;
358                                         gpio-controller;
359                                         #gpio-lines = <22>;
360                                         interrupt-controller;
361                                         #interrupt-cells = <2>;
362                                 };
363                         };
364
365                         ssc0: ssc@f0010000 {
366                                 compatible = "atmel,at91sam9g45-ssc";
367                                 reg = <0xf0010000 0x4000>;
368                                 interrupts = <28 4 5>;
369                                 pinctrl-names = "default";
370                                 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
371                                 status = "disabled";
372                         };
373
374                         mmc0: mmc@f0008000 {
375                                 compatible = "atmel,hsmci";
376                                 reg = <0xf0008000 0x600>;
377                                 interrupts = <12 4 0>;
378                                 #address-cells = <1>;
379                                 #size-cells = <0>;
380                                 status = "disabled";
381                         };
382
383                         mmc1: mmc@f000c000 {
384                                 compatible = "atmel,hsmci";
385                                 reg = <0xf000c000 0x600>;
386                                 interrupts = <26 4 0>;
387                                 #address-cells = <1>;
388                                 #size-cells = <0>;
389                                 status = "disabled";
390                         };
391
392                         dbgu: serial@fffff200 {
393                                 compatible = "atmel,at91sam9260-usart";
394                                 reg = <0xfffff200 0x200>;
395                                 interrupts = <1 4 7>;
396                                 pinctrl-names = "default";
397                                 pinctrl-0 = <&pinctrl_dbgu>;
398                                 status = "disabled";
399                         };
400
401                         usart0: serial@f801c000 {
402                                 compatible = "atmel,at91sam9260-usart";
403                                 reg = <0xf801c000 0x200>;
404                                 interrupts = <5 4 5>;
405                                 atmel,use-dma-rx;
406                                 atmel,use-dma-tx;
407                                 pinctrl-names = "default";
408                                 pinctrl-0 = <&pinctrl_usart0>;
409                                 status = "disabled";
410                         };
411
412                         usart1: serial@f8020000 {
413                                 compatible = "atmel,at91sam9260-usart";
414                                 reg = <0xf8020000 0x200>;
415                                 interrupts = <6 4 5>;
416                                 atmel,use-dma-rx;
417                                 atmel,use-dma-tx;
418                                 pinctrl-names = "default";
419                                 pinctrl-0 = <&pinctrl_usart1>;
420                                 status = "disabled";
421                         };
422
423                         usart2: serial@f8024000 {
424                                 compatible = "atmel,at91sam9260-usart";
425                                 reg = <0xf8024000 0x200>;
426                                 interrupts = <7 4 5>;
427                                 atmel,use-dma-rx;
428                                 atmel,use-dma-tx;
429                                 pinctrl-names = "default";
430                                 pinctrl-0 = <&pinctrl_usart2>;
431                                 status = "disabled";
432                         };
433
434                         macb0: ethernet@f802c000 {
435                                 compatible = "cdns,at32ap7000-macb", "cdns,macb";
436                                 reg = <0xf802c000 0x100>;
437                                 interrupts = <24 4 3>;
438                                 pinctrl-names = "default";
439                                 pinctrl-0 = <&pinctrl_macb0_rmii>;
440                                 status = "disabled";
441                         };
442
443                         macb1: ethernet@f8030000 {
444                                 compatible = "cdns,at32ap7000-macb", "cdns,macb";
445                                 reg = <0xf8030000 0x100>;
446                                 interrupts = <27 4 3>;
447                                 status = "disabled";
448                         };
449
450                         i2c0: i2c@f8010000 {
451                                 compatible = "atmel,at91sam9x5-i2c";
452                                 reg = <0xf8010000 0x100>;
453                                 interrupts = <9 4 6>;
454                                 #address-cells = <1>;
455                                 #size-cells = <0>;
456                                 status = "disabled";
457                         };
458
459                         i2c1: i2c@f8014000 {
460                                 compatible = "atmel,at91sam9x5-i2c";
461                                 reg = <0xf8014000 0x100>;
462                                 interrupts = <10 4 6>;
463                                 #address-cells = <1>;
464                                 #size-cells = <0>;
465                                 status = "disabled";
466                         };
467
468                         i2c2: i2c@f8018000 {
469                                 compatible = "atmel,at91sam9x5-i2c";
470                                 reg = <0xf8018000 0x100>;
471                                 interrupts = <11 4 6>;
472                                 #address-cells = <1>;
473                                 #size-cells = <0>;
474                                 status = "disabled";
475                         };
476
477                         adc0: adc@f804c000 {
478                                 compatible = "atmel,at91sam9260-adc";
479                                 reg = <0xf804c000 0x100>;
480                                 interrupts = <19 4 0>;
481                                 atmel,adc-use-external;
482                                 atmel,adc-channels-used = <0xffff>;
483                                 atmel,adc-vref = <3300>;
484                                 atmel,adc-num-channels = <12>;
485                                 atmel,adc-startup-time = <40>;
486                                 atmel,adc-channel-base = <0x50>;
487                                 atmel,adc-drdy-mask = <0x1000000>;
488                                 atmel,adc-status-register = <0x30>;
489                                 atmel,adc-trigger-register = <0xc0>;
490
491                                 trigger@0 {
492                                         trigger-name = "external-rising";
493                                         trigger-value = <0x1>;
494                                         trigger-external;
495                                 };
496
497                                 trigger@1 {
498                                         trigger-name = "external-falling";
499                                         trigger-value = <0x2>;
500                                         trigger-external;
501                                 };
502
503                                 trigger@2 {
504                                         trigger-name = "external-any";
505                                         trigger-value = <0x3>;
506                                         trigger-external;
507                                 };
508
509                                 trigger@3 {
510                                         trigger-name = "continuous";
511                                         trigger-value = <0x6>;
512                                 };
513                         };
514                 };
515
516                 nand0: nand@40000000 {
517                         compatible = "atmel,at91rm9200-nand";
518                         #address-cells = <1>;
519                         #size-cells = <1>;
520                         reg = <0x40000000 0x10000000
521                               >;
522                         atmel,nand-addr-offset = <21>;
523                         atmel,nand-cmd-offset = <22>;
524                         pinctrl-names = "default";
525                         pinctrl-0 = <&pinctrl_nand>;
526                         gpios = <&pioD 5 0
527                                  &pioD 4 0
528                                  0
529                                 >;
530                         status = "disabled";
531                 };
532
533                 usb0: ohci@00600000 {
534                         compatible = "atmel,at91rm9200-ohci", "usb-ohci";
535                         reg = <0x00600000 0x100000>;
536                         interrupts = <22 4 2>;
537                         status = "disabled";
538                 };
539
540                 usb1: ehci@00700000 {
541                         compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
542                         reg = <0x00700000 0x100000>;
543                         interrupts = <22 4 2>;
544                         status = "disabled";
545                 };
546         };
547
548         i2c@0 {
549                 compatible = "i2c-gpio";
550                 gpios = <&pioA 30 0 /* sda */
551                          &pioA 31 0 /* scl */
552                         >;
553                 i2c-gpio,sda-open-drain;
554                 i2c-gpio,scl-open-drain;
555                 i2c-gpio,delay-us = <2>;        /* ~100 kHz */
556                 #address-cells = <1>;
557                 #size-cells = <0>;
558                 status = "disabled";
559         };
560
561         i2c@1 {
562                 compatible = "i2c-gpio";
563                 gpios = <&pioC 0 0 /* sda */
564                          &pioC 1 0 /* scl */
565                         >;
566                 i2c-gpio,sda-open-drain;
567                 i2c-gpio,scl-open-drain;
568                 i2c-gpio,delay-us = <2>;        /* ~100 kHz */
569                 #address-cells = <1>;
570                 #size-cells = <0>;
571                 status = "disabled";
572         };
573
574         i2c@2 {
575                 compatible = "i2c-gpio";
576                 gpios = <&pioB 4 0 /* sda */
577                          &pioB 5 0 /* scl */
578                         >;
579                 i2c-gpio,sda-open-drain;
580                 i2c-gpio,scl-open-drain;
581                 i2c-gpio,delay-us = <2>;        /* ~100 kHz */
582                 #address-cells = <1>;
583                 #size-cells = <0>;
584                 status = "disabled";
585         };
586 };