Linux-2.6.12-rc2
[linux-3.10.git] / arch / arm / boot / compressed / head-sharpsl.S
1 /*
2  * linux/arch/arm/boot/compressed/head-sharpsl.S
3  *
4  * Copyright (C) 2004-2005 Richard Purdie <rpurdie@rpsys.net>
5  *
6  * Sharp's bootloader doesn't pass any kind of machine ID
7  * so we have to figure out the machine for ourselves...
8  *
9  * Support for Poodle, Corgi (SL-C700), Shepherd (SL-C750)
10  * and Husky (SL-C760).
11  *
12  */
13
14 #include <linux/config.h>
15 #include <linux/linkage.h>
16 #include <asm/mach-types.h>
17
18 #ifndef CONFIG_PXA_SHARPSL
19 #error What am I doing here...
20 #endif
21
22                 .section        ".start", "ax"
23
24 __SharpSL_start:
25
26         ldr     r1, .W100ADDR           @ Base address of w100 chip + regs offset
27
28         mov r6, #0x31                   @ Load Magic Init value
29         str     r6, [r1, #0x280]        @ to SCRATCH_UMSK
30         mov r5, #0x3000
31 .W100LOOP:
32         subs r5, r5, #1
33     bne .W100LOOP
34         mov r6, #0x30                   @ Load 2nd Magic Init value
35         str     r6, [r1, #0x280]        @ to SCRATCH_UMSK
36
37         ldr     r6, [r1, #0]            @ Load Chip ID
38         ldr     r3, .W100ID
39         ldr     r7, .POODLEID
40         cmp     r6, r3
41         bne     .SHARPEND                       @ We have no w100 - Poodle
42
43         mrc p15, 0, r6, c0, c0  @ Get Processor ID
44         and     r6, r6, #0xffffff00
45         ldr     r7, .CORGIID
46         ldr     r3, .PXA255ID
47         cmp     r6, r3
48         blo     .SHARPEND                       @ We have a PXA250 - Corgi
49
50         mov     r1, #0x0c000000         @ Base address of NAND chip
51         ldrb    r3, [r1, #24]   @ Load FLASHCTL
52         bic     r3, r3, #0x11           @ SET NCE
53         orr     r3, r3, #0x0a           @ SET CLR + FLWP
54         strb    r3, [r1, #24]   @ Save to FLASHCTL
55         mov     r2, #0x90               @ Command "readid"
56         strb    r2, [r1, #20]   @ Save to FLASHIO
57         bic     r3, r3, #2                      @ CLR CLE
58         orr     r3, r3, #4                      @ SET ALE
59         strb    r3, [r1, #24]   @ Save to FLASHCTL
60         mov             r2, #0                  @ Address 0x00
61         strb    r2, [r1, #20]   @ Save to FLASHIO
62         bic     r3, r3, #4                      @ CLR ALE
63         strb    r3, [r1, #24]   @ Save to FLASHCTL
64 .SHARP1:
65         ldrb    r3, [r1, #24]   @ Load FLASHCTL
66         tst     r3, #32                         @ Is chip ready?
67         beq     .SHARP1
68         ldrb    r2, [r1, #20]   @ NAND Manufacturer ID
69         ldrb    r3, [r1, #20]   @ NAND Chip ID
70         ldr     r7, .SHEPHERDID
71         cmp     r3, #0x76                       @ 64MiB flash
72         beq     .SHARPEND                       @ We have Shepherd
73         ldr     r7, .HUSKYID            @ Must be Husky
74         b .SHARPEND
75
76 .PXA255ID:
77         .word   0x69052d00              @ PXA255 Processor ID
78 .W100ID:
79         .word   0x57411002              @ w100 Chip ID
80 .W100ADDR:
81         .word   0x08010000              @ w100 Chip ID Reg Address
82 .POODLEID:
83         .word   MACH_TYPE_POODLE
84 .CORGIID:
85         .word   MACH_TYPE_CORGI
86 .SHEPHERDID:
87         .word   MACH_TYPE_SHEPHERD
88 .HUSKYID:
89         .word   MACH_TYPE_HUSKY
90 .SHARPEND:
91
92