6 years agoarm: tegra: roth: raydium power sequence
Xiaohui Tao [Sat, 2 Feb 2013 00:49:57 +0000]
arm: tegra: roth: raydium power sequence

Update power sequence for roth.

Bug 1228213

Change-Id: I7a3872205d421aae7456868cd1dd1b29d5d5d92b
Signed-off-by: Xiaohui Tao <xtao@nvidia.com>
Signed-off-by: David Jung <djung@nvidia.com>
Reviewed-on: http://git-master/r/196654
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agoinput: touch: raydium remove spurious interrupts
David Jung [Fri, 1 Feb 2013 21:16:12 +0000]
input: touch: raydium remove spurious interrupts

Raydium code drop to remove spurious interrupts.

Bug 1219704

Change-Id: I03d0c178b1d788753026b55dceebf2175484f983
Signed-off-by: David Jung <djung@nvidia.com>
Reviewed-on: http://git-master/r/196560
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agoinput: touch: raydium slow scan updates
David Jung [Mon, 28 Jan 2013 01:49:58 +0000]
input: touch: raydium slow scan updates

Raydium code drop.
Update code for slow scan.

Bug 1054801

Change-Id: Ie123e14ab9892b8055ab7af4bae9dd14189acfa6
Signed-off-by: David Jung <djung@nvidia.com>
Reviewed-on: http://git-master/r/194480
Reviewed-by: Robert Collins <rcollins@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agoarm: tegra: Add raydium touch clock names
Aly Hirani [Fri, 7 Dec 2012 23:16:29 +0000]
arm: tegra: Add raydium touch clock names

Add the clock names for the raydium touch driver. Also remove
clk_enable()s as the raydium driver now properly enables the touch
clock.

Bug 1188790

Change-Id: Ia9dce83b7943dab35e3902dbefdb8d806df365ae
Signed-off-by: Aly Hirani <ahirani@nvidia.com>
Reviewed-on: http://git-master/r/172909
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

6 years agoRevert "ARM: Tegra: Roth: Disable Touch"
David Jung [Fri, 1 Feb 2013 19:30:12 +0000]
Revert "ARM: Tegra: Roth: Disable Touch"

This reverts commit b7a9217f6fec4f70d0f6a5ea4e03d3b89d5f4b18.
Re-enable touch for roth.

Bug 1228213

Change-Id: Ic45c9834e544412cdf7f22ba4be49b8f627e5d39
Signed-off-by: David Jung <djung@nvidia.com>
Reviewed-on: http://git-master/r/196559
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agopower: max17048: Adding shutdown functionality
Syed Rafiuddin [Wed, 6 Feb 2013 09:57:59 +0000]
power: max17048: Adding shutdown functionality

This change is intended to add shutdown fucntionality
to the max17048 fuel gauge driver

Bug 1202296

Change-Id: Id3fe159d99dbdf9c5623e5c6609860aa1274df73
Signed-off-by: Darbha Sriharsha <dsriharsha@nvidia.com>
Signed-off-by: Syed Rafiuddin <srafiuddin@nvidia.com>
Reviewed-on: http://git-master/r/195546
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

6 years agovideo: tegra: dc: report correct HDMI mode to TV
Jon Mayo [Mon, 11 Feb 2013 22:30:48 +0000]
video: tegra: dc: report correct HDMI mode to TV

Reports correct aspect ratio and VIC to TV.

bug 1230953
bug 1227041

Change-Id: Ia973f526a50b679627b8fa74dde99bc405c86061
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/199716
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

6 years agoARM: tegra: clock: Add warning on boot over-clocking
Alex Frid [Sun, 10 Feb 2013 07:24:54 +0000]
ARM: tegra: clock: Add warning on boot over-clocking

Change-Id: If0ae2c46d9a8a927b1fddc809b7daf05c2b49c21
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/199201
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Hoang Pham <hopham@nvidia.com>
Reviewed-by: Kaz Fukuoka <kfukuoka@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

6 years agoARM: tegra11x: Support min residency per platform
Bo Yan [Fri, 8 Feb 2013 18:54:27 +0000]
ARM: tegra11x: Support min residency per platform

Though there is no compelling reason to have different residency
requirement of Fmin@Vmin and non-CPU power gating for each platform,
still makes it possible to define these thresholds per platform.
If they are not defined, the default value are taken.

Change-Id: I663afb869338bd2e4078b15253c8f8e29c3d6b3c
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/198846
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Peter Boonstoppel <pboonstoppel@nvidia.com>
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>

6 years agosecurity: tf_driver: fix incorrect cpu affinity in tf_driver
Hyung Taek Ryoo [Thu, 31 Jan 2013 04:50:03 +0000]
security: tf_driver: fix incorrect cpu affinity in tf_driver

This change fixes incorrect cpu affinity after excuting tf_driver.
The process using tf_driver sometimes can't be schecduled to
available onlined cpu. It is because cpu affinity has changed
after using tf_driver. tf_driver saves current cpu affinity by
calling sched_getaffinity which returns cpu affinity AND-masked
by onlined cpus. tf_driver should save just current cpu affinity,
not cpu affinity AND-masked by onlined cpus.

bug 1218943

cherry picked from commit bba209aa7fe8b4f52f5d42acc1b21d8f54c18fe0)
Reviewed-on: http://git-master/r/#change,195830

Change-Id: I5fbc1e6a3c67fbd01e4f2f5321aea168f7ba07c9
Signed-off-by: Hyung Taek Ryoo <hryoo@nvidia.com>
Reviewed-on: http://git-master/r/198842
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

6 years agoarm: tegra: soctherm: Hi-precision get_temp by converting raw counts
Diwakar Tundlam [Sat, 26 Jan 2013 01:02:32 +0000]
arm: tegra: soctherm: Hi-precision get_temp by converting raw counts

Bug 1200077

Change-Id: I1c1432fe460e03f1354eac1a25a6639e50234a2a
Signed-off-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-on: http://git-master/r/197349
Reviewed-by: Automatic_Commit_Validation_User

6 years agoarm: tegra: soctherm: Wrap precision calculation with macros
Diwakar Tundlam [Thu, 31 Jan 2013 01:45:15 +0000]
arm: tegra: soctherm: Wrap precision calculation with macros

Bug 1200077

Change-Id: Idfc0b5897498db7ff4b014bef8ca4ed2fa49ce59
Signed-off-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-on: http://git-master/r/197347
Reviewed-by: Automatic_Commit_Validation_User

6 years agoasoc: tegra: fixing EDP client priorities
Sivaram Nair [Mon, 11 Feb 2013 07:37:43 +0000]
asoc: tegra: fixing EDP client priorities

The client priorities are fixed to reflect the change in EDP driver.

Change-Id: I445c4d484fa14d584389fe43e0aa1137ec6bae81
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-on: http://git-master/r/199294
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

6 years agoarm: tegra: roth: Remove left and right NCT72
Anshul Jain [Fri, 8 Feb 2013 22:28:23 +0000]
arm: tegra: roth: Remove left and right NCT72

The current POR of roth doesn't need left and right NCT sensors. These
sensors have been removed from new revisions of roth boards.

Bug 1233567

Change-Id: I7760f926d0ba7ec097fe0595c6b94c6c5b835b39
Signed-off-by: Anshul Jain <anshulj@nvidia.com>
Reviewed-on: http://git-master/r/198919
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agoARM: tegra: restrict battery EDP manager to pluto
Sivaram Nair [Fri, 8 Feb 2013 11:21:31 +0000]
ARM: tegra: restrict battery EDP manager to pluto

Battery EDP manager is needed only in pluto at the moment. Removing
it from elsewhere.

Change-Id: Ic98b2a36d3b3d16d425d786a19b70c682b865173
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-on: http://git-master/r/198764
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

6 years agoARM: tegra11: macallan: remove as364x LED driver
Hayden Du [Fri, 8 Feb 2013 04:58:41 +0000]
ARM: tegra11: macallan: remove as364x LED driver

Macallan does not have LED as364x on board, hence removing entries from board file

bug 1232868

Change-Id: I554f9caa8aa2e98455d6380e8b7e735e42a9cb05
Signed-off-by: Hayden Du <haydend@nvidia.com>
Reviewed-on: http://git-master/r/198634
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Prajakta Gudadhe <pgudadhe@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agoinput-cfboost: add trace points
Yogish Kulkarni [Wed, 6 Feb 2013 11:28:50 +0000]
input-cfboost: add trace points

Add trace points to log time stamp when the input event is received
and time at which boost work is scheduled. This is for detailed
profiling of touch latency.

Bug 1229219

Change-Id: I5f2f4f3d821d93b550fa9f86dc8fd562fa5d460a
Signed-off-by: Yogish Kulkarni <yogishk@nvidia.com>
Reviewed-on: http://git-master/r/197954
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

6 years agomisc: ti-st: clean up st_host_wake driver
Nagarjuna Kristam [Tue, 5 Feb 2013 15:45:46 +0000]
misc: ti-st: clean up st_host_wake driver

remove checkpatch errors on st_host_wake driver

Bug 1179655

Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Change-Id: If90ff7fdb27b982023959d9b3752cb02c0696787
Reviewed-on: http://git-master/r/197498
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Rakesh Kumar <krakesh@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agoinclude: wl_wilink: include sk_buff.h file
Nagarjuna Kristam [Tue, 5 Feb 2013 10:02:53 +0000]
include: wl_wilink: include sk_buff.h file

sk_buff.h header file is needed to compile st_host_wake driver

Bug 1179655

Change-Id: I71d7290a7e3d7fea4f06caad4907c533bab31243
Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-on: http://git-master/r/197415
Reviewed-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Rakesh Kumar <krakesh@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agoARM: tegra: config: enable ST_HCI and ST_HOST_WAKE configs
Nagarjuna Kristam [Tue, 5 Feb 2013 09:48:11 +0000]
ARM: tegra: config: enable ST_HCI and ST_HOST_WAKE configs

Bug 1179655

Change-Id: Idf4bfa33f19654e1acff5d0ef42398352daff281
Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-on: http://git-master/r/197404
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

6 years agoTI Bluetooth: Adding TI Host Wakeup Driver changes
Raghavendra Shenoy Mathav [Wed, 30 Jan 2013 09:28:57 +0000]
TI Bluetooth: Adding TI Host Wakeup Driver changes

Signed-off-by: Raghavendra Shenoy Mathav <raghavendra.shenoy@ti.com>

Bug 1179655

Change-Id: I904ed2d392b6ff8fbfb00e949f470542387aace4
Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-on: http://git-master/r/197395
Reviewed-by: Rakesh Goyal <rgoyal@nvidia.com>
Tested-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-by: Rakesh Kumar <krakesh@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agoARM: tegra11: dalmore: Fix build error with CONFIG_MACH_DALMORE
Roger Hsieh [Tue, 8 Jan 2013 06:17:38 +0000]
ARM: tegra11: dalmore: Fix build error with CONFIG_MACH_DALMORE

sd_brightness is not exported only on dalmore board file. Add it in
to get build error fixed.

Bug 1214485

Change-Id: Ib79cbbafaba976103c4e866d3962e247dd50d3ef
Signed-off-by: Roger Hsieh <rhsieh@nvidia.com>
Reviewed-on: http://git-master/r/189454
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agoregulator: palmas: implement errata for ES1.0,ES2.0 and ES2.1
Laxman Dewangan [Sat, 9 Feb 2013 19:36:38 +0000]
regulator: palmas: implement errata for ES1.0,ES2.0 and ES2.1

The device has the errata and sw need to implement the WAR for
proper functioning of the device.

The errata are:
1. SMPS- slew rate (TSTEP) is slower than expected
-----------------------------------------------
when output voltage target is close to previous one

IMPACT: The settling time is greater than specified slew rate in
register map and datasheet for voltage scaling of the SMPS.

DESCRIPTION: Measurement done on WCSP ES2.0, SMPS8, SMPS6, SMPS12
for TSTEP=0x02(5mV/us)
- step from VOUT= 0.5v to 1.65V ==>slew rate is around 5mV/us
- step from VOUT= 0.96v to 1.04V ==>slew rate is around 2.5mV/us
for TSTEP=0x03(2.5mV/us)
- step from VOUT= 0.5v to 1.65V ==>slew rate is around 2.5mV/us
- step from VOUT= 0.96v to 1.04V ==>slew rate is around 1.6mV/us

WORKAROUND: Adapt wait time using above value.

REVISION IMPACTED: ES1.0/ES2.0/ES2.1

2. LDO8_TRACKING: PD in tracking mode
-------------------------------------
IMPACT: Higher consumption and performance impact when LDO8 is set in
tracking mode and LDO is set to have its pull down enabled in OFF mode.

DESCRIPTION: When LDO8 is set in tracking mode and the LDO is set to have
its pull down enabled in OFF, the pull down is also enabled in ACTIVE mode.

WORKAROUND: In tracking mode, bit7 of LDO_PD_CTRL1 register must be set to 0.
When LDO8 is disabled, to have the pull down, bit7 of LDO_PD_CTRL1 register must
then be set to 1.
 In LDO8 regulation mode, behavior is the same as the other LDOs.

REVISION IMPACTED: ES 2.1 ES2.0 ES1.0

bug 1228386
bug 1195226

Change-Id: Ib19a21cb722b1bc07d93a0cf866c134672ef8735
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/199132
Reviewed-by: Automatic_Commit_Validation_User

6 years agomfd: palmas: read internal design rev and sw otp revsion of device
Laxman Dewangan [Sat, 9 Feb 2013 19:14:58 +0000]
mfd: palmas: read internal design rev and sw otp revsion of device

Read internal design revision and sw otp version of the device and
print this message.

This will help on implementing the errata of different ES version of
device.

bug 1228386
bug 1195226

Change-Id: I616aafd20cc0fce0f75a2f730107905f739f77cb
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/199131
Reviewed-by: Automatic_Commit_Validation_User

6 years agomfd: palmas: Add APIs to access the Palmas' registers
Laxman Dewangan [Sat, 9 Feb 2013 19:11:33 +0000]
mfd: palmas: Add APIs to access the Palmas' registers

Palmas register set is divided into different blocks (base and offset)
and hence different i2c addresses. The i2c address offsets are derived
from base address of block of registers.

Add inline APIs to access the Palma's registers which takes the base of
register block and register offset. The i2c address offset is  derived
from the base address of register blocks.

Change-Id: Ia4155e4ecba76bd6024583058ad943b9c7410976
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/199130
Reviewed-by: Automatic_Commit_Validation_User

6 years agovideo: fbmon: correct the hsync/vsync polarities
Rakesh Iyer [Sat, 9 Feb 2013 00:32:11 +0000]
video: fbmon: correct the hsync/vsync polarities

Fix the vsync/hsync polarities in the Extended resolution modedb table.

Bug 1227070.

Change-Id: Ie370391b2e97e94cca365abb937c6d1a128c96ef
Signed-off-by: Rakesh Iyer <riyer@nvidia.com>
Reviewed-on: http://git-master/r/198964
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

6 years agovideo: tegra: dc: fix HDMI VSI length
Rakesh Iyer [Fri, 8 Feb 2013 22:31:14 +0000]
video: tegra: dc: fix HDMI VSI length

Write the correct number of bytes for the vendor specific infoframe.
Also initialize all the bits in the infoframe.

Bug 1227070.

Change-Id: I6992acfe70b1d1a456db351218c11b9b8426b7dc
Signed-off-by: Rakesh Iyer <riyer@nvidia.com>
Reviewed-on: http://git-master/r/198942
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

6 years agoARM: tegra: roth: properly configure PK3 aka GMI_CS2
Laxman Dewangan [Sat, 9 Feb 2013 07:23:47 +0000]
ARM: tegra: roth: properly configure PK3 aka GMI_CS2

In roth, pin GMI_CS2 is used for touch 1v8 voltage switch control.
Making change to reflect the same i.e. do not configure GPIO_PK3
for the internal MIC.

bug 1230317

Change-Id: I36f4e3d1a6c74bc37fa9c6833ed8da27bb0bf624
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/198738
Reviewed-by: Automatic_Commit_Validation_User

6 years agoARM: tegra11: clock: Update I2C5 maximum rate limit
Alex Frid [Fri, 8 Feb 2013 06:51:38 +0000]
ARM: tegra11: clock: Update I2C5 maximum rate limit

Bug 1161126

Change-Id: Ib0a492d41ec13e0d061545ccab3ac6bab914c5da
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/198690
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

6 years agoARM: tegra11: dvfs: Remove CSI/DSI dvfs tables
Alex Frid [Fri, 8 Feb 2013 06:09:29 +0000]
ARM: tegra11: dvfs: Remove CSI/DSI dvfs tables

Removed CSI/DSI dvfs tables since all clocks in this subsystem are
characterized at maximum frequency in the entire operating voltage
range.

Bug 1161126

Change-Id: I32d08d94a5cab1636c53e02ddbb3042bc51d67cd
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/198689
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

6 years agoARM: tegra11: dvfs: Update tables for GPU and system clocks
Alex Frid [Fri, 8 Feb 2013 05:50:51 +0000]
ARM: tegra11: dvfs: Update tables for GPU and system clocks

Bug 1161126

Change-Id: I90193fb22044a0ff3c0b6fd3ef0f3f37d92aad39
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/198688
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

6 years agoARM: tegra11: dvfs: Upgrade CL-DVFS disable output ops
Alex Frid [Fri, 1 Feb 2013 07:05:11 +0000]
ARM: tegra11: dvfs: Upgrade CL-DVFS disable output ops

New CL-DVFS h/w (rev A02 of Tegra11 SoC) allows to disable CL-DVFS
output while I2C transaction is in progress without compromising bus
integrity. This commit added to platform data configuration option
<out_quiet_then_disable> that is set only for older versions of the
chip.

In case when <out_quiet_then_disable> option is not set, a procedure
for exiting closed loop mode to open loop mode is modified as follows:
- I2C output is disabled before the switch (while still operating in
closed loop mode) to avoid unnecessary voltage jump to "safe value"
- Possible transaction in progress is flushed after interface is
disabled
- Flush timeout is reported to the caller that initiated closed loop
exit (bus integrity is guaranteed even if timeout happens)

In addition output is now disabled while look-up table is reloaded
in cosed loop mode to avoid race between table write (s/w) and read
(h/w).

Bug 1159200

Change-Id: I9d0f0dfa55664c5792ca81018c127628d461da0b
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/198633
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

6 years agotlv320aic3xxx: add i2c shutdown implementation
Rahul Mittal [Tue, 5 Feb 2013 06:56:52 +0000]
tlv320aic3xxx: add i2c shutdown implementation

Adds i2c shutdown related checks
Bug 1226744

Change-Id: Ic9833dd620f108d6c4a339579b71e80c790503f9
Signed-off-by: Rahul Mittal <rmittal@nvidia.com>
Reviewed-on: http://git-master/r/197860
Reviewed-by: Vijay Mali <vmali@nvidia.com>
Reviewed-by: Scott Peterson <speterson@nvidia.com>

6 years agodriver: max17042: Set correct temperature range
Graziano Misuraca [Thu, 31 Jan 2013 02:20:28 +0000]
driver: max17042: Set correct temperature range

Max17042 returns the temperature in deci-celsius.
The temperature range was set to +/-70 which is
actually only +/- 7 degrees. Change the range to
-20 to +70 C so that the driver does not incorrectly
believe the battery is overheating.

Bug 1220507

Change-Id: I6046933cc7597bd4051673238261219ce8cfa106
Signed-off-by: Graziano Misuraca <gmisuraca@nvidia.com>
Reviewed-on: http://git-master/r/195782
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Gaurav Batra <gbatra@nvidia.com>
Tested-by: Gaurav Batra <gbatra@nvidia.com>
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>

6 years agoarm: tegra: Enabled LDO4 tracking in Dalmore for FAB A02 & above
Sumit Sharma [Wed, 6 Feb 2013 11:31:20 +0000]
arm: tegra: Enabled LDO4 tracking in Dalmore for FAB A02 & above

Enabled LDO4 tracking support for Dalmore Fab version A02 & above

Bug 1220546

Change-Id: I989d2c43ed506689833c60bbeb14714df12cd22a
Signed-off-by: Sumit Sharma <sumsharma@nvidia.com>
Reviewed-on: http://git-master/r/197933
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

6 years agoregulator: max77663: Changed SD0 & SD1 regulator data
Sumit Sharma [Wed, 6 Feb 2013 10:51:14 +0000]
regulator: max77663: Changed SD0 & SD1 regulator data

Added support for changing SD0 & SD1 regulator data for
MAX77663D PMU version

Bug 1220546

Change-Id: I2b0f396a2f2d171f5657c2d3cd845d3b1ffa16d3
Signed-off-by: Sumit Sharma <sumsharma@nvidia.com>
Reviewed-on: http://git-master/r/197932
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

6 years agomfd: max77663: Added chip version reading support
Sumit Sharma [Wed, 6 Feb 2013 10:49:12 +0000]
mfd: max77663: Added chip version reading support

Added support for reading chip version

Bug 1220546

Change-Id: I5a5a223ae2f027c9e1423b5c087c28b0fabb2645
Signed-off-by: Sumit Sharma <sumsharma@nvidia.com>
Reviewed-on: http://git-master/r/197931
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

6 years agoarm:tegra:pluto: Enable pull-up for MDM1 UART RX
Alexandre Berdery [Tue, 5 Feb 2013 10:18:05 +0000]
arm:tegra:pluto: Enable pull-up for MDM1 UART RX

Bug 1180005

Change-Id: Icb3a45b8c6ce68168b4b2e890493fc1456044cf4
Signed-off-by: Alexandre Berdery <aberdery@nvidia.com>
Reviewed-on: http://git-master/r/197418
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

6 years agoxhci: tegra: free xhci_hcd after usb_put_hcd
gzhou [Tue, 5 Feb 2013 09:37:15 +0000]
xhci: tegra: free xhci_hcd after usb_put_hcd

During the procedure of usb_remove_hcd(), xhci_stop() will be called
to stop host controller. xhci_hcd context must be valid at the time
xhci_stop() invoked. Hence, free xhci_hcd only when it's safe to do.

Bug 1230633

Change-Id: I0138caa32e8ab717f073f537e2252c4b086a79af
Signed-off-by: gzhou <gzhou@nvidia.com>
Reviewed-on: http://git-master/r/197417
Reviewed-by: Jui Chang Kuo <jckuo@nvidia.com>
Reviewed-by: Bharath Yadav <byadav@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Ajay Gupta <ajayg@nvidia.com>
Tested-by: Ajay Gupta <ajayg@nvidia.com>
Reviewed-by: Ashutosh Jha <ajha@nvidia.com>

6 years agousb: gadget: tegra: Add USB NV Charger Support
Rohith Seelaboyina [Tue, 5 Feb 2013 10:30:24 +0000]
usb: gadget: tegra: Add USB NV Charger Support

Add Support for NV charger and set correct current limits
for nv charger and non standard charger.

Bug 1225941

Change-Id: I3e9e6749e6df1929f961133e724602ffa0ded63d
Signed-off-by: Rohith Seelaboyina <rseelaboyina@nvidia.com>
Reviewed-on: http://git-master/r/197382
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

6 years agoarm: tegra: soctherm: changes to support throttling on GPU zone
Diwakar Tundlam [Fri, 1 Feb 2013 22:21:12 +0000]
arm: tegra: soctherm: changes to support throttling on GPU zone

Old code was resuming only CPU zone initiates throttling. Fixed INTR
handling, threshold setting, etc.

Added support to bind cooling devices to GPU (or PLL, MEM) zone.
Added support to set hotspot offsets for cpu, gpu, mem zones.

Cleaned up some unnecessary code.

Bug 1169070
Bug 1200077

Change-Id: If584d1acee301d97ff169b65e8451e9ebd8c4ffe
Signed-off-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-on: http://git-master/r/196657
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Jinyoung Park <jinyoungp@nvidia.com>

6 years agoARM: tegra: kai: Fix build issue
Suresh Mangipudi [Thu, 31 Jan 2013 14:44:48 +0000]
ARM: tegra: kai: Fix build issue

Kai has build issue, the cherry-pick from rel_16 has a stale variable.
Remove the stale variable to fix this issue.

Bug 1231808

Change-Id: Ieab646792bc9d8b4728d8b57143b6d3410c24252
Signed-off-by: Suresh Mangipudi <smangipudi@nvidia.com>
Reviewed-on: http://git-master/r/196020
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

6 years agoARM: tegra: usb_phy: Fix terminiation delay for NvCharger
Rohith Seelaboyina [Tue, 5 Feb 2013 10:03:59 +0000]
ARM: tegra: usb_phy: Fix terminiation delay for NvCharger

Increase termination delay to stabilize the line status

Bug 1225941

Change-Id: Iee3b4eb80e01269e16326a9d6795938e3c8949ae
Signed-off-by: Rohith Seelaboyina <rseelaboyina@nvidia.com>
Reviewed-on: http://git-master/r/195532
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

6 years agopower: bq2419x: use regmap_update_bits
Syed Rafiuddin [Wed, 6 Feb 2013 15:16:20 +0000]
power: bq2419x: use regmap_update_bits

use regmap_update_bits to update the registers

Change-Id: I05d78447ea24bf54150d02e95f24941e4518c473
Signed-off-by: Syed Rafiuddin <srafiuddin@nvidia.com>
Reviewed-on: http://git-master/r/195162
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

6 years agoARM: tegra11x: Add stats for clock gating@Vmin
Bo Yan [Tue, 5 Feb 2013 23:40:06 +0000]
ARM: tegra11x: Add stats for clock gating@Vmin

bug 1049931

Change-Id: I94a751cf7cf58e6930c53975912b34cb65d7bd6c
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/198019
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Peter Boonstoppel <pboonstoppel@nvidia.com>

6 years agoARM: tegra11x: clock gating at Vmin in CPU idle
Bo Yan [Tue, 5 Feb 2013 22:48:37 +0000]
ARM: tegra11x: clock gating at Vmin in CPU idle

Force Vmin by dropping DFLL rate to minimum in cluster idle state if
power gating non-CPU partition and rail gating are not as power
efficient.

bug 1049931

Change-Id: I83a9d1f55995c4ab14d5afb1095877b23b25de09
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/198018
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Peter Boonstoppel <pboonstoppel@nvidia.com>

6 years agoARM: tegra11x: debugfs entry for clk gating at vmin
Bo Yan [Tue, 5 Feb 2013 22:18:45 +0000]
ARM: tegra11x: debugfs entry for clk gating at vmin

By default, this is 0, meaning we are not forcing clock gating at vmin
, whether or not to do clock gating at vmin is cpuidle driver's
decision.

If it's set to 1, it will force clock gating at vmin whenever cpuidle
driver decides to do cluster power down on fast cluster.

If it's set to 2, it will never do clock gating at vmin.

Change-Id: Id35851ea95cd6421f35001b66d3453a4c9065361
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/198017
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Peter Boonstoppel <pboonstoppel@nvidia.com>

6 years agoARM: tegra11: clock: Add graphics bus capping interface
Alex Frid [Sat, 2 Feb 2013 07:59:04 +0000]
ARM: tegra11: clock: Add graphics bus capping interface

Added sysfs nodes to limit Tegra11 graphics bus rate:

/sys/kernel/tegra_cap/cbus_cap_level
/sys/kernel/tegra_cap/cbus_cap_state

Bug 1186037

Change-Id: I8659f8ac25eea78f8fb7fadda0130fc32c884e02
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/196731
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

6 years agoARM: tegra: clock: Moved common bus capping code
Alex Frid [Sat, 2 Feb 2013 06:31:50 +0000]
ARM: tegra: clock: Moved common bus capping code

Moved common shared bus capping code into a separate file (currently
bus capping is supported on Tegra3 only).

Bug 1186037

Change-Id: Ie35c74cf9b4db65beacb9408942efb632c845193
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/196730
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

6 years agoinput: touch: raydium: report MSC_ACTIVITY event while leaving idle
Yogish Kulkarni [Fri, 1 Feb 2013 10:09:58 +0000]
input: touch: raydium: report MSC_ACTIVITY event while leaving idle

Remove CPU frequency boosting code baked into raydium driver.
Report MSC_ACTIVITY event while leaving idle state so that
CPU frequency governor can act.

Bug 1229219

Change-Id: Id3823e631bb068615bc506862c06c5ad3ff96341
Signed-off-by: Yogish Kulkarni <yogishk@nvidia.com>
Reviewed-on: http://git-master/r/196391
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Robert Collins <rcollins@nvidia.com>
Reviewed-by: Li Li (SW-TEGRA) <lli5@nvidia.com>

6 years agoInput: add MSC_ACTIVITY event for reporting early input activity
Yogish Kulkarni [Sat, 2 Feb 2013 08:42:10 +0000]
Input: add MSC_ACTIVITY event for reporting early input activity

Input devices which depends on host processor for converting raw
samples to input event needs to report early event so that CPU
frequency governor can act to boost process of converting raw
samples to input event data. Direct touch technology based
device is an example where computation happens on CPU instead
of dedicated controller.

Bug 1229219

Change-Id: I404fb30e2a05f8092d194825488db017e7e935af
Signed-off-by: Yogish Kulkarni <yogishk@nvidia.com>
Reviewed-on: http://git-master/r/196737
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agoinput-cfboost: monitor keypad & joystick events
Yogish Kulkarni [Wed, 6 Feb 2013 13:15:59 +0000]
input-cfboost: monitor keypad & joystick events

Add signatures of keypad & joystick devices to id table so
as to provide cpu boost for events from those devices.

Bug 1229219

Change-Id: If5e9f2669e437808e26a66bb9cd8b4cbfe97c286
Signed-off-by: Yogish Kulkarni <yogishk@nvidia.com>
Reviewed-on: http://git-master/r/197968
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agoARM: tegra11: dvfs: Apply constraints to nominal voltage
Alex Frid [Sun, 3 Feb 2013 07:20:19 +0000]
ARM: tegra11: dvfs: Apply constraints to nominal voltage

Applied rail constraints (offset/min/max) to nominal voltage when rail
is disabled or suspended. Effectively the only real change introduced
by this commit is application of debugfs offset, since nominal voltage
is always set within min/max rail limits.

Change-Id: If2bb13166353bc674b2e19141ad2af5428ed74d4
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/196777
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

6 years agoARM: tegra: dvfs: Update voltage recording in dfll mode
Alex Frid [Sun, 3 Feb 2013 06:17:19 +0000]
ARM: tegra: dvfs: Update voltage recording in dfll mode

In dfll mode rail voltage is adjusted automatically, but not exactly
to the expected level. When/if control is switched back from dfll h/w
cl-dvfs to s/w dvfs, false detection of matching voltage between new
target, and old dfll record is possible. To avoid this false detection
1mV was subtracted every time dfll voltage was recorded. After this
commit record is distorted by 1mV only once before the switch.

Change-Id: If3045293bda8c0240e2ce7fb3f1176288c9d150f
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/196776
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

6 years agoARM: tegra: dvfs: Add rail NULL-pointer check
Alex Frid [Sun, 3 Feb 2013 05:51:27 +0000]
ARM: tegra: dvfs: Add rail NULL-pointer check

Add rail NULL-pointer check in public interfaces.

Change-Id: If4174471d6d9ce6935316db72ec5bf273cb2b486
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/196775
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

6 years agoARM: tegra: dvfs: Increase number of rail stats bins
Alex Frid [Sun, 3 Feb 2013 05:40:37 +0000]
ARM: tegra: dvfs: Increase number of rail stats bins

Change-Id: I0a043ff1f4a2fc665c41f75ac8e91107bdbf1c83
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/196774
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

6 years agoARM: config: tegra11: enable CONFIG_INPUT_CFBOOST
Yogish Kulkarni [Sat, 2 Feb 2013 16:32:29 +0000]
ARM: config: tegra11: enable CONFIG_INPUT_CFBOOST

Enable input event CPU frequency booster.

Bug 1229219

Change-Id: I271ed1806bc69f606b10d4cfcc0fe80a160cbaad
Signed-off-by: Yogish Kulkarni <yogishk@nvidia.com>
Reviewed-on: http://git-master/r/196757
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

6 years agoRevert "ARM: Tegra: Dalmore: Add wakeup callback"
Sachin Nikam [Thu, 7 Feb 2013 11:15:11 +0000]
Revert "ARM: Tegra: Dalmore: Add wakeup callback"

This reverts commit 9852cf7ca98bf62abb1d5c1070f482c598a15a5b.

Bug 1229893

Change-Id: Iba5edca87e5ec4b6d31afe35e90df4f7e23b225b
Signed-off-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-on: http://git-master/r/198348
Reviewed-by: Automatic_Commit_Validation_User

6 years agohwmon: ina230: use correct configuration modes
Deepak Nibade [Wed, 6 Feb 2013 15:47:24 +0000]
hwmon: ina230: use correct configuration modes

Bug 1228591

Change-Id: I5a4b2b59d32118d57ee0ff6c21b8423268fc1926
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/197993
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

6 years agoARM: tegra: roth: set SMPS12, 3, 9 to NORMAL mode.
Laxman Dewangan [Wed, 6 Feb 2013 11:21:33 +0000]
ARM: tegra: roth: set SMPS12, 3, 9 to NORMAL mode.

This change sets the smps12, 3 and 9 to run at pfm mode
when working current is below 200mA to save IQ of 11mA.

Bug 1231109

Change-Id: Ie6c006555b5260aec09e6ec86519af46ff94f00d
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/197926
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

6 years agoasoc: tegra: add speaker AMP EDP support
Dara Ramesh [Tue, 5 Feb 2013 12:47:33 +0000]
asoc: tegra: add speaker AMP EDP support

a) added speaker AMP EDP support for TI codec
b) set speaker AMP EDP state with E1 in probe function

Bug 1160686

Change-Id: I749ec8aba26d83fdd29aba2080230da5161d0c9e
Signed-off-by: Dara Ramesh <dramesh@nvidia.com>
Reviewed-on: http://git-master/r/197478
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

6 years agoARM: tegra: macallan: enable support for wl8
Nagarjuna Kristam [Tue, 5 Feb 2013 09:42:59 +0000]
ARM: tegra: macallan: enable support for wl8

Bug 1179655

Change-Id: I98ced4d3f59127316a138c421b14609e3bdfe86b
Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-on: http://git-master/r/197398
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

6 years agoTI Bluetooth: Adding TTY HCI driver
Raghavendra Shenoy Mathav [Tue, 22 Jan 2013 11:45:37 +0000]
TI Bluetooth: Adding TTY HCI driver

Signed-off-by: Raghavendra Shenoy Mathav <raghavendra.shenoy@ti.com>

Bug 1179655

Change-Id: If34ce056025d52d213e70cd55d6e056bed8b3486
Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-on: http://git-master/r/196969
Reviewed-by: Rakesh Kumar <krakesh@nvidia.com>
Reviewed-by: Rakesh Goyal <rgoyal@nvidia.com>
Tested-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agoARM: tegra11: use mW values for battery EDP states
Sivaram Nair [Wed, 30 Jan 2013 09:21:12 +0000]
ARM: tegra11: use mW values for battery EDP states

tegra11 board data is changed to specify E-state values in mW.

Change-Id: I6277112a8db5d198f614e4203604699f5b385f0c
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
(cherry picked from commit f651d38b5f0f38fb7b12ab0d383c926610e6df68)
Reviewed-on: http://git-master/r/196360
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

6 years agomedia: tegra: imx091: use mW E-states
Sivaram Nair [Wed, 30 Jan 2013 09:16:26 +0000]
media: tegra: imx091: use mW E-states

The camera driver's E-states are changes to use mW values instead of mA.

Change-Id: Ib5929cf45404fdf0c5fb332027fa909f5a6efc48
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
(cherry picked from commit 2868d8c74df6c8380beebf6c9d7297fdfa84c45d)
Reviewed-on: http://git-master/r/196359
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

6 years agopower: max17042: use mW E-states for depletion
Sivaram Nair [Wed, 30 Jan 2013 09:11:20 +0000]
power: max17042: use mW E-states for depletion

The battery depletion client is changed to specify its E-states in mW
instead of mA.

Change-Id: I266e2e9179449134a81dec0a80698826fc208e37
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
(cherry picked from commit 1ee511d7bc581a97156a613d36a2bc7b859c48fb)
Reviewed-on: http://git-master/r/196358
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

6 years agoARM: tegra11: use mW values for battery EDP
Sivaram Nair [Wed, 30 Jan 2013 09:01:28 +0000]
ARM: tegra11: use mW values for battery EDP

The battery EDP manager for tegra11 boards needs to start using mW
values instead of mA.

Change-Id: I378b79d0b1e12251526ca8c3acf1105765c8f86b
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
(cherry picked from commit 5a03d500f0928ddea4165de0bad7a5d77e85ccd7)
(Conflicts resolved manually)
Reviewed-on: http://git-master/r/196357
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

6 years agoEDP: renaming imax to max
Sivaram Nair [Wed, 30 Jan 2013 08:50:57 +0000]
EDP: renaming imax to max

The edp_manager structure's imax member is renamed to max so that it is
not tied to any specific units.

Change-Id: I01f538ec17d3f04d8ad3e7e904e2ba8b4cc0c339
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
(cherry picked from commit 2b4e001b7303ab4c614d8cbc6fe5d1acb98244e6)
(Conflicts resolved manually)
Reviewed-on: http://git-master/r/196356
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

6 years agoARM: tegra: t114: Mask UHS Modes for SDMMC1, SDMMC3
Naveen Kumar Arepalli [Mon, 28 Jan 2013 17:03:00 +0000]
ARM: tegra: t114: Mask UHS Modes for SDMMC1, SDMMC3

Mask SDR104,DDR50,SDR50 modes for Dalmore(E1611)
Mask DDR 50 for ROTH.

Bug 1189241

Change-Id: I574315c2b557d9563a384db8f59c97bb0ddb5566
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-on: http://git-master/r/194740
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

6 years agoARM: tegra: configs: Enable bcm4335 driver as module
Nagarjuna Kristam [Tue, 15 Jan 2013 09:56:59 +0000]
ARM: tegra: configs: Enable bcm4335 driver as module

Bug 1216788
Bug 1159327

Change-Id: I9ac944201b94210c25fa125f60ae6110996f332e
Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-on: http://git-master/r/193397
(cherry picked from commit 9eaa84e2e4178c769e233d3fe3e623f3cf13148c)
Reviewed-on: http://git-master/r/191210
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Rakesh Kumar <krakesh@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agonet: wireless: bcm4335: fix Kconfig and Makefile
Nagarjuna Kristam [Tue, 15 Jan 2013 09:51:36 +0000]
net: wireless: bcm4335: fix Kconfig and Makefile

Fix Kconfig and Makefile to build bcm4335 independently

Bug 1216788
Bug 1159327

Change-Id: Id52ac1bb2615075b30672536ac01e1d8d347c112
Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-on: http://git-master/r/193396
(cherry picked from commit e9b14a6f7ec92e49cb626d32aba5aa1526a256d2)
Reviewed-on: http://git-master/r/191209
Reviewed-by: Rakesh Kumar <krakesh@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agonet: wireless: add bcm4335 driver
Nagarjuna Kristam [Tue, 15 Jan 2013 09:45:17 +0000]
net: wireless: add bcm4335 driver

Bug 1216788
bug 1159327

Change-Id: Ie1eff46ecd31e65c14aebba69d1bfc2a3ae4cad1
Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-on: http://git-master/r/193395
(cherry picked from commit c4497ca4faa61225101f6889757a2f2924561754)
Reviewed-on: http://git-master/r/191206
Reviewed-by: Rakesh Kumar <krakesh@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agovideo: tegra: dsi: Optimize controller init delay
Animesh Kishore [Thu, 31 Jan 2013 11:42:48 +0000]
video: tegra: dsi: Optimize controller init delay

Reduce controller initialization time.

Bug 1159770.
Bug 1210559.

Change-Id: I14d2abd565c468263349091eaa814ce50fd88a9c
Signed-off-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-on: http://git-master/r/195994
(cherry picked from commit 1e12c26d4aefdd5a749e7d01c131b0a5786516a6)
Reviewed-on: http://git-master/r/197218
Tested-by: Rakesh Iyer <riyer@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>

6 years agoARM: tegra: dalmore: Turn off DCDC1/2/3 in case system shuts down
Ahung Cheng [Thu, 3 Jan 2013 08:25:40 +0000]
ARM: tegra: dalmore: Turn off DCDC1/2/3 in case system shuts down

Enable DCDC1/2/3 external control to get TPS65913 signal, then these
three rails can be turned off when system shuts down.

Bug 1212493
Bug 1181403

Change-Id: I098192859529b53182d91c7e2110c051289c2926
Signed-off-by: Ahung Cheng <ahcheng@nvidia.com>
Signed-off-by: Ramalingam C <ramalingamc@nvidia.com>
Reviewed-on: http://git-master/r/188218
(cherry picked from commit ff96fdebe32d303480cb55e5c13c2020edae42ca)
Reviewed-on: http://git-master/r/196877
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

6 years agopower: max17048: display correct status at boot-up
Syed Rafiuddin [Fri, 1 Feb 2013 09:59:05 +0000]
power: max17048: display correct status at boot-up

disply proper charging status when booted up without
any charger cable connected

Change-Id: I18bd7702a62923a4f7675ea392be180f2ed03d7c
Signed-off-by: Syed Rafiuddin <srafiuddin@nvidia.com>
Reviewed-on: http://git-master/r/196368
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

6 years agoarm: tegra: soctherm: Fix setting hi-thresh for passive trips
Diwakar Tundlam [Tue, 5 Feb 2013 02:28:59 +0000]
arm: tegra: soctherm: Fix setting hi-thresh for passive trips

Set the hardware high-threshold = passive trip point instead of 128C.
There's only one passive trip point that software thermal governor
monitors (and polls if the temperature is higher).

This avoids certain thermal runaway cases, esp. with small passive
delays and large hysteresis because the high threshold = passive trip
point raises an interrupt if the temperature goes above it.

Bug 1200077

Change-Id: I4638a85065e4662ba44d291d6eb2ce13f39d5d52
Signed-off-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-on: http://git-master/r/197348
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

6 years agoThermal: Fix DEFAULT_THERMAL_GOVERNOR
Zhang Rui [Wed, 12 Dec 2012 07:31:37 +0000]
Thermal: Fix DEFAULT_THERMAL_GOVERNOR

Fix DEFAULT_THERMAL_GOVERNOR to be consistant with the
default governor selected in kernel config file.

Change-Id: Ied18b2c34b3c94e5da251afd42006d40c14346e0
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Reviewed-on: http://git-master/r/196447
Tested-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

6 years agoARM: tegra11x: Define ncpu residency for 2 clusters
Bo Yan [Tue, 5 Feb 2013 17:57:10 +0000]
ARM: tegra11x: Define ncpu residency for 2 clusters

There is no compelling reason to define minimum residency of non CPU
power gating for each different platform. Non CPU power gating has
far less dependency on platform in terms of latency when compared
against rail gating. So move this parameter to CPU specific idle
driver code.

Define minimum residency of non CPU power gating for both slow and
fast cluster. The entry criteria is different for two clusters, so
different value are required.

Change-Id: I3f734d056f6de6a804ca4c14e037a98bc07c646d
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/197537
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

6 years agoasoc: AIC3262: Fix headset detection failure during bootup
Vijay Mali [Tue, 5 Feb 2013 12:56:35 +0000]
asoc: AIC3262: Fix headset detection failure during bootup

Remove codec driver call for headset detection.
On Pluto headset detection is done using AP GPIO pin.
Remove unused code.

For bug 1228726

Change-Id: I4be5a0c89375749919eb3222293564318bde9547
Signed-off-by: Vijay Mali <vmali@nvidia.com>
Reviewed-on: http://git-master/r/197463
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Rahul Mittal <rmittal@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Scott Peterson <speterson@nvidia.com>

6 years agoARM: tegra: cpuquiet: fix race condition
Sang-Hun Lee [Tue, 5 Feb 2013 05:02:52 +0000]
ARM: tegra: cpuquiet: fix race condition

Remove race conditions around cpq_state access

Bug 1225764

Change-Id: I73f28b81d9488633294eaa04369f15993f742cb0
Signed-off-by: Sang-Hun Lee <sanlee@nvidia.com>
Reviewed-on: http://git-master/r/197265
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Peter Boonstoppel <pboonstoppel@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

6 years agoARM: tegra11x: Fix wake-up time adjustment
Bo Yan [Mon, 4 Feb 2013 19:09:57 +0000]
ARM: tegra11x: Fix wake-up time adjustment

The wake up time adjustment for per-core CPU power down entry has
a few issues: the logic of checking masking bit is wrong and
unnecessary, the timer function for getting context is not used
elsewhere and seems redundant, the calculating statement itself
is confusing.

This patch aims to fix issues above.

Change-Id: Id717f50005e0c32db80af786d9b1fbbe628c196a
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/197065
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>

6 years agoARM: mm: Skip I-cache invalidate for Cortex-A15 boot
Bo Yan [Thu, 31 Jan 2013 18:41:44 +0000]
ARM: mm: Skip I-cache invalidate for Cortex-A15 boot

This is not required since cache is invalidated by HW in the reset
sequence. Bootloader is supposed to do the same before it hands
over control to kernel.

Change-Id: I0991de3ba1015a32f2c49a0333fd0b17a51a4f31
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/197028
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: Antti Miettinen <amiettinen@nvidia.com>
Tested-by: Antti Miettinen <amiettinen@nvidia.com>

6 years agovideo: tegra: host: Init 3d scaling on probe
Arto Merilainen [Sat, 2 Feb 2013 08:48:40 +0000]
video: tegra: host: Init 3d scaling on probe

sysfs control nodes are created during 3d scaling initialization.
This change reorders 3d scaling initialization to occur during device
probe so that sysfs nodes are always available.

Bug 1223355
Bug 1229151

Change-Id: I626f18c5cd409050e51f51dacfd6b36bfbcf788c
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-on: http://git-master/r/196736
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mitch Luban <mluban@nvidia.com>
Tested-by: Mitch Luban <mluban@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
GVS: Gerrit_Virtual_Submit

6 years agohwmon: ina3221: implement shutdown
Deepak Nibade [Tue, 29 Jan 2013 08:20:53 +0000]
hwmon: ina3221: implement shutdown

Bug 1225028

Change-Id: I252cfc136f5fe2c2118ae4d24d5c2ba64fb94437
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/195027
Reviewed-by: Sri Krishna Chowdary <schowdary@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Anshul Jain (SW) <anshulj@nvidia.com>
Tested-by: Sang-Hun Lee <sanlee@nvidia.com>
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>

6 years agoThermal: pid_thermal_gov: Add compensation
Jinyoung Park [Thu, 17 Jan 2013 17:19:11 +0000]
Thermal: pid_thermal_gov: Add compensation

Added compensation to get steady state transition.
And added sysfs node for compensation rate.

Bug 1200111

Change-Id: Ic55e3d90185a4801dbd3ca37a3f302125ded378c
Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/193836
Tested-by: Edward Riegelsberger <eriegels@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

6 years agoarm: tegra: soctherm: PMC scratch register config for thermtrip
Diwakar Tundlam [Thu, 20 Dec 2012 20:56:10 +0000]
arm: tegra: soctherm: PMC scratch register config for thermtrip

Initalize PMC scratch registers with regulator PMIC I2C bus and address.
Setup parameters to do shutdown on THERMTRIP from soc_therm.

Bug 1200075

Change-Id: Ie9165febd88bd552c533e38c9cd073d8fe4f562d
Signed-off-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-on: http://git-master/r/173218
Reviewed-by: Matthew Longnecker <mlongnecker@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User

6 years agohwmon: ina230: add support for HPA01112
Laxman Dewangan [Tue, 5 Feb 2013 15:54:59 +0000]
hwmon: ina230: add support for HPA01112

TI HPA01112 is sw compatible with ina230. Add the module id for HPA01112.

Change-Id: If9c054d09c1fd8a2d29b363062a021ad0e99bb97
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/197499
GVS: Gerrit_Virtual_Submit

6 years agoregulator: palmas: Add ramp delay
Laxman Dewangan [Tue, 5 Feb 2013 12:28:24 +0000]
regulator: palmas: Add ramp delay

Add ramp delay configuration and handling so that when SMPS
voltage gets change, proper settling time can be handle by
driver.

bug 1195226
bug 1210989

Change-Id: I2520230f9d3cbe7e9d6b1f1375c86e1b1af2456a
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/197460
Reviewed-by: Automatic_Commit_Validation_User

6 years agoregulator: add support for ramp delay
Laxman Dewangan [Tue, 5 Feb 2013 12:26:03 +0000]
regulator: add support for ramp delay

Add support for ramp delay which can be configured:
- by passing value from constraints.
- by initialising descriptor.

Also add generic API to provide ramp delay support function.

Change-Id: If22880672aa5cbdf930dd010e4b05c3083028e0b
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/197459
Reviewed-by: Automatic_Commit_Validation_User

6 years agoARM: tegra: fix balanced throttling behaviour
Hyungwoo Yang [Wed, 30 Jan 2013 02:42:12 +0000]
ARM: tegra: fix balanced throttling behaviour

This change enables balanced throttling to throttle
frequencies of components individually.

Reviewed-on: http://git-master/r/195368
(cherry picked from commit aa2e22edbbecf8621ab2c0d56a05c967101aae12)
Change-Id: If260229387127d29aba6bfd02cd505597f992921
Signed-off-by: Hyungwoo Yang <hyungwooy@nvidia.com>
Reviewed-on: http://git-master/r/197152
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

6 years agoarm: tegra: pluto: add min_cpu_freq platform data
Nagarjuna Kristam [Mon, 4 Feb 2013 11:10:37 +0000]
arm: tegra: pluto: add min_cpu_freq platform data

Set 102 MHz as data for min_cpu_freq platform data of bluedroid_pm driver.

Bug 1199183

Change-Id: I653d819ecd61db48ef016a0981c8e100f0cd3a56
Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-on: http://git-master/r/196955
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User

6 years agomisc: bluedroid_pm: set minimum CPU frequency
Nagarjuna Kristam [Mon, 28 Jan 2013 10:14:59 +0000]
misc: bluedroid_pm: set minimum CPU frequency

A2DP streaming uses Software SBC encoder which needs certain minimum
frequency. After system resume, system starts scaling frequency from
lowest possible frequency to required operating frequency. If
starting frequency is lower than minimum frequency required for A2DP,
it might result in audio glitches for small duration. Specifying
minimum CPU frequency required to support A2DP solves this issue.

bluedroid_pm driver will configure minimum CPU frequency if specified
in bluedroid_pm platform data.

Bug 1199183

Change-Id: Ia1763ba7803d456442b28a6e1adfe2ff87827998
Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-on: http://git-master/r/194636
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User

6 years agoARM: tegra: sdhci: Enable sd_detect_in_suspend flag
Naveen Kumar Arepalli [Tue, 29 Jan 2013 10:56:28 +0000]
ARM: tegra: sdhci: Enable sd_detect_in_suspend flag

Based on sd_detect_in_suspend flag card detect tasklet
will be called to detect sd card

Bug 1204527

Change-Id: I33c08e01014b8fc919990e9a0cea6226e659a1d3
Signed-off-by: Naveen Kumar Arepalli <naveenk@nvidia.com>
Reviewed-on: http://git-master/r/192719
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>

6 years agoARM: Tegra: Macallan: Add wakeup callback
Kerwin Wan [Thu, 31 Jan 2013 13:49:21 +0000]
ARM: Tegra: Macallan: Add wakeup callback

Add macallan_wakeup_key callback to send
proper event on wake.

Bug 1220330

Change-Id: I7fe68945b68ef569a4d27a1a8db7117c5b351b51
Signed-off-by: Kerwin Wan <kerwinw@nvidia.com>
Reviewed-on: http://git-master/r/196841
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

6 years agoarm: tegra: macallan: Enable sensors
hyongbink [Mon, 4 Feb 2013 03:56:27 +0000]
arm: tegra: macallan: Enable sensors

Sensors were disabled during bringup. Now register the
right sensors and enable them.

Change-Id: If94df9d0b4761e23fceeeb78eefbe945b0a256ac
Signed-off-by: hyongbink <hyongbink@nvidia.com>
Signed-off-by: Kerwin Wan <kerwinw@nvidia.com>
Reviewed-on: http://git-master/r/196828
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

6 years agoconfig: tegra3/11: enable ACL for tmpfs
Mursalin Akon [Fri, 1 Feb 2013 18:25:42 +0000]
config: tegra3/11: enable ACL for tmpfs

enable ACL for tmpfs to allow udev to
set extended permission.

Bug 1219372

Change-Id: Icf56cef4fdebc25dfb960694e51f40f8128a0ac8
Signed-off-by: Mursalin Akon <makon@nvidia.com>
Reviewed-on: http://git-master/r/196513
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Allen Martin <amartin@nvidia.com>

6 years agohwmon: ina230: add support for HPA02149
Laxman Dewangan [Fri, 1 Feb 2013 10:57:16 +0000]
hwmon: ina230: add support for HPA02149

The TI current/power monitor device INA230 is compatible with the
HAP02149. Add module ID for the HPA02149.

This device is also compatible with INA226 and hence adding ina226
as module-id.

In this way, this driver can regsitered with the name as "ina226" or
"ina230" or "hpa02149".

bug 1218687

Change-Id: Ic67227bc6d415fd559d804f4bd97e4ea4018d872
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/196411

6 years agoARM: tegra11: power: Set safe cold voltage in DFLL mode
Alex Frid [Thu, 31 Jan 2013 22:52:01 +0000]
ARM: tegra11: power: Set safe cold voltage in DFLL mode

Used regulator API to set CPU voltage at cold temperature minimum
limit if DFLL is selected as fast G CPU clock source, and

- CPU is switching to LP cluster
- on entry to system suspend

This is done since in both cases: suspend and LP cluster operations,
CPU rail is off while temperature may go down, and on exit from each
state CPU will be running on DFLL clock for some time before CL-DVFS
regulation starts.

Change-Id: I02e06a2e92f348a147693ad2b811d7bedb4e70e2
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/196289
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

6 years agoARM: tegra11: dvfs: Don't force CL-DVFS request entering open loop
Alex Frid [Thu, 31 Jan 2013 20:20:26 +0000]
ARM: tegra11: dvfs: Don't force CL-DVFS request entering open loop

Don't force CL-DVFS request when entering open loop (in order to
avoid unnecessary extra transaction).

Change-Id: I25955920d4d1a9d5d96007c09694a923c000e148
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/196288
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bo Yan <byan@nvidia.com>

6 years agoarm: tegra: color correct 5" Sharp 1080p panel
Mitch Luban [Thu, 31 Jan 2013 02:39:27 +0000]
arm: tegra: color correct 5" Sharp 1080p panel

Enable color management for 5" Sharp 1080p panel.

Bug 1220543

Reviewed-on: http://git-master/r/195800
(cherry picked from commit a775c3639c1467598d0e7d4f2b0c37b091583911)

Change-Id: Iab79f1bb0a80b6cd3c5ad18e8cf39765af2bf807
Signed-off-by: Mitch Luban <mluban@nvidia.com>
Reviewed-on: http://git-master/r/196240
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jon Mayo <jmayo@nvidia.com>