5 years agoasoc; tegra: Increase Realtek speaker gain.
Scott Peterson [Sun, 26 May 2013 17:01:05 +0000]
asoc; tegra: Increase Realtek speaker gain.

Increase the class D speaker gain in Realtek
codec.

Bug 1278531

Change-Id: I55dc5c809a291ff782a2c36ebab1fb07148bc5ee
Signed-off-by: Scott Peterson <speterson@nvidia.com>
(cherry picked from commit bfee36e20c7134d611fe578abbe3a864c9fdaf6a)
Reviewed-on: http://git-master/r/234957
Reviewed-by: Harshada Kale <hkale@nvidia.com>
Tested-by: Harshada Kale <hkale@nvidia.com>

5 years agoarm: tegra: tegratab: set KB_COL1 input with internal PU
Simon Je [Wed, 29 May 2013 07:20:28 +0000]
arm: tegra: tegratab: set KB_COL1 input with internal PU

To get hall sensor input on DVT A00,
set KB_COL1 pin as gpio input with internal PU

Bug 1296922

Change-Id: Ib0b6a3422c12598199cfaaf887c6dc3b6bfc2589
Signed-off-by: Simon Je <sje@nvidia.com>
(cherry picked from commit 22c69c067a5e7e557caa242225ed6c301f7149c7)
Reviewed-on: http://git-master/r/234871
Reviewed-by: Youngjin Kim <nkim@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
GVS: Gerrit_Virtual_Submit

5 years agoarm: tegra: tegratab: enable clk_out_3
Shawn Joo [Wed, 8 May 2013 13:06:36 +0000]
arm: tegra: tegratab: enable clk_out_3

enable clk_out_3 as default.
it is source input clk for rtc_clk in Comm module for P1640 FAB A00.

Bug 1278403
Bug 1286467

Change-Id: I421c5447246c4a024be68b27bcf6f9f31ad2bf5f
Signed-off-by: Shawn Joo <sjoo@nvidia.com>
Reviewed-on: http://git-master/r/226695
Reviewed-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Harry Hong <hhong@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

5 years agomedia:video:tegra: adjusting ad5823 value
Karl Kim [Tue, 4 Jun 2013 11:08:35 +0000]
media:video:tegra: adjusting ad5823 value

settletime / POW_LOW / POS_HIGH / VCM_MODE_TIME value is adjusted
by result of ad5823 characterization.

Bug 1288326

Change-Id: Ibb22927049610d6ea3b5df499b2aa322c2d3e548
Signed-off-by: Karl Kim <kkim@nvidia.com>
Reviewed-on: http://git-master/r/235435
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Jake Park <jakep@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

5 years agomedia: video: tegra: Fix ov5693 preview flashing issue
Frank Chen [Sat, 1 Jun 2013 08:06:10 +0000]
media: video: tegra: Fix ov5693 preview flashing issue

Set MGC register to use sensor gain instead of real gain.

Change-Id: I949637ec50230539bccdb0acfc4e069165fba33d
Signed-off-by: Frank Chen <frankc@nvidia.com>
Reviewed-on: http://git-master/r/234764
Reviewed-on: http://git-master/r/234785
(cherry picked from commit 25bd6126c61fb839411ae9570249f465b005722c)
Reviewed-on: http://git-master/r/236900
Reviewed-by: Yin-Chia Yeh <yyeh@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

5 years agoCamera: Kernel: modified ov5693 power on/off sequence
Alvin Park [Wed, 29 May 2013 07:31:07 +0000]
Camera: Kernel: modified ov5693 power on/off sequence

1. modified ov5693 power on/off sequence
2. removed unused power rail
3. removed delay code

Bug 1234944

Change-Id: I681088faeb3dd663bae1e3f827270da2270a65f2
Signed-off-by: Alvin Park <apark@nvidia.com>
Reviewed-on: http://git-master/r/233584
(cherry picked from commit 1a6856f773b4a27d1d1035abea7958c0dc190b56)
Reviewed-on: http://git-master/r/236899
Reviewed-by: Frank Chen <frankc@nvidia.com>
Tested-by: Frank Chen <frankc@nvidia.com>
Reviewed-by: Yin-Chia Yeh <yyeh@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

5 years agoinput: touch: maxim: update cpu boost
David Jung [Fri, 17 May 2013 19:16:01 +0000]
input: touch: maxim: update cpu boost

Nvidia change to update cpu boost to use MSC Activity

Bug 1290845
Bug 1302936

Change-Id: I31e71d7801c80db0fd32d17bb12a628123eac7cf
Signed-off-by: David Jung <djung@nvidia.com>
Reviewed-on: http://git-master/r/234302
(cherry picked from commit 38393a0bcefad477254a19b563ed2842e355c62b)
Reviewed-on: http://git-master/r/229856
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Yogish Kulkarni <yogishk@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-by: Robert Collins <rcollins@nvidia.com>
Reviewed-by: Li Li (SW-TEGRA) <lli5@nvidia.com>
Reviewed-by: Scott Peterson <speterson@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agoARM: tegra{3,11}: config: Enable CMA & IOMMU
Hiroshi Doyu [Fri, 7 Jun 2013 11:08:20 +0000]
ARM: tegra{3,11}: config: Enable CMA & IOMMU

Enabled CMA & IOMMU

Change-Id: I54550f6bbcf67b1ff61126a75ec1e9e9014cc125
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/236725
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

5 years agotegra/iommu: smmu: Add linear map support at unmap
Hiroshi Doyu [Mon, 20 May 2013 06:16:26 +0000]
tegra/iommu: smmu: Add linear map support at unmap

Add linear map support at unmap

bug 1286500

Change-Id: I093ddf8ab6c72fd917107944edef3e465414e345
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/234139
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

5 years agoiommu/tegra: smmu: rel-17 fixup
Hiroshi Doyu [Fri, 17 May 2013 11:28:18 +0000]
iommu/tegra: smmu: rel-17 fixup

Fix a gap between m/main and rel-17.

rel-17 hasn't enable PLATFORM_ENABLE_IOMMU yet.

bug 1286500

Change-Id: Ic860fb081ae7178dc997bbf947990c6cf1de4a41
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/234138
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

5 years agoARM: dma-mapping: Add new API dma_ops->map_pages()
Hiroshi Doyu [Wed, 3 Apr 2013 12:51:20 +0000]
ARM: dma-mapping: Add new API dma_ops->map_pages()

Add new API dma_ops->map_pages() for performance

bug 1286500

Change-Id: Ib8bbcad53024225173be765358af03d0961f8af0
(cherry picked from commit 1e3b6ee46a5defaa8e1fcc97fc5d9b619c481c41)
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/234137
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

5 years agoARM: dma-mapping: Round-up IOVA map base
Hiroshi Doyu [Wed, 15 May 2013 07:38:18 +0000]
ARM: dma-mapping: Round-up IOVA map base

This is necessary for iova_alloc_at(). On high order allocation, the
lower bit of base was ignored, and it returns incorrect IOVA address.

bug 1286500

Change-Id: I0be96b97c8036f8a5bc1c35a1c85e04593021a2b
(cherry picked from commit from 578a5333d43b2c9a78f0a234d391c2f8f5382b5d)
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/234136
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

5 years agovideo: tegra: nvmap: Add tegra_iovmm_vm_insert_pages()
Hiroshi Doyu [Wed, 3 Apr 2013 11:30:36 +0000]
video: tegra: nvmap: Add tegra_iovmm_vm_insert_pages()

Use ops->map_pages() for nvmap.

bug 1286500

Change-Id: Ibaaf27a3c5cb4086561f1b4bcd40ebb5a40cd12c
(cherry picked from commit c8453b97711a9af0d4913de16574fab6bf97d07c)
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/234135
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

5 years agoARM: dma-mapping: Add macro to_dma_iommu_mapping()
Hiroshi Doyu [Wed, 5 Dec 2012 16:50:49 +0000]
ARM: dma-mapping: Add macro to_dma_iommu_mapping()

To build without CONFIG_ARM_DMA_USE_IOMMU

bug 1286500

Change-Id: I1a6e385bd6b4039fcc37e120893b98e3ef590746
(cherry picked from commit 094c98e7c4346961b9ad7f741a5d3756c671a071)
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/234134
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

5 years agoARM: dma-mapping: Add arm_iommu_detach_device()
Hiroshi Doyu [Thu, 24 Jan 2013 12:49:32 +0000]
ARM: dma-mapping: Add arm_iommu_detach_device()

Need the counter part of arm_iommu_attach_device().

bug 1286500

Change-Id: I7663075ba56e0cf7a0762927247bfb5b884cd750
(cherry picked from commit 96425941ba18e0aa68e22cdd476bd3e521aa8256)
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/234133
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

5 years agoiommu/tegra: smmu: Add Tegra errata 1053704 for some of Tegra SoC
Hiroshi Doyu [Fri, 3 May 2013 03:18:02 +0000]
iommu/tegra: smmu: Add Tegra errata 1053704 for some of Tegra SoC

Add workaround of TEGRA_ERRATA_1053704 for some of Tegra SoC

bug 1286500

Change-Id: I7d1a75b198051bc49eb7e14e4e7892eab9818f29
(cherry picked from commit fc688d6f91ae4250cb16274bc8b41875ead06b4e)
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/234132
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

5 years agoiommu/core: Add new API iommu_map_pages()
Hiroshi Doyu [Wed, 3 Apr 2013 12:50:44 +0000]
iommu/core: Add new API iommu_map_pages()

Add new API iommu_map_pages() to call iommu_ops->map_pages()
internally.

bug 1286500

Change-Id: I37605703def34bba774e480b29506c459d6391bd
(cherry picked from commit 11ed57ffcbd908e12c1fd836211beed4fc577833)
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/234131
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

5 years agoiommu/tegra: smmu: Add ->map_pages() for perf
Hiroshi Doyu [Wed, 3 Apr 2013 12:50:17 +0000]
iommu/tegra: smmu: Add ->map_pages() for perf

Implement iommu_ops->map_pages() for tegra-smmu.

bug 1286500

Change-Id: I0d50d2e73cd9d4c17416e67f100de7194078808f
(cherry picked from commit dfee95817e0150223a06a8062a21e3889903a428)
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/234129
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

5 years agoiommu/tegra: smmu: iterate {SECTION,GROUP} instead of TLB_FLUSH_ALL
Hiroshi Doyu [Mon, 22 Apr 2013 10:10:00 +0000]
iommu/tegra: smmu: iterate {SECTION,GROUP} instead of TLB_FLUSH_ALL

TLB_FLUSH_{ALL,ASID} has SMMU H/W bug at HUM OoO. To work around
this H/W bug, iterate TLB_FLUSH_{SECTION,GROUP} for all PDIR index
instead of TLB_FLUSH_ALL although a big perf penalty is expected.

Enable flush_{ptc,tlb}_all when unmap entry is larger than some
specific value. The threshold value can be set to define how many
entries to use flush_ptc_tbl_all via debugfs entry,
"flush_all_threshold".

bug 1286500

Change-Id: I3e8f1eb0316a6829a14661b8e1d4cfcd7e2ec85b
(cherry picked from commit 0aad4b30dde6fd6dd2d86536c6797d83c79830b4)
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/234128
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

5 years agoiommu/tegra: smmu: Add smmu_flush_{ptc,tlb}_range()
Hiroshi Doyu [Thu, 2 May 2013 08:45:14 +0000]
iommu/tegra: smmu: Add smmu_flush_{ptc,tlb}_range()

Add smmu_flush_{ptc,tlb}_range(), a little bit more efficient because
it skips unnecessary flushing by unit.

bug 1286500

Change-Id: I879d39d6e514662c1ce70fa4e3bc62a3eeb5b31a
(cherry picked from commit 1a1e153bcb978e421407c2ccbab9667b5cd380cf)
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/234127
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

5 years agoiommu/tegra: smmu: Rename SMMU_ADDR_TO_PFN to SMMU_ADDR_TO_PTN
Hiroshi Doyu [Mon, 8 Apr 2013 05:37:21 +0000]
iommu/tegra: smmu: Rename SMMU_ADDR_TO_PFN to SMMU_ADDR_TO_PTN

It will convert an address to a Page Table index Number. This is
equivalent to SMMU_ADDR_TO_PDN(), which converts an address to a Page
Directory index Number. So it's better to use PTN instead of PFN,
which may imply Page Frame Number wrongly.

bug 1286500

Change-Id: Ib2e02b91c5af91df5d374064e10266341adb402b
(cherry picked from commit 36448e5261403c54c6c30ddc41db9040f88bd1e7)
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/234126
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

5 years agoiommu/tegra: smmu: Add alloc_tbl() for L2 pagetable
Hiroshi Doyu [Wed, 3 Apr 2013 12:49:43 +0000]
iommu/tegra: smmu: Add alloc_tbl() for L2 pagetable

Add alloc_tbl() to allocate SMMU L2 pagetable. This is refactoring
alloc_tbl() out from locate_pte() for the later use.

bug 1286500

Change-Id: I03177cf18a41b06e1aab03d748064a845d2b7284
(cherry picked from commit 2194fef5f777a2438ed5d268ef48de8bd8f7b460)
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/234125
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

5 years agoiommu/tegra: smmu: Remove unnecessary check
Hiroshi Doyu [Wed, 3 Apr 2013 12:49:23 +0000]
iommu/tegra: smmu: Remove unnecessary check

This sholdn't happen because the previous write doesn't match to the
condition.

bug 1286500

Change-Id: If80063d8feb8e75e828b5b1d9cbdb3f2f014d79d
(cherry picked from commit ac62226fcbfc698a489b4d458e91233a2659c6b8)
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/234124
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

5 years agoiommu/tegra: smmu: Skip invalid L2 pagetalbe at unmap
Hiroshi Doyu [Mon, 6 May 2013 09:27:18 +0000]
iommu/tegra: smmu: Skip invalid L2 pagetalbe at unmap

Skip invalid L2 pagetalbe at unmap. Unmap can be called against
invalide pages.

bug 1286500

Change-Id: I70e66eddb57982ae1dd2e0f592d18923676e9171
(cherry picked from commit 56a0bf501f15921bccfc73c3400ce48cb39f36be)
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/234123
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

5 years agoiommu/tegra: smmu: Unmap multiple pages at once
Hiroshi Doyu [Fri, 22 Mar 2013 09:30:59 +0000]
iommu/tegra: smmu: Unmap multiple pages at once

Implement to unmap multiple pages at once for performance.

bug 1286500

Change-Id: Ifa4671a8d784f46f3cb5feed21e433240f1634ed
(cherry picked from commit 93f56bda11694944ed246e4e119da073a435536c)
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/234122
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

5 years agoiommu/tegra: smmu: Add flush_ptc_and_tlb_range()
Hiroshi Doyu [Wed, 3 Apr 2013 08:49:20 +0000]
iommu/tegra: smmu: Add flush_ptc_and_tlb_range()

Add flush_ptc_and_tlb_range() to handle multiple entries at once.

bug 1286500

Change-Id: Ib1e9e2e7131345bb422787633eb8d1a4c549dda0
(cherry picked from commit b16d45873a8776d7ef7259a9b293336d9a2e1d28)
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/234121
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

5 years agoiommu/tegra: smmu: Add flush_ptc_and_tlb_all()
Hiroshi Doyu [Wed, 3 Apr 2013 07:10:32 +0000]
iommu/tegra: smmu: Add flush_ptc_and_tlb_all()

A version of flush_ptc_and_tlb() against all entries within the same
address space.

bug 1286500

Change-Id: I73dfdb0f1249a89313edd89dc5a51b8229648a32
(cherry picked from commit 923f7df28db0f9e18d2698926e3896a0c77c9376)
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/234120
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

5 years agoiommu/tegra: smmu: Mask pagetable index correctly
Hiroshi Doyu [Wed, 3 Apr 2013 08:55:28 +0000]
iommu/tegra: smmu: Mask pagetable index correctly

Mask pagetable index to avoid overrun by removing unnecessary bit at
first place.

bug 1286500

Change-Id: I1bccd4d4b1c8510b540d7c0c60e1997ba63f952b
(cherry picked from commit 88bc3c325df13f118ae5a3e492f713119a125e39)
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/234119
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

5 years agoiommu/tegra: smmu: Fix u32 -> u64 for swgid
Hiroshi Doyu [Wed, 27 Mar 2013 09:38:23 +0000]
iommu/tegra: smmu: Fix u32 -> u64 for swgid

Fix u32 -> u64 for swgid.

bug 1286500

Change-Id: I2ef4bdab4ec80e1578dd0ee8f3208179d295fb79
Reported-by: Terje Bergstrom <tbergstrom@nvidia.com>
(cherry picked from commit eb64012d3a56e6499d5eb62e671a44641ab8987d)
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/234118
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

5 years agoiommu/tegra: smmu: Add support Multiple ASID
Hiroshi Doyu [Tue, 5 Mar 2013 11:11:09 +0000]
iommu/tegra: smmu: Add support Multiple ASID

"nvidia,memory-client" ID is used to find a map/asid. If those info
isn't provided, a platform can specify it in a fixup table later.

bug 1286500

Change-Id: Id6b2955013d33052e9071678b7c119adf35a019f
(cherry picked from commit 659e185e19482e781ae4be847aba12319a7da842)
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/234117
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

5 years agoiommu/tegra: smmu: Remove SKIP_SWGRP_CHECK
Hiroshi Doyu [Mon, 4 Mar 2013 13:41:35 +0000]
iommu/tegra: smmu: Remove SKIP_SWGRP_CHECK

Remove obsolete workaround, SKIP_SWGRP_CHECK.

bug 1286500

Change-Id: I2986a33af1304973a2c30e57f7790dd70729f566
(cherry picked from commit 7de038bc039ba1106580fea174a4b74805fea412)
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/234116
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

5 years agoiommu/tegra: smmu: Unified tegra-smmu with memory client IDs
Hiroshi Doyu [Mon, 4 Mar 2013 11:56:24 +0000]
iommu/tegra: smmu: Unified tegra-smmu with memory client IDs

With memory client ID in bitmap, this driver can be unified among
Tegra SoC after Tegra30. Presently a bitmap is set statically in the
driver but this could be removed once tegra-smmu is instanciated from
DT. This driver supports, T30, T114 and T148.

bug 1286500

Change-Id: I39776fa3e0a3705f62f283687d063054be8210d1
(cherry picked from commit 181667972935e412bb81d0c5782d58babf183743)
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/234115
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

5 years agoARM: tegra: Create IOVA maps for ASID[0/1]
Hiroshi Doyu [Mon, 4 Mar 2013 19:38:21 +0000]
ARM: tegra: Create IOVA maps for ASID[0/1]

Create IOVA maps:
* ASID[0] for the system default
* ASID[1] for PPCS, which has SDMMC
* ASID[3][4][....], not created, open for drivers, first come, first
  served.

bug 1286500

Change-Id: I475455ee9cec3b382d96fe2e7af5a59ae4361cbf
(cherry picked from commit 4516ece11d26150267fea46800f71a087e16cdbc)
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/234114
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

5 years agoiommu/tegra: smmu: BIND_DRIVER attaches device to IOMMU
Hiroshi Doyu [Wed, 6 Mar 2013 08:07:52 +0000]
iommu/tegra: smmu: BIND_DRIVER attaches device to IOMMU

BUS_NOTIFY_BIND_DRIVER needs to attach a devie to IOMMU when it's
removed at previous UNBOUND_DRIVER.

bug 1286500

Change-Id: Ide91e4ae0a54f835fc195854cd858fff7620418e
(cherry picked from commit df3f9065ae3dc3c0e736ca066c2402974328d89d)
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/234113
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

5 years agoiommu/tegra: smmu: Add support 4MB SMMU page
Hiroshi Doyu [Wed, 27 Feb 2013 17:47:14 +0000]
iommu/tegra: smmu: Add support 4MB SMMU page

Add support 4MB SMMU page

bug 1286500

Change-Id: If3959f7607746c8b5413dd548123fc0bbc1586d5
(cherry picked from commit 8d90da217e1af11db21d930281ccdc3dc51a98de)
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/234112
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

5 years agoiommu/tegra: smmu: Call arm_iommu_detach_device() at BUS_NOTIFY_DEL_DEVICE
Hiroshi Doyu [Thu, 24 Jan 2013 12:51:02 +0000]
iommu/tegra: smmu: Call arm_iommu_detach_device() at BUS_NOTIFY_DEL_DEVICE

Call arm_iommu_detach_device() at BUS_NOTIFY_DEL_DEVICE as the conter
part of BUS_NOTIFY_ADD_DEVICE case.

bug 1286500

Change-Id: I3f6acd5ab086dc5c2db51982c35a4f9bed77c703
(cherry picked from commit bf536573780477d6a6829630acd53b8154e01ad4)
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/234111
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

5 years agoARM: tegra: bus_notifier registers platform IOMMU devices
Hiroshi Doyu [Tue, 27 Nov 2012 18:46:25 +0000]
ARM: tegra: bus_notifier registers platform IOMMU devices

Most of platform devices are IOMMU'able in Tegra30 SoC. Registering
all IOMMU'able devices manually isn't nice. This patch allows
platform bus_notifier to register IOMMU devices. Map info can be
passed from DT. Info format is:

  dma-window = <0 0x40000000>;

This is a fix for the following commit:

  commit 5688fbe0b3de2576e1f3f39e7477ebf9e5a9e49b
  platform: IOMMU'able platform_device w/ PLATFORM_ENABLE_IOMMU

bug 1286500

Change-Id: I80f2be03ff5c8a5b0a73254c0648084cfbcaf314
(cherry picked from commit 805b2bd223214015c1211998576bda8484d36b85)
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/234110
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

5 years agoiommu/tegra: smmu: Disable smmu_client_disable_hwgrp()
Hiroshi Doyu [Mon, 4 Feb 2013 07:02:54 +0000]
iommu/tegra: smmu: Disable smmu_client_disable_hwgrp()

Disable this until swgroup is implemented correctly.

bug 1286500

Change-Id: Ic6bdd10bf165e713326a4bcde8d0746d41e5cb23
(cherry picked from commit 542b4ccbc6ca87cd1f4c13eb62c0516ccca433dc)
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/234109
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

5 years agoiommu/tegra: smmu: Fix unnecessary NULLfication
Hiroshi Doyu [Mon, 4 Feb 2013 07:01:50 +0000]
iommu/tegra: smmu: Fix unnecessary NULLfication

The parent pointer will be released. No need to set NULL. Also this
order is wrong, setting NULL after free().

bug 1286500

Change-Id: I7ee292200417c04a0b5541b4bdcef7cdb184e9b0
(cherry picked from commit f3ff9d7828340e6f1ffe42f29a546711cb5342d0)
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/234108
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

5 years agoiommu/tegra: Add missing spinlock initialization
Sami Liedes [Thu, 31 Jan 2013 17:09:16 +0000]
iommu/tegra: Add missing spinlock initialization

Fix tegra_smmu_probe() to initialize client_lock spinlocks in per
address space structures.

bug 1286500

Change-Id: Ie1641e39a5d0448e0ba03f2dfddffdaa4c7630b5
Signed-off-by: Sami Liedes <sliedes@nvidia.com>
(cherry picked from commit e104c2cbe106c699ff0bdd175940f1067a505f52)
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/234107
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

5 years agoARM: tegra: config: tegratab: enable POWER_SUPPLY_EXTCON config
Laxman Dewangan [Fri, 7 Jun 2013 14:31:16 +0000]
ARM: tegra: config: tegratab: enable POWER_SUPPLY_EXTCON config

The power supply notification is from the power_supply extcon driver
which receive the cable type information from USB driver.

Enabling the config to enable the driver.

bug 1304013

Change-Id: I88b724ee85cb670cbcb24266c99babf13231efcf
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/236783
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit

5 years agocm3218: fix incompatible pointer use in driver
Alexandre Courbot [Thu, 6 Jun 2013 03:43:58 +0000]
cm3218: fix incompatible pointer use in driver

queue_work() and cancel_delayed_work() were used with the wrong
argument, causing a soft hang when shutting the driver down.

Bug 1293990

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Change-Id: Ia7791e552e12b66f642c0179d5f5a8e7b5feff5a
Reviewed-on: http://git-master/r/236126
(cherry picked from commit eb6acd5f6a5f249e4d1d26e58fb9bb1786ddb3d8)
Reviewed-on: http://git-master/r/236558
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User

5 years agoARM: tegra114: Remove the wrong EMC_REFRESH write.
Bo Yan [Thu, 6 Jun 2013 23:31:46 +0000]
ARM: tegra114: Remove the wrong EMC_REFRESH write.

'1' is written into EMC_REFRESH in SDRAM self-refresh exit sequence.
This is wrong. Remove it.

bug 1270351

Change-Id: I0180f5d36e5605f3c91905cdde4149a9b01b453a
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/236471
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Prashant Malani <pmalani@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User

5 years agoarm: tegra: soctherm: fix throttle period timing
Xin Xie [Thu, 6 Jun 2013 21:42:54 +0000]
arm: tegra: soctherm: fix throttle period timing

Throttling period register setting for the 'brief' mode is based on the
soctherm clock running at 136MHz, we need adjust it if we running at
different soctherm frequency.

bug 1295404

Change-Id: Ic5a20d169cc8e0ba590268db38b18ec89c5d815f
Signed-off-by: Xin Xie <xxie@nvidia.com>
Reviewed-on: http://git-master/r/236434
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-by: Rick Song <ricks@nvidia.com>
GVS: Gerrit_Virtual_Submit

5 years agoARM: tegra: macallan: Set max clk to 156MHz for sd
R Raj Kumar [Thu, 6 Jun 2013 09:45:40 +0000]
ARM: tegra: macallan: Set max clk to 156MHz for sd

Setting max clock limit to 156MHz for sd.
Adding sd as vdd_core voltage regulator client.

Bug 1302349

Change-Id: I12774cc428d8c4ea8c4165ba18cd620d4c10f369
Signed-off-by: R Raj Kumar <rrajk@nvidia.com>
Reviewed-on: http://git-master/r/236246
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

5 years agomisc: tegra-throughput: avoid flooding warning msg
David Pu [Thu, 6 Jun 2013 07:52:58 +0000]
misc: tegra-throughput: avoid flooding warning msg

timediff value will overflow easily after put dc off
for a while since the data type of long is just 4bytes
for 32bit cpu. after timediff overflowed, uart will spew
out warning messages for a long time before the timediff
becomes > 0.
fixed this issue by resetting the last_flip time as soon
as overflow is occurred.

Bug 1302148
Bug 1293211
Bug 1283757
Bug 1282005

Change-Id: I527ddc1ed7850be3938f2341d7d1623ea4f22e76
Signed-off-by: David Pu <dpu@nvidia.com>
Reviewed-on: http://git-master/r/236192
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User

5 years agoARM: tegra: dvfs: Change CL-DVFS tuning order
Alex Frid [Thu, 6 Jun 2013 05:41:39 +0000]
ARM: tegra: dvfs: Change CL-DVFS tuning order

Change CL-DVFS tuning order:
when tuning low: tune dfll low, then tune target module trimmers low
when tuning high: tune target module trimmers high, then tune dfll high
(was complementary order in both cases above).

Bug 1291764

Change-Id: Ic1a3850790089975e045cc9efcceb1dc06513b40
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/236146
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

5 years agoARM: tegra11: dvfs: Update AP40 Vmin in DFLL mode
Alex Frid [Thu, 6 Jun 2013 04:25:24 +0000]
ARM: tegra11: dvfs: Update AP40 Vmin in DFLL mode

Minimum voltage in DFLL mode for AP40 sku is different (0.9V) from all
other skus (1.0V) that share the same cpu dvfs tables. Updated AP40
Vmin respectively.

Bug 1291764

Change-Id: I3f40f24bc68c376d18b09b2f55987c05164cc05d
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/236135
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

5 years agohwmon: ina230: change move average timing
Xin Xie [Wed, 5 Jun 2013 01:29:05 +0000]
hwmon: ina230: change move average timing

Original current measurement is using the 140uS ADC conversion
time which is too fast and we might have many false alerts.

Change it to 2.35mS (588uS * 4).

bug 1298931

Change-Id: I81c1c4ff6aa8025ee1de5d93e85aa21f028b3a94
Signed-off-by: Xin Xie <xxie@nvidia.com>
Reviewed-on: http://git-master/r/235683
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

5 years agohwmon: ina230: fix current and power 1st read
Xin Xie [Wed, 5 Jun 2013 00:42:40 +0000]
hwmon: ina230: fix current and power 1st read

Both current and power reading requires calibration register is
programmed correctly before the conversion starts, otherwise 1st
current or power reading will show 0.

bug 1298931

Change-Id: I74a0ac80b4e741fce2d1116b56b32aea49187c11
Signed-off-by: Xin Xie <xxie@nvidia.com>
Reviewed-on: http://git-master/r/235682
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

5 years agoRevert "hdmi: don't call tegra_dc_hpd in spinlock"
Marvin Zhang [Tue, 4 Jun 2013 23:56:25 +0000]
Revert "hdmi: don't call tegra_dc_hpd in spinlock"

Bug 1298680

This reverts commit 946e53410468dafd92b6ccb313dba1bb1b72d04d.

Change-Id: Iccea1de23790c6cb4b53022bc7f657b8b600e64c
Signed-off-by: Marvin Zhang <mzhang@nvidia.com>
Reviewed-on: http://git-master/r/235653
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Karan Jhavar <kjhavar@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

5 years agoarm: tegra: pluto: fix OC protection failure case
Xin Xie [Wed, 29 May 2013 23:31:04 +0000]
arm: tegra: pluto: fix OC protection failure case

We observed system shutdown during the battery high current cases.

We are using the max77665 to provide the over-current signal to initiate
the current throttling and OC protection:
 * MAX77665 will assert the INTB output if detect OC condition after
   (max) 3.3mS debounce time,
 * After INTB line asserted MAX77665 can shut down the battery power if
   the OC condition is not removed within (min) 6mS,
 * After INTB line asserted, MAX77665 de-asserts the INTB line if AP ack
   the IRQ by reading IRQ src register,
 * AP hardware starts throttling the CPU/GPU clock if the INTB line is
   asserted.

By above design, AP hardware will stop throttling the clock when IRQ is
handled, instead of when OC condition is removed. So the throttling
period can be around 1mS in rare cases, and MAX77665 is going to shut
down battery power supply because MAX77665 internal timer requires OC
condition removed for 2mS+ time before assert the INTB again.

Fix above by force the throttling to 3mS as suggested by the Maxim.

bug 1295404

Change-Id: Icce22282e07dd465b4b9e4ae19778df4eb5405f8
Signed-off-by: Xin Xie <xxie@nvidia.com>
Reviewed-on: http://git-master/r/233900
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

5 years agosoc: tegra: rt5640: add speaker AMP EDP support
Dara Ramesh [Tue, 22 Jan 2013 14:44:33 +0000]
soc: tegra: rt5640: add speaker AMP EDP support

a) registered speaker AMP EDP client
b) implemented throttle callback function for EDP

Bug 1160686

Change-Id: I44d006613e9972709a3c0d8ffb7858c09271c1b2
Signed-off-by: Dara Ramesh <dramesh@nvidia.com>
Reviewed-on: http://git-master/r/193066
Reviewed-by: Hayden Du <haydend@nvidia.com>
Reviewed-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Vijay Mali <vmali@nvidia.com>
Reviewed-by: Kerwin Wan <kerwinw@nvidia.com>
Reviewed-by: Sumit Bhattacharya <sumitb@nvidia.com>

5 years agoMerge remote-tracking branch 'origin/dev/AOHDR_Merge/Set2' into promotion_build
Harshada kale [Fri, 7 Jun 2013 15:43:43 +0000]
Merge remote-tracking branch 'origin/dev/AOHDR_Merge/Set2' into promotion_build

5 years agoMerge branch 'dev_17' into 'rel_17' Set 3
Gary Fitzer [Mon, 29 Apr 2013 15:24:22 +0000]
Merge branch 'dev_17' into 'rel_17' Set 3

video: tegra: dw9718: enable auto-detect support

Bug 1250073.

Change-Id: Iabbf3d13e07ce053a74a8b6ff9dca610dfc6e55a
Signed-off-by: Gary Fitzer <gfitzer@nvidia.com>

media: video: tegra: imx135 flash support

enable imx135 on-sensor flash strobe.

bug 1277452

Change-Id: I9fb1bc50567d2f2c2e911420104b8350711022d4
Signed-off-by: Charlie Huang <chahuang@nvidia.com>

media: video: tegra: max77387: add flash device

it is used with imx135 camera sensor.

bug 1277452

Change-Id: I94eb413b0594b1abc70d9c9d62114782708678df
Signed-off-by: Charlie Huang <chahuang@nvidia.com>

media: tegra: dw9718: Fix dw9718 settle time

Fix focuser settle time

Change-Id: Idab65b6800137d55d04842ff04d721b7847366de
Reviewed-on: http://git-master/r/218461
(cherry picked from commit 10b6451fa99afdcfe947df2366116fccac1591cb)
Signed-off-by: Michael Lin <mlin@nvidia.com>

arm: tegra11: config: enable OV5693 and AD5823

Bug 1250073.

Change-Id: Ic8714f22925ab9e6d76c944c33a8fe0d45c5015e
Signed-off-by: Gary Fitzer <gfitzer@nvidia.com>

arm: tegra: add autodetect imaging sensors

Add autodetect check for IMX135, AR0833, and OV5693

Change-Id: I05638424067be1496d0f70e8ee900b721b34bf0e
Signed-off-by: Gary Fitzer <gfitzer@nvidia.com>

arm: tegra: Add imx132 sensor support for Dalmore

The new E1812 camera board for Dalmore has IMX135
and IMX132 sensors.

Bug 1250073

Change-Id: Id8691bc219d1bd13b12c4ad49725ed3b706f1f61
Signed-off-by: Frank Chen <frankc@nvidia.com>

ARM: tegra: dalmore: update imx135 on sensor flash

enable imx135 on sensor flash function.
setup max77387 which is used with imx135.

bug 1277452

Change-Id: I4e5fea14defbd84f25fac238001e528d5b24dfca
Signed-off-by: Charlie Huang <chahuang@nvidia.com>

ARM: dalmore: sensor specific focuser settings

imx091/imx135 modules use the same vcm driver ad5816 but their
actuarator's charactoristics are different.

overwrite focuser setting in the ad5816 focuser detect function
if the sensor detected is imx135.

update dw9718 focuser range.

bug 1272352

Change-Id: I8dd7ccc97533e1dd47c341b1aa8660d86fe52baa
Signed-off-by: Charlie Huang <chahuang@nvidia.com>

video: tegra: ad5816: enable auto-detect support

Bug 1250073.

Change-Id: I1c30757d0570e9e4d51f3326d2c0fe233f8cf046
Signed-off-by: Gary Fitzer <gfitzer@nvidia.com>
(cherry picked from commit c3a21f51fc6c5a9935f8e52aa3149ddb0de66ac6)

media: video: tegra: ad5816: customise setting

different sensor modules have specific focuser settings like
actuator resonance frequency and optimal arc mode.

the settings should be carried in the sensor board file.

bug 1272352

Change-Id: I6bb086faaf3ccfb62ed2a900befe755010dde0d1
Signed-off-by: Charlie Huang <chahuang@nvidia.com>
(cherry picked from commit 52ac0ee51a8fe80379b4c07d21198c1cfc0c80c9)

Signed-off-by: Frank Chen <frankc@nvidia.com>

ARM: configs: tegra11: defconfig: enable max77387

bug 1277452

Change-Id: I220cddcd7cc856b0906d089a7a5a6e384391ea10
Signed-off-by: Charlie Huang <chahuang@nvidia.com>

Signed-off-by: Frank Chen <frankc@nvidia.com>

5 years agovideo: tegra: dc: global alpha initialization for fb win
Min-wuk Lee [Tue, 4 Jun 2013 06:17:23 +0000]
video: tegra: dc: global alpha initialization for fb win

Setting initial value of fb window's global alpha
to 255 is necessary in early fb register time.
The fb window is invisible without this change because
tegra_dc_ext_flip_windowattr structure is zeroed out.

Bug 1300799

Change-Id: I92c57d1a69dda74745d418abbceba841455c3888
Signed-off-by: Min-wuk Lee <mlee@nvidia.com>
Reviewed-on: http://git-master/r/235284
Reviewed-by: Pankaj Dabade <pdabade@nvidia.com>
Tested-by: Pankaj Dabade <pdabade@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Donghan Ryu <dryu@nvidia.com>

5 years agovideo: tegra: dsi: Fix pad control register programming
Min-wuk Lee [Wed, 29 May 2013 02:42:24 +0000]
video: tegra: dsi: Fix pad control register programming

For DSI_VS_1 and DSI_VS_0, each has different dsi pad
control register name and register bit fields are
different each other. In several places like suspend
and resume, DSI_VS_1 uses DSI_VS_0's register field and
this makes unexpected mipi clk signal in suspend and this
change is fixing it.

Bug 1275024

Change-Id: I6046a98076dfc03de119f3df1c846fa71c810e36
Signed-off-by: Min-wuk Lee <mlee@nvidia.com>
Reviewed-on: http://git-master/r/233517
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

5 years agonet: wireless: add Marvel 8897 wireless cards support
Marc Yang [Tue, 7 May 2013 18:32:48 +0000]
net: wireless: add Marvel 8897 wireless cards support

Signed-off-by: Marc Yang <yangyang@marvell.com>

Bug 1256420
Change-Id: I43f342a7fe0bc0a8a1e28929a50170d9efe0a499
Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-on: http://git-master/r/231454
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

5 years agoEDP: tegra: increasing gpu threshold to 600
Sivaram Nair [Thu, 30 May 2013 08:41:09 +0000]
EDP: tegra: increasing gpu threshold to 600

Bug 1293353

Change-Id: Id3e609f5d52b8be646229c19151b5000e19db17c
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-on: http://git-master/r/234047
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

5 years agoARM: tegra11: updating tegra sys EDP tables
Sivaram Nair [Thu, 30 May 2013 08:33:51 +0000]
ARM: tegra11: updating tegra sys EDP tables

Increasing GPU cap when we are at higher E-state.

Bug 1293353

Change-Id: I400cc3b07bf5539c81db0c0ec0b4cb652f97902d
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-on: http://git-master/r/234046
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

5 years agoarm: tegra: tegratab: Turn on hw phase in for PRISM
Min-wuk Lee [Tue, 4 Jun 2013 11:40:50 +0000]
arm: tegra: tegratab: Turn on hw phase in for PRISM

Bug 1241946

Change-Id: I38e5ef3b98af9bf1deca319530c78168a6437f18
Signed-off-by: Min-wuk Lee <mlee@nvidia.com>
Reviewed-on: http://git-master/r/235442
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

5 years agoARM: tegra: tegratab: backlight calibration and PRISM on
Min-wuk Lee [Thu, 16 May 2013 05:10:22 +0000]
ARM: tegra: tegratab: backlight calibration and PRISM on

backlight calibration for tegratab panel is done.
PRISM is set to enabled in default for tegratab.

Bug 1241946

Change-Id: I49fe69de2441a78e2a0bf727a5ff740d3055e691
Signed-off-by: Min-wuk Lee <mlee@nvidia.com>
Reviewed-on: http://git-master/r/229195
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

5 years agoarm: tegra: ahb: clean up ahb_gizmo configuration
Jay Cheng [Thu, 30 May 2013 21:48:06 +0000]
arm: tegra: ahb: clean up ahb_gizmo configuration

1. remove tegra_init_ahb_gizmo_settings function from ahb.c which is duplicate
in common.c
2. correct AHB_MEM_PREFETCH_CFG5 offset
3. save/resotre new registers in t11x chip

bug 1292790

Change-Id: I1a339ccc10244ce7ccccc5b67bf137cb4c18046d
Signed-off-by: Jay Cheng <jacheng@nvidia.com>
Reviewed-on: http://git-master/r/234293
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

5 years agoarm: tegra: macallan: imx091 edp control
Hayden Du [Fri, 31 May 2013 03:49:24 +0000]
arm: tegra: macallan: imx091 edp control

add edp control for imx091 according to E-state table.
https://p4viewer.nvidia.com/get///hw/ar/doc/t148/power/System_EDP/E_state_tables.xlsx

bug 1299132

Change-Id: Ia122d138a55294c84b55707996d4c3459e11decb
Signed-off-by: Hayden Du <haydend@nvidia.com>
Reviewed-on: http://git-master/r/234396
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Matthew Longnecker <mlongnecker@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

5 years agoARM: Tegra: smp: case to setup_core_count for T40DC
Graziano Misuraca [Thu, 30 May 2013 17:39:45 +0000]
ARM: Tegra: smp: case to setup_core_count for T40DC

T40DC (dual core) SKU will not have
FUSE_SKU_DIRECT_CONFIG_0 set so we need to check
the SKU explicitly and set the number of cores to
two in that case.

Bug 1262581

Change-Id: I341a606698a5bd72374adaecdcbaf3ef62e351d3
Signed-off-by: Graziano Misuraca <gmisuraca@nvidia.com>
Reviewed-on: http://git-master/r/234210
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>
GVS: Gerrit_Virtual_Submit

5 years agoarm: dt: tegra: tegratab: fix P1640 compass orientation
David Yu [Wed, 29 May 2013 08:33:57 +0000]
arm: dt: tegra: tegratab: fix P1640 compass orientation

Bug 1270178

Change-Id: I23a57e706d2945b2080b2a1d3f0018dd1f6aa031
Signed-off-by: David Yu <davyu@nvidia.com>
Reviewed-on: http://git-master/r/233609
(cherry picked from commit 58fd85dd66ee8d5f718e22f04ed04a9d18026746)
Reviewed-on: http://git-master/r/233962
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Robert Collins <rcollins@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agousb: xhci: tegra: set SNPS owner only if no hs connected
Ajay Gupta [Tue, 4 Jun 2013 17:11:43 +0000]
usb: xhci: tegra: set SNPS owner only if no hs connected

Commit "usb: xhci: tegra: set SNPS as owner to save power"
cause reset error when SS hub is connected as bus_suspend is
called while HS part of hub is connected.

Fixing by checking if any HS device connected before setting
port owner as SNPS

Bug 1275290

Change-Id: I9d5e7f41bc48f017f76a0f41d8f5a70355bc0399
Signed-off-by: Ajay Gupta <ajayg@nvidia.com>
Reviewed-on: http://git-master/r/235513
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Ashutosh Jha <ajha@nvidia.com>

5 years agoALSA: usbaudio: Expose usb device supported sample rates
Rahul Mittal [Mon, 3 Jun 2013 15:29:03 +0000]
ALSA: usbaudio: Expose usb device supported sample rates

Add alsa control for exposing sample rate range
supported by the usb audio device

Bug 1274264
Bug 1240790

Change-Id: I6b0c43416ad61009cd287f948210aca29b62c3fc
Signed-off-by: Rahul Mittal <rmittal@nvidia.com>
Reviewed-on: http://git-master/r/235030
Reviewed-by: Scott Peterson <speterson@nvidia.com>
Reviewed-by: Ravindra Lokhande <rlokhande@nvidia.com>
Reviewed-by: Sumit Bhattacharya <sumitb@nvidia.com>

5 years agoARM: tegra: panel:lgd-wxga-7: enable dvdd_1v8 rail
Laxman Dewangan [Wed, 29 May 2013 12:41:59 +0000]
ARM: tegra: panel:lgd-wxga-7: enable dvdd_1v8 rail

The LG WXGA 7" panel require the dvdd voltage rail.
Enabling this rail.

bug 1285809

Change-Id: I925322cdee5e0a0d5e24a00c34bcffb4ee620a81
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/233733
Reviewed-by: Harshada Kale <hkale@nvidia.com>
Tested-by: Harshada Kale <hkale@nvidia.com>

5 years agoARM: tegra11: dvfs: Update dvfs tables
Hoang Pham [Wed, 5 Jun 2013 02:06:28 +0000]
ARM: tegra11: dvfs: Update dvfs tables

Change the tune high voltage to 1050mV

Bug 1291764

Change-Id: I5a6ab3910b56615f0075d2e7e29220456eb986b9
Signed-off-by: Hoang Pham <hopham@nvidia.com>
Reviewed-on: http://git-master/r/233879
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

5 years agoarm: tegra: tegratab: fix P1640 compass orientation
David Yu [Wed, 29 May 2013 08:39:39 +0000]
arm: tegra: tegratab: fix P1640 compass orientation

Bug 1270178

Change-Id: I3943eb526d26bb73dc0c41f77040a17b1c686e83
Signed-off-by: David Yu <davyu@nvidia.com>
Reviewed-on: http://git-master/r/233612
(cherry picked from commit 84692ce40adbbf764df78b197203783ca4ffa3f8)
Reviewed-on: http://git-master/r/233961
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agoARM: tegra11: clock: Allow switch to G CPU on PLLX
Alex Frid [Sat, 18 May 2013 06:19:22 +0000]
ARM: tegra11: clock: Allow switch to G CPU on PLLX

Enabled PLLX as CPU clock source immediately after LP CPU to G CPU
cluster switch when cross-over rate is below DFLL usage range, and
PLLX was the last G CPU clock source (before this commit DFLL was
selected as target source after cluster switch to G CPU always).

Bug 1291764

Change-Id: I55c75a819f4f6e0af89f00fa01504cb5349c378f
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/230054
Reviewed-by: Hoang Pham <hopham@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

5 years agomedia: video: tegra: Update ad5816 range
Sudhir Vyas [Mon, 3 Jun 2013 11:02:34 +0000]
media: video: tegra: Update ad5816 range

Update focuser calibrated working range.

Bug 1297156

Change-Id: I3203420b1d077a33bf8373b32207a212363e316a
Signed-off-by: Sudhir Vyas <svyas@nvidia.com>
Reviewed-on: http://git-master/r/234970
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

5 years agoARM: tegra: config: Enable MMC freq scaling
Pavan Kunapuli [Tue, 28 May 2013 09:06:53 +0000]
ARM: tegra: config: Enable MMC freq scaling

Bug 1238045

Change-Id: Ic0694c588f385964a524a22d65f2052b432aa159
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-on: http://git-master/r/233348
Reviewed-by: Harshada Kale <hkale@nvidia.com>
Tested-by: Harshada Kale <hkale@nvidia.com>

5 years agoASoC: codecs: ALC5639/40: Update pll calc logic
Manoj Gangwal [Tue, 21 May 2013 07:37:45 +0000]
ASoC: codecs: ALC5639/40: Update pll calc logic

Bug 1284439

Change-Id: Icb724360db819e5cef6b47878b635b0de6727b82
Signed-off-by: Manoj Gangwal <mgangwal@nvidia.com>
Reviewed-on: http://git-master/r/231109
Reviewed-by: Harshada Kale <hkale@nvidia.com>
Tested-by: Harshada Kale <hkale@nvidia.com>

5 years agoirq: enable suspended EARLY_RESUME irqs forcefully if not resumed
Laxman Dewangan [Mon, 3 Jun 2013 12:21:30 +0000]
irq: enable suspended EARLY_RESUME irqs forcefully if not resumed

When system enters into suspend, it disable all irqs in single
function call. This disables EARLY_RESUME irqs also along with
normal irqs.

The EARLY_RESUME irqs get enabled in sys_core_ops->resume and
non-EARLY_RESUME irqs get enabled in normal system resume path.

When suspend_noirq failed or suspend is aborted for any reason,
the EARLY_RESUME irqs do not get enabled as sys_core_ops->resume()
call did not happen. It only enables the non-EARLY_RESUME irqs in normal
system resume path. This makes the EARLY_RESUME irqs interrupt to be
disable for remaining life of system.

Add checks on normal irq_resume() whether EARLY_RESUME irqs have been
enabled or not and if not then enable it forcefully.

bug 1282448

Change-Id: I7ffffd725675ca635310eb4913a1f885d2e42e37
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/235000
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: Mark Kuo <mkuo@nvidia.com>

5 years agoARM: tegra: pluto: memory: correct MC_GRANT_DECREMENT value
Jay Cheng [Mon, 3 Jun 2013 13:38:28 +0000]
ARM: tegra: pluto: memory: correct MC_GRANT_DECREMENT value

This is due to an incorrect value for GRANT DECREMENT in the DVFS table for
frequencies less than 400 MHz (EMC clock). On T114, we are always using
MC:EMC freq of 1:2. However, the code for calculating GRANT DECREMENT in the
DVFS table logic assumes MC:EMC freq of 1:1 at EMC freq < 400. Therefore,
the value in the DVFS table at EMC < 400 is double what it should be.

bug 1285436
bug 1259082

Change-Id: Ie15730b5943b3cc328328c5fb1b89af92a7ed7a2
Signed-off-by: Jay Cheng <jacheng@nvidia.com>
Reviewed-on: http://git-master/r/235018
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Tested-by: Daniel Solomon <daniels@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

5 years agosound: soc: rt5639: reduce permission of codec_reg
Jake Park [Fri, 31 May 2013 12:23:58 +0000]
sound: soc: rt5639: reduce permission of codec_reg

Reduced access permission of codec_reg from 0666 to 0644 to avoid
testAllFilesInSysAreNotWritable CTS failure.

Bug 1298831

Change-Id: I2be1444ba0460d783b76b1aa9d83f3d469ae9456
Signed-off-by: Jake Park <jakep@nvidia.com>
Reviewed-on: http://git-master/r/234536
(cherry picked from commit cb26b9a47efc09e1cf52711203d2d33d39345a04)
Reviewed-on: http://git-master/r/235297
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Simon Je <sje@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Scott Peterson <speterson@nvidia.com>

5 years agoarm: tegratab: Set VALRT.MIN to 3.24V of max17048.
Hyongbin Kim [Mon, 3 Jun 2013 11:02:02 +0000]
arm: tegratab: Set VALRT.MIN to 3.24V of max17048.

Use voltage low alert when vcell is under 3.24V.

Bug 1245249
Bug 1298560

Change-Id: I91ce7ab800195942abb4b387c9fe12232ad0b29c
Signed-off-by: Hyongbin Kim <hyongbink@nvidia.com>
Reviewed-on: http://git-master/r/234972
(cherry picked from commit c9cc7ae7acd556d0e832d2e584d2e534785d3719)
Reviewed-on: http://git-master/r/235253
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agopower: max17048: Forced power off when VCELL < VALRT.MIN.
Hyongbin Kim [Mon, 3 Jun 2013 07:51:56 +0000]
power: max17048: Forced power off when VCELL < VALRT.MIN.

When SOC is low and system drain too much current, it makes
system hangup due to voltage drop. When VALRT occurs, set
forced SOC to 0% for power off.

Bug 1245249
Bug 1298560

Change-Id: I5057f762b9ec32f530a09a5c03df253ae3cbbad0
Signed-off-by: Hyongbin Kim <hyongbink@nvidia.com>
Reviewed-on: http://git-master/r/234912
(cherry picked from commit b673440eb08f62ad31cfa098bbed413e5df4efe0)
Reviewed-on: http://git-master/r/235252
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agoarm: tegra: macallan: Add pwm backlight EDP platform data
Hayden Du [Mon, 3 Jun 2013 11:30:30 +0000]
arm: tegra: macallan: Add pwm backlight EDP platform data

Added platform data for pwm backlight EDP.

bug 1299129

Change-Id: I0a4b86f33d3b7063cd8b8c4330be2af0256c2c5d
Signed-off-by: Hayden Du <haydend@nvidia.com>
Reviewed-on: http://git-master/r/234978
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agobacklight: pwm_bl: Add support for EDP
Hayden Du [Mon, 3 Jun 2013 11:28:44 +0000]
backlight: pwm_bl: Add support for EDP

Added EDP support for pwm backlight

bug 1299129

Change-Id: I0164a1b5c79dad36651641720aca0a8b0f715c4c
Signed-off-by: Hayden Du <haydend@nvidia.com>
Reviewed-on: http://git-master/r/234977
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User

5 years agoarm: tegra: macallan: added speaker EDP data
Hayden Du [Fri, 31 May 2013 09:10:47 +0000]
arm: tegra: macallan: added speaker EDP data

added EDP states in audio platform data for EDP implementation.
the E-state table at:
https://p4viewer.nvidia.com/get///hw/ar/doc/t148/power/System_EDP/E_state_tables.xlsx

bug 1299027

Change-Id: If5629ced58444fb57743b521721d7d7de23ca1c3
Signed-off-by: Hayden Du <haydend@nvidia.com>
Reviewed-on: http://git-master/r/234498
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Dara Ramesh <dramesh@nvidia.com>
Reviewed-by: Scott Peterson <speterson@nvidia.com>

5 years agoARM: Tegra: Dalmore: Add support for T40DC memory
Graziano Misuraca [Thu, 25 Apr 2013 00:48:03 +0000]
ARM: Tegra: Dalmore: Add support for T40DC memory

T40DC is in the same speedo bin as T40S. Select the
same memory table.

Bug 1262581

Change-Id: Iea474538f11b4fa42a943e7286bbb2b30aa414f7
Signed-off-by: Graziano Misuraca <gmisuraca@nvidia.com>
Reviewed-on: http://git-master/r/222729
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>

5 years agoARM: tegra: dvfs: Invalidate CL-DVFS request when disabled
Alex Frid [Tue, 14 May 2013 18:42:16 +0000]
ARM: tegra: dvfs: Invalidate CL-DVFS request when disabled

Invlidated frequency request when CL-DVFS is disabled. Made sure that
the first request after enabling CL-DVFS always includes regulator
undershoot guard-band (i.e., do not use stale across disabled state
frequency request to evaluate direction of the change).

Bug 1285525

Change-Id: Ib3a885b7add43b14e21df8cce974f3d5ea068cb0
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/228515
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

5 years agoARM: tegra: config: Enable CONFIG_HIDRAW
Petlozu Pravareshwar [Tue, 28 May 2013 11:48:17 +0000]
ARM: tegra: config: Enable CONFIG_HIDRAW

Enable CONFIG_HIDRAW to support some of the
usb numpads which are getting detected as HIDRAW.

Bug 1267142

Change-Id: I666c37fb6b4940c1ec607cae38e61abf6b605af8
Signed-off-by: Petlozu Pravareshwar <petlozup@nvidia.com>
Reviewed-on: http://git-master/r/233310
Reviewed-by: Harshada Kale <hkale@nvidia.com>
Tested-by: Harshada Kale <hkale@nvidia.com>

5 years agoARM: tegra: pluto: Enable eMMC freq scaling
Naveen Kumar Arepalli [Tue, 28 May 2013 17:26:18 +0000]
ARM: tegra: pluto: Enable eMMC freq scaling

Enable eMMC frequency scaling for pluto

Bug 1044607

Change-Id: Idc13c2d67d3f920f1b0381ee8390c622692d9490
Signed-off-by: Naveen Kumar Arepalli <naveenk@nvidia.com>
Reviewed-on: http://git-master/r/233374
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>

5 years agoARM: tegra: dalmore: Enable eMMC freq scaling
Naveen Kumar Arepalli [Tue, 28 May 2013 17:20:59 +0000]
ARM: tegra: dalmore: Enable eMMC freq scaling

Enable eMMC frequency scaling for Dalmore

Bug 1044607

Change-Id: If2dcb223ee355c6c5ee3cf8336f128de5535b6ea
Signed-off-by: Naveen Kumar Arepalli <naveenk@nvidia.com>
Reviewed-on: http://git-master/r/233372
Reviewed-by: Harshada Kale <hkale@nvidia.com>
Tested-by: Harshada Kale <hkale@nvidia.com>

5 years agoarm: tegra: calibrate cmu for lgd wxga panel
Min-wuk Lee [Tue, 14 May 2013 15:12:10 +0000]
arm: tegra: calibrate cmu for lgd wxga panel

Calibrate color management unit for lgd wxga 7.0 inches
panel. In default, gained matrix is set which gives D65
white balance. In order to switch to normalized matrix,
set CMU_CSC_GAINED_MATRIX to 0.

Bug 1233941

Change-Id: I687248c811aab6237e0c10d95846f4cdff337819
Signed-off-by: Min-wuk Lee <mlee@nvidia.com>
Reviewed-on: http://git-master/r/228413
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Mitch Luban <mluban@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agoinput: maxim: touch: update to v1.2.0
David Jung [Wed, 22 May 2013 21:05:35 +0000]
input: maxim: touch: update to v1.2.0

Maxim Integrated code drop for v1.2.0 which includes eraser functionality

Bug 1279288

Change-Id: I3f1aac26c9bed0e74b905e0909a0444f3d373f66
Signed-off-by: David Jung <djung@nvidia.com>
Reviewed-on: http://git-master/r/231726
Reviewed-by: Harshada Kale <hkale@nvidia.com>
Tested-by: Harshada Kale <hkale@nvidia.com>

5 years agoARM: tegra: thermal sensor regulator
Bitan Biswas [Fri, 24 May 2013 15:14:02 +0000]
ARM: tegra: thermal sensor regulator

Regulator entry for thermal sensor added for boards:
 - tegratab
 - macallan

 bug 1291015

Change-Id: Ia21317a8302fa9829377debf8d0d53ed85bdb15e
Signed-off-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-on: http://git-master/r/232628
Reviewed-by: Harshada Kale <hkale@nvidia.com>
Tested-by: Harshada Kale <hkale@nvidia.com>

5 years agoARM: tegra: macallan: add Yoku 3900 battery data for Max17048
Laxman Dewangan [Mon, 3 Jun 2013 13:52:51 +0000]
ARM: tegra: macallan: add Yoku 3900 battery data for Max17048

Just add the Yoku 3900mA battery data for Macallan.
Details of model data:
 Battery: Yoku
 current: 3900mA
 system shutdown voltage 3.0V.
 Model: Max17048

Macallan will still use the Yoku4100 as default.

Change-Id: I98df0a3fdb2ded9a501812ecc8ffb924fb252545
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/235017
Reviewed-by: Automatic_Commit_Validation_User

5 years agoarm: tegra: soctherm: change period reg to u32.
David Pu [Mon, 3 Jun 2013 10:11:52 +0000]
arm: tegra: soctherm: change period reg to u32.

SOC_THERM_EDP_OC_ALARM_OC4_THROTTLE_PERIOD_0 is 32bit reg.

Bug 1282441

Change-Id: I18710dac8d7bc77bb53d4841b9ad0468baee5dba
Signed-off-by: David Pu <dpu@nvidia.com>
Reviewed-on: http://git-master/r/234940
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

5 years agoARM: tegra: tegratab: update usb boot freq config
Harry Hong [Mon, 3 Jun 2013 02:40:40 +0000]
ARM: tegra: tegratab: update usb boot freq config

Set CONFIG_TEGRA_EHCI_BOOST_CPU_FREQ to 800
Increasing CONFIG_TEGRA_GADGET_BOOST_CPU_FREQ to 1400

bug 1266414
bug 1216779

Change-Id: Ib163bd03e8f2a4cdeb481a08d6e2661b5951b463
Signed-off-by: Harry Hong <hhong@nvidia.com>
Reviewed-on: http://git-master/r/234832
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Rakesh Bodla <rbodla@nvidia.com>
Reviewed-by: Rohith Seelaboyina <rseelaboyina@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

5 years agopower: bq2419x-charger: simplify charging current configuration
Laxman Dewangan [Sat, 1 Jun 2013 10:39:42 +0000]
power: bq2419x-charger: simplify charging current configuration

When VBUS is detected by the USB driver and call set charging current,
there is lots of logic for cable identification based on different current
value.

All these are not require as cable identification and notification is
done in power supply extcon driver. Simplifying the set_charging_current()
implementation.

bug 1286396

Change-Id: I401b3a7f632722ca797802556c0b5d15e3a0f959
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/234765
Reviewed-by: Automatic_Commit_Validation_User

5 years agopower: max17048-battery: remove AC/USB power supply notification
Laxman Dewangan [Fri, 31 May 2013 21:17:08 +0000]
power: max17048-battery: remove AC/USB power supply notification

The MAX17048 battery gauge driver is capable of getting the information
about battery only and not able to detect the power supply source for
charging whether it is AC or USB. Hence removing the power supply status
notification for USB and AC power supply.

bug 1286396

Change-Id: I163351b6feb19fca2b32dad4a43f920b00a30a3f
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/234760

5 years agopower: bq2419x-charger: remove power supply notification
Laxman Dewangan [Fri, 31 May 2013 21:06:55 +0000]
power: bq2419x-charger: remove power supply notification

The BQ2419X charger driver is capable of setting charging current
but not able to detect the power supply source whether it is AC or
USB. Hence generating the notification from charger driver based
on charging current is inaccurate.

Removing the power supply change notification code.

bug 1286396

Change-Id: I7758c6f36e8c312f79a1ff7cff7fd18858e45de7
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/234759
Reviewed-by: Automatic_Commit_Validation_User

5 years agoARM: tegra114: register excon power supply driver
Laxman Dewangan [Mon, 3 Jun 2013 15:51:30 +0000]
ARM: tegra114: register excon power supply driver

Register extcon power supply driver for generating AC/USB online
power source status event for Macallan, Tegratab and roth platform.
The driver receive the extcon notification generated by USB driver
for charging cable type.

bug 1286396

Change-Id: Id6c94ea581a5aa57507eec81bd7b44f608f008a9
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/234758
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

5 years agoARM: tegra: tegratab: add lid and pen detect switch support
Youngjin Kim [Thu, 2 May 2013 12:41:57 +0000]
ARM: tegra: tegratab: add lid and pen detect switch support

Add GPIOs for lid and stylus pen hall sensors to gpio key
platform data as switch.

Bug 1279288

Change-Id: Idd0bc903354970352b0f451595249d1209569924
Signed-off-by: Youngjin Kim <nkim@nvidia.com>
Reviewed-on: http://git-master/r/224883
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bo Kim <bok@nvidia.com>
Reviewed-by: Jake Park <jakep@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Robert Collins <rcollins@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agoarm: tegra: tegratab: Initialize LDO4 for touch
Victor(Weiguo) Pan [Wed, 22 May 2013 22:19:07 +0000]
arm: tegra: tegratab: Initialize LDO4 for touch

Initialize LDO to 3.0v for Maxim touch driver.

Bug 1291058

Change-Id: Ie8a40a122f58299bba14a240652e2880a5e79283
Signed-off-by: Victor(Weiguo) Pan <wpan@nvidia.com>
Reviewed-on: http://git-master/r/231770
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>