6 years agodrivers: misc: nct: bind via cdev type
Joshua Primero [Mon, 19 Nov 2012 23:40:56 +0000]
drivers: misc: nct: bind via cdev type

Bind thermal cooling devices via type name instead of creating
cooling devices.

Change-Id: I8a116608570b428703e25fbde6e62265a5fedc69
Signed-off-by: Joshua Primero <jprimero@nvidia.com>
Reviewed-on: http://git-master/r/165186
Tested-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

6 years agoARM: tegra: throttle: Expose name to throttle API
Joshua Primero [Wed, 31 Oct 2012 01:46:10 +0000]
ARM: tegra: throttle: Expose name to throttle API

Allow the function caller to name the type of the cooling device.

Change-Id: I26f69d0e7d0de9e58f0ffa65b97cd92b0cb0fd12
Signed-off-by: Joshua Primero <jprimero@nvidia.com>
Reviewed-on: http://git-master/r/160075
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

6 years agotegra/iommu: smmu: Disable IOMMU only for PCIe
Hiroshi Doyu [Tue, 4 Dec 2012 13:59:16 +0000]
tegra/iommu: smmu: Disable IOMMU only for PCIe

PCI client hasn't been registered as IOMMU device yet.

Bug 1186140

Change-Id: I18b1091172c1377b0beaa39b059e19e402eaada8
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/168374
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

6 years agosecurity: tf_driver: integrate latest TL release
Hyung Taek Ryoo [Tue, 4 Dec 2012 01:46:13 +0000]
security: tf_driver: integrate latest TL release

Tegra4 version: TF_TEGRA4_AC02.02.39373

Create a new SMC (0xFFFFFFE7) for no flush operations in cluster power down.

Bug 969937

Change-Id: Ie91d1ab2560ab56ee9ca2c8f35757a9bb5222c26
Signed-off-by: Hyung Taek Ryoo <hryoo@nvidia.com>
Reviewed-on: http://git-master/r/168212
Reviewed-by: Karan Jhavar <kjhavar@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>

6 years agoarm: tegra: thermal: update gpio pin for fab4 dalmore boards
Diwakar Tundlam [Mon, 3 Dec 2012 06:49:28 +0000]
arm: tegra: thermal: update gpio pin for fab4 dalmore boards

Bug 1188593

Change-Id: Iafb66d92425865ab760153654287fa17ed3838eb
Signed-off-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-on: http://git-master/r/167998
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

6 years agoARM: mm: Enable NCSE feature for A15 only
Bo Yan [Sat, 1 Dec 2012 00:11:15 +0000]
ARM: mm: Enable NCSE feature for A15 only

Change-Id: If966ee69f1d5e4314f79685238ecff3c44eadac0
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/167879
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

6 years agoARM: tegra: thermal: New Tegra11 thermal table
Anshul Jain [Thu, 29 Nov 2012 21:30:41 +0000]
ARM: tegra: thermal: New Tegra11 thermal table

This change updates the thermal throttle table.

Bug 1058013

Change-Id: If7656fccb749bd36535fb2786e84ba0c843badf1
Signed-off-by: Anshul Jain <anshulj@nvidia.com>
Reviewed-on: http://git-master/r/167704
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

6 years agoregulator: tps65090: add wait_timeout support for FETx
Yen Lin [Thu, 29 Nov 2012 22:39:44 +0000]
regulator: tps65090: add wait_timeout support for FETx

Add platform data for wait_timeout value for FETx.

bug 1178161

Signed-off-by: Yen Lin <yelin@nvidia.com>
Change-Id: I12eedd48dd4bfcabfe3fa9ae08afff6399e94abf
Reviewed-on: http://git-master/r/167476
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Allen Martin <amartin@nvidia.com>

6 years agoARM: tegra: __tegra_move_framebuffer takes dev
Hiroshi Doyu [Thu, 29 Nov 2012 13:47:45 +0000]
ARM: tegra: __tegra_move_framebuffer takes dev

For T30+ based boards, FB needs to create 1-1 linear mapping, which
requires dma mapping API from device itself.

Bug 1182882
Bug 1024594

Change-Id: Ifde49919de8c9a1a3ef918a5d531d15e815814c8
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/167310
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

6 years agoiommu/tegra: smmu: Remove pfn_valid() at map
Hiroshi Doyu [Thu, 29 Nov 2012 13:33:55 +0000]
iommu/tegra: smmu: Remove pfn_valid() at map

pfn_valid() should be done in a caller function if *needed*. IOMMU
drivers cares about address mapping only but should not care about if
the address is a valid page or not.

Bug 1182882
Bug 1024594

Change-Id: I3cbcadc02259b7f217ffa42f6d981d3ca3dc9917
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/167309
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

6 years agomedia: video: tegra: handle NULL dereferences
Deepak Nibade [Wed, 28 Nov 2012 15:12:34 +0000]
media: video: tegra: handle NULL dereferences

-fix coverity issues
ar0832_main : handle dereference before NULL check
Coverity id : 15049
ar0832_main : handle dereference after NULL check
Coverity id : 12050
tegra_dtv : handle dereference after NULL check
Coverity id : 12051

Bug 1046331

Change-Id: I84bc0853db147c6941ab4b795dd3deb129996f7e
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/166923
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sri Krishna Chowdary <schowdary@nvidia.com>
Reviewed-by: Adam Jiang <chaoj@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agoiommu: Add DMA window parser, of_get_dma_window()
Hiroshi Doyu [Mon, 25 Jun 2012 11:23:54 +0000]
iommu: Add DMA window parser, of_get_dma_window()

This code was based on:
    "arch/microblaze/kernel/prom_parse.c"
    "arch/powerpc/kernel/prom_parse.c"

Can replace "of_parse_dma_window()" in the above. This supports
different formats flexibly. "prefix" can be configured if any. "busno"
and "index" are optionally specified. Set NULL and 0 if not used.

[Hiroshi DOYU: Backport from the upstream]

Bug 1025468

Change-Id: I45182b312be6c2ef671d852cd2434a0f07206dfa
Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
Reviewed-on: http://git-master/r/166869
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

6 years agoiommu/tegra: Move bus_set_iommu after probe
Hiroshi Doyu [Tue, 27 Nov 2012 08:01:28 +0000]
iommu/tegra: Move bus_set_iommu after probe

For a single image to support GART/SMMU.

Change-Id: I82e8328242d0e155dfb330fec2061027c4c3d6e2
Reported-by: Arto Merilainen <amerilainen@nvidia.com>
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/166478
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

6 years agoiommu/tegra: smmu: Remove unnecessary PTC/TLB flush all
Hiroshi Doyu [Tue, 27 Nov 2012 07:47:35 +0000]
iommu/tegra: smmu: Remove unnecessary PTC/TLB flush all

smmu_flush_regs() does TLB/PTC flush all for a second level page
table. This isn't necessay at all since each pte entry has been
already maintained by address in the above flush_ptc_and_tlb().

Change-Id: I45d6decefcd49ef6f02043ead1a46701ee6ed19e
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/166477
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

6 years agovideo: tegra: dc: moving to clk prepare APIs
Sivaram Nair [Thu, 1 Nov 2012 15:46:49 +0000]
video: tegra: dc: moving to clk prepare APIs

The clk_enable/clk_disable pair of APIs are replaced with
clk_prepare_enable and clk_disable_unprepare.

This is needed for the migration to common clk framework.

Bug 920915

Change-Id: I3798befdd10a78b95f844a39dc8dd52948f07d08
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-on: http://git-master/r/162325
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

6 years agoARM: TEGRA: roth: Fix orientation vector
Xiaohui Tao [Sun, 25 Nov 2012 07:33:30 +0000]
ARM: TEGRA: roth: Fix orientation vector

The mpu6050 is placed 90 degree clock-wise of the default positon.
Change the orientation vector accordingly.

Bug 1163074

Change-Id: I0280b6f0954111e236bb7efd700a24135f934ea6
Signed-off-by: Xiaohui Tao <xtao@nvidia.com>
Reviewed-on: http://git-master/r/166038
(cherry picked from commit 455aca3bf65d79317dcfcf6c3e8bd08ff59e244c)
Reviewed-on: http://git-master/r/168117
Reviewed-by: Robert Collins <rcollins@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Matt Wagner <mwagner@nvidia.com>
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

6 years agocrypto: tegra-se: Remove unused code
Sri Krishna chowdary [Sun, 2 Dec 2012 06:05:26 +0000]
crypto: tegra-se: Remove unused code

coverity id: 20917

Bug 1046331

Change-Id: Ia5653fff5df8cb0b5d8bda838b8d7cd883527fa0
Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/167944
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: Venkata Jagadish <vjagadish@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

6 years agokernel: add ioctl constants for amx/adx tests
Songhee Baek [Wed, 31 Oct 2012 22:53:20 +0000]
kernel: add ioctl constants for amx/adx tests

+ ioctl constants for audio test manager amx kernel module
+ ioctl constants for audio test manager adx kernel module
+ ioctl constants for audio test manager amx-adx kernel module

Change-Id: I372a729d456a19a4a48cb9cd0174cbb773c769c8
Signed-off-by: Songhee Baek <sbaek@nvidia.com>
Reviewed-on: http://git-master/r/160350
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijay Mali <vmali@nvidia.com>
Reviewed-by: Gajanan Bhat <gbhat@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agousb: gadget: tegra: Add Null Check
Sri Krishna chowdary [Sun, 2 Dec 2012 07:47:20 +0000]
usb: gadget: tegra: Add Null Check

coverity id; 20913

Bug 1046331

Change-Id: I4da83a06eef672f2e7b166e26ec14bd388afce6f
Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/167948
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
GVS: Gerrit_Virtual_Submit

6 years agovideo: tegra: dc: organize clock setup by out type
Jon Mayo [Fri, 30 Nov 2012 22:53:10 +0000]
video: tegra: dc: organize clock setup by out type

Add an out_ops->setup_clk and move clock setup code to a function in each
output type.

Change-Id: I72bdce530fce2a68c5547ea2a6cee301bc9f2df1
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/168138
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agovideo: tegra: dc: use apis to calculate EMC frequency
Jon Mayo [Wed, 31 Oct 2012 01:17:25 +0000]
video: tegra: dc: use apis to calculate EMC frequency

Use MC api tegra_mc_get_effective_bytes_width to calculate EMC clock.

bug 1167105

Change-Id: I06eee3ced3d54e5699ae84051e4e1a9f548079de
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/167836
Reviewed-by: Automatic_Commit_Validation_User

6 years agovideo: tegra: dc: fix the clock-gate for suspend.
Kevin Huang [Fri, 30 Nov 2012 19:45:06 +0000]
video: tegra: dc: fix the clock-gate for suspend.

Bug 1174105

Change-Id: I2eb6bb5e75b1bf7a65956e69abff798ca95fe35f
Signed-off-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-on: http://git-master/r/167803
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agoARCH: arm: Enable sensor for Roth
Xiaohui Tao [Mon, 3 Dec 2012 19:19:31 +0000]
ARCH: arm: Enable sensor for Roth

 * Add regulator support for sensors
 * Add back mpuirq_init() function
 * Change i2c bus address

Bug 1163074

Change-Id: I6c4fbd03548b897bd04c2f579a3c64842692bebc
Signed-off-by: Xiaohui Tao <xtao@nvidia.com>
Reviewed-on: http://git-master/r/164573
(cherry picked from commit e4e5dad47daffa094202b80646de78f4483f9001)
Reviewed-on: http://git-master/r/168114
Reviewed-by: Robert Collins <rcollins@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Matt Wagner <mwagner@nvidia.com>
Reviewed-by: Erik Lilliebjerg <elilliebjerg@nvidia.com>
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

6 years agocdc_ncm: Adding rmnet interface for Icera Nemo modem
Steve Lin [Fri, 30 Nov 2012 18:20:56 +0000]
cdc_ncm: Adding rmnet interface for Icera Nemo modem

Bug 1176649

Change-Id: I9c89b907649ac66d9e85c66e964574a2fe9d368f
Signed-off-by: Steve Lin <stlin@nvidia.com>
Reviewed-on: http://git-master/r/167784
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Frederic Bossy <fbossy@nvidia.com>

6 years agoarm: config: tegra3: enable tegra wakeup monitor
Jiukai Ma [Tue, 23 Oct 2012 07:17:31 +0000]
arm: config: tegra3: enable tegra wakeup monitor

The tegra wakeup monitor is to send wakeup source and the uevents
indicate suspend_prepare and post_suspend.

Bug 890577

Change-Id: I69e1c8e2eeb9c7fca11a45628ba70e0355ec0dbd
Signed-off-by: Jiukai Ma <jiukaim@nvidia.com>
Reviewed-on: http://git-master/r/146771
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agoarm: tegra: export the wake status function
Jiukai Ma [Tue, 23 Oct 2012 05:20:38 +0000]
arm: tegra: export the wake status function

Export the wake status function by tegra_read_pmc_wake_status so
it is possible to read the wake status by others.

Bug 890577

Change-Id: Ib237cc8b1f374ff51ef8b171f35504f99c3d4123
Signed-off-by: Jiukai Ma <jiukaim@nvidia.com>
Reviewed-on: http://git-master/r/146727
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Eric Miao <emiao@nvidia.com>
Reviewed-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

6 years agomedia: video: tegra: ov9772: Modify mode tables
Phil Breczinski [Fri, 30 Nov 2012 02:28:57 +0000]
media: video: tegra: ov9772: Modify mode tables

Modify mode tables for ov9772 sensor driver to fix blacklevel
issues. Adjust pixel type to compensate for mode table changes.

Bug 1048307

Change-Id: I2416a43a02152b9b87405305ccd82c4ed476822c
Signed-off-by: Phil Breczinski <pbreczinski@nvidia.com>
Reviewed-on: http://git-master/r/167577
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Frank Chen <frankc@nvidia.com>
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

6 years agoARM: tegra: usb:Disable PMC when driver unregister
Petlozu Pravareshwar [Fri, 30 Nov 2012 12:12:55 +0000]
ARM: tegra: usb:Disable PMC when driver unregister

PMC should be disabled while unregistering
the driver.

Bug 1171244

Change-Id: Ide52b30f18f30b0d2308729eb8eb8d2f7a90d0bc
Signed-off-by: Petlozu Pravareshwar <petlozup@nvidia.com>
Reviewed-on: http://git-master/r/167349
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agousb: gadget: nvusb: fix section mismatch warning
Deepak Nibade [Thu, 29 Nov 2012 15:33:48 +0000]
usb: gadget: nvusb: fix section mismatch warning

fix warning by removing __init from
-nvusb_bind_config
-nvusb_bind_func

Bug 1038578

Change-Id: I85e1a952a180ba711e23d9f0fedbe5c10d0daada
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/167336
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-by: Sri Krishna Chowdary <schowdary@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Preetham Chandru <pchandru@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

6 years agoARM: tegra: usb: Enable USB_TXFILLTUNING properly
Suresh Mangipudi [Thu, 29 Nov 2012 12:36:15 +0000]
ARM: tegra: usb: Enable USB_TXFILLTUNING properly

USB_TXFILLTUNING is being overwritten, set it properly at the end
of PHY power_on.

Bug 1176649

Change-Id: I99cbb4d8727d53df6a37a99139bc54f1c5139334
Signed-off-by: Suresh Mangipudi <smangipudi@nvidia.com>
Reviewed-on: http://git-master/r/167304
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agoARM: tegra: pluto: add unused rail data
Deepak Nibade [Wed, 28 Nov 2012 13:16:36 +0000]
ARM: tegra: pluto: add unused rail data

-add unused rail data in board-pluto-powermon.c
-without rail initialization data, no probe was called
and hence ina219 devices remained powered up

Bug 1182097

Change-Id: Iea11ba171f75de03539461e5e6b1e238257698f6
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/166894
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Aly Hirani <ahirani@nvidia.com>
Tested-by: Aly Hirani <ahirani@nvidia.com>
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

6 years agoinput: touch: Enable async suspend/resume
Li Li [Wed, 28 Nov 2012 01:48:55 +0000]
input: touch: Enable async suspend/resume

Touch driver needs quite a long time to resume, which impacts
suspend/resume latency.

Make it async to prevent blocking other drivers.

Bug 1166767

Change-Id: Iff68234ece4201057ceb72c69f19eb7a486c582f
Signed-off-by: Li Li <lli5@nvidia.com>
Reviewed-on: http://git-master/r/166749
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agommc: tegra: Enable async suspend/resume
Li Li [Wed, 28 Nov 2012 01:41:50 +0000]
mmc: tegra: Enable async suspend/resume

mmc init is slow, which impacts suspend/resume latency.
Enable async mode to prevent blocking other devices.

Bug 1166767

Change-Id: I2bfcc47c7d9456d02f844e180f50a07671205965
Signed-off-by: Li Li <lli5@nvidia.com>
Reviewed-on: http://git-master/r/166748
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Eric Miao <emiao@nvidia.com>
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Reviewed-by: Shridhar Rasal <srasal@nvidia.com>

6 years agovideo: tegra: ad5816: focus setting update
Wei Chen [Tue, 27 Nov 2012 23:56:04 +0000]
video: tegra: ad5816: focus setting update

Update the focus settings according to the
vcm driver vendor and isp calibration.

Bug 1176695

Change-Id: I478dae1af70e3616c440245cc9e66b8018c28bf9
Signed-off-by: Wei Chen <wechen@nvidia.com>
Reviewed-on: http://git-master/r/166705
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agoARM: tegra: usb_phy: Remove WAR for port suspend
srinivas thaduvai [Mon, 5 Nov 2012 09:22:30 +0000]
ARM: tegra: usb_phy: Remove WAR for port suspend

Since suspend fix enabled for all interfaces as
part of usb_phy_init funcion, Remove the 4 ms
delay before the controller goes to suspend.

Bug 1170444

Change-Id: Ibc5826b1d0f145b278aca1d8c7d9aab0070e94ff
Signed-off-by: srinivas thaduvai <sthaduvai@nvidia.com>
Signed-off-by: Abhishek Shukla <abhisheks@nvidia.com>
Reviewed-on: http://git-master/r/165738
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agoinput: touch: raydium: regulator modification
Xiaohui Tao [Tue, 20 Nov 2012 21:47:46 +0000]
input: touch: raydium: regulator modification

The spi checking function was moved above the
regulator init function.
Clean up code update accordingly.

Change-Id: Ic1f6db0c1f5e79d3a9379a5a93bf0ca3ce40a9b9
Signed-off-by: Xiaohui Tao <xtao@nvidia.com>
Signed-off-by: David Jung <djung@nvidia.com>
Reviewed-on: http://git-master/r/165144
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agoarm: mm: cpa: Fix warnings in cpa code.
Krishna Reddy [Wed, 14 Nov 2012 23:22:06 +0000]
arm: mm: cpa: Fix warnings in cpa code.

Change-Id: I4b9faea7252399c598619460dee27990ad6474ca
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/163722
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User

6 years agoinput: touch: raydium: use recommended sequence
Xiaohui Tao [Tue, 20 Nov 2012 21:25:41 +0000]
input: touch: raydium: use recommended sequence

Nvidia modifications to use the recommended power
up and down sequencing for Raydium touch
controller chip.

Bug 1175407
Bug 1156123
Bug 1066926

Change-Id: Ifd9a8e39db30c50e8d25d5b5a0e44060ded94de9
Signed-off-by: David Jung <djung@nvidia.com>
Signed-off-by: Xiaohui Tao <xtao@nvidia.com>
Reviewed-on: http://git-master/r/163164
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agoinput: touch: raydium updates for slow scan
Xiaohui Tao [Mon, 3 Dec 2012 23:29:39 +0000]
input: touch: raydium updates for slow scan

Raydium code drop.
Added updates for Pluto, Dalmore slow scan

Bug 1054801

Change-Id: I5728ea0ae4c1a34a65e97c49cc387067df5a1dcf
Signed-off-by: David Jung <djung@nvidia.com>
Signed-off-by: Xiaohui Tao <xtao@nvidia.com>
Reviewed-on: http://git-master/r/163056
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Robert Collins <rcollins@nvidia.com>
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agommc: Disable bkops timer during suspend
Nitin Agrawal [Wed, 21 Nov 2012 10:31:57 +0000]
mmc: Disable bkops timer during suspend

Disable the timer added for BKOPS during supend and re-enable the same
during resume.

Bug 1158843
Bug 1010500

Reviewed-on: http://git-master/r/145573
(cherry picked from commit 85dd8caeb8e91a7e4385e50c4c024961b8b262f4)

Change-Id: I3bc576ace9bf56c85502f21028fd70989853ea38
Signed-off-by: Nitin Agrawal <nitina@nvidia.com>
Reviewed-on: http://git-master/r/161868
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>

6 years agoarm: tegra: add tegra wakeup monitor
Jiukai Ma [Fri, 30 Nov 2012 11:06:32 +0000]
arm: tegra: add tegra wakeup monitor

The tegra wakeup monitor is the driver to send wake up source and
uevents which indicate suspend_prepare and post_suspend.

Bug 890577

Change-Id: If9bc0ceec1a8d02deb0bf5e42c289e33343ffa44
Signed-off-by: Jiukai Ma <jiukaim@nvidia.com>
Reviewed-on: http://git-master/r/160145
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agoarm: tegra: kai: add tegra wakeup monitor support
Jiukai Ma [Tue, 23 Oct 2012 07:32:43 +0000]
arm: tegra: kai: add tegra wakeup monitor support

Add the platform data of tegra wakeup monitor to enable it.

Bug 890577

Change-Id: I8f76b45f20ab1908cc9d03a7799216588511e099
Signed-off-by: Jiukai Ma <jiukaim@nvidia.com>
Reviewed-on: http://git-master/r/146773
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agovideo: tegra: nvmap: expose a few nvmap interfaces for RM
Jin Qian [Tue, 26 Jun 2012 01:17:58 +0000]
video: tegra: nvmap: expose a few nvmap interfaces for RM

Bug 979808

Change-Id: I06c11409f7cb300f2a8040a0623577c3db91c79f
Signed-off-by: Jin Qian <jqian@nvidia.com>
Reviewed-on: http://git-master/r/135142
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Antoine Chauveau <achauveau@nvidia.com>
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

6 years agoiommu/tegra: smmu: Change debugfs permission
Hiroshi Doyu [Mon, 3 Dec 2012 05:21:38 +0000]
iommu/tegra: smmu: Change debugfs permission

Allow root to read/write only.

Bug 1179366

Change-Id: I91b13d53cb72e0db347dadbbddae172f70eded73
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/167990
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>

6 years agoARM: tegra11: dvfs: Update miscellaneous I/O dvfs tables
Alex Frid [Sun, 2 Dec 2012 04:22:13 +0000]
ARM: tegra11: dvfs: Update miscellaneous I/O dvfs tables

Updated dvfs tables and maximum rate limits for I/O interfaces:
display/dsi/csi subsystem, sbc, sdmmc, xusb. Removed dvfs tables
for i2c, pwm, uart, since these modules can run at maximum rate
in the entire voltage range.

Bug 1161126

Change-Id: I07c704503b86ceeefa1f9c1510a15bd766b27bab
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/167942
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agoARM: tegra11: dvfs: Add CPU dvfs tables per bin
Alex Frid [Sat, 1 Dec 2012 07:52:10 +0000]
ARM: tegra11: dvfs: Add CPU dvfs tables per bin

Added CPU cvb dvfs tables for Tegra11 bins - for now just duplicated
initial bring-up table, until binning data is available. Frequency
units in tables are changed from MHZ to KHZ.

Bug 1170986

Change-Id: Ida8ee4d88471e4d457327c0fb893d7a705138365
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/167935
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

6 years agoARM: tegra11: dvfs: Update CPU dvfs table format
Alex Frid [Fri, 30 Nov 2012 08:37:39 +0000]
ARM: tegra11: dvfs: Update CPU dvfs table format

To support CPU process binning on top of continues virtual binning:

- added process id to CPU cvb dvfs table, and implemented table
selection based on both speedo and process ids (only speedo id was
used before)

- integrated dfll tuning data into CPU cvb dvfs table, so that it can
be specified differently for each process bin.

Bug 1161126
Bug 1170986

Change-Id: Ie8e898170540bab59470a9f55a40fb6213f2686b
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/167918
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

6 years agoARM: tegra11: dvfs: Add CL-DVFS tuning threshold to debugfs
Alex Frid [Sat, 1 Dec 2012 06:33:24 +0000]
ARM: tegra11: dvfs: Add CL-DVFS tuning threshold to debugfs

Bug 1178825

Change-Id: Ib98f2b17e43be9a05860dccc2a172d187d4626d7
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/167917
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

6 years agovideo: tegra: dc: No dependency check if only one DC instanced
Chao Xu [Fri, 30 Nov 2012 23:57:13 +0000]
video: tegra: dc: No dependency check if only one DC instanced

Change-Id: I5f2b333a2792f6948ed1bc18fdf28575a5f94681
Signed-off-by: Chao Xu <cxu@nvidia.com>
Reviewed-on: http://git-master/r/167877
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agoarm: tegra: rename all tegra11x reference with tegra114
Pritesh Raithatha [Fri, 30 Nov 2012 13:41:58 +0000]
arm: tegra: rename all tegra11x reference with tegra114

Part of renaming tegra11x to tegra114, replacing all
tegra11x with tegra114

Bug 1003210

Change-Id: I8b0f9ab0d825ed7cefebbe151f9a0367daff7dc6
Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>
Reviewed-on: http://git-master/r/167753
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

6 years agoarm: dt: tegra: rename all tegra11x reference with tegra114
Pritesh Raithatha [Fri, 30 Nov 2012 14:04:38 +0000]
arm: dt: tegra: rename all tegra11x reference with tegra114

Part of renaming tegra11x to tegra114, replacing all
tegra11x with tegra114

Bug 1003210

Change-Id: I48401e1a97fa99c3b5e374df091ac4c528695b2e
Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>
Reviewed-on: http://git-master/r/167752
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

6 years agoarm: tegra: rename tegra11x* device tree files to tegra114*
Pritesh Raithatha [Fri, 30 Nov 2012 14:02:19 +0000]
arm: tegra: rename tegra11x* device tree files to tegra114*

Part of renaming tegra11x to tegra114, renaming device tree files
from tegra11x* to tegra114*

Bug 1003210

Change-Id: I0f2a5e74056e7893544dba9525ab99250a0bf39e
Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>
Reviewed-on: http://git-master/r/167751
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

6 years agomisc: tegra-baseband: Enable auto-suspend. Add additional
Raj Jayaraman [Fri, 30 Nov 2012 07:19:44 +0000]
misc: tegra-baseband: Enable auto-suspend. Add additional
check for aborting system suspend.

Bug 1054808

Change-Id: I24c8669052c91e9c4054e6731124d2e211939d00
Signed-off-by: Raj Jayaraman <rjayaraman@nvidia.com>
Reviewed-on: http://git-master/r/167647
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Abhishek Shukla <abhisheks@nvidia.com>
Tested-by: Abhishek Shukla <abhisheks@nvidia.com>
Reviewed-by: Steve Lin <stlin@nvidia.com>

6 years agoARM: tegra11: dvfs: Add CL-DVFS dynamic tuning
Alex Frid [Wed, 28 Nov 2012 06:57:38 +0000]
ARM: tegra11: dvfs: Add CL-DVFS dynamic tuning

Added mechanism for CL-DVFS dynamic tuning over two voltage ranges.
Range threshold and tuning settings for low and high ranges are
specified by the chip characterization.

Low range setting is used whenever CL-DVFS is operating in the open
loop mode, and in the voltage range at/below threshold when operating
in closed loop mode. High tuning setting is used in the voltage range
above threshold in closed loop mode only.

High range tuning setting can be applied only when voltage is already
above threshold. Therefore, when high voltage is requested:
- CL-DVFS output minimum is set at threshold level
- tuning timer is started to poll for completion of high voltage
request - only then high range setting is actually loaded into
CL-DVFS registers (and timer is stopped).

Low range tuning setting is safe at any voltage, and can be applied
immediately when the respective request is received, even if actual
voltage is not yet scaled below threshold.

If range threshold in the characterization data is not set (zero),
dynamic tuning is disabled, and low range setting is applied in the
entire voltage range.

Bug 1178825

Change-Id: I42f336eaf2af6876b53c15ea57b896cdc7110596
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/167198
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

6 years agoARM: tegra11: dvfs: Re-factor CL-DVFS operations
Alex Frid [Wed, 28 Nov 2012 05:02:06 +0000]
ARM: tegra11: dvfs: Re-factor CL-DVFS operations

Moved set maximum limit operation into a separate function.
Combined request register construction with actual write to register
in one function.

Change-Id: Ibc181cdf790bcffe517c65e7cdffac153a93564a
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/167197
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

6 years agoARM: tegra: board: commandline parse for usb port owner
Suresh Mangipudi [Wed, 7 Nov 2012 15:08:29 +0000]
ARM: tegra: board: commandline parse for usb port owner

Add support for reading the usb_port_owner_info from the linux
commandline.

Bug 1171854

Change-Id: Ib05c4d4f34ba2ac142e826dac6f4b96392419702
Signed-off-by: Suresh Mangipudi <smangipudi@nvidia.com>
Reviewed-on: http://git-master/r/162050
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agoARM: tegra: fuse: fusetime configuration
Ken Chang [Wed, 21 Nov 2012 05:32:14 +0000]
ARM: tegra: fuse: fusetime configuration

The fuse programming pulse needs to be 10us for T30, and 11us for T114
and later chips. Thus FUSE_FUSETIME_PGM2_0 should be modified based on
the OSC frequency used on the specific board.

The formula is FUSE_FUSETIME_PGM2_0 = N * OSC in MHz where N = 10 for T30
and 11 for T114.

Bug 1157054

Change-Id: I725eb750db19bf4253f3a77fb9518f73b4a3d9c9
Signed-off-by: Ken Chang <kenc@nvidia.com>
Reviewed-on: http://git-master/r/165303
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

6 years agoARM: tegra: provide fix mapping for NOR.
Nitin Sehgal [Fri, 30 Nov 2012 09:16:17 +0000]
ARM: tegra: provide fix mapping for NOR.

- Added 128MB fixed mapping for NOR.

bug 1046135

Change-Id: Ieb335fcd0267e20e707a90a9be94657fb8d4ce58
Signed-off-by: Nitin Sehgal <nsehgal@nvidia.com>
Reviewed-on: http://git-master/r/167669
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Bharath H S <bhs@nvidia.com>
Reviewed-by: Ashutosh Patel <ashutoshp@nvidia.com>

6 years agovideo: tegra: host: start tsec ucode at 256.
Marvin Zhang [Thu, 29 Nov 2012 02:37:03 +0000]
video: tegra: host: start tsec ucode at 256.

nvsi needs to use the first 256 bytes of tsec imem as secure storage, move
tsec ucode to start at 256 instead of 0. Copy 256 bytes ucode firmware to
imem offset 256, and make sure start execution at offset 256.

Bug 1179746

Change-Id: I5b732864355ace483e3aedc9992b2961b42a88cf
Signed-off-by: Marvin Zhang <mzhang@nvidia.com>
Reviewed-on: http://git-master/r/167158
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Karan Jhavar <kjhavar@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

6 years agovideo: tegra: dc: update cmu_enable on sysfs write
Mitch Luban [Thu, 22 Nov 2012 19:14:56 +0000]
video: tegra: dc: update cmu_enable on sysfs write

When writing to cmu_enable sysfs node, we need to update
dc->pdata->cmu_enable before updating cmu.

Bug 1169109

Change-Id: I5fe24945dd778e4879d70454c4332a5c5dcc253a
Signed-off-by: Mitch Luban <mluban@nvidia.com>
Reviewed-on: http://git-master/r/165806
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

6 years agoARM: tegra: fuse: correct the offset for OSC_FREQ
Ken Chang [Wed, 21 Nov 2012 05:32:14 +0000]
ARM: tegra: fuse: correct the offset for OSC_FREQ

Bug 1157054

Change-Id: Ifd4566af6046fa24b1b753bbaf1668177ae88adf
Signed-off-by: Ken Chang <kenc@nvidia.com>
Reviewed-on: http://git-master/r/165644
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

6 years agoARM: tegra: roth: add OnKey interrupt key
Laxman Dewangan [Sun, 2 Dec 2012 02:05:45 +0000]
ARM: tegra: roth: add OnKey interrupt key

OnKey is connected to the PMIC Onkey. Add the support
for posting POWER event when this key is pressed.

This will enable the LP0 wake through OnKey.

Change-Id: Ia048947010a4bc431937431cff2647611af7e838
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/167934
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit

6 years agoARM: tegra: config: add defconfig for roth
Laxman Dewangan [Fri, 30 Nov 2012 21:02:20 +0000]
ARM: tegra: config: add defconfig for roth

Add defconfig for roth android to select roth specific
configuration.

Change-Id: I0a980d8c256b54b3e8baa91d4c4703ce12134561
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/167824
Reviewed-by: Automatic_Commit_Validation_User

6 years agodrivers: misc: add bluedroid_pm drver
Nagarjuna Kristam [Mon, 12 Nov 2012 10:54:34 +0000]
drivers: misc: add bluedroid_pm drver

This driver is implemented to actively manage the bluetooth radio power and
control wake interface from bluetooth radio to host processor.
Two interfaces are used to manage bluetooth radio power

RFKILL: This interface is used to toggle rfkill switches which are controlled
by gpios and voltage regulators. This interface is created only when
bluetooth radio requires one of rfkill switches [GPIO/ Voltage regulators]
Driver assumes vdd_bt_3v3 as consumer name for 3V regulator and
vddio_bt_1v8 as consumer name for 1.8V regulator

PROCFS: Using procfs interface, driver controls BT chip ext_wake GPIO to
enable/disable BT chip LPM. This interface is created only when bluetooth
module supports LPM mode control using GPIO

This driver assumes platform data is passed from the board files to configure
IO parameters needed to control bluetooth radio.

"shutdown_gpio" is resource name to register radio's Enable/Shutdown gpio
"reset_gpio" is resource name to regster radio's reset gpio
"gpio_ext_wake" is resource name to register radio's ext_wake gpio
"gpio_host_wake" is resource name to register host wake gpio
"host_wake" is resource name to register host wake irq

Bug 1169531

Change-Id: Ic327cc37c5a975ef7b7c8d165e151a96912052b7
Signed-off-by: Anita Kar <akar@nvidia.com>
Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-on: http://git-master/r/167711
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>

6 years agoARM: config: tegra11: enable BQ24192 and its vbus regulator
Laxman Dewangan [Fri, 30 Nov 2012 00:42:42 +0000]
ARM: config: tegra11: enable BQ24192 and its vbus regulator

Change-Id: Ie8454f17ff882b0fe8c50ac274a1159997d19e90
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/167535
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

6 years agoARM: tegra: roth: register BQ24192 device
Laxman Dewangan [Fri, 30 Nov 2012 00:34:15 +0000]
ARM: tegra: roth: register BQ24192 device

This will add support for battery charging and vbus supply.

Change-Id: I1974d19e9ff60ace801ffb6c62dfada04a827382
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/167531
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

6 years agopower: charger: bq24192: Add battery charger driver
Laxman Dewangan [Fri, 30 Nov 2012 00:33:02 +0000]
power: charger: bq24192: Add battery charger driver

Add battery charger driver for BQ24190/BQ24192.

Change-Id: I5eddf2f4d66d45313627dc5d16e019adcc00a27f
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/167530
GVS: Gerrit_Virtual_Submit

6 years agoregulator: bq24192: add regulator driver
Laxman Dewangan [Fri, 30 Nov 2012 00:30:51 +0000]
regulator: bq24192: add regulator driver

The device BQ24190/BQ24192 supports vbus supply.
Add regulator driver for this.

Change-Id: Ia33385ba2dc5f2afb577921469e89d96825d006b
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/167529
GVS: Gerrit_Virtual_Submit

6 years agomfd: bq2419x: add mfd driver
Laxman Dewangan [Fri, 30 Nov 2012 00:26:59 +0000]
mfd: bq2419x: add mfd driver

BQ24190, BQ24192 supports the battery charging and VBUS path.
Adding mfd driver for this device which register regulator for
vbus and battery charging driver.

Change-Id: If8862ec86cc966a42a66986a609ea22b161bab4c
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/167528
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

6 years agoarm: mach: tegra: roth: removed unused regulator code
Narayan Reddy [Mon, 19 Nov 2012 17:50:30 +0000]
arm: mach: tegra: roth: removed unused regulator code

removed GPS regilator code since not supported for THOR.

Bug 1176686

Change-Id: If612bec788b4c8d8fefc596aa16ec13e9b42cd99
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: http://git-master/r/164741
Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-on: http://git-master/r/167527
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

6 years agoconfig: tegra3: BT and HID options
Mursalin Akon [Thu, 29 Nov 2012 23:07:46 +0000]
config: tegra3: BT and HID options

- enable couple of HID devices
- modify couple of BT options

Bug 1178960

Change-Id: Id9377edff2189d8a63f624d5d4e388e54658482f
Signed-off-by: Mursalin Akon <makon@nvidia.com>
Reviewed-on: http://git-master/r/167503
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Allen Martin <amartin@nvidia.com>

6 years agoconfig: tegra3: refresh L4T defconfig
Mursalin Akon [Thu, 29 Nov 2012 22:55:51 +0000]
config: tegra3: refresh L4T defconfig

Just did following steps to refresh:
make ARCH=arm tegra3_defconfig
make ARCH=arm menuconfig
make ARCH=arm savedefconfig
cp defconfig arch/arm/configs/tegra3_defconfig

Brief info about each change:
- Kconfigs containing CONFIG_MPU_SENSORS_TIMERIRQ
are not referred from anywhere
- CONFIG_TEGRA_BB_M7400 does not exist
- CONFIG_BCMDHD* are leftover from a previous CL
- CONFIG_BACKLIGHT_CLASS_DEVICE is selected
by CONFIG_TEGRA_DC

Bug 1178960

Change-Id: Icaa0693df328f61b0052c3607c5cc49c0138b2d0
Signed-off-by: Mursalin Akon <makon@nvidia.com>
Reviewed-on: http://git-master/r/167502
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Allen Martin <amartin@nvidia.com>
GVS: Gerrit_Virtual_Submit

6 years agobluetooth: hid: make Android code conditional
Mursalin Akon [Thu, 29 Nov 2012 22:33:57 +0000]
bluetooth: hid: make Android code conditional

Commit 7c786ce33a1b4194cb95aa1e68bc38d552eda932
introduced couple of fields, which are not used
in standard bluez user space stack. However,
Android bluez use them. This CL, conditionally
builds the part of the code introduced in the
above commit.

Bug 1178960

Change-Id: I7254fe83c7fb4bbfd14e00dda3ec3a14afc1b234
Signed-off-by: Mursalin Akon <makon@nvidia.com>
Reviewed-on: http://git-master/r/167501
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Allen Martin <amartin@nvidia.com>
GVS: Gerrit_Virtual_Submit

6 years agoarm: tegra: baseband: disable autosuspend for 5AN BSD
Neil Patel [Thu, 29 Nov 2012 16:14:49 +0000]
arm: tegra: baseband: disable autosuspend for 5AN BSD

Temporarily disable autosuspend for i500 5AN BSD devices.

Bug 1185296

Change-Id: Ic70a5669f9d6f5d297a4b85189bb650b82e18baa
Signed-off-by: Neil Patel <neilp@nvidia.com>
Reviewed-on: http://git-master/r/167338
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sylvain Barge <sbarge@nvidia.com>
Reviewed-by: Steve Lin <stlin@nvidia.com>

6 years agoARM: tegra: pluto: fix section mismatch warning
Deepak Nibade [Thu, 29 Nov 2012 14:15:21 +0000]
ARM: tegra: pluto: fix section mismatch warning

add __init to max77665_init to fix warning

Bug 1038578

Change-Id: I28032047e8fbdeb97c444d95ec921eeec00e6b60
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/167318
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Sri Krishna Chowdary <schowdary@nvidia.com>

6 years agoARM: tegra: m2601: Add board support for m2601
Ashutosh Patel [Thu, 29 Nov 2012 10:49:26 +0000]
ARM: tegra: m2601: Add board support for m2601

Changes done:

1. GMI,I2C,SDMMC,UART,SPI,PCIE,USB registered as platform
devices.Remove USB1 registration. Add SATA Support.
2. Updated GMI,I2C,GPIO,SDMMC,SPI,PCIE pinmux entries for
M2601.

bug 1182117

Change-Id: I09d0784dcf2a64f7c459c8450fd8012a8f517cb0
Signed-off-by: Ashutosh Patel <ashutoshp@nvidia.com>
Reviewed-on: http://git-master/r/167259
Reviewed-by: Nitin Sehgal <nsehgal@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Bharath H S <bhs@nvidia.com>
GVS: Gerrit_Virtual_Submit

6 years agoARM: tegra: restructuring battery EDP init code
Sivaram Nair [Fri, 23 Nov 2012 08:26:40 +0000]
ARM: tegra: restructuring battery EDP init code

The EDP manager init and registration code is slightly restructured in
oder to decouple the config flags CONFIG_EDP_FRAMEWORK and
CONFIG_TEGRA_EDP_LIMITS which are otherwise independent.

Change-Id: I48f0fb198fbf2ac2118e95293a6ac7ecd1abdcab
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-on: http://git-master/r/166903
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

6 years agoarm: tegra: fuse: Fixed burning fuse through sysfs
Sumit Sharma [Wed, 28 Nov 2012 06:21:10 +0000]
arm: tegra: fuse: Fixed burning fuse through sysfs

Fixed fuse burning issue by adding 1 ms delay in fuse_program function

Bug 1057910

Change-Id: Id0d754a195c2a78ec4bf5a41f3ffb2bbd6c9c5ea
Signed-off-by: Sumit Sharma <sumsharma@nvidia.com>
Reviewed-on: http://git-master/r/166789
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

6 years agoARM: tegra: Clear PMU event overflow status
Bo Yan [Wed, 28 Nov 2012 04:10:15 +0000]
ARM: tegra: Clear PMU event overflow status

Change-Id: Ibae2f54f9fff94cc5b1778893c12dcd1808ac6a3
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/166766
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

6 years agoARM: tegra11x: Add flag to force C0NC power gating
Bo Yan [Tue, 27 Nov 2012 23:29:08 +0000]
ARM: tegra11x: Add flag to force C0NC power gating

The bit 2 of fast_cluster_power_down_mode now dictates whether to
force the power down mode specified in b[0-1]. If bit 2 is 0, then
b[0-1] specifies the deepest cluster power state in idle, the cluster
idle power state doesn't need to go to that level every time. If bit
2 is 1, then b[0-1] forces cluster idle power state to that level.

bug 1181412

Change-Id: I36aacc2d5318c7054d32d662c150530c51a4e9a5
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/166718
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

6 years agoARM: tegra: usb: Upadate the usb debounce value
Petlozu Pravareshwar [Wed, 28 Nov 2012 11:22:17 +0000]
ARM: tegra: usb: Upadate the usb debounce value

Modified the debounce period for ID and VBUS events to 2.

Bug 1167257

Change-Id: I34a76f7eddc18edaf6aa8ba0e2ac6e0fa2ae1f52
Signed-off-by: Petlozu Pravareshwar <petlozup@nvidia.com>
Reviewed-on: http://git-master/r/166586
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>

6 years agoARM: tegra: set bluetooth configurations for bluedroid_pm driver
Nagarjuna Kristam [Tue, 27 Nov 2012 10:01:46 +0000]
ARM: tegra: set bluetooth configurations for bluedroid_pm driver

- Add resources to configure bluedroid_pm driver
- Add conditional compile for bluesleep, rfkill_gpio and bluedroid_pm resources
- change BT voltage parameters for bluedroid_pm driver

Bug 1169531

Change-Id: I9993d4e10aa43feaa7eea9ea86fb54f1b5336693
Signed-off-by: Anita Kar <akar@nvidia.com>
Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-on: http://git-master/r/165359
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

6 years agoARM: tegra: configs: disable bluez and enable bluedroid_pm
Nagarjuna Kristam [Mon, 26 Nov 2012 10:26:58 +0000]
ARM: tegra: configs: disable bluez and enable bluedroid_pm

Disable kernel bluez as it is not used in JB MR1
enable bluedroid_pm driver
cleanup defconfigs

Bug 1169531

Change-Id: Ia5b2ea0128fa5bfe320cdcee951f82a1ab210d07
Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-on: http://git-master/r/165358
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

6 years agoARM: tegra11: dalmore: 2nd display is not enabled for high resolutions
David Ung [Mon, 19 Nov 2012 23:57:05 +0000]
ARM: tegra11: dalmore: 2nd display is not enabled for high resolutions

Increase 2nd framebuffer size to support double-buffered 1080p.

bug 1178199

Signed-off-by: David Ung <davidu@nvidia.com>
Change-Id: Ia45d9b310a90600e7fc77636060d678380a553f4
Reviewed-on: http://git-master/r/164814
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

6 years agothermal: step_wise: Fix bug on passive instance updating
Jinyoung Park [Mon, 26 Nov 2012 23:43:22 +0000]
thermal: step_wise: Fix bug on passive instance updating

Thermal passive monitoring is not working correctly due to a bug on
passive instance updating.

Bug 1059470

Change-Id: I306fc3db9756c1a411619152c868174124635d4c
Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/166388
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

6 years agoThermal: Update thermal zone device register
Jinyoung Park [Mon, 26 Nov 2012 06:47:44 +0000]
Thermal: Update thermal zone device register

Update thermal zone device register in drivers due to updated thermal API.

Bug 1059470

Change-Id: I02e068c2b6c5756edb1f7928d2a822f3f2536867
Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/166119
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agoarm: tegra: pluto: Keep LDO3 rail powered in LP0
Abhishek Shukla [Thu, 29 Nov 2012 10:15:24 +0000]
arm: tegra: pluto: Keep LDO3 rail powered in LP0

vddio_hsic needs to be powered on in LP0

Change-Id: Idd66576d0f6df2ed27c2e7d78bd226eb6ffd466c
Signed-off-by: Abhishek Shukla <abhisheks@nvidia.com>
Reviewed-on: http://git-master/r/167266
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

6 years agoARM: Tegra: Roth: Dalmore: Resolve Backlight Conflicts
Matt Wagner [Wed, 28 Nov 2012 19:44:29 +0000]
ARM: Tegra: Roth: Dalmore: Resolve Backlight Conflicts

Backlight only requires GPIO on Roth, but on Dalmore with 5"
display, it requires GPIO and regulator.

Bug 1183562

Change-Id: Ic1be8ab6622b4e99738ff114f518aa11751230fe
Signed-off-by: Matt Wagner <mwagner@nvidia.com>
Reviewed-on: http://git-master/r/166999
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agoThermal: Merge thermal framwork changes from Linux-next
Jinyoung Park [Mon, 26 Nov 2012 22:40:28 +0000]
Thermal: Merge thermal framwork changes from Linux-next

There are some massive changes for thermal in Linux-next. They will be
released in Linux kernel-3.7. But several of them are needed for new thermal
management. So merged them from Linux-next to android-tegra-nv-3.4.

This is change list from Linux-next.
- thermal: Fix potential NULL pointer accesses
- thermal, cpufreq: Fix build when CPU_FREQ_TABLE isn't configured
- Thermal: Refactor thermal.h file
- Thermal: Move thermal_instance to thermal_core.h
- Thermal: Add get trend, get instance API's to thermal_sys
- Thermal: Add platform level information to thermal.h
- Thermal: Pass zone parameters as argument to tzd_register
- Thermal: Add thermal governor registration APIs
- Thermal: Add a policy sysfs attribute
- Thermal: Update binding logic based on platform data
- Thermal: Make thermal_cdev_update as a global function
- Thermal: Introduce fair_share thermal governor
- Thermal: Introduce a step_wise thermal governor
- Thermal: Add a thermal notifier for user space
- Thermal: Remove throttling logic out of thermal_sys.c
- Thermal: Add a notification API
- Thermal: Add documentation for platform layer data
- Thermal: Provide option to choose default thermal governor
- Thermal: Fix oops and unlocking in thermal_sys.c
- thermal: step_wise: Add missing static storage class specifiers
- thermal: fair_share: Add missing static storage class specifiers
- thermal: user_space: Add missing static storage class specifiers
- Thermal: add indent for code alignment.
- Thermal: fix bug of counting cpu frequencies.
- Thermal: Remove the cooling_cpufreq_list.

Bug 1059470

Change-Id: I9fc9d1ee6c1b99da21cad309f740a3762512f11c
Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/166320
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

6 years agoARM: tegra11: dvfs: Set minimum CL-DVFS safe voltage
Alex Frid [Sun, 11 Nov 2012 01:12:23 +0000]
ARM: tegra11: dvfs: Set minimum CL-DVFS safe voltage

On entry to cpu low power state CL-DVFS is switched to open loop
mode, and cpu voltage is set to the safe value, which used to be
determined as safe output matching the rate target during the last
switch from open to closed loop. As a result low power states entry
code was consuming extra power in cases when last safe voltage was
high.

With this commit CL-DVFS safe voltage is always set one step above
minimum voltage (one step is necessary to provide space for closed
loop downward transition). In addition the CL-DVFS output scale is
set 1:1 in the open loop mode. Thus, low power state is now entered
at minimum voltage and maximum frequency matching this voltage.

Change-Id: I2d5e020eb23775303d86733654ed1f16f035aef6
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/162893
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bo Yan <byan@nvidia.com>

6 years agoARM: Tegra: Roth: fix panel timing
Matt Wagner [Wed, 28 Nov 2012 19:52:35 +0000]
ARM: Tegra: Roth: fix panel timing

Horizontal timing for the panel was wrongly configured.
Change to correct values to fix the glitch at left side.

Bug 1156782
Bug 1175123
Bug 1180814

Change-Id: Ib6ce26ae7734d23652fb579d8bba88c64eaa22a2
Signed-off-by: Matt Wagner <mwagner@nvidia.com>
Reviewed-on: http://git-master/r/167003
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

6 years agoarm: tegra: e1853: Added Jetson audio config.
Nitin Pai [Fri, 16 Nov 2012 11:20:37 +0000]
arm: tegra: e1853: Added Jetson audio config.

Jetson has one I2S1 connected to WM8731 codec via I2S mode.
I2S2 is connected to AD1937 and default is TDM.

Bug 1066805

Reviewed-on: http://git-master/r/164324
(cherry picked from commit 9cf283940563b01dec99af4b2bc5add4dccdf34a)

Conflicts:

arch/arm/mach-tegra/Kconfig
arch/arm/mach-tegra/board-e1853.c

Change-Id: I203d785eaa4667b3a2f38848765ace54d4735f45
Signed-off-by: Nitin Pai <npai@nvidia.com>
Reviewed-on: http://git-master/r/166867
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agoARM: tegra11x: Remove redundant cache flush
Bo Yan [Tue, 27 Nov 2012 22:40:33 +0000]
ARM: tegra11x: Remove redundant cache flush

For CPU hotplug, since L1 cache is flushed when calling tegra_cpu_die,
there is no reason to do the same before that point.

Change-Id: I59adca195f8c0016819caa16a38602d886d1a10f
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/166701
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Antti Miettinen <amiettinen@nvidia.com>

6 years agoARM: tegra11: power: Add core EDP suspend/resume
Alex Frid [Sun, 25 Nov 2012 04:46:54 +0000]
ARM: tegra11: power: Add core EDP suspend/resume

Enforced favor emc profile on entry to suspend state, and restored
suspended profile on exit. This is necessary, since EMC rate on
exit from suspend is determined at boot, and may exceed edp caps
set by balanced or favor gpu profiles.

Bug 1165638

Change-Id: I9e938aa4b2296a23953b1653f29d632447c345cb
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/166366
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Prashant Malani <pmalani@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

6 years agoARM: tegra11: dvfs: Update nominal core voltage
Alex Frid [Wed, 21 Nov 2012 02:55:22 +0000]
ARM: tegra11: dvfs: Update nominal core voltage

Updated nominal core volatge for different chip skus, bins.

Bug 1161126

Change-Id: Ia659fc406c47af6d15efe684b1a39ea5af16e907
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/165516
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

6 years agoARM: tegra11: dvfs: Add dvfs tables per bin
Alex Frid [Tue, 20 Nov 2012 21:15:24 +0000]
ARM: tegra11: dvfs: Add dvfs tables per bin

Changed core dvfs table differentiation ID from speedo_id to
process_id. Separated 3D/2D/EPP tables into 2 bins, and updated
dvfs limits according to the characterization input.

Bug 1161126

Change-Id: I91b719aee0e821831b1da6709f6025d010cb4c9a
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/165515
GVS: Gerrit_Virtual_Submit
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

6 years agoARM: tegra11: dvfs: Increase EMC and GPU maximum rate limits
Alex Frid [Tue, 20 Nov 2012 21:06:32 +0000]
ARM: tegra11: dvfs: Increase EMC and GPU maximum rate limits

- Increased PLLM and EMC clocks maximum rate limits to 1066MHz.
- Increased 3D/2D/EPP and cbus clocks maximum rate limits to 700MHz.

Bug 1161126

Change-Id: I78a78c660e21961d2e38a0628172bb5eec90bc47
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/165514
GVS: Gerrit_Virtual_Submit
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

6 years agoARM: tegra11: dvfs: Add high voltage entries to dvfs tables
Alex Frid [Tue, 20 Nov 2012 07:20:34 +0000]
ARM: tegra11: dvfs: Add high voltage entries to dvfs tables

Added 1.17V and 1.25V entries to dvfs tables. The frequency limits
are just duplicated from 1.12V entry. Nominal voltage is still at
1.1V level, so no actual voltage increase is expected.

Bug 1161126

Change-Id: Ia7911c92184961c8e5dba6b3777146931f39bc4e
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/165513
GVS: Gerrit_Virtual_Submit
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

6 years agoARM: mm: enable non-cacheable streaming enhancement
Bo Yan [Fri, 16 Nov 2012 00:56:22 +0000]
ARM: mm: enable non-cacheable streaming enhancement

This is cortex-a15 specific

bug 1178938

Change-Id: Id695d89dbe1411d277f2c1296c74586ca9c1584e
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/164168
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

6 years agoARM: tegra11: dvfs: Update pll outputs dvfs tables
Alex Frid [Wed, 14 Nov 2012 06:24:37 +0000]
ARM: tegra11: dvfs: Update pll outputs dvfs tables

Bug 1161126

Change-Id: I562db6f831b7f785ff2cbfb22204eaf4a02df524
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/163462
GVS: Gerrit_Virtual_Submit
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>