7 years agonet: phonet: Modifications for RMC PegaPCI.
Raj Jayaraman [Mon, 17 Sep 2012 18:19:54 +0000]
net: phonet: Modifications for RMC PegaPCI.
* As submitted by RMC for modem support *

Bug 1054808

Change-Id: I6674df1870dea09e3a1b6035d2d8218e2f56de3b
Signed-off-by: Raj Jayaraman <rjayaraman@nvidia.com>
Reviewed-on: http://git-master/r/160031
(cherry picked from commit 60564998c44336e29d653e7d10a20555f0a5703b)
Reviewed-on: http://git-master/r/162291
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: WK Tsai <wtsai@nvidia.com>
Reviewed-by: Steve Lin <stlin@nvidia.com>

7 years agoasoc: tegra: Fix DAPM route for headset recording
Rahul Mittal [Wed, 7 Nov 2012 15:57:42 +0000]
asoc: tegra: Fix DAPM route for headset recording

Fixes headset recording issue
Fixes no playback issue after headset recording ends

Bug 1057667

Change-Id: Icb7378021d2fa00fef4300c4c3e38063caf0a9b6
Signed-off-by: Rahul Mittal <rmittal@nvidia.com>
Reviewed-on: http://git-master/r/162000
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoARM: tegra: usb_phy: add utmip pll programming
Rakesh Bodla [Fri, 2 Nov 2012 14:49:01 +0000]
ARM: tegra: usb_phy: add utmip pll programming

Adding utmi pll register programming.
Enabling/Disabling DDIQ mode appropriately
for power savings.

Bug 1057339

Change-Id: If82fcd17982f8405410665590dc47f45b8373a58
Signed-off-by: Rakesh Bodla <rbodla@nvidia.com>
Reviewed-on: http://git-master/r/160899
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoARM: tegra30: defconfig: make Atmel MXT touch a loadable module
Jong Kim [Thu, 8 Nov 2012 22:24:16 +0000]
ARM: tegra30: defconfig: make Atmel MXT touch a loadable module

Make Atmel MXT driver a loader module.
Starting 3.4 upstream kernel, the Atmel MXT driver operates only as
a loadable module.

bug 1170148

Change-Id: I076021233f7f4f9a98633e09314ff8ffa1a94bdb
Signed-off-by: Jong Kim <jongk@nvidia.com>
Reviewed-on: http://git-master/r/162487
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mursalin Akon <makon@nvidia.com>
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
Reviewed-by: Winnie Hsu <whsu@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Allen Martin <amartin@nvidia.com>

7 years agoARM: tegra: dalmore: Update for SPI bus
David Jung [Thu, 8 Nov 2012 21:31:18 +0000]
ARM: tegra: dalmore: Update for SPI bus

Adjust timing parameter for Dalmore
SPI bus running at 18 MHz.

Bug 1168827

Change-Id: Idfced5194b144efe7a2f5856085405bd58581b2a
Signed-off-by: David Jung <djung@nvidia.com>
Reviewed-on: http://git-master/r/162481
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

7 years agoARM: tegra: fix section mismatch warnings of emc_init
Deepak Nibade [Thu, 8 Nov 2012 15:45:25 +0000]
ARM: tegra: fix section mismatch warnings of emc_init

-tegra30_emc_init is marked __init
-fix section mismatch warnings by adding __init to following
cardhu_emc_init
enterprise_emc_init
kai_emc_init

Bug 1038578

Change-Id: I9f7438b0d2e3b1b66c2c090878f3719c60b9753f
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/162397
Reviewed-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

7 years agoarm: tegra: fix build break for roth board
Mayuresh Kulkarni [Thu, 8 Nov 2012 06:15:13 +0000]
arm: tegra: fix build break for roth board

the build break is caused when TEGRA_DC is not enabled

Change-Id: I9c620df83cf364907f3bf56e2f804b3369293fb9
Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-on: http://git-master/r/162263
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

7 years agoARM: tegra: KBC: Remove power key mapping as GPIO
aghuge [Thu, 8 Nov 2012 05:03:18 +0000]
ARM: tegra: KBC: Remove power key mapping as GPIO

Removing explicit mapping of power key to GPIO_IKEY
This mapping affects the long press key detection of
power key.

Bug 1157347

Change-Id: I4ac222d5907a6f9653c76ee19e97c63afcfe384e
Signed-off-by: aghuge <aghuge@nvidia.com>
Reviewed-on: http://git-master/r/162255
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
GVS: Gerrit_Virtual_Submit

7 years agoarm: tegra: pluto: Shut down LDO rails in PMU in LP0
Karthik Ramakrishnan [Wed, 7 Nov 2012 23:25:43 +0000]
arm: tegra: pluto: Shut down LDO rails in PMU in LP0

Many LDO rails in the PMU needs to be shut down in LP0 as they are
not used. It saves 2mW of system power by shutting down these
rails. LDOUSB also needs to be shut down as it causes a leakage
power on SMPS10

Bug 1156145

Change-Id: Iaad634b46e28b4215ca79736c987150bf1ea4d11
Signed-off-by: Karthik Ramakrishnan <karthikr@nvidia.com>
Reviewed-on: http://git-master/r/162157
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

7 years agoregulator: palma: Disable smps10 boost during suspend
Karthik Ramakrishnan [Wed, 7 Nov 2012 23:21:27 +0000]
regulator: palma: Disable smps10 boost during suspend

If the boost on smps10 is ON, the PMU consumes 2.5mW on
the VCCA rail. It should be disabled when the device is
in LP0

Bug 1156145

Change-Id: Icddc5c14a3b430f1a5aafda699c4216eafd9b32f
Signed-off-by: Karthik Ramakrishnan <karthikr@nvidia.com>
Reviewed-on: http://git-master/r/162156
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

7 years agoARM: mm: save/restore some PMU registers
Bo Yan [Wed, 7 Nov 2012 23:19:02 +0000]
ARM: mm: save/restore some PMU registers

Specifically, this change saves and restores registers controlling
user space access of ARM performance monitoring unit registers and
for PMU interrupt enables.

Change-Id: Iac88df17112e2ef2ccf53674c3fa3a74d2d4221f
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/162149
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
GVS: Gerrit_Virtual_Submit

7 years agoARM: tegra: enable user space access of PMU
Bo Yan [Wed, 7 Nov 2012 23:17:16 +0000]
ARM: tegra: enable user space access of PMU

This changes makes it possible for user space to access performance
monitors

Change-Id: I5ca14ce5b6a08cf9fae57840023e6adcbd35b013
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/162148
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

7 years agoARM: Tegra: Pluto: Roth: Remove Touch Regulator References
Matt Wagner [Wed, 7 Nov 2012 19:16:34 +0000]
ARM: Tegra: Pluto: Roth: Remove Touch Regulator References

Touch regulators are now handled in the touch driver.

Bug 1171845

Change-Id: Ie4cdb9b6f00dd80ad980e1feb259122100f0d6fc
Signed-off-by: Matt Wagner <mwagner@nvidia.com>
Reviewed-on: http://git-master/r/162084
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

7 years agoarm: tegra: dalmore: add device tree support
Pritesh Raithatha [Wed, 7 Nov 2012 12:44:41 +0000]
arm: tegra: dalmore: add device tree support

Bug 1003210

Change-Id: Ia9d890a3cdaa9f480e70fb08e9828a3bdf84b699
Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>
Reviewed-on: http://git-master/r/162045
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Nitin Kumbhar <nkumbhar@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

7 years agoARM: tegra11: clock: Remove not used i2c fast clocks
Alex Frid [Tue, 6 Nov 2012 05:53:22 +0000]
ARM: tegra11: clock: Remove not used i2c fast clocks

Change-Id: Id5d0c33db3d9622ee0d7881569749214969444fc
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/161885
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

7 years agovideo: tegra: nvmap: Return error for re-allocation request.
Krishna Reddy [Wed, 7 Nov 2012 01:09:51 +0000]
video: tegra: nvmap: Return error for re-allocation request.

Bug 898294

Change-Id: I176918d07d0f622db36b9be18ac726c06dc59432
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/161826
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>

7 years agoARM: tegra11: clock: Update emc to cpu rate ratio limits
Alex Frid [Wed, 7 Nov 2012 00:15:09 +0000]
ARM: tegra11: clock: Update emc to cpu rate ratio limits

Change-Id: I40786776f3a8f69574c25c895f50f70a9fa375a2
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/161821
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

7 years agoarm: tegra: LCD_RESET disable in 1080p Sharp/720p LG panels
Karthik Ramakrishnan [Tue, 6 Nov 2012 21:56:51 +0000]
arm: tegra: LCD_RESET disable in 1080p Sharp/720p LG panels

If the LCD_RST pin is not disabled during display off, GMI_AP
consumes 3mW in display Off and suspend usecases.

Bug 1169417

Change-Id: I0d414711c277331853395580fb9fe03c2f176cb0
Signed-off-by: Karthik Ramakrishnan <karthikr@nvidia.com>
Reviewed-on: http://git-master/r/161777
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

7 years agoARM: tegra: clock: Update EMC pipes when changing clock
Alex Frid [Sat, 3 Nov 2012 02:03:54 +0000]
ARM: tegra: clock: Update EMC pipes when changing clock

Updated EMC pipes configuration according to EMC DFS table when
changing EMC clock rate.

Change-Id: Ibc4d4e61843c16389a6e0ba308a8115db2b9a4f4
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/161770
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

7 years agovideo: tegra: mipi_cal: Add null check
Animesh Kishore [Tue, 6 Nov 2012 14:45:11 +0000]
video: tegra: mipi_cal: Add null check

Change-Id: I2953efc4b8006e725bbe93aca582627802aff026
Signed-off-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-on: http://git-master/r/161680
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

7 years agovideo: tegra: nvmap: Set cache_maint_inner_threshold 2MB for T11x
Hiroshi Doyu [Mon, 5 Nov 2012 13:14:14 +0000]
video: tegra: nvmap: Set cache_maint_inner_threshold 2MB for T11x

Equal to the size of L2 cache on T114.

Bug 1158336

Change-Id: Ib3dfb4d26ccd36a63a8336f60ecf679105a1a44a
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/161231
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

7 years agoARM: tegra11: dvfs: Round up dfll scaler
Alex Frid [Sun, 4 Nov 2012 03:44:07 +0000]
ARM: tegra11: dvfs: Round up dfll scaler

Changed direction of rounding dfll scale from "down" to "up". Thus
dfll scaler rates rounding complements pll rates rounding (pll rates
are rounded "down"), and therefore prevents rounding down spiral when
switching cpu back and forth between pll and dfll clock source in the
overlapping region of low rates.

Respectively changed dfll output rate calculation rounding from "up"
to "down" to avoid rounding up spiral when get/set rate operations
are executed in a loop.

Change-Id: I5f8675502e54588364ab9e099cb6ad902b209ce1
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/161081
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Peter Boonstoppel <pboonstoppel@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

7 years agoARM: tegra11: clock: Update parameterized cluster switch
Alex Frid [Sun, 4 Nov 2012 03:15:06 +0000]
ARM: tegra11: clock: Update parameterized cluster switch

Adjusted CPU rate during parametrized (enforced from sysfs) cluster
switch, so that target rate meets min/max constraints on both sides
of the switch. Ported commit c27f5a2e7380cb667f1f6a4ba61daf67c63ef2d4.

Change-Id: Id4e3f1f593a3bf2971335ef49bb608f1b2b18072
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/161080
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

7 years agoARM: Tegra: Roth: Remove Incorrect Calibration Data
Matt Wagner [Sat, 3 Nov 2012 01:35:44 +0000]
ARM: Tegra: Roth: Remove Incorrect Calibration Data

bl_output contains only 128 entries while we access 256 of them.
This causes the display to go black on certain brightnesses. bl_output
is removed until the backlight is properly calibrated.

Bug 1170236

Change-Id: I5715c72d3bc974c43ace4774d7d8739aa9847733
Signed-off-by: Matt Wagner <mwagner@nvidia.com>
Reviewed-on: http://git-master/r/161043
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>
GVS: Gerrit_Virtual_Submit

7 years agovideo: tegra: dsi: Enable pllp_outx during bta operation
Animesh Kishore [Fri, 2 Nov 2012 10:47:57 +0000]
video: tegra: dsi: Enable pllp_outx during bta operation

dsi hw needs pllp_outx only for read operations.

Bug 1155689

Change-Id: I29479dcace9dfeb52454d396404f6d29990c15b8
Signed-off-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-on: http://git-master/r/160858
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

7 years agovideo: tegra: dc: use new HDMI TMDS drive settings
Jon Mayo [Mon, 15 Oct 2012 22:42:36 +0000]
video: tegra: dc: use new HDMI TMDS drive settings

New settings for HDMI TMDS to ensure proper operation at all frequencies.

Bug 1157049
Bug 1156857

Change-Id: I157dd7b6e6553396b85ce24c0ac163efd5e3e732
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/160688
Reviewed-by: Automatic_Commit_Validation_User

7 years agoarm: tegra: Add panel csc configuration data.
Markus Holtmanns [Fri, 28 Sep 2012 18:59:40 +0000]
arm: tegra: Add panel csc configuration data.

Add panel specific CSC matrix values based on
raw measurement of color primaries and applying
chromatic adaption with a Bradford matrix.

Bug 1047348

Change-Id: Ia69f622223760ad18ef5d18bc86381b5575c7138
Signed-off-by: Markus Holtmanns <mholtmanns@nvidia.com>
Signed-off-by: Mitch Luban <mluban@nvidia.com>
Reviewed-on: http://git-master/r/160048
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

7 years agoarm: tegra: ncm: Add Icera mobile 5AN PID/VID identification for NCM
Jonathan Roux [Tue, 23 Oct 2012 13:38:44 +0000]
arm: tegra: ncm: Add Icera mobile 5AN PID/VID identification for NCM

Bug 1054494

Change-Id: I86c9a68532a3ef789ed2df6c122dc29377b7acd1
Signed-off-by: Jonathan Roux <jroux@nvidia.com>
Reviewed-on: http://git-master/r/146948
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Neil Patel <neilp@nvidia.com>
Reviewed-by: Steve Lin <stlin@nvidia.com>

7 years agoarm: tegra: p1852: Configure CPU_SOFTRST_CTRL
Bhavesh Parekh [Thu, 4 Oct 2012 09:57:52 +0000]
arm: tegra: p1852: Configure CPU_SOFTRST_CTRL

CPU_SOFTRST_CTRL register is used during cluster-switching. It tells the
delays for un-clamping and reset in term of sclk cycle

On P1852, we are running SCLK at 334MHz so we can't use the
reset value of this register.
Currently configuring the value with high number till we get proper
value from qual team

Bug 1051967
Bug 1010500

Reviewed-on: http://git-master/r/141524
(cherry picked from commit ac86e1d722cb4efd152bc3c335be7ce91205c88c)
Change-Id: I768b68c694543f7a3f2a6c4435e9829aeaeaa51c
Signed-off-by: Nitin Agrawal <nitina@nvidia.com>
Reviewed-on: http://git-master/r/146496
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sumeet Gupta <sumeetg@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>

7 years agoARM: tegra: Enable LESS_GCC_OPT for simulation
Jeff Smith [Wed, 3 Oct 2012 20:58:17 +0000]
ARM: tegra: Enable LESS_GCC_OPT for simulation

Change-Id: I608d67f762d8cda8fc77a23c17d2ca68cdca32f5
Signed-off-by: Jeff Smith <jsmith@nvidia.com>
Reviewed-on: http://git-master/r/141353
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

7 years agokernel: Leave LESS_GCC_OPT off by default
Jeff Smith [Wed, 3 Oct 2012 20:56:55 +0000]
kernel: Leave LESS_GCC_OPT off by default

Change-Id: Ic8bbc5bbf9ef9cff65d93b14a655df1bdc7cd691
Signed-off-by: Jeff Smith <jsmith@nvidia.com>
Reviewed-on: http://git-master/r/141352
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit

7 years agoHACK: ARM: tegra: xusb powergate update
Bitan Biswas [Tue, 6 Nov 2012 18:56:51 +0000]
HACK: ARM: tegra: xusb powergate update

Tegra11x has xusb functionality disabled. This change powergates
all XUSB partition by default. We need to revisit once xusb is
enabled.

bug 1054317

Change-Id: Ia84f1fe5f495cb5bc54314dc02a2cbb67e13efe5
Signed-off-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-on: http://git-master/r/161744
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agovideo: tegra: host: Fix CDMA timeout reset for 2D
Terje Bergstrom [Tue, 6 Nov 2012 13:48:51 +0000]
video: tegra: host: Fix CDMA timeout reset for 2D

When we have channel timeout, reset even modules for which we do not
have power gate id. As 2D needs channel teardown after reset, add
that to the reset sequence.

Add teardown fields to Tegra3 hardware headers. As we regenerate
hardware headers, Tegra11 boilerplate is changed a bit, too.

Change-Id: Ib3fd5744a9fa4faef0c6c8b83b6826732771a29f
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/161642
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agovideo: tegra: host: Improve cdma timeout debug msg
Terje Bergstrom [Tue, 6 Nov 2012 13:27:19 +0000]
video: tegra: host: Improve cdma timeout debug msg

Add job dump and channel state dump when we reach a cdma timeout.
This helps debugging where we got stuck.

Change-Id: I64fd7aa9c05e270b06023db65decea7c50f86e4d
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/161638
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Arto Merilainen <amerilainen@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>

7 years agovideo: tegra: host: Disable actmon interrupt
Terje Bergstrom [Tue, 6 Nov 2012 12:54:20 +0000]
video: tegra: host: Disable actmon interrupt

Disable receiving actmon watermark interrupts.

Change-Id: I11de427bcafd7f1fec1573f36c6bfe66874f4ea4
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/161637
Reviewed-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

7 years agovideo: tegra: host: Skip dmabuf handles in nvmap
Terje Bergstrom [Mon, 5 Nov 2012 09:39:02 +0000]
video: tegra: host: Skip dmabuf handles in nvmap

Skip dmabuf handles in nvmap specific code. This fixes a kernel panic
when nvmap is asked to give the physical address of a dmabuf fd.

Change-Id: Ia1a5aa6bbd90608434f206a80b11f008a9a0b88c
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/161169
Reviewed-by: Kirill Artamonov <kartamonov@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

7 years agovideo: tegra: host: Enable 2D power gating
Terje Bergstrom [Tue, 9 Oct 2012 09:01:24 +0000]
video: tegra: host: Enable 2D power gating

Enable power gating of 2D.

Bug 1058074

Change-Id: Ic9d6267f7a44a6061572eb94859a635bbc975ffc
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/160516
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

7 years agoARM: tegra: Use cbus clocks for power gating
Terje Bergstrom [Wed, 3 Oct 2012 07:09:14 +0000]
ARM: tegra: Use cbus clocks for power gating

Use cbus clocks instead of physical clocks. This allows cbus to
adjust PLL correctly.

Change-Id: I609129bf5af8cdc906409f89bfc1b3fc89c582cf
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/160515
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

7 years agoARM: tegra: pluto: Enable pwm based cl dvfs
Pradeep Goudagunta [Wed, 7 Nov 2012 08:24:28 +0000]
ARM: tegra: pluto: Enable pwm based cl dvfs

Enable pwm based cl dvfs for SMPS6, modem voltage rail.

Bug 1058480

Change-Id: I2e110127106f57a8337735a67eaf5e9b9a19d00e
Signed-off-by: Pradeep Goudagunta <pgoudagunta@nvidia.com>
Reviewed-on: http://git-master/r/159833
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agomfd: palmas: pwm based cl dvfs support
Pradeep Goudagunta [Wed, 7 Nov 2012 08:16:11 +0000]
mfd: palmas: pwm based cl dvfs support

SMPS12 and SMPS6 are capable of PWM based cl dvfs.

Bug 1058480

Change-Id: Ib000300ac508b471b9ebe698c603c93129f0675e
Signed-off-by: Pradeep Goudagunta <pgoudagunta@nvidia.com>
Reviewed-on: http://git-master/r/159832
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Neil Patel <neilp@nvidia.com>

7 years agoarm: tegra: usb_phy: Fix remote wakeup resume
Abhishek Shukla [Tue, 23 Oct 2012 11:09:36 +0000]
arm: tegra: usb_phy: Fix remote wakeup resume

FPR bit was getting cleared before RUN bit
is getting set by ehci_bus_resume. If there
are prints in resume code before RUN  bit
is set, device can go to suspend state from
idle. To avoid this, setting RUN bit in
pre_resume after remote wakeup is detected.

Bug 1159691

Change-Id: I2c0a6348eb8df7eb5d668b5e6b9400f2f30a8b7a
Signed-off-by: Abhishek Shukla <abhisheks@nvidia.com>
Reviewed-on: http://git-master/r/146892
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agovideo: tegra: dc: remove enable/disable in set_par
Jon Mayo [Wed, 7 Nov 2012 22:41:40 +0000]
video: tegra: dc: remove enable/disable in set_par

Remove a work around that is no longer necessary. This fixes a strobing display
issue when scrolling or double buffering.

Bug 1161314

Change-Id: I7f74c089461b01c2f2933e14094e3190cef4726a
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/162135
Reviewed-by: Automatic_Commit_Validation_User

7 years agoARM: tegra: soctherm: suspend/resume functionality
Joshua Primero [Thu, 25 Oct 2012 22:03:28 +0000]
ARM: tegra: soctherm: suspend/resume functionality

Added suspend/resume functionality to soctherm.

Change-Id: I500b9483bf947b110da1d659688c661363f8b975
Signed-off-by: Joshua Primero <jprimero@nvidia.com>
Reviewed-on: http://git-master/r/162123
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

7 years agovideo: tegra: dc: support either DC as the primary
Jon Mayo [Tue, 6 Nov 2012 23:01:39 +0000]
video: tegra: dc: support either DC as the primary

Allow either DC to be used as the primary display.

Bug 1003636

Change-Id: I179462aaa86c4ae3166d3318ef440ad53de6994d
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/162118
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoAdd nvdumper kernel module to monitor reboots
Colin Patrick McCabe [Wed, 7 Nov 2012 05:49:23 +0000]
Add nvdumper kernel module to monitor reboots

The nvdumper kernel module tracks whether the system has been rebooted
cleanly.  It does this by writing 'dirty' to a fixed physical memory
address when the kernel starts.  Then, on a planned reboot, we write
'clean' to this location.  The bootloader can then examine this location
and see if the reboot was dirty or clean.  It will dump the contents of
memory after a dirty reboot.

Bug 895895

Change-Id: I31e552da9bf6218cefb77f76f7488fcf9a9151b1
Signed-off-by: Joshua Cha <joshuac@nvidia.com>
Reviewed-on: http://git-master/r/161969
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agodrivers: power: max17042: check for battery detection
Syed Rafiuddin [Fri, 9 Nov 2012 05:04:16 +0000]
drivers: power: max17042: check for battery detection

check for the presence of battery using temperature

Change-Id: I0d1fe322825c6a9fa40ebd2a310e9c2566ab4273
Signed-off-by: Syed Rafiuddin <srafiuddin@nvidia.com>
Reviewed-on: http://git-master/r/161753
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

7 years agoARM: Tegra: Enable rcv_sel pinmux
Graziano Misuraca [Tue, 30 Oct 2012 18:24:43 +0000]
ARM: Tegra: Enable rcv_sel pinmux

Enable setting rcv_sel bit in DDC pinmux

Bug 1052024

Change-Id: If0b1025aea51b443943213488e57b7e68ea33451
Signed-off-by: Graziano Misuraca <gmisuraca@nvidia.com>
(cherry picked from commit 10a36664a2f4ee20b0eb62f1018c75a8f3d6dc6c)
Reviewed-on: http://git-master/r/161720
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agomfd: palmas: disable irq during suspend
Mallikarjun Kasoju [Thu, 8 Nov 2012 06:25:26 +0000]
mfd: palmas: disable irq during suspend

disable palmas irq during suspend and enable it in
resume

Bug 1159444

Change-Id: Iaab1cce124c1e833bc9412826eb59888c6f878fb
Signed-off-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Reviewed-on: http://git-master/r/161719
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
GVS: Gerrit_Virtual_Submit

7 years agovideo: tegra: host: Fix resource leak
Juha Tukkinen [Tue, 6 Nov 2012 11:45:04 +0000]
video: tegra: host: Fix resource leak

Free fw_name before exiting tsec_get_fw_name on failure.

Change-Id: I22719c49f48593d4df54fa3ee7bcf382f63b9c47
Signed-off-by: Juha Tukkinen <jtukkinen@nvidia.com>
Reviewed-on: http://git-master/r/161608
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

7 years agovideo: tegra: host: Fix resource leak
Juha Tukkinen [Tue, 6 Nov 2012 11:18:05 +0000]
video: tegra: host: Fix resource leak

Free fw_name before exiting msenc_get_fw_name on failure.

Change-Id: I9b7917103657df3adf61887f28cc88372327c387
Signed-off-by: Juha Tukkinen <jtukkinen@nvidia.com>
Reviewed-on: http://git-master/r/161598
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

7 years agoARM: tegra: usb_phy: Fix 2LS WAR removal
Suresh Mangipudi [Fri, 19 Oct 2012 08:50:05 +0000]
ARM: tegra: usb_phy: Fix 2LS WAR removal

Correct the sequence properly to remove the 2LS WAR.

Bug 1156346

Change-Id: I57ca4d57376f47e2485764ce614d1282455f7334
Signed-off-by: Suresh Mangipudi <smangipudi@nvidia.com>
Reviewed-on: http://git-master/r/161576
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoArm: Tegra: Roth: Support Roth platform
Pavan Kunapuli [Fri, 9 Nov 2012 09:00:59 +0000]
Arm: Tegra: Roth: Support Roth platform

Adding initial support for Roth platform
based on dalmore platform.

Populate power tree based on board design for roth.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>

Bug 1169149

Change-Id: I2e14b464cc199c59a246500388fb1480866e10a3
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-on: http://git-master/r/160908
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoarm: tegra: power: update model parameters for VDD_CPU EDP
Diwakar Tundlam [Fri, 2 Nov 2012 00:45:06 +0000]
arm: tegra: power: update model parameters for VDD_CPU EDP

Bug 1167145

Change-Id: I485d86c42c90351b3207f5dbd1b7b5a8188b6e50
Signed-off-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-on: http://git-master/r/160721
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit

7 years agoARM: tegra11x: remove redundant cache invalidation
Bo Yan [Thu, 1 Nov 2012 23:31:17 +0000]
ARM: tegra11x: remove redundant cache invalidation

the Cortex-A15 MPCore TRM says following are invalidated at reset:

   L1 instruction and data TLBs,
   L1 instructin and data caches,
   L2 unified TLB

in addition, following are invalidated at power on reset:

   L2 duplicate snoop tag RAM
   L2 prefetch stride queue RAM
   L2 unified cache RAM

So there is no need to invalidate cache after power ungating
and rail ungating. With this change, cache is no longer invalidated
explicitly after power ungating and rail ungating, but for CPU
hotplug, the cache is still being invalidated in ARMv7 setup code.

Change-Id: Icafbc0f20ff6c3b73670c7ce104cbbe03d3627c2
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/160712
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

7 years agoARM: tegra: soctherm: Fix many soctherm instances
Joshua Primero [Wed, 31 Oct 2012 01:19:03 +0000]
ARM: tegra: soctherm: Fix many soctherm instances

Fixed the bug where there were multiple soctherm instances
being initialized.

bug 1169070

Signed-off-by: Joshua Primero <jprimero@nvidia.com>
Change-Id: I99dfa0d884c028dd5876652ae638fa0c2358dda6
Reviewed-on: http://git-master/r/160087
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoARM: add tegra timer HZ config
Jin Qian [Tue, 30 Oct 2012 23:42:14 +0000]
ARM: add tegra timer HZ config

Change-Id: Ie556857bbc265429bcef6f47f352ab87ba333716
Signed-off-by: Jin Qian <jqian@nvidia.com>
Reviewed-on: http://git-master/r/160042
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoARM: tegra: Set scratch1_eco register for memory dpd
Karthik Ramakrishnan [Sat, 13 Oct 2012 03:27:09 +0000]
ARM: tegra: Set scratch1_eco register for memory dpd

Setting the proper PMC register settings for memory in
suspend mode. This will be reset back on resume from lp0
in the bct.

Bug 1156167

Change-Id: I53fe808bbfa22a4c28fb24868f6787fe97a927bf
Signed-off-by: Karthik Ramakrishnan <karthikr@nvidia.com>
(cherry picked from commit 22752293180a7e03418ebaa2e1e4c94d103b0330)
Reviewed-on: http://git-master/r/160029
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoARM: tegra: thermal: Update Tegra11 thermal throttle table
Diwakar Tundlam [Mon, 15 Oct 2012 21:01:35 +0000]
ARM: tegra: thermal: Update Tegra11 thermal throttle table

Bug 1058013

Change-Id: I0a68776f9fcd1c728b5e502973a2b0a4a70b1ba0
Signed-off-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-on: http://git-master/r/160002
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoarm: tegra: pluto: Use V_PULSE2 for PRISM proc.
Kevin Huang [Tue, 16 Oct 2012 05:50:08 +0000]
arm: tegra: pluto: Use V_PULSE2 for PRISM proc.

Bug 1156207

Change-Id: Ie0796f73bbfc6341198ce709f53ab5169645821f
Signed-off-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-on: http://git-master/r/159946
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoarm: tegra: pluto: enable pull-down for MDM1_COLD_BOOT
Steve Lin [Thu, 11 Oct 2012 18:03:19 +0000]
arm: tegra: pluto: enable pull-down for MDM1_COLD_BOOT

Enable pull-down for onboard modem cold boot GPIO.

Bug 1047414

Change-Id: I724827a4c33e96f18df022fba040bff10d75a6bd
Signed-off-by: Steve Lin <stlin@nvidia.com>
Reviewed-on: http://git-master/r/143781
(cherry picked from commit 8c79e4f2f12571cde694d1efa2c566ec2adc737d)
Reviewed-on: http://git-master/r/159153
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoarm: tegra: pci: Pass device info in regulator api
Jay Agarwal [Fri, 26 Oct 2012 06:14:01 +0000]
arm: tegra: pci: Pass device info in regulator api

Passing device information while getting the regu-
lator needed from k3.4 onwards.

Bug 1158690

Change-Id: I5552106334290bfcbd968ad3a131f33df1640ed3
Signed-off-by: Jay Agarwal <jagarwal@nvidia.com>
Reviewed-on: http://git-master/r/147837
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
GVS: Gerrit_Virtual_Submit

7 years agoARM: tegra: clocks: add frequency stats support for dual cbus
Shaoming Feng [Wed, 17 Oct 2012 03:09:17 +0000]
ARM: tegra: clocks: add frequency stats support for dual cbus

Add frequency stats support for c2bus and c3bus

Bug 1026583

Change-Id: I216f6d3eb1492782c681705637d66dae20f0a051
Signed-off-by: Shaoming Feng <shaomingf@nvidia.com>
Reviewed-on: http://git-master/r/147798
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoARM: tegra: Document sysfs/debugfs LP2 node change
Bo Yan [Thu, 8 Nov 2012 19:26:16 +0000]
ARM: tegra: Document sysfs/debugfs LP2 node change

The name of one sysfs node for CPU power state control has been
changed from "lp2_in_idle" to "power_down_in_idle", the name of
the corresponding debugfs node has been changed from "lp2" to
"power_down_stats".

bug 1034196

Change-Id: I72daa591c4da783062f070bd32b4245eb6a350df
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/162462
Reviewed-by: Peter Boonstoppel <pboonstoppel@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User

7 years agoasoc: tegra: cs42l73: Add VSPIN to DAPM route
Rahul Mittal [Thu, 8 Nov 2012 06:03:50 +0000]
asoc: tegra: cs42l73: Add VSPIN to DAPM route

Workaround to get VSP recording working with Cirrus codec
Need to add proper DAPM route based on Cirrus inputs

Change-Id: I118f90b8561525979e23cfab011e99490d8f86a0
Signed-off-by: Rahul Mittal <rmittal@nvidia.com>
Reviewed-on: http://git-master/r/162260
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Vijay Mali <vmali@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

7 years agovideo: tegra: dc: Select BACKLIGHT_CLASS_DEVICE
Robert Morell [Thu, 8 Nov 2012 00:33:05 +0000]
video: tegra: dc: Select BACKLIGHT_CLASS_DEVICE

We call into the bl subsystem for smartdimmer.  Building without it will
fail to link.

Bug 1047558

Change-Id: Ia6fb4b4e343509811e764ddaf9aface71f1d3269
Signed-off-by: Robert Morell <rmorell@nvidia.com>
Reviewed-on: http://git-master/r/162168
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

7 years agoRevert "ARM: tegra: misc: pmureader driver"
Bo Yan [Wed, 7 Nov 2012 04:53:04 +0000]
Revert "ARM: tegra: misc: pmureader driver"

This reverts commit c1be13b9d1895756acb18054a2c14b595bfd6037.

Change-Id: I02c1683f98816a59fdce6932d115e45460a4cbc0
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/161865
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
GVS: Gerrit_Virtual_Submit

7 years agomedia: video: tegra: ov9772: add 960x720 support
Phil Breczinski [Thu, 18 Oct 2012 01:36:22 +0000]
media: video: tegra: ov9772: add 960x720 support

Add support for 960x720 resolution to ov9772 driver. This
provides a 4:3 resolution in addition to the existing
16:9 resolution (720p).  Also includes support for
sensor-specific setmode frame delays (needed for driver
functionality).

Bug 1156852

Signed-off-by: Phil Breczinski <pbreczinski@nvidia.com>
Change-Id: I5dfb5f9aa131caae66f19ff975b879b4a54c2788
Reviewed-on: http://git-master/r/161830
Reviewed-by: Frank Chen <frankc@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>

7 years agoarm: tegra: iovmm: add tracing support for iovmm.
Krishna Reddy [Wed, 7 Nov 2012 00:46:27 +0000]
arm: tegra: iovmm: add tracing support for iovmm.

Change-Id: Iea1c776a66f35b10bb182220dab8db99ff5d4e64
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/161824
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>

7 years agoarm: tegra: panels: sd update bl after linear bl adjustments
Mitch Luban [Wed, 17 Oct 2012 17:47:29 +0000]
arm: tegra: panels: sd update bl after linear bl adjustments

Smart dimmer assumes a linear backlight. Therefore,
we should be applying smart dimmer backlight adjustments
after we do linear backlight correction.

Bug 1047558

Change-Id: I9a4705b752fddaf647ac566e9dc07636a2069dbc
Signed-off-by: Mitch Luban <mluban@nvidia.com>
Reviewed-on: http://git-master/r/161818
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

7 years agovideo: tegra: dc: allow r/w of cmu_enable sysfs node
Mitch Luban [Tue, 6 Nov 2012 23:37:21 +0000]
video: tegra: dc: allow r/w of cmu_enable sysfs node

Allows reading and writing to cmu_enable sysfs node.

Change-Id: I66e09c7bd9eb92e1125cd311608bd0ac3f6bf7bc
Signed-off-by: Mitch Luban <mluban@nvidia.com>
Reviewed-on: http://git-master/r/161795
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com>
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>

7 years ago i2c: tegra: handle system reboot
Seshendra Gadagottu [Wed, 31 Oct 2012 01:18:26 +0000]
  i2c: tegra: handle system reboot

  When system reboot happens, if any i2c tranafers are
  active then they are cauing issue after reboot.

  To avoid this, shutdown handler is added and i2c driver
  is suspended before shutdown.

  Bug 1159422
  Bug 1164896

Change-Id: I50c7659b6051840f19a5b4dcff7544df649a7617
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/161724
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bo Yan <byan@nvidia.com>
Reviewed-by: Chaitanya Bandi <bandik@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

7 years agoarm: tegra: isomgr: Fix deadlock issues.
Krishna Reddy [Mon, 5 Nov 2012 20:38:00 +0000]
arm: tegra: isomgr: Fix deadlock issues.

Fix the deadlock issues and avoid renegotiations
for the client, who is realizing.
Remove redundant variables.

Change-Id: Ie95a875682cc46caf3c7a8af407e6704732c5f36
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/161387
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Alex Waterman <alexw@nvidia.com>

7 years agohwmon: ina219: INA219 driver with more sysfs
Anshul Jain [Wed, 31 Oct 2012 18:44:20 +0000]
hwmon: ina219: INA219 driver with more sysfs

This new driver allows state change of the INA219 device using this sysds node:
To turn the ina219 device on,
echo 1 > /<i2c device path>/cur_state

To turn it off:
echo 0 > /<i2c device path>/cur_state

It has new sysfs nodes current2_input and power2_input that contains
current and power calculated using shunt resistor and voltage drop
across shunt resistor.

This driver is backward compatible with the old driver.

Bug 1160868

Change-Id: I5e05947e8e3b20a85f02188a48ea4441218e27a8
Signed-off-by: Anshul Jain <anshulj@nvidia.com>
Reviewed-on: http://git-master/r/160070
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>

7 years agoARM: tegra: dalmore: Change INA219 platform data
Anshul Jain [Wed, 31 Oct 2012 18:39:26 +0000]
ARM: tegra: dalmore: Change INA219 platform data

Changed INA219 platform data declaration to include values of
shunt registers, trigger config data and continuous
config data

Bug 1160868

Change-Id: I0bfaeaa217607272b48bdab256d1990ffa8e4da2
Signed-off-by: Anshul Jain <anshulj@nvidia.com>
Reviewed-on: http://git-master/r/160068
Tested-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

7 years agoARM: tegra: cardhu: Changed INA219 platform data
Anshul Jain [Wed, 31 Oct 2012 18:36:44 +0000]
ARM: tegra: cardhu: Changed INA219 platform data

Changed INA219 platform data declaration to include values of
shunt resistor, continuous config data and trigger
config data

Bug 1160868

Change-Id: If7bcae81804b2807f11daae524bf66055ba3dd03
Signed-off-by: Anshul Jain <anshulj@nvidia.com>
Reviewed-on: http://git-master/r/160067
Tested-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

7 years agohwmon: ina219: Update INA219 platform data
Anshul Jain [Wed, 31 Oct 2012 18:33:39 +0000]
hwmon: ina219: Update INA219 platform data

platform data structure now contains:
shunt resistor value
trigger config data
continuous config data

Bug 1160868

Change-Id: I5a4102745db2304fd7c5735981e1f70d182f32f6
Signed-off-by: Anshul Jain <anshulj@nvidia.com>
Reviewed-on: http://git-master/r/160065
Tested-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

7 years agotty: serial: tegra: Add stub runtime power management
Pradeep Goudagunta [Thu, 30 Aug 2012 15:42:47 +0000]
tty: serial: tegra: Add stub runtime power management

Add stub runtime_pm calls which go through the flow of enabling
and disabling but don't actually do anything with the device itself
as there's nothing useful we can do. This provides the core PM
framework with information about when the device is idle,
enabling chip wide power savings.

Bug 887359

Change-Id: I159f7798dbf141813ec1aa56ddb06cc8ca6595f4
Signed-off-by: Pradeep Goudagunta <pgoudagunta@nvidia.com>
Reviewed-on: http://git-master/r/159835
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

7 years agoarm: enable the control of CORENPDRQ bit
Liang Cheng [Tue, 23 Oct 2012 18:23:15 +0000]
arm: enable the control of CORENPDRQ bit

Transitions to suspend states cripple any ongoing JTAG
or coresight debug session. It can be prevented by
setting the bit CORENPDRQ in debug register DBGPRCR.

This change provides the control interface.

Bug 1029902

Change-Id: I1d82dfdce4136f3c9bd40f1a5d6dc619020fe6fc
Signed-off-by: Liang Cheng <licheng@nvidia.com>
Reviewed-on: http://git-master/r/147012
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

7 years agoarm: tegra: cardhu: print less alarming message
Naveen Kumar S [Mon, 15 Oct 2012 07:29:27 +0000]
arm: tegra: cardhu: print less alarming message

Print a less alarming message for cardhu boards which does not
have the mechanical fix for touch screen.

Bug 1049937
Signed-off-by: Naveen Kumar S <nkumars@nvidia.com>
Change-Id: I114b05fa513d3e03994498da7670d76ab247b52f
Reviewed-on: http://git-master/r/146374
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

7 years agomedia: video: tegra: Ad5816 power/gpio changes
Sudhir Vyas [Tue, 30 Oct 2012 13:01:39 +0000]
media: video: tegra: Ad5816 power/gpio changes

* Reorganise power sequence.
* Restructure focuser driver code.
* Add support for dalmore focuser.
* Make changes for image sharpness.
* Remove unnecessary code.

Bug 1156996
Bug 1157339

Change-Id: I578e6f586a66f751d35a6cc99fa5e7c229194ff9
Signed-off-by: Sudhir Vyas <svyas@nvidia.com>
Reviewed-on: http://git-master/r/160205
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Prayas Mohanty <pmohanty@nvidia.com>
Reviewed-by: Charlie Huang <chahuang@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
GVS: Gerrit_Virtual_Submit

7 years agoARM: tegra: ad5816 power/gpio programming changes
Sudhir Vyas [Tue, 30 Oct 2012 13:33:30 +0000]
ARM: tegra: ad5816 power/gpio programming changes

* Reorganise power sequence.
* Add support for dalmore focuser.

Bug 1156996

Change-Id: I63a7b133f18922061f2bca96dbaf6f39172f3749
Signed-off-by: Sudhir Vyas <svyas@nvidia.com>
Reviewed-on: http://git-master/r/159880
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User

7 years agomedia: video: tegra: add imx091 nvc driver
Wei Chen [Wed, 31 Oct 2012 19:55:01 +0000]
media: video: tegra: add imx091 nvc driver

add NVC framework driver for imx091

Bug 961418

Change-Id: I2a6c984eac956f62fefb36119d3868aadb800f26
Signed-off-by: Wei Chen <wechen@nvidia.com>
Reviewed-on: http://git-master/r/159376
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Frank Chen <frankc@nvidia.com>
Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>

7 years agodrivers: power: tps65090: detect battery from fuel-guage
Syed Rafiuddin [Tue, 6 Nov 2012 13:59:32 +0000]
drivers: power: tps65090: detect battery from fuel-guage

detect battery in tps65090 charger driver using
bq20z45 fuel-gauge driver.

Change-Id: Ic19a8f2459b3fecde2c7cf17b3d02b9e4b71c307
Signed-off-by: Syed Rafiuddin <srafiuddin@nvidia.com>
Reviewed-on: http://git-master/r/161649
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Daniel Solomon <daniels@nvidia.com>

7 years agovideo: tegra: host: Fix error handling of reg read
Juha Tukkinen [Tue, 6 Nov 2012 08:59:48 +0000]
video: tegra: host: Fix error handling of reg read

Check value of mem_sgt and check value of mem_dma only after setting it.

Change-Id: I949cbc3b3496e959234c8ad8c24d9f60250dcb1a
Signed-off-by: Juha Tukkinen <jtukkinen@nvidia.com>
Reviewed-on: http://git-master/r/161566
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>

7 years agoARM: tegra: dvfs: Add targeted predict millivolts APIs
Alex Frid [Sun, 4 Nov 2012 02:20:47 +0000]
ARM: tegra: dvfs: Add targeted predict millivolts APIs

Implemented voltage prediction APIs that return expected voltage
for clock domain if pll or dfll clock source is used, regardless
of the actual source selection (in addition to existing API that
predicts voltage for current clock source selection). Made sure
dfll mode can not be enabled for clock domains that do not have
dfll support.

Change-Id: I6bb0b7ab5fa60bc6633ebb207f3fc6e52844f770
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/161078
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Tested-by: Diwakar Tundlam <dtundlam@nvidia.com>

7 years agoarm: tegra: dalmore: Add Sharp LQ101R1SX01 panel support
Animesh Kishore [Thu, 18 Oct 2012 12:29:03 +0000]
arm: tegra: dalmore: Add Sharp LQ101R1SX01 panel support

10.1" 2560x1600 panel.

Change-Id: I13a901114c908ce1b2d5e2025594def50f8d151c
Signed-off-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-on: http://git-master/r/160725
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

7 years agoarm: tegra: dalmore/pluto: add imx091 nvc driver
Wei Chen [Wed, 31 Oct 2012 19:49:23 +0000]
arm: tegra: dalmore/pluto: add imx091 nvc driver

add board file related changes for imx091 nvc driver

Bug 961418

Change-Id: Ibc179fbfac0e31642158990c0ac77c52076b5ace
Signed-off-by: Wei Chen <wechen@nvidia.com>
Reviewed-on: http://git-master/r/160285
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

7 years agoARM: tegra11: dvfs: Enable CPU and core voltage scaling
Alex Frid [Wed, 31 Oct 2012 08:27:57 +0000]
ARM: tegra11: dvfs: Enable CPU and core voltage scaling

Set configuration options for CPU and core voltage scaling.
No changes in current system behavior (VDD_CPU is scaled,
VDD_CORE is not scaled) is expected, since

- by default after boot DFLL is used as CPU clock source, and
CPU voltage is automatically scaled by CL-DVFS (this change only
enables scaling when/if PLL is used as a clock source)

- EMC DVFS tables requires nominal voltage for all rates, and
effectively prevents core voltage scaling, even if it is enabled

Change-Id: I9a1ee3a9dfce57521dd31f75d767763238be2acc
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/160138
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

7 years agoarm: tegra: tai: PRISM calibration for Tai
Mitch Luban [Thu, 30 Aug 2012 01:13:54 +0000]
arm: tegra: tai: PRISM calibration for Tai

Modified board-enterprise-panel.c file which
has calibration data for Tai panel.

Bug 1029936

Reviewed-on: http://git-master/r/130834
(cherry picked from commit 695665ca15c1b71786b1d98ac8193076de76db94)

Change-Id: I4cb164359bbb2b5047b1f48f470a0106e4cbda1a
Signed-off-by: Mitch Luban <mluban@nvidia.com>
Reviewed-on: http://git-master/r/133722
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

7 years agoRevert "arm: tegra: Separating out pmc from usb phy."
Ray Poudrier [Wed, 7 Nov 2012 19:49:00 +0000]
Revert "arm: tegra: Separating out pmc from usb phy."

This reverts commit c2958491e5a392be8f52824d59eabadb34b82060.

Signed-off-by: Ray Poudrier <rapoudrier@nvidia.com>
Change-Id: Idf66b95f1df2b732d319357ae4ea54f798cba82d
Reviewed-on: http://git-master/r/162093
GVS: Gerrit_Virtual_Submit
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

7 years agoARM: tegra: Kconfig: NVMAP_CACHE_MAINT_BY_SET_WAYS for tegra11x
Hiroshi Doyu [Mon, 5 Nov 2012 11:46:07 +0000]
ARM: tegra: Kconfig: NVMAP_CACHE_MAINT_BY_SET_WAYS for tegra11x

Enable NVMAP_CACHE_MAINT_BY_SET_WAYS for tegra11x

Bug 1158336

Change-Id: I72ac4790c859cd464fafcde4f5da5c45d3d0abeb
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/161224
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

7 years agoarm: mm: cpa: Configurable cache_maint_{inner,outer}_threshold
Hiroshi Doyu [Mon, 5 Nov 2012 10:29:35 +0000]
arm: mm: cpa: Configurable cache_maint_{inner,outer}_threshold

Introduce configurable cache_maint_{inner,outer}_threshold via debugfs.

Bug 1158336

Change-Id: I7bb94adadbc41ff65dbd9992920c938df2449b06
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/161209
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

7 years agovideo: tegra: nvmap: Configurable cache_maint_{inner,outer}_threshold
Hiroshi Doyu [Mon, 5 Nov 2012 10:26:27 +0000]
video: tegra: nvmap: Configurable cache_maint_{inner,outer}_threshold

Introduce configurable cache_maint_{inner,outer}_threshold via debugfs.

Bug 1158336

Change-Id: I0b20d44ddf1e8e88954ac8fac7750b4e31959564
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/161208
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

7 years agovideo: tegra: nvmap: Clean up fast_cache_maint()
Hiroshi Doyu [Mon, 5 Nov 2012 10:37:14 +0000]
video: tegra: nvmap: Clean up fast_cache_maint()

Get rid of ifdef in a function for readability.

Bug 1158336

Change-Id: I31e9521f97dda91fecf523bcd49ff5b34db86e45
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/161207
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Alex Waterman <alexw@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

7 years agoARM: tegra11x: cpuidle: Remove LP2 references
Bo Yan [Tue, 30 Oct 2012 20:51:33 +0000]
ARM: tegra11x: cpuidle: Remove LP2 references

This change completely removes references to lp2 in cpuidle-t11x.c,
some related changes also affect cpuidle-t2.c, cpuidle-t3.c, and a
few other files.

bug 1034196

Change-Id: Ic2387bf614b39bd08ed4b2fc6e996f6fbf8306c0
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/160017
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

7 years agoinput: misc: Added sysfs to MAX77665 haptics driver
Sumit Sharma [Fri, 2 Nov 2012 04:07:34 +0000]
input: misc: Added sysfs to MAX77665 haptics driver

Added sysfs support to access and modify vibrator parameters

Change-Id: If372f0ce8df34c6b88a87056c4a214f63207d108
Signed-off-by: Sumit Sharma <sumsharma@nvidia.com>
Reviewed-on: http://git-master/r/159817
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoarm: tegra: Added MAX77665 vibrator EDP data
Sumit Sharma [Fri, 2 Nov 2012 04:05:33 +0000]
arm: tegra: Added MAX77665 vibrator EDP data

Added EDP states in MAX77665 platform data for EDP implementation

Bug 1043388

Change-Id: Ieae95d196a43526084c11f3ee1063af57b6cc0e0
Signed-off-by: Sumit Sharma <sumsharma@nvidia.com>
Reviewed-on: http://git-master/r/159816
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoinput: misc: Added EDP support in MAX77665 haptics driver
Sumit Sharma [Fri, 2 Nov 2012 04:02:54 +0000]
input: misc: Added EDP support in MAX77665 haptics driver

Registered vibrator EDP client
Implemented throttle callback function for EDP

Bug 1043388

Change-Id: I444251c6791baf112fdc86bed9aa02994236bde7
Signed-off-by: Sumit Sharma <sumsharma@nvidia.com>
Reviewed-on: http://git-master/r/159815
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

7 years agoregmap: no need primary handler for nested irq
Yunfan Zhang [Sat, 8 Sep 2012 10:53:25 +0000]
regmap: no need primary handler for nested irq

The primary handler will NOT be called if the interrupt nests into
another interrupt thread. Remove it to avoid confusing.

Signed-off-by: Yunfan Zhang <yfzhang@marvell.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit 81380739516730124067576c9cc9f2418be5bf36)

Signed-off-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Change-Id: If06302d8d5806c00f34dd473b3ad937ebe626000
Reviewed-on: http://git-master/r/161555
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
GVS: Gerrit_Virtual_Submit

7 years agoregmap: irq: Add mask invert flag for enable register
Xiaofan Tian [Thu, 30 Aug 2012 09:03:35 +0000]
regmap: irq: Add mask invert flag for enable register

Currently, regmap will write 1 to mask_base to mask
an interrupt and write 0 to unmask it.

But some chips do not have an interrupt mask register,
and only have interrupt enable register.
Then we should write 0 to disable interrupt and 1 to enable.

So add an mask_invert flag to handle this.
If it is not set, behavior is same as previous.
If set it to 1, the mask value will be inverted
before written to mask_base

Change-Id: I1c6875de71e0b9b9a89a23c1669638df4dfe541e
Signed-off-by: Xiaofan Tian <tianxf@marvell.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Reviewed-on: http://git-master/r/161554
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
GVS: Gerrit_Virtual_Submit