10 years agopowerpc/85xx: sbc8560 - remove "has-rstcr" from global utilities block
Paul Gortmaker [Fri, 14 Aug 2009 16:13:54 +0000]
powerpc/85xx: sbc8560 - remove "has-rstcr" from global utilities block

The earlier mpc8560 CPUs don't have the RSTCR at 0xe00b0
in the GUTS.  The generic reboot code uses this tag to
determine if it should be using the RSTCR for reboot, so
remove it from the board definition.

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

10 years agopowerpc/85xx: issue fsl_soc reboot warning only when applicable
Paul Gortmaker [Fri, 14 Aug 2009 16:13:53 +0000]
powerpc/85xx: issue fsl_soc reboot warning only when applicable

Some CPU, like the MPC8560 don't have a RSTCR in the Global
Utilities Block.  These boards will implement their own reboot
call, and not use this code, so we should only warn about the
absence of the GUTS RSTCR when the default reboot code is used.

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

10 years agopowerpc/85xx: sbc8560 - Fix warm reboot with board specific reset function
Liang Li [Fri, 14 Aug 2009 14:36:14 +0000]
powerpc/85xx: sbc8560 - Fix warm reboot with board specific reset function

The existing fsl_rstcr_restart function is not applicable to the
mpc8560. The Global Utilities Block on this earlier CPU doesn't have
the control/reset register at 0xe00b0.  This implements a board
specific reset function that uses the RCR(Reset Control Register) of
the sbc8560's EPLD to do a reset.

Signed-off-by: Liang Li <Liang.Li@windriver.com>
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

10 years agopowerpc/83xx: sbc8349 - update defconfig, enable MTD, USB storage
Paul Gortmaker [Wed, 12 Aug 2009 13:34:31 +0000]
powerpc/83xx: sbc8349 - update defconfig, enable MTD, USB storage

With flash partition entries in the DTS file, MTD might as well
be enabled in the defconfig.  In a similar vein, enable USB and
enough related options (SCSI/ext2/ext3) so that a user can read
and write to a generic USB flash drive as well.

Also, this board only has the two default SOC UARTs, so adjust the
UART config accordingly.

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

10 years agopowerpc/83xx: Fix incorrect PCI interrupt map in SBC834x DTS
Liang Li [Wed, 12 Aug 2009 13:34:30 +0000]
powerpc/83xx: Fix incorrect PCI interrupt map in SBC834x DTS

Allows interrupts to occur on the sbc834x. Currently PCI devices
get assigned an incorrect IRQ and so the interrupt count never
increases. This was tested with the 82546GB based dual port E1000
PCI-X NIC which uses two distinct IRQ lines on the one card.

root@localhost:/root> cat /proc/interrupts | grep eth
17:         78   IPIC   Level     eth1
48:      27121   IPIC   Level     eth0

Signed-off-by: Liang Li <liang.li@windriver.com>
Signed-off-by: Yang Shi <yang.shi@windriver.com>
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

10 years agopowerpc/83xx: Add localbus node and MTD partitions for SBC834x
Liang Li [Wed, 12 Aug 2009 13:34:29 +0000]
powerpc/83xx: Add localbus node and MTD partitions for SBC834x

There is 8MB flash, 8kB EEPROM and 128MB SDRAM on the sbc834x
local bus, so add a localbus node in DTS with MTD partitions.

The recent U-boot commit fe613cdd4eb moves u-boot to the beginning
of flash, hence the legacy label on the partition at the end of flash.

Signed-off-by: Liang Li <liang.li@windriver.com>
Signed-off-by: Yang Shi <yang.shi@windriver.com>
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

10 years agopowerpc/83xx: Remove second USB node from SBC834x DTS
Liang Li [Wed, 12 Aug 2009 13:34:28 +0000]
powerpc/83xx: Remove second USB node from SBC834x DTS

Since only one of the SoC USB devices is brought out to a physical
connector on the board, remove the 2nd (USB-DR) node from the DTS.
Having it present and USB enabled will cause a hang at boot.

Signed-off-by: Liang Li <liang.li@windriver.com>
Signed-off-by: Yang Shi <yang.shi@windriver.com>
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

10 years agopowerpc/85xx: Add support for P2020RDB board
Poonam Aggrwal [Fri, 7 Aug 2009 15:35:16 +0000]
powerpc/85xx: Add support for P2020RDB board

Add support for the P2020RDB reference board from Freescale.

Overview of P2020RDB platform
- DDR
  DDR2 1G
- NOR Flash
  16MByte
- NAND Flash
  32MByte
- 3 Ethernet interfaces
  1) etSEC1
- RGMII
- connected to a 5 port Vitesse Switch(VSC7385)
- Switch is memory mapped through eLBC interface(CS#2)
- IRQ1
  2) etSEC2
- SGMII
- connected to VSC8221
- IRQ2
  3) etSEC3
- RGMII
- connected to VSC8641
- IRQ3
- 2 1X PCIe interfaces
- SD/MMC ,USB
- SPI EEPROM
- Serial I2C EEPROM

Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

10 years agopowerpc/booke: Move MMUCSR definition into mmu-book3e.h
Kumar Gala [Fri, 14 Aug 2009 14:38:34 +0000]
powerpc/booke: Move MMUCSR definition into mmu-book3e.h

The MMUCSR is now defined as part of the Book-3E architecture so we
can move it into mmu-book3e.h and add some of the additional bits
defined by the architecture specs.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

10 years agopowerpc/82xx: mgcoge - updated defconfig
Heiko Schocher [Fri, 7 Aug 2009 06:41:15 +0000]
powerpc/82xx: mgcoge - updated defconfig

- add I2C support
- add FCC1 and FCC2 support

Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

10 years agoMerge commit 'paulus-perf/master' into next
Benjamin Herrenschmidt [Thu, 20 Aug 2009 01:07:56 +0000]
Merge commit 'paulus-perf/master' into next

10 years agopowerpc: use consistent types in mktree
Stephen Rothwell [Mon, 10 Aug 2009 17:14:55 +0000]
powerpc: use consistent types in mktree

gcc v4.4 currently produces this build warning:

arch/powerpc/boot/mktree.c: In function 'main':
arch/powerpc/boot/mktree.c:104: warning: dereferencing type-punned pointer will break strict-aliasing rules

tmpbuf is only used as an array of unsigned ints, so declare it that way.

Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

10 years agopowerpc/vmlinux.lds: Move _edata down
Michael Ellerman [Sun, 9 Aug 2009 19:06:24 +0000]
powerpc/vmlinux.lds: Move _edata down

Currently _edata does not include several data sections, this causes
the kernel's report of memory usage at boot to not match reality, and
also prevents kmemleak from working - because it scan between _sdata
and _edata for pointers to allocated memory.

This mirrors a similar change made recently to the x86 linker script.

Signed-off-by: Michael Ellerman <michael@ellerman.id.au>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

10 years agopowerpc: Enable GCOV
Michael Ellerman [Sun, 9 Aug 2009 19:02:51 +0000]
powerpc: Enable GCOV

Make it possible to enable GCOV code coverage measurement on powerpc.

Lightly tested on 64-bit, seems to work as expected.

Signed-off-by: Michael Ellerman <michael@ellerman.id.au>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

10 years agopowerpc/hvsi: Avoid calculating possibly-invalid address
Roel Kluin [Thu, 6 Aug 2009 13:00:37 +0000]
powerpc/hvsi: Avoid calculating possibly-invalid address

Check whether index is within bounds prior to calculating a
possibly-invalid address.

Signed-off-by: Roel Kluin <roel.kluin@gmail.com>
Cc: Bernd Petrovitsch <bernd@firmix.at>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

10 years agopowerpc: Switch to asm-generic/hardirq.h
Christoph Hellwig [Wed, 5 Aug 2009 12:24:45 +0000]
powerpc: Switch to asm-generic/hardirq.h

hardirq.h on powerpc defines a __last_jiffy_stamp field, but it's not
actually used anywhere.

Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

10 years agoagp/uninorth: Simplify cache flushing.
Michel Dänzer [Tue, 4 Aug 2009 11:51:04 +0000]
agp/uninorth: Simplify cache flushing.

Map the GART table uncached, so we don't always need to flush the CPU caches
explicitly after updates.

Signed-off-by: Michel Dänzer <daenzer@vmware.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

10 years agoagp/uninorth: Allow larger aperture sizes on pre-U3 bridges.
Michel Dänzer [Tue, 4 Aug 2009 11:51:03 +0000]
agp/uninorth: Allow larger aperture sizes on pre-U3 bridges.

Using the radeon KMS test functionality, I verified that the AGP bridge of the
Intrepid2 chipset in my PowerBook supports aperture sizes up to 256M. So allow
aperture sizes up to 256M on pre-U3 bridges as well, and bump the default size
to 256M. It's possible that older revisions only support smaller sizes, but
it'll be easy to verify that with the raden KMS test functionality. Also,
there's only a problem on an actual attempt to access the aperture beyond the
maximum size supported by the hardware, and non-KMS X still defaults to using
only 32M.

Also use ARRAY_SIZE for the aperture size arrays.

Signed-off-by: Michel Dänzer <daenzer@vmware.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

10 years agopowerpc/macio: Don't the address of an array element before boundchecking
roel kluin [Mon, 3 Aug 2009 02:41:42 +0000]
powerpc/macio: Don't the address of an array element before boundchecking

Check whether index is within bounds before grabbing the element.

Signed-off-by: Roel Kluin <roel.kluin@gmail.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

10 years agopowerpc: Use DIV_ROUND_CLOSEST in time init code
Julia Lawall [Sat, 1 Aug 2009 22:48:27 +0000]
powerpc: Use DIV_ROUND_CLOSEST in time init code

The kernel.h macro DIV_ROUND_CLOSEST performs the computation (x + d/2)/d
but is perhaps more readable.

The semantic patch that makes this change is as follows:
(http://www.emn.fr/x-info/coccinelle/)

// <smpl>
@haskernel@
@@

#include <linux/kernel.h>

@depends on haskernel@
expression x,__divisor;
@@

- (((x) + ((__divisor) / 2)) / (__divisor))
+ DIV_ROUND_CLOSEST(x,__divisor)
// </smpl>

Signed-off-by: Julia Lawall <julia@diku.dk>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

10 years agopowerpc/cell: Move CBE_IOPTE_* to <asm/cell-regs.h>
Geert Uytterhoeven [Wed, 29 Jul 2009 02:06:42 +0000]
powerpc/cell: Move CBE_IOPTE_* to <asm/cell-regs.h>

As <asm/iommu.h> doesn't contain any other hardware specific definitions
but only interfaces.

Reported-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Geert Uytterhoeven <Geert.Uytterhoeven@sonycom.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

10 years agopowerpc: Missing tests for NULL after ioremap()
roel kluin [Thu, 30 Jul 2009 06:02:18 +0000]
powerpc: Missing tests for NULL after ioremap()

Missing tests after ioremap()

Signed-off-by: Roel Kluin <roel.kluin@gmail.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

10 years agopowerpc/prom_init: Evaluate mem kernel parameter for early allocation
Benjamin Krill [Mon, 27 Jul 2009 22:02:39 +0000]
powerpc/prom_init: Evaluate mem kernel parameter for early allocation

Evaluate mem kernel parameter for early memory allocations. If mem is set
no allocation in the region above the given boundary is allowed. The current
code doesn't take care about this and allocate memory above the given mem
boundary.

Signed-off-by: Benjamin Krill <ben@codiert.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

10 years agopowerpc: ARRAY_SIZE changes in pasemi and powermac code
Stoyan Gaydarov [Tue, 21 Jul 2009 17:02:31 +0000]
powerpc: ARRAY_SIZE changes in pasemi and powermac code

These changes were a direct result of using a semantic patch
More information can be found at http://www.emn.fr/x-info/coccinelle/

Signed-off-by: Stoyan Gaydarov <sgayda2@uiuc.edu>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

10 years agokmemleak: Allow kmemleak to be built on powerpc
Michael Ellerman [Wed, 15 Jul 2009 15:25:22 +0000]
kmemleak: Allow kmemleak to be built on powerpc

Very lightly tested, doesn't crash the kernel.

Signed-off-by: Michael Ellerman <michael@ellerman.id.au>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

10 years agohvc_console: Drop unnecessary NULL test
Julia Lawall [Sun, 12 Jul 2009 10:03:42 +0000]
hvc_console: Drop unnecessary NULL test

The result of container_of should not be NULL.  In particular, in this case
the argument to the enclosing function has passed though INIT_WORK, which
dereferences it, implying that its container cannot be NULL.

A simplified version of the semantic patch that makes this change is as
follows:
(http://www.emn.fr/x-info/coccinelle/)

// <smpl>
@@
identifier fn,work,x,fld;
type T;
expression E1,E2;
statement S;
@@

static fn(struct work_struct *work) {
  ... when != work = E1
  x = container_of(work,T,fld)
  ... when != x = E2
- if (x == NULL) S
  ...
}
// </smpl>

Signed-off-by: Julia Lawall <julia@diku.dk>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

10 years agopowerpc/nvram: Allow byte length reads from mmio NVRAM driver
Martyn Welch [Thu, 2 Jul 2009 06:12:18 +0000]
powerpc/nvram: Allow byte length reads from mmio NVRAM driver

Add a byte length read and write interface compatible with the
nvram_generic driver interface to the mmio driver.

Signed-off-by: Martyn Welch <martyn.welch@gefanuc.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

10 years agopowerpc/sputrace: Use the generic event tracer
Christoph Hellwig [Fri, 12 Jun 2009 04:31:52 +0000]
powerpc/sputrace: Use the generic event tracer

I wrote sputrace before generic tracing infrastrucure was available.
Now that we have the generic event tracer we can convert it over and
remove a lot of code:

  8 files changed, 45 insertions(+), 285 deletions(-)

To use it make sure CONFIG_EVENT_TRACING is enabled and then enable
the spufs trace channel by

  echo 1 > /sys/kernel/debug/tracing/events/spufs/spufs_context/enable

and then read the trace records using e.g.

  cat /sys/kernel/debug/tracing/trace

Signed-off-by: Christoph Hellwig <hch@lst.de>
Acked-by: Jeremy Kerr <jk@ozlabs.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

10 years agopowerpc/mm: Fix assert_pte_locked to work properly on uniprocessor
Kumar Gala [Tue, 18 Aug 2009 15:21:40 +0000]
powerpc/mm: Fix assert_pte_locked to work properly on uniprocessor

Since the pte_lockptr is a spinlock it gets optimized away on
uniprocessor builds so using spin_is_locked is not correct.  We can use
assert_spin_locked instead and get the proper behavior between UP and
SMP builds.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

10 years agopowerpc/86xx: Update GE Fanuc sbc310 DTS
Martyn Welch [Wed, 29 Jul 2009 22:13:45 +0000]
powerpc/86xx: Update GE Fanuc sbc310 DTS

Update GE Fanuc DTS to match the alterations suggested during the merge of
the ppc9a DTS in commit 740d36ae6344f38c4da64c2ede765d7d2dd1f132

Signed-off-by: Martyn Welch <martyn.welch@gefanuc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

10 years agopowerpc/86xx: Enable XMC site on GE Fanuc SBC310
Martyn Welch [Tue, 30 Jun 2009 14:32:38 +0000]
powerpc/86xx: Enable XMC site on GE Fanuc SBC310

This patch enables the XMC (PCIe daughter card) site on the SBC310.
STG enter the description for the patch above.

Signed-off-by: Martyn Welch <martyn.welch@gefanuc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

10 years agopowerpc/86xx: Correct reading of information presented in cpuinfo
Martyn Welch [Tue, 30 Jun 2009 14:32:26 +0000]
powerpc/86xx: Correct reading of information presented in cpuinfo

/proc/cpuinfo should be showing the boards revision and the revision of
the FPGA fitted. The functions currently used to access this information
as incorrect.

Additionally the VME geographical address of the PPC9A and it's status as
system contoller are available in the board registers. Show these in
cpuinfo.

Signed-off-by: Martyn Welch <martyn.welch@gefanuc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

10 years agopowerpc/83xx: Add eSDHC support for MPC837xE-RDB/WLAN boards
Anton Vorontsov [Fri, 24 Jul 2009 21:42:30 +0000]
powerpc/83xx: Add eSDHC support for MPC837xE-RDB/WLAN boards

Actually, the support is already there, but it requires newer U-Boots
(to fill-in clock-frequency, and setup pin multiplexing).

Though, it appears that on RDB boards USBB pins aren't multiplexed
between USB and eSDHC (unlike MDS boards, where USB and eSDHC share
pctl and pwrfault pins).

So, for RDB boards we can safely setup pinmux and manually fill-in
clock-frequency, thus making eSDHC work even with older u-boots.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

10 years agopowerpc/85xx: Add support for I2C EEPROMs on MPC8548CDS boards
Anton Vorontsov [Thu, 9 Jul 2009 18:36:44 +0000]
powerpc/85xx: Add support for I2C EEPROMs on MPC8548CDS boards

This patch simply adds four eeprom nodes to MPC8548CDS' device tree.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

10 years agopowerpc/83xx: Add support for MPC8377E-WLAN boards
Anton Vorontsov [Fri, 24 Jul 2009 21:42:17 +0000]
powerpc/83xx: Add support for MPC8377E-WLAN boards

MPC8377E-WLAN are basically RDB boards except:

- RAM extended to 512 MB;
- NAND flash removed, NOR flash extended to 64 MB;
- Vitesse VSC7385 5-port switch removed, RTL8211B PHY added;
- Power management MCU removed;
- PCI slot removed, another mini-PCI slot added (IRQ routing changed);
- USB3300 PHY's ID pin grounded, thus USB port is host-only.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

10 years agopowerpc/qe: introduce missing kfree
Julia Lawall [Sat, 1 Aug 2009 08:52:51 +0000]
powerpc/qe: introduce missing kfree

Error handling code following a kzalloc should free the allocated data.

The semantic match that finds the problem is as follows:
(http://www.emn.fr/x-info/coccinelle/)

// <smpl>
@r exists@
local idexpression x;
statement S;
expression E;
identifier f,f1,l;
position p1,p2;
expression *ptr != NULL;
@@

x@p1 = \(kmalloc\|kzalloc\|kcalloc\)(...);
...
if (x == NULL) S
<... when != x
     when != if (...) { <+...x...+> }
(
x->f1 = E
|
 (x->f1 == NULL || ...)
|
 f(...,x->f1,...)
)
...>
(
 return \(0\|<+...x...+>\|ptr\);
|
 return@p2 ...;
)

@script:python@
p1 << r.p1;
p2 << r.p2;
@@

print "* file: %s kmalloc %s return %s" % (p1[0].file,p1[0].line,p2[0].line)
// </smpl>

Signed-off-by: Julia Lawall <julia@diku.dk>
Acked-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

10 years agopowerpc/ipic: introduce missing kfree
Julia Lawall [Sun, 2 Aug 2009 08:44:53 +0000]
powerpc/ipic: introduce missing kfree

Error handling code following a kzalloc should free the allocated data.

The semantic match that finds the problem is as follows:
(http://www.emn.fr/x-info/coccinelle/)

// <smpl>
@r exists@
local idexpression x;
statement S;
expression E;
identifier f,f1,l;
position p1,p2;
expression *ptr != NULL;
@@

x@p1 = \(kmalloc\|kzalloc\|kcalloc\)(...);
...
if (x == NULL) S
<... when != x
     when != if (...) { <+...x...+> }
(
x->f1 = E
|
 (x->f1 == NULL || ...)
|
 f(...,x->f1,...)
)
...>
(
 return \(0\|<+...x...+>\|ptr\);
|
 return@p2 ...;
)

@script:python@
p1 << r.p1;
p2 << r.p2;
@@

print "* file: %s kmalloc %s return %s" % (p1[0].file,p1[0].line,p2[0].line)
// </smpl>

Signed-off-by: Julia Lawall <julia@diku.dk>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

10 years agopowerpc/82xx: mgcoge - updates for 2.6.32
Heiko Schocher [Mon, 3 Aug 2009 07:34:50 +0000]
powerpc/82xx: mgcoge - updates for 2.6.32

- add I2C support
- add FCC1 and FCC2 support
- fix bogus gpio numbering in plattform code

Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

10 years agopowerpc/ipic: unmask all interrupt sources
Sebastian Andrzej Siewior [Wed, 5 Aug 2009 19:41:12 +0000]
powerpc/ipic: unmask all interrupt sources

in case the interrupt controller was used in an earlier life then it is
possible it is that some of its sources were used and are still unmask.
If the (unmasked) device is active and is creating interrupts (or one
interrupts was pending since the interrupts were disabled) then the boot
process "ends" very soon. Once external interrupts are enabled, we land in
-> do_IRQ
  -> call ppc_md.get_irq()
     -> ipic_read() gets the source number
     -> irq_linear_revmap(source)
        -> revmap[source] == NO_IRQ
           -> irq_find_mapping(source) returns NO_IRQ because no source
              is registered
  -> source is NO_IRQ, ppc_spurious_interrupts gets incremented, no
     further action.

Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

10 years agopowerpc/fsl_rio: Add kmalloc NULL tests
Julia Lawall [Fri, 7 Aug 2009 07:00:34 +0000]
powerpc/fsl_rio: Add kmalloc NULL tests

Check that the result of kmalloc/kzalloc is not NULL before dereferencing it.

The semantic match that finds this problem is as follows:
(http://coccinelle.lip6.fr/)

// <smpl>
@@
expression *x;
identifier f;
constant char *C;
@@

x = \(kmalloc\|kcalloc\|kzalloc\)(...);
... when != x == NULL
    when != x != NULL
    when != (x || ...)
(
kfree(x)
|
f(...,C,...,x,...)
|
*f(...,x,...)
|
*x->f
)
// </smpl>

Signed-off-by: Julia Lawall <julia@diku.dk>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

10 years agopowerpc/fsl-booke: read buffer overflow
Roel Kluin [Thu, 6 Aug 2009 23:00:37 +0000]
powerpc/fsl-booke: read buffer overflow

cam[tlbcam_index] is checked before tlbcam_index < ARRAY_SIZE(cam)

Signed-off-by: Roel Kluin <roel.kluin@gmail.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

10 years agopowerpc/85xx: Added 36-bit physical device tree for mpc8536ds board
Kumar Gala [Thu, 30 Jul 2009 22:56:54 +0000]
powerpc/85xx: Added 36-bit physical device tree for mpc8536ds board

Added a device tree that should be similiar to mpc8536ds.dtb except
the physical addresses for all IO are above the 4G boundary.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

10 years agopowerpc/85xx: Move mpc8536ds.dts to address-cells/size-cells = <2>
Kumar Gala [Thu, 30 Jul 2009 22:56:38 +0000]
powerpc/85xx: Move mpc8536ds.dts to address-cells/size-cells = <2>

Change the top-level #address-cells and #size-cells to <2> so the
mpc8536ds.dts is easier to deal with both a true 32-bit physical
or 36-bit physical address space.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

10 years agopowerpc/40x: Update kilauea defconfig to support NAND, RTC and HWMON
Stefan Roese [Wed, 29 Jul 2009 01:41:06 +0000]
powerpc/40x: Update kilauea defconfig to support NAND, RTC and HWMON

This patch adds support for the following devices to the Kilauea
defconfig file:
- PPC4xx NAND controller (NDFC)
- I2C RTC (Dallas DS1338)
- I2C HWMON (Dallas DS1775)

Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

10 years agopowerpc/44x: Update Canyonlands defconfig to support NOR, NAND and RTC
Stefan Roese [Wed, 29 Jul 2009 07:05:11 +0000]
powerpc/44x: Update Canyonlands defconfig to support NOR, NAND and RTC

This patch adds support for the following devices to the Canyonlands
defconfig file:
- NOR FLASH
- PPC4xx NAND controller (NDFC)
- I2C RTC (M41T80)

Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

10 years agopowerpc/40x: Update Kilauea dts to support NAND, RTC and HWMON
Stefan Roese [Wed, 29 Jul 2009 01:40:56 +0000]
powerpc/40x: Update Kilauea dts to support NAND, RTC and HWMON

This patch adds support for the following devices to the Kilauea dts:
- PPC4xx NAND controller (NDFC)
- I2C RTC (Dallas DS1338)
- I2C HWMON (Dallas DS1775)

Additionally the partitioning of the NOR FLASH is changed. The dtb
partition has been missing. Fixed in this patch.

Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

10 years agopowerpc/44x: Add NAND support to Canyonlands dts
Stefan Roese [Wed, 29 Jul 2009 07:05:01 +0000]
powerpc/44x: Add NAND support to Canyonlands dts

Also some whitespace cleanup in the USB device nodes.

Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

10 years agopowerpc: Add AMCC 460EX/460GT Rev. B support to cputable.c
Stefan Roese [Wed, 29 Jul 2009 07:04:46 +0000]
powerpc: Add AMCC 460EX/460GT Rev. B support to cputable.c

Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

10 years agopowerpc/mm: Fix switch_mmu_context to iterate of the proper list of cpus
Kumar Gala [Wed, 5 Aug 2009 03:33:32 +0000]
powerpc/mm: Fix switch_mmu_context to iterate of the proper list of cpus

Introduced a temporary variable into our iterating over the list cpus
that are threads on the same core.  For some reason Ben forgot how for
loops work.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

10 years agopowerpc/mm: Fix encoding of page table cache numbers
Benjamin Herrenschmidt [Thu, 6 Aug 2009 03:50:58 +0000]
powerpc/mm: Fix encoding of page table cache numbers

The mask used to encode the page table cache number in the
batch when freeing page tables was too small for the new
possible values of MMU page sizes. This increases it along
with a comment explaining the constraints.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

10 years agopowerpc: Remaining 64-bit Book3E support
Benjamin Herrenschmidt [Thu, 23 Jul 2009 23:15:59 +0000]
powerpc: Remaining 64-bit Book3E support

This contains all the bits that didn't fit in previous patches :-) This
includes the actual exception handlers assembly, the changes to the
kernel entry, other misc bits and wiring it all up in Kconfig.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

10 years agopowerpc/mm: Add support for SPARSEMEM_VMEMMAP on 64-bit Book3E
Benjamin Herrenschmidt [Thu, 23 Jul 2009 23:15:58 +0000]
powerpc/mm: Add support for SPARSEMEM_VMEMMAP on 64-bit Book3E

The base TLB support didn't include support for SPARSEMEM_VMEMMAP, though
we did carve out some virtual space for it, the necessary support code
wasn't there. This implements it by using 16M pages for now, though the
page size could easily be changed at runtime if necessary.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

10 years agopowerpc: Add TLB management code for 64-bit Book3E
Benjamin Herrenschmidt [Thu, 23 Jul 2009 23:15:47 +0000]
powerpc: Add TLB management code for 64-bit Book3E

This adds the TLB miss handler assembly, the low level TLB flush routines
along with the necessary hook for dealing with our virtual page tables
or indirect TLB entries that need to be flushes when PTE pages are freed.

There is currently no support for hugetlbfs

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

10 years agopowerpc/mm: Move around mmu_gathers definition on 64-bit
Benjamin Herrenschmidt [Thu, 23 Jul 2009 23:15:45 +0000]
powerpc/mm: Move around mmu_gathers definition on 64-bit

The definition for the global structure mmu_gathers, used by generic code,
is currently defined in multiple places not including anything used by
64-bit Book3E. This changes it by moving to one place common to all
processors.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

10 years agopowerpc: Add PACA fields specific to 64-bit Book3E processors
Benjamin Herrenschmidt [Thu, 23 Jul 2009 23:15:42 +0000]
powerpc: Add PACA fields specific to 64-bit Book3E processors

This adds various fields in the PACA that are for use specifically
by Book3E processors, such as exception save areas, current pgd
pointer, special exceptions kernel stacks etc...

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

10 years agopowerpc: Add definitions used by exception handling on 64-bit Book3E
Benjamin Herrenschmidt [Thu, 23 Jul 2009 23:15:39 +0000]
powerpc: Add definitions used by exception handling on 64-bit Book3E

This adds various definitions and macros used by the exception and TLB
miss handling on 64-bit BookE

It also adds the definitions of the SPRGs used for various exception types

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

10 years agopowerpc: Add memory management headers for new 64-bit BookE
Benjamin Herrenschmidt [Tue, 28 Jul 2009 01:59:34 +0000]
powerpc: Add memory management headers for new 64-bit BookE

This adds the PTE and pgtable format definitions, along with changes
to the kernel memory map and other definitions related to implementing
support for 64-bit Book3E. This also shields some asm-offset bits that
are currently only relevant on 32-bit

We also move the definition of the "linux" page size constants to
the common mmu.h file and add a few sizes that are relevant to
embedded processors.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

10 years agopowerpc: Add SPR definitions for new 64-bit BookE
Benjamin Herrenschmidt [Thu, 23 Jul 2009 23:15:34 +0000]
powerpc: Add SPR definitions for new 64-bit BookE

This adds various SPRs defined on 64-bit BookE, along with changes
to the definition of the base MSR values to add the values needed
for 64-bit Book3E.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

10 years agopowerpc/mm: Rework & cleanup page table freeing code path
Benjamin Herrenschmidt [Thu, 23 Jul 2009 23:15:28 +0000]
powerpc/mm: Rework & cleanup page table freeing code path

That patch used to just add a hook to page table flushing but
pulling that string brought out a whole bunch of issues, so it
now does that and more:

 - We now make the RCU batching of page freeing SMP only, as I
believe it was intended initially. We make a few more things compile
to nothing on !CONFIG_SMP

 - Some macros are turned into functions, though that forced me to
out of line a few stuffs due to unsolvable include depenencies,
however it's probably better that way anyway, it's not -that-
critical code path.

 - 32-bit didn't call pte_free_finish() on tlb_flush() which means
that it wouldn't push out the batch to RCU for delayed freeing when
a bunch of page tables have been freed, they would just stay in there
until the batch gets full.

64-bit BookE will use that hook to maintain the virtually linear
page tables or the indirect entries in the TLB when using the
HW loader.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

10 years agopowerpc: Move definitions of secondary CPU spinloop to header file
Benjamin Herrenschmidt [Thu, 23 Jul 2009 23:15:28 +0000]
powerpc: Move definitions of secondary CPU spinloop to header file

Those definitions are currently declared extern in the .c file where
they are used, move them to a header file instead.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

10 years agopowerpc: Clean ifdef usage in copy_thread()
Benjamin Herrenschmidt [Thu, 23 Jul 2009 23:15:27 +0000]
powerpc: Clean ifdef usage in copy_thread()

Currently, a single ifdef covers SLB related bits and more generic ppc64
related bits, split this in two separate ifdef's since 64-bit BookE will
need one but not the other.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

10 years agopowerpc/mm: Call mmu_context_init() from ppc64
Benjamin Herrenschmidt [Thu, 23 Jul 2009 23:15:26 +0000]
powerpc/mm: Call mmu_context_init() from ppc64

Our 64-bit hash context handling has no init function, but 64-bit Book3E
will use the common mmu_context_nohash.c code which does, so define an
empty inline mmu_context_init() for 64-bit server and call it from
our 64-bit setup_arch()

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Acked-by: Kumar Gala <galak@kernel.crashing.org>

10 years agopowerpc/mm: Make low level TLB flush ops on BookE take additional args
Benjamin Herrenschmidt [Thu, 23 Jul 2009 23:15:24 +0000]
powerpc/mm: Make low level TLB flush ops on BookE take additional args

We need to pass down whether the page is direct or indirect and we'll
need to pass the page size to _tlbil_va and _tlbivax_bcast

We also add a new low level _tlbil_pid_noind() which does a TLB flush
by PID but avoids flushing indirect entries if possible

This implements those new prototypes but defines them with inlines
or macros so that no additional arguments are actually passed on current
processors.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

10 years agopowerpc: Modify some ppc_asm.h macros to accomodate 64-bits Book3E
Benjamin Herrenschmidt [Thu, 23 Jul 2009 23:15:20 +0000]
powerpc: Modify some ppc_asm.h macros to accomodate 64-bits Book3E

The way I intend to use tophys/tovirt on 64-bit BookE is different
from the "trick" that we currently play for 32-bit BookE so change
the condition of definition of these macros to make it so.

Also, make sure we only use rfid and mtmsrd instead of rfi and mtmsr
for 64-bit server processors, not all 64-bit processors.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Acked-by: Kumar Gala <galak@kernel.crashing.org>

10 years agopowerpc/mm: Add support for early ioremap on non-hash 64-bit processors
Benjamin Herrenschmidt [Thu, 23 Jul 2009 23:15:16 +0000]
powerpc/mm: Add support for early ioremap on non-hash 64-bit processors

This adds some code to do early ioremap's using page tables instead of
bolting entries in the hash table. This will be used by the upcoming
64-bits BookE port.

The patch also changes the test for early vs. late ioremap to use
slab_is_available() instead of our old hackish mem_init_done.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

10 years agopowerpc/mm: Add more bit definitions for Book3E MMU registers
Benjamin Herrenschmidt [Thu, 23 Jul 2009 23:15:12 +0000]
powerpc/mm: Add more bit definitions for Book3E MMU registers

This adds various additional bit definitions for various MMU related
SPRs used on Book3E.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

10 years agopowerpc/mm: Add opcode definitions for tlbivax and tlbsrx.
Benjamin Herrenschmidt [Thu, 23 Jul 2009 23:15:11 +0000]
powerpc/mm: Add opcode definitions for tlbivax and tlbsrx.

This adds the opcode definitions to ppc-opcode.h for the two instructions
tlbivax and tlbsrx. as defined by Book3E 2.06

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

10 years agopowerpc/mm: Add HW threads support to no_hash TLB management
Benjamin Herrenschmidt [Thu, 23 Jul 2009 23:15:10 +0000]
powerpc/mm: Add HW threads support to no_hash TLB management

The current "no hash" MMU context management code is written with
the assumption that one CPU == one TLB. This is not the case on
implementations that support HW multithreading, where several
linux CPUs can share the same TLB.

This adds some basic support for this to our context management
and our TLB flushing code.

It also cleans up the optional debugging output a bit

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

10 years agopowerpc/of: Remove useless register save/restore when calling OF back
Benjamin Herrenschmidt [Thu, 23 Jul 2009 23:15:07 +0000]
powerpc/of: Remove useless register save/restore when calling OF back

enter_prom() used to save and restore registers such as CTR, XER etc..
which are volatile, or SRR0,1... which we don't care about. This
removes a bunch of useless code and while at it turns an mtmsrd into
an MTMSRD macro which will be useful to Book3E.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

10 years agopowerpc/mm: Fix misplaced #endif in pgtable-ppc64-64k.h
Benjamin Herrenschmidt [Thu, 23 Jul 2009 23:15:04 +0000]
powerpc/mm: Fix misplaced #endif in pgtable-ppc64-64k.h

A misplaced #endif causes more definitions than intended to be
protected by #ifndef __ASSEMBLY__. This breaks upcoming 64-bit
BookE support patch when using 64k pages.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

10 years agopowerpc: Add compat_sys_truncate
Benjamin Herrenschmidt [Tue, 28 Jul 2009 01:54:32 +0000]
powerpc: Add compat_sys_truncate

The truncate syscall has a signed long parameter, so when using a 32-
bit userspace with a 64-bit kernel the argument is zero-extended
instead of sign-extended. Adding the compat_sys_truncate function
fixes the issue.

This was noticed during an LSB truncate test failure. The test was
checking for the correct error number set when truncate is called with
a length of -1. The test can be found at:

http://bzr.linuxfoundation.org/lsb/devel/runtime-test?cmd=inventory;rev=stewb%40linux-foundation.org-20090626205411-sfb23cc0tjj7jzgm;path=modules/vsx-pcts/tset/POSIX.os/files/truncate/

BenH: Added compat_sys_ftruncate() as well, same issue.

Signed-off-by: Chase Douglas <cndougla@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

10 years agopowerpc: Update boot wrapper script with the new location of dtc
Lucian Adrian Grijincu [Thu, 23 Jul 2009 00:13:37 +0000]
powerpc: Update boot wrapper script with the new location of dtc

dtc was moved in 9fffb55f66127b52c937ede5196ebfa0c0d50bce from
arch/powerpc/boot/ to scripts/dtc/

This patch updates the wrapper script to point to the new location of dtc.

Signed-off-by: Lucian Adrian Grijincu <lgrijincu@ixiacom.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

10 years agopowerpc: Makefile simplification through use of cc-ifversion
Frans Pop [Thu, 23 Jul 2009 08:57:18 +0000]
powerpc: Makefile simplification through use of cc-ifversion

Signed-off-by: Frans Pop <elendil@planet.nl>
Acked-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

10 years agopowerpc: Change PACA from SPRG3 to SPRG1
Benjamin Herrenschmidt [Tue, 14 Jul 2009 20:52:56 +0000]
powerpc: Change PACA from SPRG3 to SPRG1

This change the SPRG used to store the PACA on ppc64 from
SPRG3 to SPRG1. SPRG3 is user readable on most processors
and we want to use it for other things. We change the scratch
SPRG used by exception vectors from SRPG1 to SPRG2.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

10 years agopowerpc/pmac: Fix PowerSurge SMP IPI allocation
Benjamin Herrenschmidt [Tue, 14 Jul 2009 20:56:58 +0000]
powerpc/pmac: Fix PowerSurge SMP IPI allocation

The code for setting up the IPIs for SMP PowerSurge marchines bitrot,
it needs to properly map the HW interrupt number

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

10 years agopowerpc/mm: Fix definitions of FORCE_MAX_ZONEORDER in Kconfig
Benjamin Herrenschmidt [Tue, 21 Jul 2009 15:25:53 +0000]
powerpc/mm: Fix definitions of FORCE_MAX_ZONEORDER in Kconfig

The current definitions set ranges and defaults for 32 and 64-bit
only using "PPC_STD_MMU" which means hash based MMU. This uselessly
restrict the usefulness for the upcoming 64-bit BookE port, but more
than that, it's broken on 32-bit since the only 32-bit platform
supporting multiple page sizes currently is 44x which does -not-
have PPC_STD_MMU_32 set.

This fixes it by using PPC64 and PPC32 instead.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

10 years agopowerpc/cell: Replace strncpy by strlcpy
roel kluin [Tue, 21 Jul 2009 00:17:17 +0000]
powerpc/cell: Replace strncpy by strlcpy

Replace strncpy() and explicit null-termination by strlcpy()

Signed-off-by: Roel Kluin <roel.kluin@gmail.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

10 years agopowerpc: Remove use of a second scratch SPRG in STAB code
Benjamin Herrenschmidt [Thu, 16 Jul 2009 19:36:57 +0000]
powerpc: Remove use of a second scratch SPRG in STAB code

The STAB code used on Power3 and RS/64 uses a second scratch SPRG to
save a GPR in order to decide whether to go to do_stab_bolted_* or
to handle a normal data access exception.

This prevents our scheme of freeing SPRG3 which is user visible for
user uses since we cannot use SPRG0 which, on RS/64, seems to be
read-only for supervisor mode (like POWER4).

This reworks the STAB exception entry to use the PACA as temporary
storage instead.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

10 years agopowerpc: Use names rather than numbers for SPRGs (v2)
Benjamin Herrenschmidt [Tue, 14 Jul 2009 20:52:54 +0000]
powerpc: Use names rather than numbers for SPRGs (v2)

The kernel uses SPRG registers for various purposes, typically in
low level assembly code as scratch registers or to hold per-cpu
global infos such as the PACA or the current thread_info pointer.

We want to be able to easily shuffle the usage of those registers
as some implementations have specific constraints realted to some
of them, for example, some have userspace readable aliases, etc..
and the current choice isn't always the best.

This patch should not change any code generation, and replaces the
usage of SPRN_SPRGn everywhere in the kernel with a named replacement
and adds documentation next to the definition of the names as to
what those are used for on each processor family.

The only parts that still use the original numbers are bits of KVM
or suspend/resume code that just blindly needs to save/restore all
the SPRGs.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

10 years agopowerpc: Rename exception.h to exception-64s.h
Benjamin Herrenschmidt [Tue, 14 Jul 2009 20:52:52 +0000]
powerpc: Rename exception.h to exception-64s.h

The file include/asm/exception.h contains definitions
that are specific to exception handling on 64-bit server
type processors.

This renames the file to exception-64s.h to reflect that
fact and avoid confusion.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

10 years agopowerpc: Preload application text segment instead of TASK_UNMAPPED_BASE
Anton Blanchard [Mon, 13 Jul 2009 20:53:53 +0000]
powerpc: Preload application text segment instead of TASK_UNMAPPED_BASE

TASK_UNMAPPED_BASE is not used with the new top down mmap layout. We can
reuse this preload slot by loading in the segment at 0x10000000, where almost
all PowerPC binaries are linked at.

On a microbenchmark that bounces a token between two 64bit processes over pipes
and calls gettimeofday each iteration (to access the VDSO), both the 32bit and
64bit context switch rate improves (tested on a 4GHz POWER6):

32bit: 273k/sec -> 283k/sec
64bit: 277k/sec -> 284k/sec

Signed-off-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

10 years agopowerpc: Rearrange SLB preload code
Anton Blanchard [Mon, 13 Jul 2009 20:53:52 +0000]
powerpc: Rearrange SLB preload code

With the new top down layout it is likely that the pc and stack will be in the
same segment, because the pc is most likely in a library allocated via a top
down mmap. Right now we bail out early if these segments match.

Rearrange the SLB preload code to sanity check all SLB preload addresses
are not in the kernel, then check all addresses for conflicts.

Signed-off-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

10 years agopowerpc: Move 64bit VDSO to improve context switch performance
Anton Blanchard [Mon, 13 Jul 2009 20:53:51 +0000]
powerpc: Move 64bit VDSO to improve context switch performance

On 64bit applications the VDSO is the only thing in segment 0. Since the VDSO
is position independent we can remove the hint and let get_unmapped_area pick
an area. This will mean the vdso will be near other mmaps and will share
an SLB entry:

10000000-10001000 r-xp 00000000 08:06 5778459        /root/context_switch_64
10010000-10011000 r--p 00000000 08:06 5778459        /root/context_switch_64
10011000-10012000 rw-p 00001000 08:06 5778459        /root/context_switch_64
fffa92ae000-fffa92b0000 rw-p 00000000 00:00 0
fffa92b0000-fffa9453000 r-xp 00000000 08:06 4334051  /lib64/power6/libc-2.9.so
fffa9453000-fffa9462000 ---p 001a3000 08:06 4334051  /lib64/power6/libc-2.9.so
fffa9462000-fffa9466000 r--p 001a2000 08:06 4334051  /lib64/power6/libc-2.9.so
fffa9466000-fffa947c000 rw-p 001a6000 08:06 4334051  /lib64/power6/libc-2.9.so
fffa947c000-fffa9480000 rw-p 00000000 00:00 0
fffa9480000-fffa94a8000 r-xp 00000000 08:06 4333852  /lib64/ld-2.9.so
fffa94b3000-fffa94b4000 rw-p 00000000 00:00 0

fffa94b4000-fffa94b7000 r-xp 00000000 00:00 0        [vdso] <----- here I am

fffa94b7000-fffa94b8000 r--p 00027000 08:06 4333852  /lib64/ld-2.9.so
fffa94b8000-fffa94bb000 rw-p 00028000 08:06 4333852  /lib64/ld-2.9.so
fffa94bb000-fffa94bc000 rw-p 00000000 00:00 0
fffe4c10000-fffe4c25000 rw-p 00000000 00:00 0        [stack]

On a microbenchmark that bounces a token between two 64bit processes over pipes
and calls gettimeofday each iteration (to access the VDSO), our context switch
rate goes from 268k to 277k ctx switches/sec (tested on a 4GHz POWER6).

Signed-off-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

10 years agopowerpc: expose the multi-bit ops that underlie single-bit ops.
Geoff Thorpe [Tue, 7 Jul 2009 15:23:56 +0000]
powerpc: expose the multi-bit ops that underlie single-bit ops.

The bitops.h functions that operate on a single bit in a bitfield are
implemented by operating on the corresponding word location. In all
cases the inner logic is valid if the mask being applied has more than
one bit set, so this patch exposes those inner operations. Indeed,
set_bits() was already available, but it duplicated code from
set_bit() (rather than making the latter a wrapper) - it was also
missing the PPC405_ERR77() workaround and the "volatile" address
qualifier present in other APIs. This corrects that, and exposes the
other multi-bit equivalents.

One advantage of these multi-bit forms is that they allow word-sized
variables to essentially be their own spinlocks, eg. very useful for
state machines where an atomic "flags" variable can obviate the need
for any additional locking.

Signed-off-by: Geoff Thorpe <geoff@geoffthorpe.net>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

10 years agopowerpc/mpic: Fix MPIC_BROKEN_REGREAD on non broken MPICs
Michael Ellerman [Sun, 5 Jul 2009 16:08:52 +0000]
powerpc/mpic: Fix MPIC_BROKEN_REGREAD on non broken MPICs

The workaround enabled by CONFIG_MPIC_BROKEN_REGREAD does not work
on non-broken MPICs. The symptom is no interrupts being received.

The fix is twofold. Firstly the code was broken for multiple isus,
we need to index into the shadow array with the src_no, not the idx.
Secondly, we always do the read, but only use the VECPRI_MASK and
VECPRI_ACTIVITY bits from the hardware, the rest of "val" comes
from the shadow.

Signed-off-by: Michael Ellerman <michael@ellerman.id.au>
Signed-off-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

10 years agopowerpc/amigaone: Convert amigaone_init() to a machine_device_initcall()
Gerhard Pircher [Fri, 19 Jun 2009 11:40:57 +0000]
powerpc/amigaone: Convert amigaone_init() to a machine_device_initcall()

This allows to remove the ppc_md.init() hook in the setup code.

Signed-off-by: Gerhard Pircher <gerhard_pircher@gmx.net>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

10 years agoMerge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jmorris...
Linus Torvalds [Wed, 19 Aug 2009 02:41:47 +0000]
Merge branch 'for-linus' of git://git./linux/kernel/git/jmorris/security-testing-2.6

* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jmorris/security-testing-2.6:
  security: Fix prompt for LSM_MMAP_MIN_ADDR
  security: Make LSM_MMAP_MIN_ADDR default match its help text.

10 years agoMerge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/percpu
Linus Torvalds [Wed, 19 Aug 2009 02:41:05 +0000]
Merge branch 'for-linus' of git://git./linux/kernel/git/tj/percpu

* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/percpu:
  percpu: use the right flag for get_vm_area()
  percpu, sparc64: fix sparse possible cpu map handling
  init: set nr_cpu_ids before setup_per_cpu_areas()

10 years agoMerge branch 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git...
Linus Torvalds [Tue, 18 Aug 2009 23:55:43 +0000]
Merge branch 'x86-fixes-for-linus' of git://git./linux/kernel/git/tip/linux-2.6-tip

* 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
  x86, mce: Don't initialize MCEs on unknown CPUs
  x86, mce: don't log boot MCEs on Pentium M (model == 13) CPUs
  x86: Annotate section mismatch warnings in kernel/apic/x2apic_uv_x.c
  x86, mce: therm_throt: Don't log redundant normality
  x86: Fix UV BAU destination subnode id

10 years agomm: build_zonelists(): move clear node_load[] to __build_all_zonelists()
Bo Liu [Tue, 18 Aug 2009 21:11:19 +0000]
mm: build_zonelists(): move clear node_load[] to __build_all_zonelists()

If node_load[] is cleared everytime build_zonelists() is
called,node_load[] will have no help to find the next node that should
appear in the given node's fallback list.

Because of the bug, zonelist's node_order is not calculated as expected.
This bug affects on big machine, which has asynmetric node distance.

[synmetric NUMA's node distance]
     0    1    2
0   10   12   12
1   12   10   12
2   12   12   10

[asynmetric NUMA's node distance]
     0    1    2
0   10   12   20
1   12   10   14
2   20   14   10

This (my bug) is very old but no one has reported this for a long time.
Maybe because the number of asynmetric NUMA is very small and they use
cpuset for customizing node memory allocation fallback.

[akpm@linux-foundation.org: fix CONFIG_NUMA=n build]
Signed-off-by: Bo Liu <bo-liu@hotmail.com>
Reviewed-by: KAMEZAWA Hiroyuki <kamezawa.hiroyu@jp.fujitsu.com>
Cc: Mel Gorman <mel@csn.ul.ie>
Cc: Christoph Lameter <cl@linux-foundation.org>
Cc: <stable@kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>

10 years agoREPORTING-BUGS: add get_maintainer.pl blurb
Joe Perches [Tue, 18 Aug 2009 21:11:18 +0000]
REPORTING-BUGS: add get_maintainer.pl blurb

Signed-off-by: Joe Perches <joe@perches.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>

10 years agonommu: check fd read permission in validate_mmap_request()
Graff Yang [Tue, 18 Aug 2009 21:11:17 +0000]
nommu: check fd read permission in validate_mmap_request()

According to the POSIX (1003.1-2008), the file descriptor shall have been
opened with read permission, regardless of the protection options specified to
mmap().  The ltp test cases mmap06/07 need this.

Signed-off-by: Graff Yang <graff.yang@gmail.com>
Acked-by: Paul Mundt <lethal@linux-sh.org>
Signed-off-by: David Howells <dhowells@redhat.com>
Acked-by: Greg Ungerer <gerg@snapgear.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>

10 years agospi_s3c24xx: fix transfer setup code
Ben Dooks [Tue, 18 Aug 2009 21:11:17 +0000]
spi_s3c24xx: fix transfer setup code

Since the changes to the bitbang driver, there is the possibility we will
be called with either the speed_hz or bpw values zero.  We take these to
mean that the default values (8 bits per word, or maximum bus speed).

Signed-off-by: Ben Dooks <ben@simtec.co.uk>
Cc: David Brownell <david-b@pacbell.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>

10 years agospi_s3c24xx: fix clock rate calculation
Ben Dooks [Tue, 18 Aug 2009 21:11:16 +0000]
spi_s3c24xx: fix clock rate calculation

Currently the clock rate calculation may round as pleased, which means
that it is possible that we will round down and end up with a faster clock
rate than intended.

Change the calculation to use DIV_ROUND_UP() to ensure that we end up with
a clock rate either the same as or lower than the user requested one.

Signed-off-by: Ben Dooks <ben@simtec.co.uk>
Cc: David Brownell <david-b@pacbell.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>

10 years agommc: add the new linux-mmc mailing list to MAINTAINERS
Andrew Morton [Tue, 18 Aug 2009 21:11:12 +0000]
mmc: add the new linux-mmc mailing list to MAINTAINERS

There are a number of individual MMC drivers listed in MAINTAINERS.  I
didn't modify those records.  Perhaps I should have.

Cc: <linux-mmc@vger.kernel.org>
Cc: Manuel Lauss <manuel.lauss@gmail.com>
Cc: Nicolas Pitre <nico@cam.org>
Cc: Pierre Ossman <drzeus@drzeus.cx>
Cc: Pavel Pisa <ppisa@pikron.com>
Cc: Jarkko Lavinen <jarkko.lavinen@nokia.com>
Cc: Ben Dooks <ben-linux@fluff.org>
Cc: Sascha Sommer <saschasommer@freenet.de>
Cc: Ian Molton <ian@mnementh.co.uk>
Cc: Joseph Chan <JosephChan@via.com.tw>
Cc: Harald Welte <HaraldWelte@viatech.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>

10 years agomm: revert "oom: move oom_adj value"
KOSAKI Motohiro [Tue, 18 Aug 2009 21:11:10 +0000]
mm: revert "oom: move oom_adj value"

The commit 2ff05b2b (oom: move oom_adj value) moveed the oom_adj value to
the mm_struct.  It was a very good first step for sanitize OOM.

However Paul Menage reported the commit makes regression to his job
scheduler.  Current OOM logic can kill OOM_DISABLED process.

Why? His program has the code of similar to the following.

...
set_oom_adj(OOM_DISABLE); /* The job scheduler never killed by oom */
...
if (vfork() == 0) {
set_oom_adj(0); /* Invoked child can be killed */
execve("foo-bar-cmd");
}
....

vfork() parent and child are shared the same mm_struct.  then above
set_oom_adj(0) doesn't only change oom_adj for vfork() child, it's also
change oom_adj for vfork() parent.  Then, vfork() parent (job scheduler)
lost OOM immune and it was killed.

Actually, fork-setting-exec idiom is very frequently used in userland program.
We must not break this assumption.

Then, this patch revert commit 2ff05b2b and related commit.

Reverted commit list
---------------------
- commit 2ff05b2b4e (oom: move oom_adj value from task_struct to mm_struct)
- commit 4d8b9135c3 (oom: avoid unnecessary mm locking and scanning for OOM_DISABLE)
- commit 8123681022 (oom: only oom kill exiting tasks with attached memory)
- commit 933b787b57 (mm: copy over oom_adj value at fork time)

Signed-off-by: KOSAKI Motohiro <kosaki.motohiro@jp.fujitsu.com>
Cc: Paul Menage <menage@google.com>
Cc: David Rientjes <rientjes@google.com>
Cc: KAMEZAWA Hiroyuki <kamezawa.hiroyu@jp.fujitsu.com>
Cc: Rik van Riel <riel@redhat.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Oleg Nesterov <oleg@redhat.com>
Cc: Nick Piggin <npiggin@suse.de>
Cc: Mel Gorman <mel@csn.ul.ie>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>

10 years agovfs: make get_sb_pseudo set s_maxbytes to value that can be cast to signed
Jeff Layton [Tue, 18 Aug 2009 21:11:08 +0000]
vfs: make get_sb_pseudo set s_maxbytes to value that can be cast to signed

get_sb_pseudo sets s_maxbytes to ~0ULL which becomes negative when cast
to a signed value.  Fix it to use MAX_LFS_FILESIZE which casts properly
to a positive signed value.

Signed-off-by: Jeff Layton <jlayton@redhat.com>
Reviewed-by: Johannes Weiner <hannes@cmpxchg.org>
Acked-by: Steve French <smfrench@gmail.com>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Cc: Al Viro <viro@zeniv.linux.org.uk>
Cc: Robert Love <rlove@google.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>

10 years agoMAINTAINERS: OSD LIBRARY and FILESYSTEM pattern fix
Joe Perches [Tue, 18 Aug 2009 21:11:06 +0000]
MAINTAINERS: OSD LIBRARY and FILESYSTEM pattern fix

Signed-off-by: Joe Perches <joe@perches.com>
Acked-by: Benny Halevy <bhalevy@panasas.com>
Cc: Boaz Harrosh <bharrosh@panasas.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>

10 years agosecurity: Fix prompt for LSM_MMAP_MIN_ADDR
Andreas Schwab [Tue, 18 Aug 2009 20:14:29 +0000]
security: Fix prompt for LSM_MMAP_MIN_ADDR

Fix prompt for LSM_MMAP_MIN_ADDR.

(Verbs are cool!)

Signed-off-by: Andreas Schwab <schwab@linux-m68k.org>
Acked-by: Eric Paris <eparis@redhat.com>
Signed-off-by: James Morris <jmorris@namei.org>

10 years agosecurity: Make LSM_MMAP_MIN_ADDR default match its help text.
Dave Jones [Tue, 18 Aug 2009 17:47:37 +0000]
security: Make LSM_MMAP_MIN_ADDR default match its help text.

Commit 788084aba2ab7348257597496befcbccabdc98a3 added the LSM_MMAP_MIN_ADDR
option, whose help text states "For most ia64, ppc64 and x86 users with lots
of address space a value of 65536 is reasonable and should cause no problems."
Which implies that it's default setting was typoed.

Signed-off-by: Dave Jones <davej@redhat.com>
Acked-by: Eric Paris <eparis@redhat.com>
Signed-off-by: James Morris <jmorris@namei.org>