6 years agoMerge commit 'main-jb-2012.08.03-B4' into t114-0806
Pradeep Kumar [Mon, 6 Aug 2012 17:31:18 +0000]
Merge commit 'main-jb-2012.08.03-B4' into t114-0806

Conflicts:
arch/arm/boot/compressed/Makefile
arch/arm/boot/compressed/atags_to_fdt.c
arch/arm/boot/compressed/head.S
arch/arm/boot/dts/tegra30.dtsi
arch/arm/include/asm/bug.h
arch/arm/kernel/traps.c
arch/arm/mach-tegra/Makefile.boot
arch/arm/mach-tegra/board-cardhu-sdhci.c
arch/arm/mach-tegra/board-cardhu.c
arch/arm/mach-tegra/board-enterprise-sdhci.c
arch/arm/mach-tegra/board-enterprise.c
arch/arm/mach-tegra/board-harmony.c
arch/arm/mach-tegra/board-kai-sdhci.c
arch/arm/mach-tegra/board-ventana.c
arch/arm/mach-tegra/board-whistler.c
arch/arm/mach-tegra/clock.h
arch/arm/mach-tegra/fuse.h
arch/arm/mach-tegra/tegra2_usb_phy.c
arch/arm/mach-tegra/tegra3_clocks.c
arch/arm/mach-tegra/tegra3_dvfs.c
arch/arm/mach-tegra/tegra3_speedo.c
arch/arm/mach-tegra/timer.c
arch/arm/mach-tegra/usb_phy.c
arch/arm/mach-tegra/wakeups-t3.c
drivers/cpufreq/cpufreq_interactive.c
drivers/input/touchscreen/atmel_mxt_ts.c
drivers/mfd/tps65090.c
drivers/mmc/core/mmc.c
drivers/mmc/host/sdhci-tegra.c
drivers/mmc/host/sdhci.c
drivers/net/wireless/bcmdhd/bcmsdh_sdmmc_linux.c
drivers/regulator/Kconfig
drivers/regulator/core.c
drivers/regulator/tps80031-regulator.c
drivers/spi/Makefile
drivers/staging/nvec/nvec.c
drivers/tty/serial/Makefile
include/linux/mmc/card.h
sound/soc/tegra/tegra_max98095.c
sound/usb/card.c

Change-Id: I65043bc6ce9e97d0592683462215a39e50f403fd
Reviewed-on: http://git-master/r/121392
Reviewed-by: Bo Yan <byan@nvidia.com>
Tested-by: Bo Yan <byan@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User

6 years agoARM: tegra: soctherm: Create soctherm driver
Joshua Primero [Mon, 23 Jul 2012 19:30:58 +0000]
ARM: tegra: soctherm: Create soctherm driver

Created initial soctherm drivers. Initialized soctherm
registers.

Change-Id: Ie32c4635c0fb9495a4e1c599fbbcf4cfb43b506b
Signed-off-by: Joshua Primero <jprimero@nvidia.com>
Reviewed-on: http://git-master/r/120545
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

6 years agoARM: tegra11: clock: Re-arrange shared bus update
Alex Frid [Thu, 2 Aug 2012 00:16:51 +0000]
ARM: tegra11: clock: Re-arrange shared bus update

Separated emc and sclk shared bus update in preparation for emc
update policy implementation. For now these functions are still
identical.

Given that cbus update was already separated, all tegra11 shared
buses have their own update procedures. However, the target rate
calculation can be extracted into common function - re-arranged
the code accordingly.

Change-Id: Idd602244cf4acaa870ce682cb673fc9c300f333c
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/120265
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

6 years agoARM: tegra11: clock: Clip aggregated shared bus BW
Alex Frid [Wed, 1 Aug 2012 19:39:00 +0000]
ARM: tegra11: clock: Clip aggregated shared bus BW

Clip aggregated shared bus BW to bus maximum rate.

Change-Id: I9193a3f2fb526f66a008cecc24b002d92ef5a877
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/120264
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

6 years agoARM: tegra11: clock: Apply shared bus ceiling always
Alex Frid [Wed, 1 Aug 2012 19:23:06 +0000]
ARM: tegra11: clock: Apply shared bus ceiling always

Apply shared bus ceiling regardless of whether Tegra11 SHARED_CEILING
user is enabled or disabled. Thus, we no longer need to enable ceiling
user - and the bus itself via child-parent relations - to cap the bus
rate.

Change-Id: I27839eea414c17317037265d05475a2a60254a34
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/120263
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

6 years agoARM: tegra11: clock: Update EMC clock mux
Alex Frid [Wed, 1 Aug 2012 05:22:55 +0000]
ARM: tegra11: clock: Update EMC clock mux

Updated EMC clock mux to include PLLC and low jitter PLLM inputs.

Change-Id: I3047726737ddc2390bdbfdf9adf7bb419235a7b7
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/120262
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

6 years agoarch: arm: config: Update minimal linux config
Krishna Monian [Fri, 6 Jul 2012 20:00:23 +0000]
arch: arm: config: Update minimal linux config

Add support to build USB driver as a module

Change-Id: I1c5e39f3d87bed6299b5790f6194f6a9ff7de058
Reviewed-on: http://git-master/r/115072
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Monian <kmonian@nvidia.com>
Tested-by: Krishna Monian <kmonian@nvidia.com>
Reviewed-by: Bo Yan <byan@nvidia.com>

6 years agoARM: Tegra: Enterprise: Add KEY_POWER as the wakeup key
Varun Wadekar [Fri, 3 Aug 2012 06:43:13 +0000]
ARM: Tegra: Enterprise: Add KEY_POWER as the wakeup key

Bug 1021087
Bug 1018514

Change-Id: I93fb3922afad941143c988f148e06e9e2ca82350
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/120822
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Pritesh Raithatha <praithatha@nvidia.com>

6 years agoARM: SMP: Don't double print secondary boot message
Alex Frid [Thu, 2 Aug 2012 20:32:49 +0000]
ARM: SMP: Don't double print secondary boot message

Removed double-printing of secondary boot message (merge artifact).

Change-Id: I82875305b1e00d1bba86e6b293d6ccb000525652
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/120458
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

6 years agoARM: tegra30: clock: Update common clock table
Alex Frid [Thu, 2 Aug 2012 20:10:32 +0000]
ARM: tegra30: clock: Update common clock table

Updated Tegra30 common clock initialization table to fix merge
artifacts and align with main code base.

Change-Id: Idd7f23501c0a0e654d6a03cbb657be44d0351853
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/120452
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

6 years agoARM: Tegra: Correct DAM clock names
Rahul Mittal [Thu, 2 Aug 2012 16:27:36 +0000]
ARM: Tegra: Correct DAM clock names

Correcting DAM clock names in clock tree

Change-Id: Ib00f0c8013005f69854493cc9cf13f7828fdb8bf
Signed-off-by: Rahul Mittal <rmittal@nvidia.com>
Reviewed-on: http://git-master/r/120395
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

6 years agoiommu/tegra: smmu: Fix statistics debugfs format
Hiroshi Doyu [Thu, 2 Aug 2012 08:38:17 +0000]
iommu/tegra: smmu: Fix statistics debugfs format

Fix the format along with IOVMM.

Change-Id: I1d26dccd5eeb6ecbcf10d426f8e140e2ad2f79ea
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/120314
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

6 years agoARM: tegra: smmu: Fix statistics debugfs format
Hiroshi Doyu [Thu, 2 Aug 2012 08:25:38 +0000]
ARM: tegra: smmu: Fix statistics debugfs format

Fix the format along with IOMMU.

Change-Id: Ifec2ed28fd60c376bc47fc55c08c219a4ec67021
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/120313
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

6 years agoRevert "Revert "media: video: tegra: sh532u: Focuser range tuning support""
Krupal Divvela [Thu, 2 Aug 2012 07:13:50 +0000]
Revert "Revert "media: video: tegra: sh532u: Focuser range tuning support""

Make focuser structs definitions same as
user space definitions

This reverts commit ca4bc41e88cf643169ccc4b10a6f130761f171da.

Bug 1027053
Bug 1026282

Change-Id: I91d0a0f5786a573efaa30ee0c55d65692001f37e
Signed-off-by: Krupal Divvela <kdivvela@nvidia.com>
Reviewed-on: http://git-master/r/120297
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Prayas Mohanty <pmohanty@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>

6 years agoregulator: palmas: Fix compilation failures
Mallikarjun Kasoju [Wed, 1 Aug 2012 15:11:19 +0000]
regulator: palmas: Fix compilation failures

Fix palmas regulator compilation failures.

Change-Id: I6f4596efde05f5318d865690e772cfe2e05d5ce0
Signed-off-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Reviewed-on: http://git-master/r/120064
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

6 years agoregulator: regulator for Palmas Kconfig
Mallikarjun Kasoju [Wed, 1 Aug 2012 06:54:32 +0000]
regulator: regulator for Palmas Kconfig

Add the Kconfig/Makefile stuff for the palmas regulator driver

Signed-off-by: Graeme Gregory <gg@slimlogic.co.uk>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit 4c5dabce4ee9412b320a83ab98850aa5834451bc)

Conflicts:

drivers/regulator/Kconfig

Change-Id: Ia1ccf846205c163fb1d183eac127db662b1c8bc3
Signed-off-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Reviewed-on: http://git-master/r/120063
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

6 years agoregulator: regulator driver for Palmas series chips
Graeme Gregory [Fri, 18 May 2012 15:53:57 +0000]
regulator: regulator driver for Palmas series chips

Palmas has both Switched Mode (SMPS) and Linear (LDO) regulators in it.
This regulator driver allows software control of these regulators.

The regulators available on Palmas series chips vary depending on the muxing.
This is handled automatically in the driver by reading the mux info from OTP.

Signed-off-by: Graeme Gregory <gg@slimlogic.co.uk>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit e5ce4208f111e5b6ae22df334750324711c28320)

Change-Id: I87a8bbcebbc76da641a7cccdccb899c3548f1151
Signed-off-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Reviewed-on: http://git-master/r/120062
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

6 years agommc: tegra: Fix Tegra architecture conditionals
naveenk [Wed, 1 Aug 2012 11:41:09 +0000]
mmc: tegra: Fix Tegra architecture conditionals

To avoid warning: tegra_sdhci_get_ro' defined but not used
use chip specific defination

Bug 837103

Change-Id: I7f371f34869f0d635f13445ee80001785c745bce
Reviewed-on: http://git-master/r/120025
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

6 years agovideo: tegra: nvmap: Add support PLATFORM_IOMMUABLE
Hiroshi DOYU [Mon, 19 Mar 2012 09:53:49 +0000]
video: tegra: nvmap: Add support PLATFORM_IOMMUABLE

nvmap supports both w/ PLATFORM_IOMMUABLE and w/o PLATFORM_IOMMUABLE.

Change-Id: Icc0b4025ef067787a3ea449a17d53e714d3ef607
Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/120019
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

6 years agoARM: tegra: smmu: Add TEGRA_IOMMU_SMMU along with TEGRA_IOVMM_SMMU
Hiroshi Doyu [Wed, 1 Aug 2012 07:26:41 +0000]
ARM: tegra: smmu: Add TEGRA_IOMMU_SMMU along with TEGRA_IOVMM_SMMU

To migrate from IOVMM to IOMMU.

Change-Id: I693959384050002e81386aee0edad7d48b3613b1
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/120018
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

6 years agoARM: tegra: curacao: Add TEGRA_IOMMU_SMMU along with TEGRA_IOVMM_SMMU
Hiroshi DOYU [Tue, 17 Jul 2012 07:05:20 +0000]
ARM: tegra: curacao: Add TEGRA_IOMMU_SMMU along with TEGRA_IOVMM_SMMU

Add missing one to migrate from IOVMM to IOMMU.

Change-Id: I7741affa1dd435fae937232596d59f7402a28fb6
Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/120017
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

6 years agoiommu/tegra: smmu: Fix build error because of rebase
Hiroshi DOYU [Tue, 17 Jul 2012 07:04:21 +0000]
iommu/tegra: smmu: Fix build error because of rebase

Fix build error because of rebase.

Change-Id: Ie6cfbf3367287057a94bae0252b23caad6035193
Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/120016
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

6 years agoiommu/tegra: smmu: new API to map linear IOVA
Hiroshi DOYU [Mon, 26 Mar 2012 10:26:15 +0000]
iommu/tegra: smmu: new API to map linear IOVA

For the case w/o CONFIG_TEGRA_IOMMU_SMMU_LINEAR.

REVISIT: This API should be replaced with a new DMA API,
"dma_map_linear_at()" later.

Change-Id: I6f545bdf1c6485a98a96c02d22bf7997c449ee5d
Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/120014
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

6 years agoiommu/tegra: smmu: Fix error initial value at domain_init
Hiroshi Doyu [Mon, 30 Jul 2012 05:39:19 +0000]
iommu/tegra: smmu: Fix error initial value at domain_init

err initial value should be -EAGAIN. Otherwise 2nd iteration always
fails in the case as[0] is occupied.

[Hiroshi Doyu: Backport from the upstream.]

Change-Id: I2d5c3dd4d7107c227634abe5727bcc935b35cfeb
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/120013
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

6 years agoiommu/tegra: smmu: Cleanup with lesser nest
Hiroshi Doyu [Mon, 30 Jul 2012 05:39:18 +0000]
iommu/tegra: smmu: Cleanup with lesser nest

Small clean up with lesser nest for readability.

[Hiroshi Doyu: Backport from the upstream.]

Change-Id: Ic23fc103a301b564f36544a03d5f5a6078543675
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/120012
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

6 years agoiommu/tegra: smmu: Don't call alloc_pdir with as->lock
Joerg Roedel [Tue, 17 Jul 2012 09:47:14 +0000]
iommu/tegra: smmu: Don't call alloc_pdir with as->lock

Instead of taking as->lock before calling alloc_pdir() and
releasing it in that function to allocate memory, just take
the lock only in the alloc_pdir function and run the loop
without any lock held. This simplifies the complicated
lock->unlock->alloc->lock->unlock sequence into
alloc->lock->unlock.

[Hiroshi Doyu: Backport from the upstream.]

Change-Id: I2894761f7476a1a1aaaad0220edd3b030e7d510e
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/120011
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

6 years agoiommu/tegra: smmu: Fix unsleepable memory allocation at alloc_pdir()
Hiroshi Doyu [Mon, 2 Jul 2012 01:26:38 +0000]
iommu/tegra: smmu: Fix unsleepable memory allocation at alloc_pdir()

alloc_pdir() is called from smmu_iommu_domain_init() with spin_lock
held. memory allocations in alloc_pdir() had to be atomic. Instead of
converting into atomic allocation, this patch once releases a lock,
does the allocation, holds the lock again and then sees if it's raced
or not in order to avoid introducing mutex and preallocation.

[Hiroshi Doyu: Backport from the upstream.]

Change-Id: I0ff4ced51bb09cd9d706d2acdfbfc96feafcb1e9
Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com>
Reported-by: Chris Wright <chrisw@sous-sol.org>
Cc: Chris Wright <chrisw@sous-sol.org>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Reviewed-on: http://git-master/r/120010
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

6 years agoiommu/tegra: smmu: Remove unnecessary sanity check at alloc_pdir()
Hiroshi Doyu [Mon, 2 Jul 2012 01:26:37 +0000]
iommu/tegra: smmu: Remove unnecessary sanity check at alloc_pdir()

alloc_pdir() is called with smmu->as[?].pdir_page == NULL. No need to
check pdir_page again inside alloc_pdir().

[Hiroshi Doyu: Backport from the upstream.]

Change-Id: I69da0c91efae892ca2bfd202dd25c3bf09884ca9
Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Reviewed-on: http://git-master/r/120009
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

6 years agoARM: tegra11: clock: Add internal LA clock initialization
Alex Frid [Sat, 28 Jul 2012 06:04:06 +0000]
ARM: tegra11: clock: Add internal LA clock initialization

Enabled clocks used by internal LA (LA, DDS, DP2 and HDMI) if
requested by settings in MISC_GP_TRANSACTOR_SCRATCH_0 register.

Bug 1001015

Change-Id: I5c0e42e3d1ac0e94849fa4cc4b50e3b80515bb38
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/119176
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bo Yan <byan@nvidia.com>

6 years agoBluetooth: prevent multiple l2cap_sock_kill function calls
Nagarjuna Kristam [Wed, 25 Jul 2012 12:12:19 +0000]
Bluetooth: prevent multiple l2cap_sock_kill function calls

Remove SOCK_DEAD check inside l2cap_sock_kill, as this prevents cleanup of
l2cap sockets when bluetooth is turned off from UI
Instead of SOCK_DEAD check inside l2cap_sock_kill, add SOCK_DEAD check
inside l2cap_sock_close_cb to prevent multiple l2cap_sock_kill function calls.
This check avoids kernel panic, when l2cap_sock_close_cb function is called with
same socket multiple times.

Bug 1018499

Change-Id: I77388ffb1407138646feb9fbea467ca12e4a0855
Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-on: http://git-master/r/118321
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Rakesh Kumar <krakesh@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>

6 years agobluesleep: destroy wake lock when probe function failed
Kerwin Wan [Wed, 1 Aug 2012 04:31:16 +0000]
bluesleep: destroy wake lock when probe function failed

bug 1024242

Change-Id: Ifc87514d9824ae3deba3503e57421fadf995e4dc
Signed-off-by: Kerwin Wan <kerwinw@nvidia.com>
Reviewed-on: http://git-master/r/119873
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>

6 years agoarm: tegra11x: usb_phy: Add HSIC changes from main
Venu Byravarasu [Mon, 30 Jul 2012 11:49:28 +0000]
arm: tegra11x: usb_phy: Add HSIC changes from main

Pulling in multiple changes of HSIC from main into t114.

Change-Id: Icad74fa6477fbc8d29463e52858483915d5a4a8f
Signed-off-by: Venu Byravarasu <vbyravarasu@nvidia.com>
Reviewed-on: http://git-master/r/118303
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agousb: Add support for building USB driver as a module
Krishna Monian [Thu, 12 Jul 2012 14:29:04 +0000]
usb: Add support for building USB driver as a module

- Export required symbols for USB driver support as a module
- Remove call to set_irq_flags since this is not exported to modules

Change-Id: Ibe40d1ac8636bd1a3ba1d06dee57d9928cbb8a4c
Reviewed-on: http://git-master/r/115423
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agoasoc: tegra: SMMU buffers support
Vijay Mali [Tue, 24 Apr 2012 13:30:08 +0000]
asoc: tegra: SMMU buffers support

Use SMMU buffers for audio playback and record.

For bug 886681

Change-Id: I7bdfc07c01df3ee744fa4ff9f2ff892320035e6e
Signed-off-by: Vijay Mali <vmali@nvidia.com>
Reviewed-on: http://git-master/r/120070
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Scott Peterson <speterson@nvidia.com>
Reviewed-by: Rahul Mittal <rmittal@nvidia.com>

6 years agogpio: palmas: fix compilation failures
Pradeep Kumar [Wed, 1 Aug 2012 10:35:51 +0000]
gpio: palmas: fix compilation failures

Update palmas gpio support driver as per updated palmas core.

Bug 978821

Change-Id: If4b4a297db2acaa36f9b4184137ac5f73d6dd7f2
Reviewed-on: http://git-master/r/119989
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Pradeep Goudagunta <pgoudagunta@nvidia.com>

6 years agoGPIO: Add Palmas GPIO support
Graeme Gregory [Fri, 21 Oct 2011 14:10:43 +0000]
GPIO: Add Palmas GPIO support

Palmas has a maximum of 8 GPIO available but depending on the package and
OTP programming of the chip they may not all be exposed to pins on the
chip

Signed-off-by: Graeme Gregory <gg@slimlogic.co.uk>
(cherry picked from commit 0f9c01bcec3f032de5bf04213ee7055b068e5d06)

Bug 978821

Change-Id: Ic4bb7f6762535fd77e4b0b507dbc6873270ed33b
Reviewed-on: http://git-master/r/119988
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Pradeep Goudagunta <pgoudagunta@nvidia.com>

6 years agoARM: tegra: curacao: Add Audio Devices
Vijay Mali [Wed, 1 Aug 2012 07:34:52 +0000]
ARM: tegra: curacao: Add Audio Devices

Register audio devices for i2s, WM8903
Add platform data for these devices
Update kernel config for WM8903

Change-Id: I8165088df38ea228da96dc02998c841e52c4d804
Signed-off-by: Vijay Mali <vmali@nvidia.com>
Reviewed-on: http://git-master/r/119920
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agommc: tegra: Fix build break
Bo Yan [Tue, 31 Jul 2012 18:03:18 +0000]
mmc: tegra: Fix build break

Fix build break due to misplaced conditional compilation macros

Change-Id: I1ed554a25a9123c94d85c08371a77350292b58e5
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/119725
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Naveen Kumar Arepalli <naveenk@nvidia.com>

6 years agoarm: tegra: power: Add debugfs entry for CPU regulator limit
Daniel Solomon [Tue, 24 Jul 2012 22:02:03 +0000]
arm: tegra: power: Add debugfs entry for CPU regulator limit

Add a debugfs node to override VDD_CPU regulator current limit
at /d/edp_reg_override. Values written to this node will be
subtracted from the regulator's current limit; EDP table will
be recalculated accodingly.

Change-Id: I523fa73bf5a8fa806477f4884e920b5866417cf3
Signed-off-by: Daniel Solomon <daniels@nvidia.com>
Reviewed-on: http://git-master/r/118815
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agoARM: tegra: always set dev->power_specified
Peter De Schrijver [Mon, 23 Jul 2012 12:50:07 +0000]
ARM: tegra: always set dev->power_specified

We specify power_usage for LP3 as well. Hence this flag needs always to be set
even when CONFIG_PM is not enabled.

Change-Id: If4a0b99b2d00b8607b0fd87848f6b17fd934d1c7
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Reviewed-on: http://git-master/r/118026
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agoARM: tegra: remove unneeded calls to local_irq_disable
Peter De Schrijver [Mon, 23 Jul 2012 15:45:06 +0000]
ARM: tegra: remove unneeded calls to local_irq_disable

cpu_idle() in arch/arm/kernel/process.c already calls local_irq_disable. No
need to do that in our own code. We do have to call local_irq_enable however,
because we can't use the common cpuidle timekeeping code as we want to keep
separate stats for the LP cluster.

Change-Id: I95c0ca2168f10204f4de435d4290014445c729c1
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Reviewed-on: http://git-master/r/117693
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agoARM: tegra: remove trace_power_start calls
Peter De Schrijver [Mon, 23 Jul 2012 14:03:38 +0000]
ARM: tegra: remove trace_power_start calls

These calls are now done by the cpuidle framework in cpuidle_idle_call(). They
would also need to be replaced by trace_power_start_rcuidle because otherwise
the rcu_read_lock()s that protect the tracepoint will not be honored.

Change-Id: I7115fc4e69a499ed9a056cbd13bfe9e19892ceba
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Reviewed-on: http://git-master/r/117692
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agomedia: video: fix sectionmismatch for ar0832_remove_debugfs
Peter De Schrijver [Thu, 19 Jul 2012 12:46:21 +0000]
media: video: fix sectionmismatch for ar0832_remove_debugfs

ar0832_remove_debugfs is also called from ar0832_create_debugfs, hence it can
not be in the __devexit section.

Change-Id: Id50fea4bfeee8df50b57f93a7b752c35136ce17c
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Reviewed-on: http://git-master/r/117054
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agoARM: tegra: fix section mismatch for get_core_count
Peter De Schrijver [Thu, 19 Jul 2012 12:44:05 +0000]
ARM: tegra: fix section mismatch for get_core_count

get_core_count calls scu_get_core_count which is part of the __init section.
Hence we can only call this from another function inside this section.
Refactor the code to initialize number_of_cores at boottime in an __init
function.

Change-Id: I200a6ea297a8abe1a3b3fbdd050de5917875d7bc
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Reviewed-on: http://git-master/r/117053
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agoARM: tegra: fix section mismatches
Peter De Schrijver [Thu, 19 Jul 2012 12:33:26 +0000]
ARM: tegra: fix section mismatches

tegra_auto_hotplug_work_func references cpu_up and cpu_down which are part of
the __cpuinit section. Also tegra_auto_hotplug_init should be part of it
because it references tegra_auto_hotplug_work_func. These functions are only
useful if hotplug is enabled, hence there is no problem putting them in the
__cpuinit section.

Change-Id: I770f9f5c10b7e7dd890eed5b611778d78d151f22
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Reviewed-on: http://git-master/r/117050
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agoARM: fix sectionmismatch for soc_smp_ops
Peter De Schrijver [Thu, 19 Jul 2012 12:29:10 +0000]
ARM: fix sectionmismatch for soc_smp_ops

soc_smp_ops is indirectly referenced by handle_IPI, hence it can not be part of
the __cpuinit section.

Change-Id: Id6d4fedf861a6edc4c1f73155c49738cad1eb126
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Reviewed-on: http://git-master/r/117049
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agoARM: tegra: fix section mismatch in pinmux
Peter De Schrijver [Thu, 19 Jul 2012 12:38:53 +0000]
ARM: tegra: fix section mismatch in pinmux

tegra_pinmux_id references tegra20_pinmux_init, tegra30_pinmux_init and
tegra11x_pinmux_init, which are in the __devinit section. Hence
tegra_pinmux_id must be in the corresponding data section.

Change-Id: I30c78b5528ed5c77897755020076f099452493ec
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Reviewed-on: http://git-master/r/117052
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

6 years agoARM: tegra: fix section mismatch for tegra_resume
Peter De Schrijver [Thu, 19 Jul 2012 12:37:17 +0000]
ARM: tegra: fix section mismatch for tegra_resume

tegra_resume is referenced by tegra_pm_set which is not part of the __cpuinit
section. Hence tegra_resume can't be in that section either.

Change-Id: I05888a58706a867767aaf247c5abd705415dee3d
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Reviewed-on: http://git-master/r/117051
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

6 years agoarm: tegra: power: Add dynamic CPU EDP mechanism
Daniel Solomon [Tue, 24 Jul 2012 19:09:03 +0000]
arm: tegra: power: Add dynamic CPU EDP mechanism

Add dynamic VDD_CPU EDP. This mechanism calculates EDP frequency
caps based on dynamic power, leakage power, and CPU regulator
current limit.

The formula for this uses temperature, number of cores, and CPU
IDDQ as input. It relies on sets of pre-calculated constants, which
vary per SKU.

This mechanism complements the existing EDP mechanism. At bootup,
chip SKU is read: If a corresponding hardcoded EDP table is found,
this table is used; otherwise, an EDP table is calculated.

Note that the EDP formula used is subject to change, and final sets
of pre-calculated constants still need to be added for each SKU.

Change-Id: I5fb22c6a3da0f0adff21dcdf4950275002927e88
Signed-off-by: Daniel Solomon <daniels@nvidia.com>
Reviewed-on: http://git-master/r/116120
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

6 years agoARM: tegra: fuse: add function to read chip IDDQ
Daniel Solomon [Wed, 11 Jul 2012 02:13:58 +0000]
ARM: tegra: fuse: add function to read chip IDDQ

Add a function to read the fuse IDDQ register on T3x.

Change-Id: I41fc3a1144f86793e88aa4680b01b61e6c705342
Signed-off-by: Daniel Solomon <daniels@nvidia.com>
Reviewed-on: http://git-master/r/116119
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

6 years agopm: EDP: loan handling
Sivaram Nair [Thu, 12 Jul 2012 07:06:58 +0000]
pm: EDP: loan handling

Added EDP loan APIs and single-borrower implementation.

Change-Id: Ib4c3777d7173d16d5d002fd28e8f74f1b6add239
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-on: http://git-master/r/115713
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
Reviewed-by: Peter De Schrijver <pdeschrijver@nvidia.com>

6 years agoarm: tegra: power: Refactor VDD_CPU EDP init
Daniel Solomon [Tue, 24 Jul 2012 18:57:42 +0000]
arm: tegra: power: Refactor VDD_CPU EDP init

Refactor VDD_CPU EDP initialization in preparation for addition of
dynamic VDD_CPU EDP.

Change-Id: Id79c6d6835fd0a940f0bc911023ed9d5d846848c
Signed-off-by: Daniel Solomon <daniels@nvidia.com>
Reviewed-on: http://git-master/r/118372
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

6 years agoARM: tegra: tegra2 wakeups header cleanup
Bitan Biswas [Thu, 28 Jun 2012 07:28:41 +0000]
ARM: tegra: tegra2 wakeups header cleanup

Removed the unnecessary function prototypes in Tegra2 wakeups header

Change-Id: Ia41ce72947902cbc483cc85eaefb3a81d091a9b8
Signed-off-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-on: http://git-master/r/111817
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/119644
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

6 years agoARM: tegra: wake source interrupts enabled
Bitan Biswas [Fri, 13 Jul 2012 10:33:17 +0000]
ARM: tegra: wake source interrupts enabled

Tegra wake source interrupts are only enabled before suspend

bug 904746

Change-Id: Ie9722199b4541f2bac77e47d0c8c7e65d5d8b54d
Signed-off-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-on: http://git-master/r/115655
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/119643
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

6 years agogpio: tegra: disable non-wake source interrupts
Bitan Biswas [Fri, 13 Jul 2012 10:29:37 +0000]
gpio: tegra: disable non-wake source interrupts

Gpio interrupts for non-wake sources are disabled before suspend

bug 904746

Change-Id: I21f3e5798055cbae7324b1571291eab4538e256f
Signed-off-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-on: http://git-master/r/115654
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-on: http://git-master/r/119642
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

6 years agoARM: tegra: support multiple wake sources with same irq
Varun Wadekar [Tue, 31 Jul 2012 10:57:34 +0000]
ARM: tegra: support multiple wake sources with same irq

Partial port of commit 48651d264bdb2ff90624e965b8a68b011077ca7c
(http://git-master/r/103140).

Earlier implementation only allowed single wake source
for a particular irq in wake table. Changed implementation
to support multiple wake sources ==> single irq mapping.

Test: Cardhu boots up fine and can pass 100 suspend-resume
cycles.

Change-Id: I3345181d1e9a084e8b745234c4ffb11df5c68ff3
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/119641
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

6 years agoARM: tegra: cardhu: disable VBUS wake
Bitan Biswas [Tue, 29 May 2012 16:50:49 +0000]
ARM: tegra: cardhu: disable VBUS wake

Disabled USB1 VBUS wake up on board revisions prior to E1291-A03 and
E1198-A02. We see repeated LP0 wakeups if the wake source is enabled.

bug 980993

Change-Id: I080696924aaea06f973392fe7682fecc7574bf02
Signed-off-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-on: http://git-master/r/103627
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Reviewed-on: http://git-master/r/119640
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

6 years agoARM: Tegra: add support to disable wakeup source
Varun Wadekar [Tue, 31 Jul 2012 10:13:47 +0000]
ARM: Tegra: add support to disable wakeup source

Original commit: http://git-master/r/103140

Change-Id: Id214fd9bdc1e05de6544db75e75f77535912a403
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/119639
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

6 years agousb: otg: tegra: wake enabled
Bitan Biswas [Tue, 29 May 2012 16:51:55 +0000]
usb: otg: tegra: wake enabled

Wake sources usb VBUS or ID detect enabled

bug 980993
bug 936982

Change-Id: Iea36d308c1a118abdb7815212d749bd058d0054f
Signed-off-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-on: http://git-master/r/103141
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Rakesh Bodla <rbodla@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/119638
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

6 years agoARM: tegra11: clock: Fix cbus round rate
Alex Frid [Mon, 30 Jul 2012 23:27:40 +0000]
ARM: tegra11: clock: Fix cbus round rate

In case when cbus does not have DVFS table to figure out minimum
rate, use parent (PLLC2 or PLLC3) minimum rate as bus lower limit.

Change-Id: Ia0c578252d4376f0a669b8dfc3065ceedc54957c
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/119419
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

6 years agoARM: tegra11: clock: Change device id for CL-DVFS clocks
Alex Frid [Mon, 30 Jul 2012 20:42:42 +0000]
ARM: tegra11: clock: Change device id for CL-DVFS clocks

Changed device id for CL-DVFS clocks to "dfll_cpu", since CL-DVFS is
integrated to clock tree as a locking h/w for cpu clock producer dfll.
Also replaced BUG_ON() with WARN() when those clocks are not found.

Bug 871124

Change-Id: I77254f34800e4c4729bf3d2b03ed5ba30f47abf0
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/119398
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

6 years agoARM: tegra11: clock: Update clock tree definitions
Alex Frid [Sat, 28 Jul 2012 03:20:22 +0000]
ARM: tegra11: clock: Update clock tree definitions

- Added DDS, and DP2 clocks
- Removed CML0 and CML1 clocks (do not exist on Tegra11)
- Updated comments on DFLL operations and parent selection policies

Change-Id: Iaadcfb71539102e27bacc66323a79c4e5c035726
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/119175
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

6 years agoARM: tegra: dvfs: Re-arrange dvfs late initialization
Alex Frid [Fri, 27 Jul 2012 04:40:24 +0000]
ARM: tegra: dvfs: Re-arrange dvfs late initialization

Re-arrange tegra clocks and dvfs late initialization to enforce the
following order:

- All boot clocks enabled by the boot-loader, but not set by the
drivers must be disabled before dvfs is connected to the regulators
- CPU DFLL can be initialized only after successful dvfs connection
to the regulators is established
- CPU clock sources should be aligned with kernel policies after
attempt to initialize DFLL
- CPU rate increase is not allowed until dvfs is connected to
regulators (on Tegra11 any rate change was not allowed - the policy
is relaxed now, and rate decrease is supported similarly to Tegra30)

Bug 871124

Change-Id: Ic26059327f8939bb5c082931cb7bb1203f67aa42
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/119137
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

6 years agoiommu/tegra: smmu: Introduce TEGRA_IOMMU_SMMU_LINEAR
Hiroshi DOYU [Thu, 15 Mar 2012 10:10:17 +0000]
iommu/tegra: smmu: Introduce TEGRA_IOMMU_SMMU_LINEAR

IOVA liner mapping for RAM can be removed with this config
disabled. This CONFIG_TEGRA_IOMMU_SMMU_LINEAR will be removed
eventually. All IOMMU'able drivers should support DMA API correctly
during transition period. phys_to_virt() won't be used with IOMMU'able
H/W.

Change-Id: I0d6f86cf9974a3d2e9ef1c5286461f2ea2cd1918
Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/118708
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

6 years agoiommu/tegra: smmu: Use tegra_smmu_window() to get iova range
Hiroshi DOYU [Fri, 13 Jul 2012 16:42:22 +0000]
iommu/tegra: smmu: Use tegra_smmu_window() to get iova range

*HACK*
To adjust legacy name internally to support IOMMU and IOVMM at once.

Change-Id: I765530328e6dda4b3a6fad05e2e55327e29ba5ca
Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/118707
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

6 years agoiommu/tegra: smmu: rename "tegra-smmu" to "tegra_smmu"
Hiroshi DOYU [Fri, 13 Jul 2012 16:16:23 +0000]
iommu/tegra: smmu: rename "tegra-smmu" to "tegra_smmu"

*HACK*
To adjust legacy name internally to support IOMMU and IOVMM at once.

Change-Id: If216611c683d014514bbd3914ab8a9d098d9c618
Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/118706
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

6 years agoiommu/tegra: gart: Rename "tegra-gart" to "tegra_gart"
Hiroshi DOYU [Fri, 13 Jul 2012 16:16:41 +0000]
iommu/tegra: gart: Rename "tegra-gart" to "tegra_gart"

*HACK*
To adjust legacy name internally to support IOMMU and IOVMM at once.

Change-Id: I816495f2cadbcc7759d0b5533415d90778d4e717
Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/118705
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

6 years agoiommu/tegra: smmu: debugfs for TLB/PTC statistics
Hiroshi Doyu [Fri, 27 Jul 2012 11:45:12 +0000]
iommu/tegra: smmu: debugfs for TLB/PTC statistics

Add debugfs entries to collect TLB/PTC statistics.

  $ echo "reset" > /sys/kernel/debug/smmu/mc/{tlb,ptc}
  $ echo "on" > /sys/kernel/debug/smmu/mc/{tlb,ptc}
  $ echo "off" > /sys/kernel/debug/smmu/mc/{tlb,ptc}
  $ cat /sys/kernel/debug/smmu/mc/{tlb,ptc}
  hit:0014910c miss:00014d22

  The above format is:
  hit:<HIT count><SPC>miss:<MISS count><SPC><CR+LF>

  fscanf(fp, "hit:%lx miss:%lx", &hit, &miss);

Change-Id: I2da0741b02c7027644133c8fa9bd6f7e6b573a25
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/118322
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

6 years agoARM: tegra: smmu: debugfs for TLB/PTC statistics
Hiroshi DOYU [Thu, 19 Jul 2012 09:03:19 +0000]
ARM: tegra: smmu: debugfs for TLB/PTC statistics

Add debugfs entries to collect TLB/PTC statistics.

  $ echo "on" > /sys/kernel/debug/smmu/mc/{tlb,ptc}
  $ echo "off" > /sys/kernel/debug/smmu/mc/{tlb,ptc}
  $ cat /sys/kernel/debug/smmu/mc/{tlb,ptc}
  0014910c 00014d22

  The above format is:
  <HIT count><SPC><MISS count><SPC><CR+LF>

  fscanf(fp, "%lx %lx", &hit, &miss);

Also add struct device of "tegra_smmu" as a member of struct
smmu_device.

Change-Id: Ia83c5dc51ad7164bfeb1230d6d1e36e22dfea497
Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/118309
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

6 years agospi: tegra: fix sectionmismatch for spi_tegra_init_dma_param
Peter De Schrijver [Thu, 19 Jul 2012 12:52:30 +0000]
spi: tegra: fix sectionmismatch for spi_tegra_init_dma_param

spi_tegra_init_dma_param is only called from spi_tegra_probe which is in the
__devinit section. Hence the easiest solution is to make spi_tegra_probe also
part of that section.

Change-Id: Ifce7799fdeb2dee6e5854740d3097e09d0bc2f69
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Reviewed-on: http://git-master/r/117057
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

6 years agoarm: tegra: usb_phy: implement usb_phy_reset
Venkatajagadish [Tue, 17 Jul 2012 05:34:09 +0000]
arm: tegra: usb_phy: implement usb_phy_reset

This change sets STREAM_BIT_DISABLE and TXFILLTUNING
bits.
Bug 1014100

Change-Id: I7fe61aaaddd0a6b9ce963936bc8d98af813fe466
Signed-off-by: Venkatajagadish <vjagadish@nvidia.com>
Reviewed-on: http://git-master/r/116375
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

6 years agoarm: tegra: usb_phy: Link ULPI platform data
Venkatajagadish [Fri, 13 Jul 2012 08:45:26 +0000]
arm: tegra: usb_phy: Link ULPI platform data

This change provides required platform data to enable
link ULPI

Bug 986684

Change-Id: I8c0564e89b50d710fe4fc52b530d13edb4603bf0
Signed-off-by: Venkatajagadish <vjagadish@nvidia.com>
Reviewed-on: http://git-master/r/116373
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

6 years agoarm: tegra: usb_phy: Enable Link ULPI
Venkatajagadish [Fri, 13 Jul 2012 08:34:55 +0000]
arm: tegra: usb_phy: Enable Link ULPI

These changes enables the Link ULPI

Bug 986684

Change-Id: I1eee3ee5f2ca8b12486fb217e5d7531dbcafb92e
Signed-off-by: Venkatajagadish <vjagadish@nvidia.com>
Reviewed-on: http://git-master/r/116371
Reviewed-by: Suresh Mangipudi <smangipudi@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

6 years agoARM: config: tegra3: remove TRUSTED_FOUNDATIONS
Bo Yan [Mon, 30 Jul 2012 18:11:14 +0000]
ARM: config: tegra3: remove TRUSTED_FOUNDATIONS

CONFIG_TRUSTED_FOUNDATIONS should not be enabled by default.

Change-Id: I340ecaf5f3846b65a3fa7229101108a155b3c424
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/119354
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

6 years agoARM: tegra: Updating tegra3_android_defconfig
aghuge [Mon, 30 Jul 2012 10:39:08 +0000]
ARM: tegra: Updating tegra3_android_defconfig

Change-Id: Iaf99d3c67e25e13da967ff7c2670d3c3db2596b2
Reviewed-on: http://git-master/r/119292
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

6 years agoARM: tegra11: dvfs: Update CL-DVFS clock management
Alex Frid [Wed, 25 Jul 2012 06:04:51 +0000]
ARM: tegra11: dvfs: Update CL-DVFS clock management

- Added control of I2C fast clock
- Disabled/Enabled all clocks when CL-DVFS disabled/enabled,
respectively.

Bug 871124

Change-Id: Iccd3c225fa17bfce3dfb57f832a82a6940fdceae
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/118472
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bo Yan <byan@nvidia.com>

6 years agoARM: tegra: smmu: Correct PTC_STATS_TEST in MC_SMMU_PTC_CONFIG_0
Hiroshi DOYU [Wed, 25 Jul 2012 08:30:03 +0000]
ARM: tegra: smmu: Correct PTC_STATS_TEST in MC_SMMU_PTC_CONFIG_0

Correct register bit defs for PTC_STATS_TEST in MC_SMMU_PTC_CONFIG_0

Change-Id: I1f9cad1ba5b0c9dd57cff6694ab054f40a9acdc1
Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/118308
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

6 years agoARM: tegra: dalmore: creating board files
aghuge [Tue, 31 Jul 2012 05:18:37 +0000]
ARM: tegra: dalmore: creating board files

Change-Id: I5c3fe127403b1a01c82d88b821a4a28cad25d026
Signed-off-by: aghuge <aghuge@nvidia.com>
Reviewed-on: http://git-master/r/118305
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

6 years agodrivers: Adding EDP framework
Sivaram Nair [Mon, 9 Jul 2012 06:33:18 +0000]
drivers: Adding EDP framework

Change-Id: I51adf383a6d4241369bd4008e5516e2bf8771c17
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-on: http://git-master/r/115712
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

6 years agopm: EDP: Makefile for EDP framework
Sivaram Nair [Mon, 9 Jul 2012 06:32:15 +0000]
pm: EDP: Makefile for EDP framework

Change-Id: I85f9f0d409d4a783c2611babf3896fb21b3cc0bf
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-on: http://git-master/r/115711
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

6 years agoARM: adding Kconfig for EDP framework
Sivaram Nair [Mon, 9 Jul 2012 06:30:39 +0000]
ARM: adding Kconfig for EDP framework

Change-Id: I178f7ee104cf7ba6786ebbb171160bd30b458780
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-on: http://git-master/r/115709
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

6 years agopm: EDP: Kconfig for EDP
Sivaram Nair [Mon, 9 Jul 2012 06:27:49 +0000]
pm: EDP: Kconfig for EDP

Defines the config flag

Change-Id: Ica61f66d81ec1364575f7da9593e6a83796e574a
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-on: http://git-master/r/115708
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

6 years agopm: EDP: positive E-state handing
Sivaram Nair [Wed, 4 Jul 2012 09:53:15 +0000]
pm: EDP: positive E-state handing

This patch adds the basic positive E-state handling functionality.
Higher state transitions will fail if there is not enough current
remaining.

Bug ID: 917926

Change-Id: I1555a4d5b4df35883baa1cf9260ff66254a49b95
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-on: http://git-master/r/115707
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

6 years agoARM: tegra: curacao: dpd init
Bitan Biswas [Fri, 27 Jul 2012 12:19:51 +0000]
ARM: tegra: curacao: dpd init

Tegra dpd init needs to be called for board

bug 1023194

Change-Id: I2c5863c6912b75e2eda271af3dfee0397729fcff
Signed-off-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-on: http://git-master/r/118955
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Nilesh Bhoite <nbhoite@nvidia.com>
Reviewed-by: Bo Yan <byan@nvidia.com>

6 years agovideo: tegra: host: fix section mismatched
Peter De Schrijver [Thu, 19 Jul 2012 13:10:08 +0000]
video: tegra: host: fix section mismatched

setup_save,setup_save_regs and setup_save_ram_nasty are referenced by
the corresponding context initialization handlers which are not in the __init
section. Hence they can't be part of the __init section.

Change-Id: Ib974439c5793f8f0fe57103807fc91317b505f0c
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Reviewed-on: http://git-master/r/117059
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

6 years agovideo: tegra: dc: fix section mismatches
Peter De Schrijver [Thu, 19 Jul 2012 12:59:11 +0000]
video: tegra: dc: fix section mismatches

tegra_dc_remove_debugfs is also called by tegra_dc_create_debugfs in case of
failure. Hence, it cannot be part of the __devexit section.
tegra_dc_remove calls tegra_dc_remove_sysfs which is in the __devexit section
and doesn't get called elsewhere, hence make tegra_dc_remove also part of the
__devexit section.

Change-Id: I7c7dab12037c642a0314953be442060bec143650
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Reviewed-on: http://git-master/r/117058
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

6 years agoMerge remote-tracking branch 'origin/dev/android-t114-3.4-next' into dev-t114-2012...
varun colbert [Mon, 30 Jul 2012 22:29:52 +0000]
Merge remote-tracking branch 'origin/dev/android-t114-3.4-next' into dev-t114-2012.07.30-B2

Change-Id: Iab52c61cc18765b845e9024e73565c16822a04c7

6 years agoARM: tegra11: Fix simulation build break
Bo Yan [Fri, 27 Jul 2012 18:38:22 +0000]
ARM: tegra11: Fix simulation build break

Since warnings are treated as errors now, variables and functions
for certain configuration, for example, non-simulation build, should
be wrapped in appropriate config macros

Change-Id: I6975d93c16691052e0fb0dd5afa045940d4e880f
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/119066
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

6 years agoMerge remote-tracking branch 'origin/android-tegra-nv-3.1' into android-t114-3.4
Varun Wadekar [Mon, 30 Jul 2012 12:52:08 +0000]
Merge remote-tracking branch 'origin/android-tegra-nv-3.1' into android-t114-3.4

NULL merge from android-tegra-nv-3.1

Change-Id: I8c49e4b9df6820eb1ad7edca2233982a6c4043d8
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

6 years agoRevert "ARM: tegra: integration of slave mode support."
Varun Wadekar [Mon, 30 Jul 2012 11:38:14 +0000]
Revert "ARM: tegra: integration of slave mode support."

This reverts commit a50e73c5be9f5a3546bf575588385b59deee7092 as it
breaks bootup on Cardhu.

Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

6 years agoRevert "asoc: tegra: integration of slave mode support."
Varun Wadekar [Mon, 30 Jul 2012 11:37:42 +0000]
Revert "asoc: tegra: integration of slave mode support."

This reverts commit a1cb57de2cdcd5ce24bfed9564842fb8ae368f4f as it
breaks boot up on Cardhu.

Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

6 years agosecurity: tf_driver: integrate latest TL release
Karan Jhavar [Sat, 21 Jul 2012 02:42:55 +0000]
security: tf_driver: integrate latest TL release

Tegra 3 version: TF_TEGRA3_AB01.11.35578, TF_TEGRA3_AB01.11p1.35578
                 TF_TEGRA3_AB01.11p2.36386, TF_TEGRA3_AB01.11p3.36518
         TF_TEGRA3_AB01.11p4.36577, TF_TEGRA3_AB01.11p5.36677

1)Add memory profiling tool to debug secure services's stack and heap
2)Add support to enable dynamic clock gating feature in PL310 register
3)TEE client API at kernel level
4)Stable FIQ debugging (SDK ver 1.09)
5)clrex stability change
6)GIC controller stability settings
7)Fix LP1
8)Fix floating pt support

Bug 1021831

Change-Id: I5c2a693a27dc591b62863aa0fe4ff65163e67aba
Signed-off-by: Karan Jhavar <kjhavar@nvidia.com>
Reviewed-on: http://git-master/r/117515
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Hyung Taek Ryoo <hryoo@nvidia.com>
Reviewed-by: Marvin Zhang <mzhang@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

6 years agovideo: tegra: nvmap: Set PAGELIST_VMALLOC_MIN size correct
Krishna Reddy [Wed, 18 Jul 2012 21:59:51 +0000]
video: tegra: nvmap: Set PAGELIST_VMALLOC_MIN size correct

page list array size greater than PAGE_SIZE should use vmalloc.

Change-Id: Ic03668ba7ff716bfb3cc08aaef5f86214ee0a9df
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/116875
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Hiroshi Doyu <hdoyu@nvidia.com>
Tested-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
(cherry picked from commit ddacaacd2a9fff10187e026eaa0d898694eeb95f)
Reviewed-on: http://git-master/r/118194

6 years agomm: failslab: Add support to force slab alloc failures based on size.
Krishna Reddy [Wed, 18 Jul 2012 21:06:50 +0000]
mm: failslab: Add support to force slab alloc failures based on size.

Any alloc request, with  size greater than PAGE_SIZE, to
slab allocator is not guarnateed to succeed, even though
enough memory is available, as memory can get fully fragmented
over the time.
This allows finding the slab allocator requests with size
greater than PAGE_SIZE early and avoid finding issues much late
in product life cyle.

Change-Id: Ibf13e626a671d41569415a56e775ac5e96b90ba3
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/116855
GVS: Gerrit_Virtual_Submit
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
(cherry picked from commit 604a65f8e3c9472886b48b1a287f78f11235d1ce)
Reviewed-on: http://git-master/r/118193
Reviewed-by: Alex Waterman <alexw@nvidia.com>

6 years agoarm: configs: tegra3: Enable fault injection for slab alloctor.
Krishna Reddy [Wed, 18 Jul 2012 20:51:10 +0000]
arm: configs: tegra3: Enable fault injection for slab alloctor.

Even though config option is enabled, the fault injection is not
enabled by default. It need to be enabled through debugfs interface
during test.

Change-Id: Iaba52d27a97bc4ecdc04e79e29ab25e03438bbc0
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/116851
GVS: Gerrit_Virtual_Submit
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
(cherry picked from commit 892f0239562de8cd5a6a93deeaec826e45b368b0)
Reviewed-on: http://git-master/r/118192

6 years agousb: ehci: tegra: Update RUN bit properly.
Suresh Mangipudi [Tue, 24 Jul 2012 07:22:00 +0000]
usb: ehci: tegra: Update RUN bit properly.

Read the RUN bit and update it properly.
Remove unused variable.

Change-Id: I1df5dc99ce40e2ca15f0ade28d156a7262467519
Signed-off-by: Suresh Mangipudi <smangipudi@nvidia.com>
Reviewed-on: http://git-master/r/117958
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agoARM: Tegra: p1852: defconfig: disabled TEGRA_SE_ON_CBUS and set CONFIG_TEGRA_CBUS_CLO...
Mohit Kataria [Thu, 19 Jul 2012 13:44:31 +0000]
ARM: Tegra: p1852: defconfig: disabled TEGRA_SE_ON_CBUS and set CONFIG_TEGRA_CBUS_CLOCK_DIVIDER=1

* Disabled  CONFIG_TEGRA_SE_ON_CBUS
So that se clock can be derived from clocks
other than which are driving cbus.

* Changed CONFIG_TEGRA_CBUS_CLOCK_DIVIDER=1
So that pllc can run at same frequency as
cbus is running at.

Bug 978870

Change-Id: I66898e3f16adad3625efb1a484b438c168419a68
Signed-off-by: Mohit Kataria <mkataria@nvidia.com>
Reviewed-on: http://git-master/r/117995
(cherry picked from commit b5d42b0432119ddebcc38f6f40761e3dea3d9f6d)
Reviewed-on: http://git-master/r/117312
GVS: Gerrit_Virtual_Submit
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>

6 years agousb: ehci: DMA buffer sync for qh/qtd descriptors
JC Kuo [Tue, 17 Jul 2012 09:57:44 +0000]
usb: ehci: DMA buffer sync for qh/qtd descriptors

When EHCI host controller driver examines qh/qtd descriptors, driver
might see stale data in cache on some ARM CPU. This patch introduces
two helper functions, ehci_sync_qh() and ehci_sync_qtd(), to
invalidate cached descriptors so that driver can always read
up-to-date descriptors from memory.

Bug 1005403

Change-Id: I2345bda7dfe29c5fe7f9550066b518cd6624d263
Signed-off-by: JC Kuo <jckuo@nvidia.com>
Reviewed-on: http://git-master/r/116406
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: WK Tsai <wtsai@nvidia.com>
Reviewed-by: ChihMin Cheng <ccheng@nvidia.com>
Reviewed-by: Joy Wang <joyw@nvidia.com>
Reviewed-by: Vinayak Pane <vpane@nvidia.com>
Reviewed-by: Michael Hsu <mhsu@nvidia.com>
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

6 years agomedia: video: tegra: ar0832: reduce permissions
schowdary [Thu, 26 Jul 2012 13:42:17 +0000]
media: video: tegra: ar0832: reduce permissions

CTS test fails if there are write permissions for user.
Hence reduce permissions for test_pattern.

bug 1001925

Change-Id: I769ff501671182965a8b699d7bbd580400ccd1c1
Signed-off-by: schowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/118871
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agoasoc: tegra: integration of slave mode support.
Ankit Gupta [Wed, 11 Jul 2012 15:20:01 +0000]
asoc: tegra: integration of slave mode support.

Add master/slave configurability support interface for
all codecs. Currently, complete slave mode functionality
is added only for MAX98088 and WM8903 codec only. By
default, board parameters will set i2s master mode for
all codecs.

asoc: tegra: utils: add support for i2s master/slave mode.
Support for i2s in master or slave mode is made generic by
obtaining information from platform data.
Signed-off-by: Ankit Gupta <ankitgupta@nvidia.com>
Change-Id: Ided0fcefb6cdb124b78aab423bfd8c7dccd4bf6e
Reviewed-on: http://git-master/r/111553
(cherry picked from commit bb1ad7222f9c75424a45976d16de418bc927dc04)

asoc: tegra: wm8903 machine: add support for i2s in slave mode.
Add support for i2s as slave for playback and capture use cases.
Signed-off-by: Ankit Gupta <ankitgupta@nvidia.com>
Change-Id: I1f6b73a0a1b690ecd311b0ff4107aadbb1f037d8
Reviewed-on: http://git-master/r/111472
(cherry picked from commit 0434f8ba74adefe60597d95d30a455b9b2ece9b8)

asoc: tegra: wm8753 machine: add support for i2s in slave mode.
Add support for i2s as slave for playback and capture use cases.
Signed-off-by: Ankit Gupta <ankitgupta@nvidia.com>
Change-Id: Ib0596955cd0c6ac5ec57b0f3c6ecc9e4ed41268c
Reviewed-on: http://git-master/r/113208
(cherry picked from commit 0fc6b5e3a98d9f8866f73d7914b0c590334ce862)

asoc: tegra: aic326x machine: add support for i2s in slave mode.
Support for i2s in slave mode is added for playabck and capture
use cases.
Signed-off-by: Ankit Gupta <ankitgupta@nvidia.com>
Change-Id: I41f6459765f075703ad7f5f8dc9d4628dd853820
Reviewed-on: http://git-master/r/112874
(cherry picked from commit 9a89ede36a1dca6f53250444e819443fb6f28d09)

asoc: tegra: rt5640 machine: add support for i2s in slave mode.
Add support for i2s as slave for playback and capture use cases.
Signed-off-by: Ankit Gupta <ankitgupta@nvidia.com>
Change-Id: I850ec62149b8a8d244445b70658b632dbce06558
Reviewed-on: http://git-master/r/112878
(cherry picked from commit 1d51561c8edf47d8557a825450a48ee8743a185b)

asoc: tegra: max98088 machine: add support for codec i2s as slave.
Add support for codec i2s as slave during voice Call.
(Bug 998682)
Signed-off-by: Ankit Gupta <ankitgupta@nvidia.com>
Change-Id: I8fc54d367e9acd5417d270869cb5a9398b3b527f
Reviewed-on: http://git-master/r/110559
(cherry picked from commit 78a490867e131b1cc892094ddd844c2b892cafb6)

asoc: tegra: max98095 machine: add support for i2s in slave mode.
Add support for i2s as slave for playback and capture use cases.
Signed-off-by: Ankit Gupta <ankitgupta@nvidia.com>
Change-Id: I80944d403be94c55ad2ce31aea921d80ea7c088a
Reviewed-on: http://git-master/r/112875
Reviewed-on: http://git-master/r/118080
Reviewed-by: Scott Peterson <speterson@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sumit Bhattacharya <sumitb@nvidia.com>