ion: Add reserve function to ion

Rather than requiring each platform call memblock_remove or reserve
from the board file, add this to ion

Change-Id: Ie418a692c13e9e0cfe93ecc83d253d3ce860fc83
Signed-off-by: Rebecca Schultz Zavin <rebecca@android.com>

ion: Switch map/unmap dma api to sg_tables

Switch these api's from scatterlists to sg_tables

Change-Id: I8b99e39633df009d472ce24704fa26af7bb50fa2
Signed-off-by: Rebecca Schultz Zavin <rebecca@android.com>

usb: gadget: composite: Fix corruption when changing configuration

Remove the config from the configs list before releasing the spinlock.
Otherwise the other cpu might be processing a SET_CONFIGURATION that
will switch to the configuration that is being released.

Change-Id: Id4da0d0e18ead63e20cb236cd1d3e8e6d116acce
Signed-off-by: Benoit Goby <benoit@android.com>

debug: add parameters to prevent entering debug mode on errors

On non-developer devices kgdb prevents CONFIG_PANIC_TIMEOUT from
rebooting the device after a panic. Add module parameters
debug_core.break_on_exception and debug_core.break_on_panic to
allow skipping debug on panics and exceptions respectively.  Both
default to true to preserve existing behavior.

Change-Id: I75dce7263e96cee069a9750920cce83dc6f98e8c
Signed-off-by: Colin Cross <ccross@android.com>

sched/rt: fix SCHED_RR across cgroups

task_tick_rt has an optimization to only reschedule SCHED_RR tasks
if they were the only element on their rq.  However, with cgroups
a SCHED_RR task could be the only element on its per-cgroup rq but
still be competing with other SCHED_RR tasks in its parent's
cgroup.  In this case, the SCHED_RR task in the child cgroup would
never yield at the end of its timeslice.  If the child cgroup
rt_runtime_us was the same as the parent cgroup rt_runtime_us,
the task in the parent cgroup would starve completely.

Modify task_tick_rt to check that the task is the only task on its
rq, and that the each of the scheduling entities of its ancestors
is also the only entity on its rq.

Change-Id: I4f5b118517f85db3570923eb2f5e4c933ece9247
Signed-off-by: Colin Cross <ccross@android.com>

sync: add poll support

Change-Id: I294e481bba92658e6dd26f157ddbf0e9ff4ce8a5
Signed-off-by: Erik Gilling <konkers@android.com>

sw_sync: add fill_driver_data support

Change-Id: Ib3812d282db56362d82f5ccc9a12b7d2100ab93a
Signed-off-by: Erik Gilling <konkers@android.com>

sync: add ioctl to get fence data

Change-Id: I71410aef7e03a52562f7cb15b993ac8441b1fa12
Signed-off-by: Erik Gilling <konkers@android.com>

sw_sync: add debug support

Change-Id: Ibcc5fa8cb36e283cdf0e3308064876722e2675fc
Signed-off-by: Erik Gilling <konkers@android.com>

sync: add debugfs support

Change-Id: I8a7ea63e454fbeee1ecf17e6c3caff7c43b24734
Signed-off-by: Erik Gilling <konkers@android.com>

sync: add timestamps to sync_pts

Change-Id: I2ad855072b86873880769a09a3176e85aa1199d7
Signed-off-by: Erik Gilling <konkers@android.com>

sw_sync: add cpu based sync driver

Change-Id: I1042851f5e30f9fdc2f35bdad84123bcf108560f
Signed-off-by: Erik Gilling <konkers@android.com>

sync: Add synchronization framework

not run through checkpatch yet.

Change-Id: I209f9db2824e0313f467f11ab09e5f54f0a4a6b5
Signed-off-by: Erik Gilling <konkers@android.com>

usb: otg: otg-wakelock: Fix build for 3.4

Change-Id: I97e21e9e6645bf18522675039e512f85fe836794
Signed-off-by: Benoit Goby <benoit@android.com>

trace: power: add trace_clock_set_parent

Adds a new trace event to be called from clk_set_parent.  Some
cpufreq drivers, including Tegra, reparent the cpu clock to a
slower clock while the main pll is relocking, tracing
clk_set_parent allows traces to show how for long the cpu is
running slower.

Uses a separate TRACE_EVENT instead of the clock event class to
allow the event to contain string names for the child and the
parent.

Signed-off-by: Colin Cross <ccross@android.com>

netfilter: xt_qtaguid: start tracking iface rx/tx at low level

qtaguid tracks the device stats by monitoring when it goes up and down,
then it gets the dev_stats().
But devs don't correctly report stats (either they don't count headers
symmetrically between rx/tx, or they count internal control messages).

Now qtaguid counts the rx/tx bytes/packets during raw:prerouting and
mangle:postrouting (nat is not available in ipv6).

The results are in
  /proc/net/xt_qtaguid/iface_stat_fmt
which outputs a format line (bash expansion):
  ifname  total_skb_{rx,tx}_{bytes,packets}

Added event counters for pre/post handling.
Added extra ctrl_*() pid/uid debugging.

Change-Id: Id84345d544ad1dd5f63e3842cab229e71d339297
Signed-off-by: JP Abgrall <jpa@google.com>

netfilter: xt_IDLETIMER: Add new netlink msg type

Send notifications when the label becomes active after an idle period.
Send netlink message notifications in addition to sysfs notifications.
Using a uevent with
  subsystem=xt_idletimer
  INTERFACE=...
  STATE={active,inactive}

This is backport from common android-3.0
commit: beb914e987cbbd368988d2b94a6661cb907c4d5a
with uevent support instead of a new netlink message type.

Change-Id: I31677ef00c94b5f82c8457e5bf9e5e584c23c523
Signed-off-by: Ashish Sharma <ashishsharma@google.com>
Signed-off-by: JP Abgrall <jpa@google.com>

Revert "mmc: Set suspend/resume bus operations if CONFIG_PM_RUNTIME is used"

This reverts commit 2f4735e514e3e3ed9e55a8cd3c2c90690ee44b90.

netfilter: xt_qtaguid: fix ipv6 protocol lookup

When updating the stats for a given uid it would incorrectly assume
IPV4 and pick up the wrong protocol when IPV6.

Change-Id: Iea4a635012b4123bf7aa93809011b7b2040bb3d5
Signed-off-by: JP Abgrall <jpa@google.com>

netfilter: qtaguid: initialize a local var to keep compiler happy.

There was a case that might have seemed like new_tag_stat was not
initialized and actually used.
Added comment explaining why it was impossible, and a BUG()
in case the logic gets changed.

Change-Id: I1eddd1b6f754c08a3bf89f7e9427e5dce1dfb081
Signed-off-by: JP Abgrall <jpa@google.com>

HACK: video: tegra30: host: report "register_sets = 2" for NvRmModuleID_3D

Change-Id: I31936f31759d418df2bc59ab367f783ed269df1e
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

ARM: tegra: iovmm: Fix build error w/o CONFIG_IOVMM

Update function prototype along with:

  commit 6cbf4c7465b7b70936cb422b509da0ad0829c306
  ARM: tegra: iovmm: Allow alloc_client to take struct device

Change-Id: I11d173429413ab268f6ab789d90f321e3d33de2c
Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/115391
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

ARM: tegra: iovmm: Make IOMMU/IOVMM selectable in Kconfig

This patch enables to replace iovmm*.ko family with
tegra-{smmu,gart}.ko if needed in kernel config. To use IOMMU as
backend engine, Enable TEGRA_IOMMU_{GART,SMMU} under IOMMU in config,
and automatically disable IOVMM.

IOVMM is equivalent to IOMMU_API. TEGRA_IOVMM_GART is equivalent to
TEGRA_IOMMU_GART. TEGRA_IOVMM_SMMU is equivalent to TEGRA_IOMMU_SMMU.

Change-Id: I73408e927eb3f21e1db4e73700aaf415f4949166
Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/115011
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

ARM: tegra: iovmm: Replace IOVMM backend with IOMMU

Replace IOVMM backend functions with the standard IOMMU API
ones. Instead of modifying the actual C-files in drivers, MACROs in
iovmm.h does the all work.

Change-Id: I27dc893555ca1495588852261e3ba1e3e5619764
Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/114460
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

video: tegra: nvmap: Make IOMMU/IOVMM selectable in Kconfig

This patch allows nvmap to use the standard IOMMU API as its backend
engine instead of the legacy tegra IOVMM by Kconfig.

Enable TEGRA_IOMMU_{GART,SMMU} under IOMMU in config, and it
automatically disables IOVMM, instead.

Change-Id: I71112ef8072591aac4a93075623ca31c8851a960
Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/114217
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

ARM: tegra: clock: Add missed Tegra3 PERIPH_ON_APB attributes

Change-Id: I12be16dbc2614224ba852216a645d0f84c795334
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/115929
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Scott Peterson <speterson@nvidia.com>

arm: tegra: cpu: changing cpu min. freq to 51MHz

Changing the CPU min. frequency to 51MHz. This helps
in bringing down the core power to 46mW.

Bug 1005275

Change-Id: I61daa59866be7baf8ebb741000904422cb095e85
Signed-off-by: Prem Sasidharan <psasidharan@nvidia.com>
(cherry picked from commit afbb34d5871b69df328d5aae37f69f25a8946514)
Reviewed-on: http://git-master/r/115452
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Wen Yi <wyi@nvidia.com>
Tested-by: Wen Yi <wyi@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

cpufreq: protect cpufreq_stats_free_table with spinlock

Prevents crash on cpufreq_stat_notifier_trans when cpufreq_stats_table
has been freed due to a core being hotplugged out.

Bug 948348

Change-Id: I2640a9a23c9a79cad8c76bfefd243a07162d2004
Signed-off-by: Peter Boonstoppel <pboonstoppel@nvidia.com>
(cherry picked from commit 03070a4b0b8eb74825c99c6bbfb108ddb36a041c)
Reviewed-on: http://git-master/r/114248
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

arm: config: tegra3 Enable XHCI driver for USB3

1. Enable USB3 for both android and L4T
2. Enable R8169 for android, already enabled for L4T

Bug 956573

Change-Id: If8d7cf653a5cd2b02352ad07fee3a56c3f568d3a
Signed-off-by: Jay Agarwal <jagarwal@nvidia.com>
Reviewed-on: http://git-master/r/113856
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Thota <kthota@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

ARM: tegra: dvfs: Update Tegra3 sdmmc dvfs tables

Added Tegra3 sdmmc4 dvfs table and downgraded sdmmc 2/4 maximum
clock limits based on recent characterization results.

Bug 817679
Bug 841336

Change-Id: I88ddeaabf0739efc0f9c18c41cace331792d4d43
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/107780
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Tested-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

ARM: tegra: p1852: Dual-display support for all SKUs

Ported Peter's original change 86413 to main.

board-p1852-panel.c:
Add support for primary and secondary LVDS displays, and secondary HDMI display.

board-p1852-pinmux.c:
Add configuration for HDMI and LVDS

board-p1852.c:
board-p1852.h:
Support for determining which p1852 sku is in use

hdmi.c:If no edid retrieved, but there's a hardwired mode, enable it
(used to support HDMI->LVDS output on p1852 sku 2)

devices.c:added secondary display data.

Bug 977859
Bug 994011

Change-Id: Ide8fb6bf7dd873b1d50269fb98d7c1687e4d9073
Signed-off-by: Dongfang Shi <dshi@nvidia.com>
Reviewed-on: http://git-master/r/100438
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

power: max17048: fix power polling at resume

The state of charing is not correct because of the 1 sec delay.
Remove the delay to fix the issue.

Bug 1016683

Change-Id: I389970e32d34578bb1ec1f2019d78145f250a673
Signed-off-by: Chandler Zhang <chazhang@nvidia.com>
Reviewed-on: http://git-master/r/115632
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

arm: tegra: usb_phy: fix hsic suspend issue on xmm

XMM modem fails at auto-suspend on hsic. Fixing this issue
by enabling PMC sleepwalk code conditionally and only at
phy-on and phy-off routines.

Bug 991709

Signed-off-by: Vinayak Pane <vpane@nvidia.com>
Reviewed-on: http://git-master/r/109324
(cherry picked from commit 100f818a16ce97411a98ddb0e2c5c9e73a9e654a)

Change-Id: If6f92b8b36f856fa633cb411ac20dbe6e862890c
Reviewed-on: http://git-master/r/115612
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

hwmon: tegra: tsensor:Simplify counter calculation

Simplify the temp to counter conversion in tsensor,
Also it can improve a little bit accuracy of temp to
counter conversion.

Change-Id: I5764334d5d94e317dd9400bc03cb5d7a64096ee0
Signed-off-by: Daniel Fu <danifu@nvidia.com>
Reviewed-on: http://git-master/r/115340
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>

arm: tegra: sd: enable sd dpd

This is a WAR solution that allows for the turning on
SD DPD feature.

The original issue is that enabling SD DPD immediately after device comes
out of LP0 causes ULPI disconnect. The root cause of that is
not known.

The WAR is to delay the enabling of SD DPD for 100ms after
device comes out of LP0.

Bug 929628

Change-Id: I3c5e35ace422e5441535c2c0fe18545b53bbddc4
Signed-off-by: Wen Yi <wyi@nvidia.com>
(cherry picked from commit bffb7b917d52a3523af80db21322ec7ba5fd33f9)
Reviewed-on: http://git-master/r/113392
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

sdhci: tegra: enable sd dpd

This is a WAR solution that allows for the turning on
SD DPD feature.

The original issue is that enabling SD DPD immediately after device comes
out of LP0 causes ULPI disconnect. The root cause of that is
not known.

The WAR is to delay the enabling of SD DPD for 100ms after
device comes out of LP0.

Bug 929628

Change-Id: I946771a8e92459464ce571295f96f197db25c061
Signed-off-by: Bitan Biswas <bbiswas@nvidia.com>
(cherry picked from commit beba2b34af7ff9313aed074342b9bb86b12620a8)
Reviewed-on: http://git-master/r/113391
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Wen Yi <wyi@nvidia.com>
Tested-by: Wen Yi <wyi@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

Revert "arm: tegra: power: disable all sd dpd"

This reverts commit 8924926cdb77c6ab270867d4caef7a8cdacd11f2.

Bug 924452
Bug 929628

Signed-off-by: Bitan Biswas <bbiswas@nvidia.com>
(cherry picked from commit 142b34993404c853579864f7b7b4f320fb92a715)

Change-Id: I9d49703799e32d410beba18938e94e4b641eea6f
(cherry picked from commit 8de60b7a832bfbbf09e75def756379dbb2d14c3e)
Reviewed-on: http://git-master/r/113387
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Wen Yi <wyi@nvidia.com>
Tested-by: Wen Yi <wyi@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

arm: tegra: usb_phy: utmip remote wakeup issue

Do not clear sleep walk pointer for utmip port after remote
wakeup is detected. This should be cleared after control
is given to USB master from PMC.

Bug 999208

Change-Id: I9f498521989c6421f0043dc1b4364591d4907423
Signed-off-by: Venu Byravarasu <vbyravarasu@nvidia.com>
(cherry picked from commit e4dbecfe031cbacd4f22bbbcdf971ab11ad81ee8)
Reviewed-on: http://git-master/r/112938
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

video: tegra: fix compilation warning

Without the CONFIG_SWITCH enabled, there are multiple unused
variable warnings that get treated as error.

bug 949219

Signed-off-by: Rhyland Klein <rklein@nvidia.com>
Change-Id: I39512367fa4bbd3b00a435d0d7a31cfede9e712f
Reviewed-on: http://git-master/r/115428
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Sanjay Singh Rawat <srawat@nvidia.com>

ARM: tegra: clock: Dynamically re-lock memory pll

So far Tegra3 EMC DFS allowed only scaling rates that can be divided
down from two fixed rate plls: memory PLLM, and peripheral PLLP. PLLM
is always running at maximum SDRAM rate set at boot time, while PLLP
rate 408MHz is fixed across all Tegra3 platforms.

This commit implements dynamic re-locking of PLLM at run time. Now
memory pll can lock either at boot rate or additional auxiliary rate
that is selected as follows: auxiliary PLLM rate must be present in
EMC DFS table, it must exactly match one of the rate steps for Tegra3
graphics bus with PLLC clock source (cbus), and must not be a proper
factor of boot PLLM rate or PLLP fixed rate.

When switching PLLM between boot and auxiliary rate, PLLC is used as
backup memory pll, and during this time cbus is locked at auxiliary
rate. In addition system bus is forced to temporarily use PLLP as
a clock source (this is necessary as sbus main clock source is PLLM
secondary divider PLLM_OUT1).

Limitations:
- only one auxiliary rate is supported, and it should be below PLLM
boot rate, but above half of boot rate
- dynamic re-lock is allowed only on LPDDR2 platforms
- no clock other than EMC and system bus could use PLLM as a source;
so for dynamic re-lock to work CONFIG_TEGRA_PLLM_RESTRICTED must be
selected, and VI clock (not covered by PLLM restricted configuration)
must be moved to PLLP.

Bug 1005576

Change-Id: I6177107c89c3cbe975a1d940927efa1ed0ea61ec
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/111438
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
(cherry picked from commit dc4d468a6acabfb268e7a7f44b45bb7354e9a99a)
Reviewed-on: http://git-master/r/114760
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jihoon Bang <jbang@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

video: tegra: update nvmap_alloc_handle interface for Android only

Bug 1017884

Change-Id: I237cdb06f19b3ae0bf217f99ffeb705809716e12
Reported-by: Michal Pecio <mpecio@nvidia.com>
Signed-off-by: Michal Pecio <mpecio@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

ARM: tegra: clock: Increase boost_up_threshold for AVP clock

Increase the boost_up_threshold to 85 for ULP audio

bug 1009849

Change-Id: I4b1b746f445f5c2804befa52ae95c69b6b467083
Signed-off-by: Vandana Salve <vsalve@nvidia.com>
Reviewed-on: http://git-master/r/114620
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>

ARM: tegra: cardhu: add mem 437MHz table for Samsung K4P8G304EB

Bug 1005576

Signed-off-by: Peter Zu <pzu@nvidia.com>
Reviewed-on: http://git-master/r/112036
(cherry picked from commit 1f1e6d22e771336fb9e0b91bbabf12fa89f0c57c)

Change-Id: If65aba6aaa0a400c960a2d2b1315a07fa44dcefe
Reviewed-on: http://git-master/r/115054
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

cpufreq: Protected access of policy attribute

It takes read RW semaphore to access policy governor

bug 997731

Change-Id: Ibdc3dd54cf6076c0fef4bc58f144e4bcb4631d76
Signed-off-by: Puneet Saxena <puneets@nvidia.com>
Reviewed-on: http://git-master/r/107079
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sang-Hun Lee <sanlee@nvidia.com>
Reviewed-by: Peter Boonstoppel <pboonstoppel@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

video: tegra: dc: fix build error in print_mode

Use the right number of parameters for tegra_dc_calc_fresh() when called from
print_mode(). This code is only used for debug.

Change-Id: I4d0bb8b1700f670644057039fe8d0bc315b27c1d
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/115485
Reviewed-by: Automatic_Commit_Validation_User

bluesleep: stop/start based on HCI_DEV_REG/HCI_DEV_UNREG events

when BT is turned off HCI_DEV_DOWN event is received and bluesleep
protocol is stopped. On bluesleep stop, EXT_WAKE gpio will be set to
default high level. This condition does not allow BT chip to enter
low power mode. So, start and stop bluesleep based on HCI_DEV_REG
and HCI_DEV_UNREG events instead of HCI_DEV_UP and HCI_DEV_DOWN.

Also, enable and disable host wake functionality based on HCI_DEV_UP and
HCI_DEV_DOWN events, as these events indicate BT turn ON and OFF

Bug 1014590

Change-Id: I3929c1328ac024eb080359283107dabf3712e9ea
Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-on: http://git-master/r/114984
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Rakesh Kumar <krakesh@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

ARM: tegra: clock: Allow Tegra3 PLLM rate change

Allowed Tegra3 memory PLLM rate change, provided it is disabled.

Since PLLM can deviate from boot configuration now, and on Tegra3 it
is controlled by PMC override registers (not CAR module registers):

- Re-factored PLLM initialization, resume, and set rate operations
accordingly (enable and disable ops already used PMC override).

- Made sure that boot configuration is restored on entry to LP0 to
match memory timing saved in scratch registers.

Bug 1005576

Change-Id: Iac6297455bec709a8e12d71deccab62c18905ea7
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/110937
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
(cherry picked from commit b53f88c68543a2b0ddb4545bb3b389b42eeb95d8)
Reviewed-on: http://git-master/r/114759
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jihoon Bang <jbang@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

ARM: tegra: clock: Record EMC clock source rate

On Tegra3 added source rate to EMC clock source selection structure,
and re-factored EMC DVFS initialization accordingly.

Bug 1005576

Change-Id: I155e982bef2431a76cf5e5085070d4e654a7b49b
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/110935
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
(cherry picked from commit bf52c26c532a9ebabc4fc8a1fb5fc9d88be85e66)
Reviewed-on: http://git-master/r/114758
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jihoon Bang <jbang@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

ARM: tegra: clock: Record shared bus backup rate

Added shared bus backup rate entry to clock descriptor; initialized
it for cbus (currently the only shared bus with backup source).

Bug 1005576

Change-Id: I8124aa87f1dc307e42417da8f78797cfaf71e5dc
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/110934
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
(cherry picked from commit bc5ed688929c3c0ca920b5e9663cf9c6fb85c00f)
Reviewed-on: http://git-master/r/114757
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jihoon Bang <jbang@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

tegra: dc: Make data output along with pixel clock.

After making pclk output ahead of LVDS_SHDN# , data output is later than
panel ready then caused partial black screen. Force triggered data output to
get it fixed.

Bug 972377
Bug 976081
Bug 1001434

Change-Id: Icd455d7439f622e46295158a5435286c521526aa
Signed-off-by: Roger Hsieh <rhsieh@nvidia.com>
Reviewed-on: http://git-master/r/113164
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

ARM: tegra: clock: Adjust Tegra3 cpu to emc ratio

On Tegra3 changed cpu rate threshold for maximum emc rate request from
750MHz to 925MHz. Adjusted cpu frequency table to provide entries close
to the new threshold for all Tegra3 skus.

Bug 998044
Bug 1003521

Signed-off-by: Alex Frid <afrid@nvidia.com>

Change-Id: I6e6df1958db9d55ad64cf35a5e9fe6ec74b8d4ea
Reviewed-on: http://git-master/r/106946
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

hwmon: tegra: tsensor: improve counter accuracy

When set threshold of tsensor,convert the temp to counter.
The counter convert from temp is with ~1.8C average error.
Improved the accuracy, make it to be ~0.1C.

Bug 1015288

Change-Id: Icab03b559eaeb8846dd1191869afe39c9965f934
Signed-off-by: Daniel Fu <danifu@nvidia.com>
Reviewed-on: http://git-master/r/114904
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>

arm: tegra: kai: fix time does not increase in lp0

time does not increase in LP0 because GPIO4 is configured as POR.
Change to active_low and pull push to fix the issue.

Bug 1014548

Change-Id: I13c65ac6a4f3ae9158c58922e1ad6982f24bb103
Signed-off-by: Chandler Zhang <chazhang@nvidia.com>
Reviewed-on: http://git-master/r/114866
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-by: Jinyoung Park <jinyoungp@nvidia.com>

video: tegra: dc: consider bandwidth efficiency for tegra2

This is similar to commit a62be5b5595ad86411ced81bceeb3d6a693426d2
pushed for rel-14 branch.

Bug 1004341

Signed-off-by: Bharat Nihalani <bnihalani@nvidia.com>

Reviewed-on: http://git-master/r/111227
(cherry-picked from fbfce3106da8dad18948103c812bdd9d45ffdd06)

Change-Id: Ib459094fd6499b3cc63bc534bf36e57dc98ce62b
Reviewed-on: http://git-master/r/114584
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

asoc: codecs: max98088: Headset Detection

Add code for headset detection according to that
state transitions mentioned for JKSNS field in the
max98088 codec datasheet

Bug: 110529
Bug: 1008246

Signed-off-by: Nikesh Oswal <noswal@nvidia.com>
Reviewed-on: http://git-master/r/112127
(cherry picked from commit 12a2259e0e9cf7da4bf64bad2a97c32cec41477c)

Change-Id: I7d45b210dd02f181e71a08d9b3de7cff109dd88b
Reviewed-on: http://git-master/r/114445
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Nikesh Oswal <noswal@nvidia.com>
Reviewed-by: Scott Peterson <speterson@nvidia.com>

asoc: tegra: Change HW disabling dequence and I2S clock parent

Change HW disabling dequence and I2S clock parent in slave mode
for voice call use-case

Bug: 1005176
Signed-off-by: Nikesh Oswal <noswal@nvidia.com>
Reviewed-on: http://git-master/r/110529
(cherry picked from commit 4b138cdeb3374575bde9f49d0c644faa91ced68f)

Change-Id: Ia037ed5ef45d38972c3e1e1a78b4b7b7f39d8f72
Reviewed-on: http://git-master/r/114444
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Nikesh Oswal <noswal@nvidia.com>
Reviewed-by: Scott Peterson <speterson@nvidia.com>

media: video: tegra: ar0832:Update Aptina settings

updated MT9E013 and AR0832 Recommended Settings

Bug 1009371

Change-Id: Ib1e4ce2f42ebc8d2080a47613cf7054a19198dda
Signed-off-by: Amy Deng <amyd@nvidia.com>
Reviewed-on: http://git-master/r/113092
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Yining Deng <ydeng@nvidia.com>
Reviewed-by: Frank Chen <frankc@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

video: tegra: dc: support disp mode override via boot args

Allows overidding the default disp mode without having to recompile
the kernel. Boot args can be specified in the following format:

disp_params=<rgb|hdmi|dsi>:pclk,h_active,v_active,h_ref_to_sync,
v_ref_to_sync,h_sync_width,v_sync_width,h_back_porch,v_back_porch,
h_front_porch,v_front_porch;<rgb|hdmi|dsi>:pclk,h_active,...

Bug 969088

Change-Id: Id0acf608de145493f6749d5b799d4bbb8162ba72
Signed-off-by: Nirav Patel <nipatel@nvidia.com>
Reviewed-on: http://git-master/r/104604
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

ARM: Tegra: cardhu: No longer invert backlight on PM313

Backlight value was inverted for panels with PM313.
This assumed the panel was the 15", but because the
10.1" (AUO) is more prevalent and doesn't have the
inverted backlight signal we no longer need to
invert it. Note this will fix the backlight issue
for AUO E1198 boards but break it for 15".

Bug 962636
Reviewed-on: http://git-master/r/#change,93965
Signed-off-by: Graziano Misuraca <gmisuraca@nvidia.com>
Change-Id: Icb65592eb2df21e349e5a759a780e4438a0f5b26
Reviewed-on: http://git-master/r/95728
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

arm: tegra: pm269: 12.75mhz emc rate

Add 12.75mhz emc frequency for Samsung K4P8G304EB-FGC2
LPDDR2 1GB memory chip.

Bug 1011100

Change-Id: Ibbbb3f002c36c31cd2806051803ddd3ba9daa63b
Signed-off-by: Wen Yi <wyi@nvidia.com>
(cherry picked from commit a37cb14dc441005ddd977b6a83f41df817179d79)
Reviewed-on: http://git-master/r/113383
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
GVS: Gerrit_Virtual_Submit

video: tegra: treat compilation warning as error

- Adding flag to treat warning as error.
- Handled warning of unused function.

bug 949219

Change-Id: Ic6edfc28bae95b8395cbd51e80f14aa4aa663f61
Signed-off-by: Sanjay Singh Rawat <srawat@nvidia.com>
Reviewed-on: http://git-master/r/114624
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

media: video: tegra: sh532u: Focuser range tuning support

Support for get/set capabilities added. Focuser code has a way to
calibrate itself that results in determination of optimal working
range. This along with actual range from device ROM are returned
to the caller. Focuser has the macro at lower end and infinity at
farther end of the range, which are reversed to the user level to
keep the inf/macro positions to be consistent. Focuser range
translation is taken out.

Bug 1004816

Change-Id: I1a086ff10e99940f9ad861397bf7e71e9996c68a
Signed-off-by: Naren Bhat <nbhat@nvidia.com>
Reviewed-on: http://git-master/r/110443
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Charlie Huang <chahuang@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-by: Patrick Shehane <pshehane@nvidia.com>
Tested-by: Charlie Huang <chahuang@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

arm: tegra: cardhu: move VI to PLL_P

As a part of effort to bring in 437MHz clock frequency in EMC,
We need to move VI from PLL_M to PLL_P.

Bug 1005576

Signed-off-by: Jihoon Bang <jbang@nvidia.com>
Reviewed-on: http://git-master/r/112704
(cherry picked from commit c175857e80355857b55e8eb2012c12e94e532835)

Change-Id: Icd314c01625f5c4765b0215735ceafb7d3f25d1e
Reviewed-on: http://git-master/r/114241
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

video: tegra: nvmap: Introduce IOMMU backend instead of IOVMM

Introduce IOMMU backend functions which use DMA API familiy
internally. Replace tegra_iovmm_*() API with arm_iommu_*iova*() and
dma_(un)map_page_(at)().

Change-Id: I0b014926ffedc12bf8f868b163982c6082d050b6
Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/114216
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

ARM: tegra: iovmm: Allow alloc_client to take struct device

Allow tegra_iovmm_alloc_client() to take struct device * instead of
const char *name w/ __tegra_iovmm_alloc_client(). This is necessary to
support IOVMM and IOMMU simultaneously.

Change-Id: I18df5001bfe0ece8f9f15b636eb11def9f228dfb
Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/114215
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

iommu/tegra: smmu: move tegra_smmu_init in core_init

Move tegra_smmu_init in core_init. IOMMU should be available at early
stage of system booting.

Change-Id: I8675e62acef44fb585a731c0f24be716b76ca41a
Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/114214
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

iommu/tegra: smmu: Enable all SWGRP by default

Revisited later with new conf passed from DT.

Change-Id: Ic94a698b0ee56603bbb7f2204ae8c5412ea133b1
Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/114213
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

ARM: tegra: iomap: Introduce TEGRA_IOMMU_{BASE,SIZE} for SMMU/GART

Replace TEGRA_{SMMU,GART}_{BASE,SIZE} with TEGRA_IOMMU_{BASE,SIZE} to
deal with SMMU/GART in unified manner.

This is necessary for DMA mapping API to pass the appropriate IOMMU
address for SMMU and GART in the same code in nvmap.

[Hiroshi Doyu: Squash nvmap parts into "nvmap: API conversion" patch.]

Change-Id: I75429dd56554f880f144c375d2c20e8e8948ceee
Signed-off-by: Vandana Salve <vsalve@nvidia.com>
Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/114212
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

arm: tegra: p1852: Add IOMMU_SMMU support

Migrating from IOVMM_SMMU to IOMMU_SMMU.

Change-Id: If5bca4a3bce15d59641f11dfea3ad6da2a8efbf5
Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/114211
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

ARM: tegra: Remove duplicate clock inits

Change-Id: I80c384d1aa4b1e45a4542acbde6b904f4a014aff
Signed-off-by: Sai Charan Gurrappadi <sgurrappadi@nvidia.com>
Reviewed-on: http://git-master/r/113679
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Reviewed-by: Peter Boonstoppel <pboonstoppel@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
GVS: Gerrit_Virtual_Submit

cpuquiet: Account for the corner case frequency when setting state

Now consider frequency greater than or equal to idle_top_freq as UP

Change-Id: I1332d46d1e42a00b3b31897b158eaf4ccfbaf8f5
Signed-off-by: Sai Charan Gurrappadi <sgurrappadi@nvidia.com>
Reviewed-on: http://git-master/r/113678
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Reviewed-by: Peter Boonstoppel <pboonstoppel@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
GVS: Gerrit_Virtual_Submit

sched: unthrottle rt runqueues in __disable_runtime()

migrate_tasks() uses _pick_next_task_rt() to get tasks from the
real-time runqueues to be migrated. When rt_rq is throttled
_pick_next_task_rt() won't return anything, in which case
migrate_tasks() can't move all threads over and gets stuck in an
infinite loop.

Instead unthrottle rt runqueues before migrating tasks.

Bug 976709

Change-Id: Ie3696702abc560fe8ffa7d2fb5dc5d54d532cc0d
Signed-off-by: Peter Boonstoppel <pboonstoppel@nvidia.com>
(cherry picked from commit 4d18ba5765c206bf9f37634f532d97dabd507a58)
Reviewed-on: http://git-master/r/103417
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

drivers: misc: fixed therm estimator bug

Fixed hi and lo limit bug in thermal estimator driver.

bug 1007726

Change-Id: I2be90ca7d875dbed34004b83f070fb5cbd8bc467
Signed-off-by: Joshua Primero <jprimero@nvidia.com>
Reviewed-on: http://git-master/r/113564
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

ARM: tegra: thermal: fixed some skin thermal bugs

Fixed bug where skin cooling device is being bound to nct
device instead of skin thermal device.

bug 1007726

Change-Id: Ia6316735da8895fd4f4c20c0a76cd6796dafdf9b
Signed-off-by: Joshua Primero <jprimero@nvidia.com>
Reviewed-on: http://git-master/r/113563
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

PM: move initcall_debug message in syscore_resume

debug uart driver needs to be resumed before calling printk
so move debug message after finishing resume

bug 992588

Change-Id: Ia8991a4b7be7a4e2a765c8e6b494fd906b38b98c
Signed-off-by: Daehyoung Ko <dko@nvidia.com>
Reviewed-on: http://git-master/r/108435
(cherry picked from commit 75e7ef273d52b40d5d662541043e7eebc74ee24e)
Reviewed-on: http://git-master/r/110433
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

net: wireless: bcmdhd: Add info_string param with driver/fw/chip info

Signed-off-by: Dmitry Shmidt <dimitrysh@google.com>

Conflicts:

drivers/net/wireless/bcmdhd/dhd_linux.c

net: wireless: bcmdhd: Update wiphy bands on country and band change

Signed-off-by: Dmitry Shmidt <dimitrysh@google.com>

net: wireless: bcmdhd: Update to version 1.28-5

- Fix static analysis error
- Fix UDP out of order issue (wlfc)
- Refactoring Packet filter and Vendor IE logic
- Change request information buffer size (MAC address, STA information)
- Fix kernel paic issue
- Fix Beacon update problem
- Fix Escan Result Parsing
- Fix Not able to associate with WEP Enable AP
- Fix deauth race condition
- Fix p2p issue of same channel concurrency

Signed-off-by: Dmitry Shmidt <dimitrysh@google.com>

net: wireless: bcmdhd: Decrease chip recognition attempts to 3

Signed-off-by: Dmitry Shmidt <dimitrysh@google.com>

net: wireless: bcmdhd: Merge from Version 5.90.195.75

Change-Id: Ie4e507b506e469ef7d33bbfdedf7a3e31c56a0a5
Signed-off-by: Dmitry Shmidt <dimitrysh@google.com>

net: wireless: bcmdhd: Update to version 1.28-4

Change-Id: I5d8dc11cbecc3fba462f9b03f1f1a61f12f236a7
Signed-off-by: Dmitry Shmidt <dimitrysh@google.com>

net: wireless: bcmdhd: Fix FW hang recovery

Change-Id: Ie457a34e9454936a59e7c0962902e12f312fe1a2
Signed-off-by: Dmitry Shmidt <dimitrysh@google.com>

net: wireless: bcmdhd: Fix division by 0 if dhd_watchdog_ms is 0

Signed-off-by: Dmitry Shmidt <dimitrysh@google.com>

net: wireless: bcmdhd: Update to version 1.27

Change-Id: Ib7dba8821fbb455ca9b1cc3d3713c9e29d180fe8
Signed-off-by: Dmitry Shmidt <dimitrysh@google.com>

net: wireless: bcmdhd: Enable 5 GHz support

Update wiphy (wireless hardware description) to
support 5 GHz scan.

Bug 1000888

Change-Id: I1a7a99f97f69dd8f1790f81ee0fb21e209e8d10e
Signed-off-by: Nitin Bindal <nbindal@nvidia.com>
Reviewed-on: http://git-master/r/109556
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Rakesh Kumar <krakesh@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

arm: tegra: pcie: Resolve L4T ethernet failure

1. Removed the stop/add pci devices after rescan to
   avoid panic in 2nd time suspend for L4T.
2. Moved the setting irq code before adding devices
   to avoid probe failure for usb3.

Bug 959642
Bug 946385
Bug 1015404

Signed-off-by: Jay Agarwal <jagarwal@nvidia.com>
Reviewed-on: http://git-master/r/112959
(cherry picked from commit 01ced1b7d14dc3711fa1fa394dd5190014f0d8d6)

Change-Id: I61f1e964e196332e0f9e498979e2b1f611e7c742

arm: tegra: pcie: Rename/Restructure the driver

1. Remove unwanted macros and rename some of macros
   and apis
2. Add comments for description of some statements

Bug 959642
Bug 956573
Bug 1015404

Signed-off-by: Jay Agarwal <jagarwal@nvidia.com>
Reviewed-on: http://git-master/r/107840
(cherry picked from commit 74d5c98c9ad0cf5c474e8a71310778a97913b2fd)

Change-Id: I40858beadc6b43db223f2daf948e4ee138e163e3

arm: tegra: pcie: Add hotplug functionality

1. do power off on suspend and power on while
   resume and other initialization.
2. call same functionality as suspend/resume
   for disconnect/connect of hotplug also.

Bug 946385

Signed-off-by: Jay Agarwal <jagarwal@nvidia.com>
Reviewed-on: http://git-master/r/110343
(cherry picked from commit 5d811e3f6beb17bc273e480d1631fbe622fe3c79)

Change-Id: Ideeeb074fe8b32a0dc001585b51f920e6e788168

HACK: video: tegra: host: add "register_sets" back

Without this code, we always get "NvRmModuleGetNumInstances:
Could not read register_sets" messages when we run graphics_submit.

Change-Id: Ia1489a694adfb49a974ab7f2b0b80fde6340e233
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

ARM: Tegra: remove regulator_{disable|enable} from tegra_usb_phy_power_{off|on}

Commit ad8b8ae5e (http://git-master/r/105364) added these calls, but it
breaks usb cable hotplug on Ventana.

Change-Id: Ic2e20575f53e851607306496516f55d15997ca27
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

net: wireless: bcmdhd: do not register for L4T only

Commit ba5525887e56bc29b884f9edc56349ff54a39174 changed the way
we register bcmdhd for L4T. This breaks bcmdhd loading on Android.
Add a compile time check to load bcmdhd on Android.

Change-Id: I515798b1fabbadf00047a125dee43f0a048f9bab
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

crypto: tegra-se: Enable interrupts after clock enable

Because SE interrupts could be enabled in bootloader, if it's not
cleared before jumping into kernel, it continues to assert the
interrupt line to interrupt controller. When SE interrupts is
enabled in kernel, to access SE registers in IST without clock
enabled hung the CPU. To fix this issue, interrupt enabling is
moved after clock is enabled.

bug 1010334

Change-Id: I1b909efce2c9d92c3112039fc217f7c1360f9bbb
Reviewed-on: http://git-master/r/113073
(cherry picked from commit b06e6662f738ad01a3b2b6803db654abaa03385e)

Signed-off-by: Victor(Weiguo) Pan <wpan@nvidia.com>
Change-Id: Ide4b0295c781e0bba7aa071616e3e6160e44ee76
Reviewed-on: http://git-master/r/114064
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

video: tegra: host: t30: Add syncpt/epp in ISP ch

This change is for programming VI and EPP through ISP channel
to support RGB input and dual video capturing.

1. Added syncpt in the ISP channel to submit the channel.
2. Added epp clock to use VI2EPP for RGB capture.

Note: To use this channel, EPP should be free from 2D.

Bug 988546

Change-Id: I17fe278c9325aac2ea1e29cbaf50c8a4499d8551
Signed-off-by: Songhee Baek <sbaek@nvidia.com>
Reviewed-on: http://git-master/r/113965
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

video: tegra: host: resolve compilation time warnings

- Handled warning of, possible use of uninitialized variable and unused
function.

bug 949219

Change-Id: I0d7d345e66774f08e52a12e653a5e7aa6a7a8591
Signed-off-by: Sanjay Singh Rawat <srawat@nvidia.com>
Reviewed-on: http://git-master/r/113905
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User

video: tegra: resolve compilation time warnings

- Handled warning of unused label.

bug 949219

Change-Id: I72e22063b199562c4a4c065419c1656e3e8ff7ff
Signed-off-by: Sanjay Singh Rawat <srawat@nvidia.com>
Reviewed-on: http://git-master/r/113880
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

video: tegra: dc: vblank worker

Freeze vblank worker while suspending by adding the work into
system freezewq. This eliminates a kernel panic caused by nvsd
reading brightness valuesfrom display while clock gated.

Bug 1006180
Bug 1003969
Bug 1003730

Change-Id: Ice9bfb18e5c826ae063c2b901421b1047ff9d2f0
Signed-off-by: Mark Zhang <markz@nvidia.com>
Reviewed-on: http://git-master/r/112880
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

video: tegra: dtv: Fixed clk disabling issue

APB clock for dtv logic block should be recorded by dtv_ctx->clk
hanlder. Otherwise, kernel will trigger a NULL point error in suspend.

Fixed Bug 1011149

Change-Id: I5d342ab6fc8ffb71211e370d304b17d5d44eef20
Signed-off-by: Adam Jiang <chaoj@nvidia.com>
Reviewed-on: http://git-master/r/108743
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

input: misc: fix compile time warning

Add init value for rc in lightsensor_ioctl() to fix compile time
warning.

Change-Id: Ifcb953873b5bc861303d9d32b1906a69b2c8311f
Signed-off-by: Chandler Zhang <chazhang@nvidia.com>
Reviewed-on: http://git-master/r/113121
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

usb: otg: remove otg callback

Previously the callback was added to control USB VBUS.
The standard way is to use regulator.

Bug 997805

Change-Id: I88b15befaf4e162478da19ead50695978b2c5f4b
Signed-off-by: Chandler Zhang <chazhang@nvidia.com>
Reviewed-on: http://git-master/r/112901
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Syed Rafiuddin <srafiuddin@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

arm: tegra: kai: use regulator to control vbus

Use regulator instead of USB OTG callback to control USB VBUS.

Bug 997805

Change-Id: Icd2869f51e312c52b272a6e32fa8c7ab8763a5ac
Signed-off-by: Chandler Zhang <chazhang@nvidia.com>
Reviewed-on: http://git-master/r/112900
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>