7 years agoasoc: aic326x machine: use common platform data
Ravindra Lokhande [Fri, 6 Apr 2012 13:09:57 +0000]
asoc: aic326x machine: use common platform data

replace platform specific data with common platform data

Change-Id: Ie34b9b9288bf76a004db0bcdf4fd59845e0c9d71
Signed-off-by: Ravindra Lokhande <rlokhande@nvidia.com>
Reviewed-on: http://git-master/r/95083
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Scott Peterson <speterson@nvidia.com>

7 years agoASoC: max98095 codec: check return value
Ravindra Lokhande [Fri, 6 Apr 2012 12:55:30 +0000]
ASoC: max98095 codec: check return value

check max98095_reset() return value, this function fails if codec
read/write fails.

Change-Id: I4dddd75e0870e4168288396a462133f7287ad72e
Signed-off-by: Ravindra Lokhande <rlokhande@nvidia.com>
Reviewed-on: http://git-master/r/95078
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Scott Peterson <speterson@nvidia.com>

7 years agoarm: tegra: kai: enable correct gpio for NFC
Rakesh Goyal [Fri, 6 Apr 2012 08:06:49 +0000]
arm: tegra: kai: enable correct gpio for NFC

Bug 960069

Change-Id: Id7559b7b8a74f8ec0b5e127b8986c075fab21d59
Signed-off-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-on: http://git-master/r/95037
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

7 years agoARM: tegra: usb_phy: Fix remote wakeup issue during LP0
Rakesh Bodla [Tue, 3 Apr 2012 09:08:25 +0000]
ARM: tegra: usb_phy: Fix remote wakeup issue during LP0

Sleep walk settings for remote wakeup are set properly to detect
remote wakeup events

Bug 963900

Signed-off-by: Rakesh Bodla <rbodla@nvidia.com>
(cherry picked from commit fd9ccb33d91e0aaf0619ec065e1ba7ee52edf1bd)
Change-Id: I7c52d45901ce522c51570bdd84513fbbb6c93911
Reviewed-on: http://git-master/r/94892
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

7 years agousb: ehci: tegra: Fix tegra utmip issues
Rakesh Bodla [Tue, 3 Apr 2012 06:50:09 +0000]
usb: ehci: tegra: Fix tegra utmip issues

Following tegra USB UTMIP issues are fixed:
1. Clear run bit directly in the command
register instead of updating the shadow variable.
2. Reset EHCI while resuming from LP0 for
tegra 2.
3. Wait for 25ms to ensure port is resumed.

Bug 912880

Reviewed-on: http://git-master/r/92565
(cherry picked from commit 928ad32858af191fb9d90d736b910499121e10df)
Change-Id: I676f7f23fd8833a179e1670e6aed28a01baaf15b
Reviewed-on: http://git-master/r/94829
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Rakesh Bodla <rbodla@nvidia.com>
Tested-by: Rakesh Bodla <rbodla@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

7 years agoARM: tegra: usb_phy: Fix tegra 2 utmip issues
Rakesh Bodla [Mon, 2 Apr 2012 07:00:59 +0000]
ARM: tegra: usb_phy: Fix tegra 2 utmip issues

Following tegra 2 UTMIP issues are fixed:
1. Remove unnecessary register programming
for tegra 2 while enable/disable OBS bus.
2. Clear run bit while disabling OBS bus.

Bug 912880

Reviewed-on: http://git-master/r/92564
(cherry picked from commit f2d53530033f30104effd35deec4606303b89918)
Change-Id: I441cc6a180c434b6a4e7880729676bb849fb15fb
Reviewed-on: http://git-master/r/94828
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Rakesh Bodla <rbodla@nvidia.com>
Tested-by: Rakesh Bodla <rbodla@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

7 years agoARM: defconfig: fix kernel build of p852
Vishal Singh [Wed, 4 Apr 2012 09:46:56 +0000]
ARM: defconfig: fix kernel build of p852

Enable CONFIG_TEGRA_GRHOST and CONFIG_MMC_SDHCI_PLTFM to fix
kernel build and enable SD/MMC respectively.

Bug 938667.
Bug 949584.

Change-Id: I649445da96b34c02d1142a1f801bbc0039e81c6c
Signed-off-by: Vishal Singh <vissingh@nvidia.com>
Reviewed-on: http://git-master/r/94222
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Manoj Chourasia <mchourasia@nvidia.com>
Reviewed-by: Sandeep Trasi <strasi@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>

7 years agoASoC: Tegra: customize modem parameters for voice call.
Ankit Gupta [Thu, 29 Mar 2012 05:28:56 +0000]
ASoC: Tegra: customize modem parameters for voice call.

Add support to customize modem parameters for voice call.
Signed-off-by: Ankit Gupta <ankitgupta@nvidia.com>

Change-Id: I947bf1955713c4ae19e5dd829091bd7e51bca08f
Reviewed-on: http://git-master/r/93091
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Ankit Gupta (Engrg-SW) <ankitgupta@nvidia.com>
Reviewed-by: Ravindra Lokhande <rlokhande@nvidia.com>
Reviewed-by: Scott Peterson <speterson@nvidia.com>

7 years agoARM: tegra: emc: Reduce DDR3 min rate to 25.5MHz
Daniel Solomon [Mon, 19 Mar 2012 18:45:03 +0000]
ARM: tegra: emc: Reduce DDR3 min rate to 25.5MHz

Reduce DDR3 min rate to 25.5MHz to save power.

Bug 947228

Signed-off-by: Daniel Solomon <daniels@nvidia.com>
(cherry picked from commit f09e23ac983a24d9ba03a11764b871b9d548f4dc)
Change-Id: I4cd19099943cfa06d7fe7cca308042c44e708748
Reviewed-on: http://git-master/r/93958
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>

7 years agoasoc: tegra: ALC5640 machine: Fix ext mic detect issue
Manoj Gangwal [Fri, 16 Mar 2012 13:25:26 +0000]
asoc: tegra: ALC5640 machine: Fix ext mic detect issue

Enable/disable the ext mic depending on the jack notification
for insertion/removal comes.This is done to save the Audio power.

Bug 955019

Signed-off-by: Manoj Gangwal <mgangwal@nvidia.com>
(cherry picked from commit 7a22037fd4a274637a5bdb18a8c5452fe58aad32)
Change-Id: I1a8b47c4e9c424a914f546b48c86a6fb07d8e42a
Reviewed-on: http://git-master/r/93956
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoasoc: tegra: ALC5640 machine: Turn off ext_mic by default
Daniel Solomon [Mon, 12 Mar 2012 22:55:16 +0000]
asoc: tegra: ALC5640 machine: Turn off ext_mic by default

Drive ext mic gpio (active low) to 1 during init. It will
be toggled as needed by ext mic events.

Bug 949026

Signed-off-by: Daniel Solomon <daniels@nvidia.com>
(cherry picked from commit de806c193fde5cd8c5b0285efeeaef4adb7be611)
Change-Id: Idd72830d89ebe080739694d7f2c8f6ad80d5cdf5
Reviewed-on: http://git-master/r/93955
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoconfig: rename+move bcm4329 nvram file
Mursalin Akon [Wed, 4 Apr 2012 18:20:56 +0000]
config: rename+move bcm4329 nvram file

bcm43330 nvram file is located as
/lib/firmware/nvram_4330.txt.
Make the name convension and location
the same for bcm4329 nvram file.

Bug 953186

Change-Id: Id1a606b341302dbef98f9edb481c18a8f3b3617d
Signed-off-by: Mursalin Akon <makon@nvidia.com>
Reviewed-on: http://git-master/r/94571
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

7 years agoasoc: codecs: Enable bias off when idle for rt5639 and rt5640
Daniel Solomon [Thu, 22 Mar 2012 01:38:22 +0000]
asoc: codecs: Enable bias off when idle for rt5639 and rt5640

Allow bias off in order to turn off clock extern1 when codec
is not used.

Bug 957635

Signed-off-by: Daniel Solomon <daniels@nvidia.com>
(cherry picked from commit adc6929ab3170acd6a0b2cee4f65fa20a1c1d30f)
Change-Id: I4f2e91b0cd9bb4516a5722d2df268f08e78f92e2
Reviewed-on: http://git-master/r/93949
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Scott Peterson <speterson@nvidia.com>
Reviewed-by: Sumit Bhattacharya <sumitb@nvidia.com>

7 years agovideo: tegra: dc: avoid overflow in bw calculation
Jon Mayo [Tue, 27 Mar 2012 20:55:31 +0000]
video: tegra: dc: avoid overflow in bw calculation

Change to using kbytes/sec to avoid overflowing 32-bit integer in
bandwidth calculation.
Changing efficiency adjustment to ~35%.

Bug 958016

Change-Id: Ia8bdf79e4b3e4bc65517db18d9f351a5f840805e
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/92658
Reviewed-by: Automatic_Commit_Validation_User

7 years agoARM: Fix calling ipi_timer() from local timer IRQ
Antti P Miettinen [Wed, 4 Apr 2012 17:59:52 +0000]
ARM: Fix calling ipi_timer() from local timer IRQ

Commit d4c9c46147102dfc403691ed52609ae36ba5df08 moved
irq_enter()/irq_exit() calls around. This caused
irq_enter()/irq_exit() for ipi_timer() to be missing
when ipi_timer() was called from local timer IRQ.
Add the missing calls.

Bug 961231

Change-Id: I32bfdf2620ca3df31d90f16924b06f4a1e24c0b7
Signed-off-by: Antti P Miettinen <amiettinen@nvidia.com>
Signed-off-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-on: http://git-master/r/94566
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agovideo: tegra: host: Move context init outside __init
Terje Bergstrom [Thu, 29 Mar 2012 12:23:28 +0000]
video: tegra: host: Move context init outside __init

Context handler init functions are referred to from non-init section.
The functions should not have __init attribute, even though they're
only used in init time.

Change-Id: I1b6bca48504fd7989edaa037c4b022a76244b0f6
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/93216
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-by: Ken Adams <kadams@nvidia.com>
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

7 years agoARM: 7133/1: SMP: fix per cpu timer setup before the cpu is marked online
Thomas Gleinxer [Fri, 14 Oct 2011 11:44:41 +0000]
ARM: 7133/1: SMP: fix per cpu timer setup before the cpu is marked online

The problem is related to the early enabling of interrupts and the
per cpu timer setup before the cpu is marked online. This doesn't
need to be done in order to call calibrate_delay().

calibrate_delay() monitors jiffies, which are updated from the CPU
which is waiting for the new CPU to set the online bit.

So simply calibrate_delay() can be called on the new CPU just from
the interrupt disabled region and move the local timer setup after
stored the cpu data and before enabling interrupts.

This solves both the cpu_online vs. cpu_active problem and the
affinity setting of the per cpu timers.

Change-Id: I3ce734e674715f59d057a76821fc5f93706b875f
Signed-off-by: Thomas Gleinxer <tglx@linutronix.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/87227
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoARM: SMP: wait for CPU to be marked active
Russell King [Mon, 20 Jun 2011 15:46:01 +0000]
ARM: SMP: wait for CPU to be marked active

When we bring a CPU online, we should wait for it to become active
before entering the idle thread, so we know that the scheduler and
thread migration is going to work.

Change-Id: I0fa128768f575ddd0a5d976be66869dbd88f355e
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/87226
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoARM: tegra20: pm: flush L1 data before exit coherency
Prashant Gaikwad [Tue, 27 Mar 2012 12:10:35 +0000]
ARM: tegra20: pm: flush L1 data before exit coherency

Bug 934368

Change-Id: I960d8ae5c6390e719b8ee6c9cbc067cf8d28122d
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/92543
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>

7 years agoARM: tegra30: pm: flush L1 data before exit coherency on secondary CPU
Varun Wadekar [Tue, 27 Mar 2012 10:47:20 +0000]
ARM: tegra30: pm: flush L1 data before exit coherency on secondary CPU

Change-Id: Ib16ee5efdf8686d750a5263baa8fff4d258e68cd
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/92542
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoARM: tegra: rethink the cpu suspend-resume code path
Varun Wadekar [Fri, 30 Mar 2012 04:13:40 +0000]
ARM: tegra: rethink the cpu suspend-resume code path

The current kernel methodology expects that tegra_cpu_suspend
is actually the last function in the entire suspend sequence.

In order to achieve this, the code needs to be remodelled a
bit so that we actually execute native cpu_suspend at the end
of the suspend sequence. This allows us to leverage all the
cpu_suspend code developed by ARM in the upstream kernels.

Bug 934368

Change-Id: I94172d7adaa54c10043c479a57b270925d85a16b
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/84481
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoARM: tegra: remove usage of USE_TEGRA_CPU_SUSPEND
Varun Wadekar [Tue, 27 Mar 2012 11:58:00 +0000]
ARM: tegra: remove usage of USE_TEGRA_CPU_SUSPEND

Bug 934368

Change-Id: Ic9d75cbb0c324b1858b2e476e33dd4f96349bce3
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/86351
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoRevert "ARM: tegra: power: Workaround PMD corruption by cpu_resume_mmu"
Dan Willemsen [Wed, 2 Nov 2011 23:49:01 +0000]
Revert "ARM: tegra: power: Workaround PMD corruption by cpu_resume_mmu"

This reverts commit 48565a367997c1748c655bc834e06b348d4e5b2c.

Change-Id: I0e1411f1260ae916c510478276d88b41416a0d42
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/85670
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoARM: pm: add L2 cache cleaning for suspend
Russell King [Thu, 1 Sep 2011 10:57:59 +0000]
ARM: pm: add L2 cache cleaning for suspend

We need to ensure that state is pushed out from the L2 cache when
suspending so that the resume paths can access their data before the
MMU and caches have been re-initialized.  Add the necessary calls to
__cpu_suspend_save().

Change-Id: Idf7516347478731b722e62a37b5cc9f1c52be68e
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Shawn Guo <shawn.guo@linaro.org>
Tested-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/85729
Reviewed-by: Automatic_Commit_Validation_User

7 years agoARM: pm: convert some assembly to C
Russell King [Thu, 1 Sep 2011 10:52:33 +0000]
ARM: pm: convert some assembly to C

Convert some of the sleep.S guts to C code, which makes it easier to
use our macros and to add L2 cache handling.  We provide a helper
function, __cpu_suspend_save(), which deals with saving the common
state, setting up for resume, and flushing caches.

The remainder left as assembly code is the saving of the CPU general
purpose registers, and allocating space on the stack to save the CPU
specific registers and resume state.

Change-Id: I0e8bc196fa7302cfe52c17d39675dadf25ea1004
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Shawn Guo <shawn.guo@linaro.org>
Tested-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/85728
Reviewed-by: Automatic_Commit_Validation_User

7 years agoARM: pm: no need to save/restore context ID register
Russell King [Sun, 28 Aug 2011 09:30:34 +0000]
ARM: pm: no need to save/restore context ID register

There is no need to save and restore the context ID register on ARMv6
and ARMv7 with a temporary page table as we write the context ID
register when we switch back to the real page tables for the thread.

Moreover, the temporary page tables do not contain any non-global
mappings, so the context ID value should not be used.  To be safe,
initialize the register to a reserved context ID value.

Change-Id: I7de05e736dde5bc1b8ab682a8660eaaba52104cf
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Shawn Guo <shawn.guo@linaro.org>
Tested-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/85727
Reviewed-by: Automatic_Commit_Validation_User

7 years agoARM: pm: get rid of cpu_resume_turn_mmu_on
Russell King [Wed, 31 Aug 2011 22:26:18 +0000]
ARM: pm: get rid of cpu_resume_turn_mmu_on

We don't require cpu_resume_turn_mmu_on as we can combine the ldr
instruction with the following code provided we ensure that
cpu_resume_mmu is aligned for older CPUs.  Note that we also align
to a 32-byte boundary to ensure that the code can't cross a section
boundary.

Change-Id: I356eeff464eec48d167d98ee45b80b300d7c4c99
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Shawn Guo <shawn.guo@linaro.org>
Tested-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/85726
Reviewed-by: Automatic_Commit_Validation_User

7 years agoARM: pm: only use preallocated page table during resume
Varun Wadekar [Tue, 27 Mar 2012 11:56:39 +0000]
ARM: pm: only use preallocated page table during resume

Only use the preallocated page table during the resume, not while
suspending.  This avoids the overhead of having to switch unnecessarily
to the resume page table in the suspend path.

Change-Id: Ib71c9b60b0ec39749aadc6f592549d213e6a852e
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Shawn Guo <shawn.guo@linaro.org>
Tested-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/85725
Reviewed-by: Automatic_Commit_Validation_User

7 years agoARM: pm: preallocate a page table for suspend/resume
Russell King [Fri, 26 Aug 2011 19:28:52 +0000]
ARM: pm: preallocate a page table for suspend/resume

Preallocate a page table and setup an identity mapping for the MMU
enable code.  This means we don't have to "borrow" a page table to
do this, avoiding complexities with L2 cache coherency.

Change-Id: I625d3622359e961e4f358171e9a82b51bcecf9c2
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Shawn Guo <shawn.guo@linaro.org>
Tested-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/85671
Reviewed-by: Automatic_Commit_Validation_User

7 years agoARM: pm: force non-zero return value from __cpu_suspend when aborting
Russell King [Sat, 27 Aug 2011 10:17:36 +0000]
ARM: pm: force non-zero return value from __cpu_suspend when aborting

Ensure that the return value from __cpu_suspend is non-zero when
aborting.  Zero indicates a successful suspend occurred.

Change-Id: I53afba30ecd8a34ea16f39eaafa07e7b0c127e64
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Shawn Guo <shawn.guo@linaro.org>
Tested-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/85669
Reviewed-by: Automatic_Commit_Validation_User

7 years agoconfig: tegra[3]: remove trailing /
Mursalin Akon [Wed, 4 Apr 2012 16:22:24 +0000]
config: tegra[3]: remove trailing /

Remove the trailing / from bcmdhd firmware path.

Change-Id: I76e415784cd29bf2551b36c236d84bcbbc5bda1b
Signed-off-by: Mursalin Akon <makon@nvidia.com>
Reviewed-on: http://git-master/r/94557
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

7 years agoARM: tegra: Enterprise: Provide settling time for 3.3 Voltage rail
Chaitanya Bandi [Wed, 4 Apr 2012 14:44:39 +0000]
ARM: tegra: Enterprise: Provide settling time for 3.3 Voltage rail

It is observed that voltage rails for 3V3 is taking around 400us
for setting it output. Providing the startup delay of 500us for this
rail so that rails are stablized at desired level before any consumer
uses that rail.

Bug 959902

Change-Id: I602b428db44d595a94d69fccb3340a77c3819a3b
Signed-off-by: Chaitanya Bandi <bandik@nvidia.com>
Reviewed-on: http://git-master/r/94537
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

7 years agolib: devres: add convenience function to remap a resource
Wolfram Sang [Tue, 25 Oct 2011 13:16:47 +0000]
lib: devres: add convenience function to remap a resource

Almost every platform_driver does the three steps get_resource,
request_mem_region, ioremap. This does not only lead to a lot of code
duplication, but also a huge number of similar error strings and
inconsistent error codes on failure. So, introduce a helper function
which simplifies remapping a resource and make it hard to do something
wrong and add documentation for it.

Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Acked-by: Tejun Heo <tj@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
(cherry picked from mainline commit
72f8c0bfa0de64c68ee59f40eb9b2683bffffbb0)

Change-Id: I600c5200104e234d42ca396e50853133b3ab4b1f
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/94533
Reviewed-by: Automatic_Commit_Validation_User

7 years agodmaengine: add context parameter to prep_slave_sg and prep_dma_cyclic
Alexandre Bounine [Thu, 8 Mar 2012 20:35:13 +0000]
dmaengine: add context parameter to prep_slave_sg and prep_dma_cyclic

Add context parameter to device_prep_slave_sg() and device_prep_dma_cyclic()
interfaces to allow passing client/target specific information associated
with the data transfer.
Modify all affected DMA engine drivers.

Signed-off-by: Alexandre Bounine <alexandre.bounine@idt.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>

Cherry-picked from mainline
185ecb5f4fd43911c35956d4cc7d94a1da30417f

Change-Id: Ief79d20f6e9d367ee2b530d08df72864fb16895a
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/94464
Reviewed-by: Automatic_Commit_Validation_User

7 years agodmaengine/dma_slave: introduce inline wrappers
Alexandre Bounine [Thu, 8 Mar 2012 21:11:18 +0000]
dmaengine/dma_slave: introduce inline wrappers

Add inline wrappers for device_prep_slave_sg() and device_prep_dma_cyclic()
interfaces to hide new parameter from current users of affected interfaces.
Convert current users to use new wrappers instead of direct calls.
Suggested by Russell King [https://lkml.org/lkml/2012/2/3/269].

Signed-off-by: Alexandre Bounine <alexandre.bounine@idt.com>
Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>

cherry-picked from mainline commit
16052827d98fbc13c31ebad560af4bd53e2b4dd5

Change-Id: I929a49556539621a0546829e88b3caa498c94be2
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/94463

7 years agodmaengine: add new enum dma_transfer_direction
Vinod Koul [Thu, 13 Oct 2011 09:45:27 +0000]
dmaengine: add new enum dma_transfer_direction

This new enum removes usage of dma_data_direction for dma direction. The new
enum cleans tells the DMA direction and mode
This further paves way for merging the dmaengine _prep operations and also for
interleaved dma

Suggested-by: Jassi Brar <jaswinder.singh@linaro.org>
Reviewed-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
Cherry-picked from mainline
49920bc66984a512f4bcc7735a61642cd0e4d6f2

Change-Id: Ia554f0635e46d98aac4899d369533b8b4f7dd294
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/94462
Reviewed-by: Automatic_Commit_Validation_User

7 years agoarm: tegra: turn off pll-a/p in LP1
Mayuresh Kulkarni [Fri, 24 Feb 2012 14:05:36 +0000]
arm: tegra: turn off pll-a/p in LP1

- current code does not turn off pll-a/p in LP1
irrespective of voice call status
- add a new flag to indicate voice call on-going
- use PMC_SCRATCH37 to hold this flag
- if it is set, do not turn-off pll-a/p during LP1
- save-restore PMC_SCRATCH37 if it was used to hold the
voice call on-going flag
- fix few misc formatting issues in tegra3_cpu_clk32k

Bug 924817

Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-on: http://git-master/r/85768
(cherry picked from commit 7853981c987ae329620bb54d869016cb74a6c054)

Change-Id: Id5348d2eb44a4bacaf00f6d17edceedaef819e29
Reviewed-on: http://git-master/r/94395
Tested-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

7 years agotegra_audio: add default implementation for tegra_is_voice_call_active()
Mayuresh Kulkarni [Mon, 26 Mar 2012 12:48:54 +0000]
tegra_audio: add default implementation for tegra_is_voice_call_active()

- mods kernel do not enable audio related configs in kernel
- tegra_is_voice_call_active() is defined only when audio
related configs are enabled
- this commit adds a default implementation for tegra_is_voice_call_active()
which can be called from generic pm code in mach-tegra
- it also makes the default implementation inline

Bug 924817

Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-on: http://git-master/r/92312
(cherry picked from commit 1b7507db6f2266d5cac10fcd4b3e7b06f6d2f3bd)

Change-Id: I286237b838c39cf5c7784c014459bdcaf50c31ef
Reviewed-on: http://git-master/r/94394
Tested-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

7 years agoARM: tegra: p852: fix kernel boot
Vishal Singh [Tue, 3 Apr 2012 12:15:02 +0000]
ARM: tegra: p852: fix kernel boot

CSUS clock can't be driven from any clk other than clk_m. So
updating its parent to clk_m.
Removing pll_m's entry as it's already enabled and running at
666 MHz which is our requirement.
Removing tegra_init_suspend() as it's not needed on p852.

Bug 938667.
Bug 949584.

Change-Id: Id62401de11d213d4e0b87b52fe30e2b37372bbea
Signed-off-by: Vishal Singh <vissingh@nvidia.com>
Reviewed-on: http://git-master/r/94237
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Manoj Chourasia <mchourasia@nvidia.com>
Reviewed-by: Sandeep Trasi <strasi@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

7 years agoRegulator: gpio_swtich: Remove gpio_switch regulator driver
Laxman Dewangan [Tue, 3 Apr 2012 09:02:16 +0000]
Regulator: gpio_swtich: Remove gpio_switch regulator driver

The gpio_switch regulator is NV driver developed during
tegra3 bringup time. The driver functionality is upstreamed
to mainline into fixed regulator and it is accepted by community.
The required functionality is also downstream and required client
driver is moved to use the fixed  regulator. Hence this driver
is just duplicating functionality with fixed regulator and hence
removing this.

Change-Id: I893328497644612a2267f2c24298ff2f668e75d4
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/94198
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>

7 years agoARM: tegra: configs: Remove CONFIG_REGULATOR_GPIO_SWITCH
Laxman Dewangan [Tue, 3 Apr 2012 08:55:44 +0000]
ARM: tegra: configs: Remove CONFIG_REGULATOR_GPIO_SWITCH

Removing config variable CONFIG_REGULATOR_GPIO_SWITCH as the
same functionality can be achieve with fixed regulator.

Change-Id: I803105f2a247da70721f29562881448bb00d3a44
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/94197
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

7 years agoARM: tegra: cardhu: Use fixed regulator for open drain gpio
Laxman Dewangan [Tue, 3 Apr 2012 08:55:02 +0000]
ARM: tegra: cardhu: Use fixed regulator for open drain gpio

The gpio regulator which is controlled through the gpio, which
is open drain type, is using the gpio_switch regulator.
The open drain support is added into the fixed regulator
and hence moving the regulator to use fixed regulator.

Change-Id: I1428d7e10ff469587c45fe913c4be8b4e35cb5bd
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/94196
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>

7 years agousb: gadget: fsl_udc: boost cpu rate for transaction
Alok Chauhan [Wed, 7 Mar 2012 08:18:41 +0000]
usb: gadget: fsl_udc: boost cpu rate for transaction

Boost CPU rate floor ( based upon
TEGRA_GADGET_BOOST_CPU_FREQ ) before any transaction
starts and remove the boost once the transaction completes.

Bug 923594

Signed-off-by: Alok Chauhan <alokc@nvidia.com>
Reviewed-on: http://git-master/r/88247
(cherry picked from commit cfb0c2d7bc7c00962c97c895958e2e0a13a14cfd)

Change-Id: I6c7524dbf90d6c3c8840ee8cd88e896dde6aa041
Reviewed-on: http://git-master/r/94173
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

7 years agoarm: tegra: enterprise: enable pullup for preq1 on A03/A04
Tom Cherry [Fri, 23 Mar 2012 20:57:32 +0000]
arm: tegra: enterprise: enable pullup for preq1 on A03/A04

Bug 958089

Reviewed-on: http://git-master/r/92054
(cherry picked from commit 92ff85f937cefc0fbe029607e23557adcf13f9fd)

Change-Id: I7e8815f758c2527da3ab635f102888e5a6d5e951
Signed-off-by: Tom Cherry <tcherry@nvidia.com>
Reviewed-on: http://git-master/r/94118
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

7 years agomfd: tps80031: add option to enable internal pullup or pulldown
Tom Cherry [Fri, 23 Mar 2012 20:55:52 +0000]
mfd: tps80031: add option to enable internal pullup or pulldown

Bug 958089

(cherry-picked from commit 7f4c6d6b9dd2b06984b59dcd60d92026cab4c87c)
Reviewed-on: http://git-master/r/92053

Change-Id: I0f2bdb5482fdcb508808d2d58771d74a05b5597f
Signed-off-by: Tom Cherry <tcherry@nvidia.com>
Reviewed-on: http://git-master/r/94117
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

7 years agoarm: tegra: enterprise: Calibrated A03/A04 backlight table
Tom Cherry [Fri, 30 Mar 2012 23:31:58 +0000]
arm: tegra: enterprise: Calibrated A03/A04 backlight table

Bug 956246

Reviewed-on: http://git-master/r/93644
(cherry picked from commit 5009daf8f362b11810f19253d747042b41badfd3)

Change-Id: I5752eb06a95986c974acce24fa63e1c13e47cd4e
Signed-off-by: Tom Cherry <tcherry@nvidia.com>
Reviewed-on: http://git-master/r/94116
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>

7 years agodrivers: misc: nct: Remove regulator error message
Preetham Chandru [Mon, 2 Apr 2012 06:40:19 +0000]
drivers: misc: nct: Remove regulator error message

Print only a warning message if vdd regulator is not registered.
Some board do not have a seperate vdd regulator and hence
print only a warning message in such cases.

Bug 961258
Signed-off-by: Preetham Chandru R <pchandru@nvidia.com>
Change-Id: I953d17ae14650c622e06febe415362e5cb096236
Reviewed-on: http://git-master/r/93777
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Matthew Longnecker <mlongnecker@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

7 years agoARM: tegra: kai: Update measured backlight output
Daniel Solomon [Sun, 1 Apr 2012 20:51:18 +0000]
ARM: tegra: kai: Update measured backlight output

Update measured backlight output for correct linearization.

Bug 962780

Change-Id: Ic35b159a0b951eafff7890e7a7487f3c94b468e8
Signed-off-by: Daniel Solomon <daniels@nvidia.com>
Reviewed-on: http://git-master/r/93744
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Hu He <hhe@nvidia.com>
Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>

7 years agovideo: tegra: host: Init scale3d worker always
Terje Bergstrom [Fri, 30 Mar 2012 09:44:40 +0000]
video: tegra: host: Init scale3d worker always

Initialize scale3d worker even though scale3d would be disabled.

Bug 954879

Change-Id: Iaf3a12740d1d377d949cdfbf7e11fa00568e72fe
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/93488
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

7 years agovideo: tegra: host: Add syncpt sysfs entries
Terje Bergstrom [Tue, 27 Mar 2012 12:43:58 +0000]
video: tegra: host: Add syncpt sysfs entries

Expose sync point current and max values through sysfs.

Bug 957639

Change-Id: I2a3b914d404bb8d7bbed86d383c859bd8237a278
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/92778
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

7 years agoi2c: tegra: Support for I2C_M_REV_DIR_ADDR protocol mangling
Laxman Dewangan [Tue, 27 Mar 2012 13:24:35 +0000]
i2c: tegra: Support for I2C_M_REV_DIR_ADDR protocol mangling

Add support for protocol mangling "I2C_M_REV_DIR_ADDR"

Change-Id: Icdef16885f1cf6ed1ce9c4003a94c2c2e917ced2
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/92572
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Stephen Warren <swarren@nvidia.com>

7 years agosound: soc: tegra: Use tegra_dma_cancel() to abort request
Laxman Dewangan [Thu, 22 Mar 2012 10:04:52 +0000]
sound: soc: tegra: Use tegra_dma_cancel() to abort request

To terminate request from dma, use the tegra_dma_cancel() inplace of
tegra_dma_dequeue().
The api tegra_dma_dequeue() is getting to be obsolete.

Change-Id: Id2a888a726086fb1e4ade04ac047442554188bee
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/91754
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sumit Bhattacharya <sumitb@nvidia.com>
Reviewed-by: Scott Peterson <speterson@nvidia.com>

7 years agoserial: tegra: Use tegra_dma_cancel() to abort request
Laxman Dewangan [Thu, 22 Mar 2012 10:04:24 +0000]
serial: tegra: Use tegra_dma_cancel() to abort request

To terminate request from dma, use the tegra_dma_cancel() inplace of
tegra_dma_dequeue().
The api tegra_dma_dequeue() is getting to be obsolete.

Change-Id: I2e2c5d68dee64da02370beca6f61c650049402a2
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/91753
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Pradeep Goudagunta <pgoudagunta@nvidia.com>

7 years agospi: tegra: Use tegra_dma_cancel() to abort request
Laxman Dewangan [Thu, 22 Mar 2012 10:03:52 +0000]
spi: tegra: Use tegra_dma_cancel() to abort request

To terminate request from dma, use the tegra_dma_cancel() inplace of
tegra_dma_dequeue().
The api tegra_dma_dequeue() is getting to be obsolete.

Change-Id: I297e67433a2118377ecb9b028dcf8fa82e09f0e2
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/91752
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Ashwini Ghuge <aghuge@nvidia.com>
Tested-by: Ashwini Ghuge <aghuge@nvidia.com>

7 years agoARM: tegra: fuse: Use tegra_dma_cancel() to abort request
Laxman Dewangan [Thu, 22 Mar 2012 10:01:09 +0000]
ARM: tegra: fuse: Use tegra_dma_cancel() to abort request

To terminate request from dma, use the tegra_dma_cancel() inplace of
tegra_dma_dequeue().
The api tegra_dma_dequeue() is getting to be obsolete.

Change-Id: I4b886489458e4ec8f5eb43d857bf710fbb56f5ee
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/91751
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>

7 years agomach-tegra: customize modem parameters for voice call.
Ankit Gupta [Thu, 29 Mar 2012 05:45:29 +0000]
mach-tegra: customize modem parameters for voice call.

Add support to customize modem parameters for voice call.
Signed-off-by: Ankit Gupta <ankitgupta@nvidia.com>

Change-Id: I6a9e5918f709cbb004b66d16112346b692af477b
Reviewed-on: http://git-master/r/93096
Tested-by: Ankit Gupta (Engrg-SW) <ankitgupta@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Ravindra Lokhande <rlokhande@nvidia.com>
Reviewed-by: Scott Peterson <speterson@nvidia.com>

7 years agodc: enabled recovery from resetting
Adam Jiang [Thu, 8 Mar 2012 12:34:53 +0000]
dc: enabled recovery from resetting

Enabled recovery of DC from resetting. When underflow triggered serveral
times(current > 4 for tegra2), DC driver will reset itself to prevent
data corruption. Reopend nvhost connection when resetting finished. That
helps system to show frames instead of a blank screen again.

Fixed Bug 936613

Change-Id: I314c37258a4a446dc07167ac60d0420e79a5fb2d
Signed-off-by: Adam Jiang <chaoj@nvidia.com>
Reviewed-on: http://git-master/r/89406
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

7 years agoarm: tegra3: change min_rate for sclk
Amit Kamath [Mon, 2 Apr 2012 11:52:57 +0000]
arm: tegra3: change min_rate for sclk

Change the minimal rate of sclk to 12 MHz and set the lowest
frequency of sbus to be 40 MHz when display is on.

bug 939415

Original change http://git-master/r/#change,76959

Change-Id: I81cda6a95494764721c1be5b4001c476f3aed6ab
Signed-off-by: Amit Kamath <akamath@nvidia.com>
Reviewed-on: http://git-master/r/93850
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoARM: tegra: clock: Set EMC and SCLK rates suspend floors
Alex Frid [Fri, 9 Mar 2012 23:07:00 +0000]
ARM: tegra: clock: Set EMC and SCLK rates suspend floors

- On suspend entry set EMC rate floor high enough to select PLLM as
  EMC clock source, since PLLM is always turned off in suspend.
- On suspend entry set SCLK (AVP) rate floor to speed-up system bus
  during save/restore procedures.

Bug 939942
Bug 938649

Reviewed-on: http://git-master/r/89234
(cherry picked from commit ccfdaef143f9017d682af017e11a25c3e5bcf3a7)

Change-Id: I4e1d66521f1f3453502c471999a52637c3d489aa
Signed-off-by: Alex Frid <afrid@nvidia.com>
Signed-off-by: Tom Cherry <tcherry@nvidia.com>
Reviewed-on: http://git-master/r/94124
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

7 years agoregulator: fixed: Support for open drain gpio pin
Laxman Dewangan [Wed, 7 Mar 2012 10:28:33 +0000]
regulator: fixed: Support for open drain gpio pin

Adding flag on fixed regulator board configuration structure
to specify whether gpio is open drain type or not.
Passing this information to gpio library when requesting
gpio so that gpio driver can set the pin state accordingly,
for open drain type:
- Pin can be set HIGH as setting as input, PULL UP on
  pin make this as HIGH.
- Pin can be set LOW as setting it as output and drive to LOW.

The non-open drain pin can be  set HIGH/LOW by setting it to
output and driving it to HIGH/LOW.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
cherry picked from mainline commit
a4d9f179cc788b7f4b735d32c2e4a3b2562e8240

Change-Id: I2ee7789db67fdeea77c0d6ac2b44876af36c803e
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/94150
Reviewed-by: Automatic_Commit_Validation_User

7 years agoarm: tegra: pm: Update CPU complex resume
Prashant Gaikwad [Tue, 27 Mar 2012 10:42:57 +0000]
arm: tegra: pm: Update CPU complex resume

Completely removed PLLP restoration from CPU complex resume on
Tegra2 platforms (too late: PLLP is restored from AVP warm boot
code)

Bug 952200
Bug 931285

Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-on: http://git-master/r/92523
(cherry picked from commit 066dc172010f1a5ea5a375e1cbdcf162ab206d63)

Change-Id: I1a31793db8ee1fda5a947d69890e3118f0d3cdab
Reviewed-on: http://git-master/r/93562
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Tested-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

7 years agoARM:tegra:cardhu: Enable PCIe for cardhu, E1186 & E1187
Jay Agarwal [Fri, 30 Mar 2012 09:34:43 +0000]
ARM:tegra:cardhu: Enable PCIe for cardhu, E1186 & E1187

Do platform device registration for cardhu and E1186
& E1187 platforms only.

Bug 790141

Change-Id: I70a0144604631a0dd9499699f892f9fc7ec14d56
Signed-off-by: Jay Agarwal <jagarwal@nvidia.com>
Reviewed-on: http://git-master/r/93486
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-by: Krishna Thota <kthota@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

7 years agovideo: tegra: host: api clean-up
Mayuresh Kulkarni [Tue, 27 Mar 2012 12:16:07 +0000]
video: tegra: host: api clean-up

- remove redundant 2nd argument to nvhost_module_suspend()
- also remove the debug_not_idle() as it redundant after
refactor of host1x code
- debug_not_idle() iterates through host1x's private instance
of channels to find out which client module is active (along
with host1x itself). we are going to remove these instances of
channels from host1x's device private data
- reduce the prints during suspend

Bug 871237

Change-Id: I66c7c4d8f35c157b1626784a6a27166442a50557
Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-on: http://git-master/r/92550
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

7 years agoARM:defconfig: Enable PCIE in kernel
Jay Agarwal [Mon, 26 Mar 2012 16:00:48 +0000]
ARM:defconfig: Enable PCIE in kernel

Enabling PCIE in kernel build after fixing power
management issues due to PCIE.

Bug 790141

Change-Id: I41d46e6872f5df9962519c15da62ff7804580211
Signed-off-by: Jay Agarwal <jagarwal@nvidia.com>
Reviewed-on: http://git-master/r/92341
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Thota <kthota@nvidia.com>
Reviewed-by: Emily Jiang <ejiang@nvidia.com>
Reviewed-by: Penny Chiu <pchiu@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

7 years agoARM: tegra: dma: Update actual bytes_transferred in dma cancel
Laxman Dewangan [Wed, 21 Mar 2012 12:24:21 +0000]
ARM: tegra: dma: Update actual bytes_transferred in dma cancel

When canceling dma, updating actual bytes transferred by dma,
making all requests status to aborted and deleting from channel
request queue.

Change-Id: I860780814340d54465de5b2ae11a6895319f428c
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/90815
Reviewed-by: Automatic_Commit_Validation_User

7 years agopower: bpcm: Re-try setting BPC limit
Alex Frid [Sun, 11 Mar 2012 08:02:33 +0000]
power: bpcm: Re-try setting BPC limit

Check returned value from BPC set limit api, and re-try again
on error. Keep CPU throttled while re-trying.

Signed-off-by: Alex Frid <afrid@nvidia.com>
(cherry picked from commit 8d5e5a36a03587e3e9374ad8cec6958bd3617f0c)

Change-Id: I29b24a92b87cbd41d68473d0c9ef4c8d6add992f
Reviewed-on: http://git-master/r/93732
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Tested-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

7 years agoARM: tegra: clock: Fix emulation clock table
Alex Frid [Sun, 1 Apr 2012 07:28:46 +0000]
ARM: tegra: clock: Fix emulation clock table

Configure PLLC on emulation platforms after SCLK is switched to PLLP.
This would avoid failure in case when emulation initialization script
set PLLC as SCLK source.

Change-Id: Ie0f48c066f6df7f6f3c67858de7e9d7608dcb7ff
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/93730
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Hoang Pham <hopham@nvidia.com>
Reviewed-by: Bo Yan <byan@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

7 years agousb: gadget: tegra: Enable AHB prefetch
Krishna Yarlagadda [Mon, 26 Mar 2012 09:27:27 +0000]
usb: gadget: tegra: Enable AHB prefetch

Enable AHB prefetch and call dma_sync
to avoid memory coherency issues

Bug 921109

Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
Reviewed-on: http://git-master/r/92257
(cherry picked from commit e8fac4b6f3460928442d6c9dadec301ccf57fb0b)

Change-Id: I2788e94d3609bfdd6d112f0b5386a653af15075e
Reviewed-on: http://git-master/r/93819
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
Tested-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

7 years agoARM: tegra: usb: AHB prefetch support calls
Krishna Yarlagadda [Mon, 26 Mar 2012 09:25:11 +0000]
ARM: tegra: usb: AHB prefetch support calls

Support for AHB prefetch enable and disable.
These calls are used to avoid memory coherency issues

Bug 921109

Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
Reviewed-on: http://git-master/r/92256
(cherry picked from commit c992fdbe0be6e2006d65e67e6eb821a054ad401c)

Change-Id: I1599ee11652b9241b2d05d565289632901f44f44
Reviewed-on: http://git-master/r/93817
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agousb: rndis: Avoid unwanted usb config access
Krishna Yarlagadda [Fri, 16 Mar 2012 09:31:50 +0000]
usb: rndis: Avoid unwanted usb config access

Request complete may be called when there is no valid usb config
Avoid access to config when not required.

Bug 949543

Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
Reviewed-on: http://git-master/r/91151
(cherry picked from commit 08bc68164d0bd90c84a8ea82f87f9f44e4341df2)

Change-Id: I5969144aaa9bcffddefa7933d43bfd3690814fba
Reviewed-on: http://git-master/r/93816
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
Tested-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

7 years agoARM: tegra: usb_phy: Power down USB PMC controls
Krishna Yarlagadda [Fri, 9 Mar 2012 17:02:48 +0000]
ARM: tegra: usb_phy: Power down USB PMC controls

Fix leakage current on AVDD_USB when system is in low power
mode.

Bug 934597

Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
Reviewed-on: http://git-master/r/89160
(cherry picked from commit 6ef00a561be37a909a1c254afc6a14b6492c670f)

Change-Id: I3b8be6eac1ff40148e2de0935db6369909c8bb0a
Reviewed-on: http://git-master/r/93813
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
Tested-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

7 years agotegra: video: nvmap: Make nvmap_ioctl.h userspace compatible
Yogish Kulkarni [Thu, 29 Mar 2012 19:18:36 +0000]
tegra: video: nvmap: Make nvmap_ioctl.h userspace compatible

nvmap_ioctl.h intended to be included by both kernel and
userspace code.

Change-Id: I8cccef5e3bc02f3271f471155b2e36126c68017a
Signed-off-by: Yogish Kulkarni <yogishk@nvidia.com>
Reviewed-on: http://git-master/r/93329
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>

7 years agoARM: tegra3: Make MC early ack feature configurable.
Manoj Chourasia [Wed, 21 Mar 2012 08:58:58 +0000]
ARM: tegra3: Make MC early ack feature configurable.

Add a config option to configure early acknowlegement
from memory controller.

Early acknowledgement is feature of memory controller
where MC acknowledged immediately to any write requests
from CPU. To maintain mermory coherency all the read
requests are blocked till all the early-acked writes
have reached to a point of coherency.

bug 943638

Change-Id: I97f30261c4711fc338b007502b6eef7217ddb6cb
Signed-off-by: Manoj Chourasia <mchourasia@nvidia.com>
Reviewed-on: http://git-master/r/91477
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoARM: tegra: dma: enum for initial status of dma req
Laxman Dewangan [Mon, 2 Apr 2012 08:48:07 +0000]
ARM: tegra: dma: enum for initial status of dma req

Adding new req status TEGRA_DMA_REQ_PENDING. This will be initial
status of the request when enqueued.

Change-Id: I67ee71dd0c64b6398305b86fbf186488f062e876
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/93801
Reviewed-by: Automatic_Commit_Validation_User

7 years agodmaengine/dw_dmac: Reconfigure interrupt and chan_cfg register on resume
Viresh Kumar [Thu, 17 Nov 2011 10:31:29 +0000]
dmaengine/dw_dmac: Reconfigure interrupt and chan_cfg register on resume

In S2R all DMA registers are reset by hardware and thus they are required to be
reprogrammed. The channels which aren't reprogrammed are channel configuration
and interrupt enable registers, which are currently programmed at chan_alloc
time.

This patch creates another routine to initialize a channel. It will try to
initialize channel on every dwc_dostart() call. If channel is already
initialised then it simply returns, otherwise it configures registers.

This routine will also initialize registers on wakeup from S2R, as we mark
channels as uninitialized on suspend.

Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
cherry-picked from mainline 61e183f8306934a9f66557f69f1f0f56f18dca06

Change-Id: I4ede3e1db8844533161bd4a836b1fece0d0ee716
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/93784
Reviewed-by: Automatic_Commit_Validation_User

7 years agodmaengine: consolidate initialization of cookies
Russell King - ARM Linux [Tue, 6 Mar 2012 22:35:47 +0000]
dmaengine: consolidate initialization of cookies

Provide a common function to initialize a channels cookie values.

Change-Id: Idc822d69971d7a6d26ffea8809df4825b87020e5
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Tested-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Jassi Brar <jassisinghbrar@gmail.com>
[imx-sdma.c & mxs-dma.c]
Tested-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
(cherry picked from mainline commit
d3ee98cdcd6198ea1cf75c603178acc8a805b69b)

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Change-Id: Id7d52f05b78d15b0c61cb04122b19810e78b9269
Reviewed-on: http://git-master/r/93783

7 years agodmaengine: consolidate tx_status functions
Russell King - ARM Linux [Tue, 6 Mar 2012 22:35:27 +0000]
dmaengine: consolidate tx_status functions

Now that we have the completed cookie in the dma_chan structure, we
can consolidate the tx_status functions by providing a function to set
the txstate structure and returning the DMA status.  We also provide
a separate helper to set the residue for cookies which are still in
progress.

Change-Id: I4b7672bbd17d072bfde348d04481c8db48e814c4
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Tested-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Jassi Brar <jassisinghbrar@gmail.com>
[imx-sdma.c & mxs-dma.c]
Tested-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
(cherry picked from mainline commit
96a2af41c78b1fbb1f567a3486bdc63f7b31c5fd)

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Change-Id: Ifdb55d85eb4789f221679f1f38f5566168e5c643
Reviewed-on: http://git-master/r/93782
Reviewed-by: Automatic_Commit_Validation_User

7 years agodmaengine: provide a common function for completing a dma descriptor
Russell King - ARM Linux [Tue, 6 Mar 2012 22:35:07 +0000]
dmaengine: provide a common function for completing a dma descriptor

Provide a common function to do the cookie mechanics for completing
a DMA descriptor.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Tested-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Jassi Brar <jassisinghbrar@gmail.com>
[imx-sdma.c & mxs-dma.c]
Tested-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
Cherry-picked from mainline commit
f7fbce07c6ce26a25b4e0cb5f241c361fde87901

Change-Id: I0b0a9d4ad538db4fda227cc91436c44bc4a6f206
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/93781
Reviewed-by: Automatic_Commit_Validation_User

7 years agodmaengine: consolidate assignment of DMA cookies
Russell King - ARM Linux [Tue, 6 Mar 2012 22:34:46 +0000]
dmaengine: consolidate assignment of DMA cookies

Everyone deals with assigning DMA cookies in the same way (it's part of
the API so they should be), so lets consolidate the common code into a
helper function to avoid this duplication.

Change-Id: I730882ff0f84f9ae42dd137a8926b7ae10868370
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Tested-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Jassi Brar <jassisinghbrar@gmail.com>
[imx-sdma.c & mxs-dma.c]
Tested-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
(cherry picked from mainline commit 884485e1f12dcd39390f042e772cdbefc9ebb750)

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Change-Id: Ifc4a395a5dbafad03f8b28e052ad0e7ea5d90163
Reviewed-on: http://git-master/r/93780
Reviewed-by: Automatic_Commit_Validation_User

7 years agodmaengine: add private header file
Russell King - ARM Linux [Tue, 6 Mar 2012 22:34:26 +0000]
dmaengine: add private header file

Add a local private header file to contain definitions and declarations
which should only be used by DMA engine drivers.

We also fix linux/dmaengine.h to use LINUX_DMAENGINE_H to guard against
multiple inclusion.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Tested-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Jassi Brar <jassisinghbrar@gmail.com>
[imx-sdma.c & mxs-dma.c]
Tested-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
(cherry picked from mainline commit d2ebfb335b0426deb1a4fb14e4e926d81ecd8235)

Change-Id: I91b051537fa1890e2651ebe0409fa97cbc9191dd
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/93779
Reviewed-by: Automatic_Commit_Validation_User

7 years agodmaengine: move last completed cookie into generic dma_chan structure
Russell King - ARM Linux [Tue, 6 Mar 2012 22:34:06 +0000]
dmaengine: move last completed cookie into generic dma_chan structure

Every DMA engine implementation declares a last completed dma cookie
in their private dma channel structures.  This is pointless, and
forces driver specific code.  Move this out into the common dma_chan
structure.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Tested-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Jassi Brar <jassisinghbrar@gmail.com>
[imx-sdma.c & mxs-dma.c]
Tested-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
cherry-picked from mainline
4d4e58de32a192fea65ab84509d17d199bd291c8

Change-Id: Ib653bcfa5f492986946fd34006a8de3090db0441
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/93778

7 years agomfd: max8907c: Do not use I2C_M_NOSTART in first message
Laxman Dewangan [Thu, 29 Mar 2012 09:54:51 +0000]
mfd: max8907c: Do not use I2C_M_NOSTART in first message

It is not recommended to use the flag I2C_M_NOSTART in first
message.

The documentation kernel/Documentation/i2c/i2c-proocol says:
Flag I2C_M_NOSTART:
    In a combined transaction, no 'S Addr Wr/Rd [A]' is generated at some
    point. For example, setting I2C_M_NOSTART on the second partial message
    generates something like:
      S Addr Rd [A] [Data] NA Data [A] P
    If you set the I2C_M_NOSTART variable for the first partial message,
    we do not generate Addr, but we do generate the startbit S. This will
    probably confuse all other clients on your bus, so don't try this.

Change-Id: I8a8a4f6f91a1b53b6d443588ab18704cf100fd50
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/93187
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Tested-by: Bandi Krishna Chaitanya <bandik@nvidia.com>

7 years agotegra: hdmi: Add 1080p timing table
Hao Tang [Thu, 22 Mar 2012 06:59:46 +0000]
tegra: hdmi: Add 1080p timing table

Bug 949759

Add new 1080p timing support, or 1080p playback is not available on
some monitors like Acer H243HX

Change-Id: I8a8a3a5b2de71d5a56dad233f953e09176f85b76
Signed-off-by: Hao Tang <htang@nvidia.com>
Reviewed-on: http://git-master/r/91732
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agotegra: p1852: Register tegra WDT platform device
Manoj Chourasia [Tue, 20 Mar 2012 11:46:39 +0000]
tegra: p1852: Register tegra WDT platform device

bug 924362

Change-Id: I878a845d5c78b2f8c0f5882f8c0a97b3842ac883
Signed-off-by: Manoj Chourasia <mchourasia@nvidia.com>
Reviewed-on: http://git-master/r/91224
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoi2c: tegra: Fix to avoid possible race condition
Chaitanya Bandi [Fri, 16 Mar 2012 12:17:35 +0000]
i2c: tegra: Fix to avoid possible race condition

Because of race condition between isr and tx fifo fill,
duplicate data is being written. So added locking to make
Tx fifo fill as atomic.

Change-Id: Ia99466adadfb6d86a6f238ec4cd0aa13bd36e434
Signed-off-by: Chaitanya Bandi <bandik@nvidia.com>
Reviewed-on: http://git-master/r/90870
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoi2c: tegra: Avoid duplicate write into Tx fifo
Chaitanya Bandi [Mon, 12 Mar 2012 10:48:07 +0000]
i2c: tegra: Avoid duplicate write into Tx fifo

Dvc I2C_DONE_INTR_EN interrupt bit is always enable into dvc
control register3. During normal transaction on dvc i2c bus
sometimes one transaction written two times in TX fifo buffer
because of triggered dvc interrupt. This is causing to corrupt
the next transaction header and send wrong address over dvc
i2c bus. To solve this issue dvc i2c interrupt has to disable
during filling of Tx fifo and enable after that.

Updated the following things in code:
(1) Add the code to mask/unmask I2C_DONE_INTR_EN into dvc control reg3
writing into Tx Fifo register.
(2) Put delay before resetting the controller

Hand-picked this change from: http://git-master/r/#change,39997
Signed-off-by: Chaitanya Bandi <bandik@nvidia.com>

Change-Id: I16b5821e1d0d0cf8419ce9d239e794de9d5b47be
Reviewed-on: http://git-master/r/89456
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agotegra: p1852: correcting the GPIO to use for therm_alert
Vishal Singh [Tue, 27 Mar 2012 12:20:02 +0000]
tegra: p1852: correcting the GPIO to use for therm_alert

Currently the GPIO that we are trying to use for therm_alert is
GPIO_PW2 which is incorrect. The GPIO we ought to use is GPIO_PW3.

Bug 920368.

(cherry picked from commit ad4714c486c6a734681287ea4d85869f05704397)
Change-Id: If1a8cf4b8cdbdd69f2d01f4c292775d413384bc0
Reviewed-on: http://git-master/r/#change,74273
Signed-off-by: Vishal Singh <vissingh@nvidia.com>
Reviewed-on: http://git-master/r/91730
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoarm: tegra: enterprise: use proper backlight clk_div for A03/A04 android-tegra-nv-3.1 tegra-l4t-er-2012-04-02 tegra-l4t-r15-beta
Tom Cherry [Tue, 20 Mar 2012 23:59:51 +0000]
arm: tegra: enterprise: use proper backlight clk_div for A03/A04

The new TPS61160A part asks for the control PWM signal to be between
5kHZ and 100kHz.  This change sets clk_div to 0x1D for a 5kHz signal.

This change also installs a linear table for
enterprise_bl_output_measured_a03.

Bug 956246

Reviewed-on: http://git-master/r/91606
(cherry picked from commit 32a67cf7b1c8223abe8de7d88b4bcd1906cda0a2)

Change-Id: Ic7907cfae6f918ef055add33615822ef8c5e0ec6
Signed-off-by: Tom Cherry <tcherry@nvidia.com>
Reviewed-on: http://git-master/r/93051
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

7 years agoarm: tegra: emc scaling for enterprise
Wen Yi [Thu, 22 Mar 2012 20:53:16 +0000]
arm: tegra: emc scaling for enterprise

Need to include A01 board for emc scaling.

Bug 957981

Reviewed-on: http://git-master/r/91877
(cherry picked from commit 2dff127a133056b4229b8d7a4e8328959873f3c8)

Change-Id: I9c615b13adf4375ee0742b817361b0d6326afccd
Signed-off-by: Tom Cherry <tcherry@nvidia.com>
Reviewed-on: http://git-master/r/93050
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

7 years agotty: serial: core: Fix console resume for PORT_TEGRA
Pradeep Kumar [Wed, 28 Mar 2012 11:48:55 +0000]
tty: serial: core: Fix console resume for PORT_TEGRA

WAR to enable console prints when console service is not started
for port type TEGRA.

Bug 958959

Change-Id: I51e582d16195171f1f8bae9324e2ddece4638281
Signed-off-by: Pradeep Kumar <pgoudagunta@nvidia.com>
Reviewed-on: http://git-master/r/92814
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Joshua Cha <joshuac@nvidia.com>
Tested-by: Joshua Cha <joshuac@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

7 years agoARM: tegra: enterprise: Add A03/A04 support
Tom Cherry [Thu, 1 Mar 2012 01:39:50 +0000]
ARM: tegra: enterprise: Add A03/A04 support

Bug 939799

Reviewed-on: http://git-master/r/90824
(cherry-picked from commit 8c556f816196c17e059db2c11b966ca89848efa3)

Change-Id: I67b26958862b8b60217c2750fe0b2eef3013d9b3
Signed-off-by: Tom Cherry <tcherry@nvidia.com>
Reviewed-on: http://git-master/r/92409
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

7 years agousb: ehci: tegra: add suspend_fail flag
Rakesh Bodla [Mon, 26 Mar 2012 11:19:21 +0000]
usb: ehci: tegra: add suspend_fail flag

Adding the suspend_fail flag to proprogate the
bus suspend failure to the ehci suspend. This
ensure the proper synchronization between two
suspend calls.

Bug 932020

Reviewed-on: http://git-master/r/92286
(cherry picked from commit 9548deb7f4dfda95067731744b3122a47be3f654)
Change-Id: I00cc062888fcf7085be7aa3556ae500e0e457cd1
Reviewed-on: http://git-master/r/93130
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoasoc: tegra: ALC5640 machine: Fix i2s for BT Sco
Manoj Gangwal [Wed, 28 Mar 2012 12:43:27 +0000]
asoc: tegra: ALC5640 machine: Fix i2s for BT Sco

fix i2s for BT Sco.

Bug 936626

Change-Id: Iaf1d1a230fcb37d45d9deaaf1dae780f5870e99f
Signed-off-by: Manoj Gangwal <mgangwal@nvidia.com>
Reviewed-on: http://git-master/r/92860
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-by: Sumit Bhattacharya <sumitb@nvidia.com>
Reviewed-by: Scott Peterson <speterson@nvidia.com>

7 years agoASoC: wm8903: resolve compilation time warnings
Sanjay Singh Rawat [Wed, 28 Mar 2012 13:43:20 +0000]
ASoC: wm8903: resolve compilation time warnings

bug 949219

Change-Id: I8abd1e837a774d15aef25ec8c40b857b8cba0426
Signed-off-by: Sanjay Singh Rawat <srawat@nvidia.com>
Reviewed-on: http://git-master/r/92858
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agousb: otg: tegra: code clean up
Venu Byravarasu [Wed, 28 Mar 2012 12:39:14 +0000]
usb: otg: tegra: code clean up

Modified multiple if conditions to switch case.
Included a new OTG state case: undefined

Change-Id: Iba4cf1a79b8c220fc873966bd8a89f43a5648863
Signed-off-by: Venu Byravarasu <vbyravarasu@nvidia.com>
Reviewed-on: http://git-master/r/92832
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agousb: host: tegra: code clean up
Venu Byravarasu [Wed, 28 Mar 2012 12:00:05 +0000]
usb: host: tegra: code clean up

With this patch:
1. Renamed structure and function names to be more meaningful.
2. Removed unnecessary local variables.

Change-Id: I0684d840c1b8c606c1643e1e2517e083be825787
Signed-off-by: Venu Byravarasu <vbyravarasu@nvidia.com>
Reviewed-on: http://git-master/r/92817
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agop1852: Enable uart4 and remove spi4
Manoj Chourasia [Tue, 20 Mar 2012 13:14:46 +0000]
p1852: Enable uart4 and remove spi4

+ Enable uart4 and remove spi4
+ use SPI2 instead of SPI1 as initial pinmux for gpio x5/6

bug 933971

Reviewed-on: http://git-master/r/78718
(cherry picked from commit 7135fbe5edf7357384dc92b613ea46dc927d6b06)

Change-Id: I46d3072dd160d7a2d1f11f949cc934fbdff1e0a6
Reviewed-on: http://git-master/r/91234
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agovideo: tegra: dc: remove obsolete overlay interface
Jon Mayo [Wed, 28 Mar 2012 00:18:48 +0000]
video: tegra: dc: remove obsolete overlay interface

Remove old overlay interface, it is replaced with TEGRA_DC_EXTENSIONS
External functions made static now that overlay.c no longer needs them.

Change-Id: I5d080ceb19ad90d3b5cc4bf20494c967687293a5
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/92661
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Chao Xu <cxu@nvidia.com>
Reviewed-by: Robert Morell <rmorell@nvidia.com>
Reviewed-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com>
Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>
Reviewed-by: Michael I Gold <gold@nvidia.com>
Reviewed-by: Markus Holtmanns <mholtmanns@nvidia.com>

7 years agopower: smb349: resolve compilation time warnings
Sanjay Singh Rawat [Tue, 27 Mar 2012 12:34:13 +0000]
power: smb349: resolve compilation time warnings

bug 949219

Change-Id: I56904b3607c92281076ae3245ee1071922763eb8
Signed-off-by: Sanjay Singh Rawat <srawat@nvidia.com>
Reviewed-on: http://git-master/r/92557
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Gerrit_Virtual_Submit

7 years agoi2c: tegra: Correct 10bit address configuration
Laxman Dewangan [Tue, 27 Mar 2012 12:19:06 +0000]
i2c: tegra: Correct 10bit address configuration

The slave address of device to be configured in packet
header as follows:
7 bit address: PacketHeader3[7:1]
10 bit address: PacketHeader3[9:0]

Fixing the code to make packet header3 properly.

Change-Id: I1797066d23ada5d4d7b14710201a1fb17566b78b
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/92556
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Andy Carman <acarman@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>