Pavan Kunapuli [Wed, 26 Jan 2011 19:14:53 +0000 (11:14 -0800)]
arm: tegra: sdhci: Do not disable sdmmc4 clock
Do not switch off sdmmc4 clock. Also, removed ddr
mode temporarily from linux mmc driver.
Programming tap_delays and internal clock.
Original-Change-Id: I830bf5e94ccd47e154c5ef9909e8bff1ff7754c0
Reviewed-on: http://git-master/r/17070 Reviewed-by: Jonathan Mayo <jmayo@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com> Tested-by: Scott Williams <scwilliams@nvidia.com>
Original-Change-Id: Ic1cff8dd85229fe903206f1dc9a967d600ba88c1
Scott Williams [Wed, 26 Jan 2011 09:31:52 +0000 (01:31 -0800)]
arm: tegra: Put UART-A on PLL-P for cardhu
It is not possible run at 115200 bps with a 12MHz UART reference
clock (the margin of error is greater than one half a bit time).
Put UART-A (the debug console UART) on PLL-P (216 MHz).
Original-Change-Id: I5d58d022550d6e420acf673f56bef21194e10187
Reviewed-on: http://git-master/r/17027 Reviewed-by: Scott Williams <scwilliams@nvidia.com> Tested-by: Scott Williams <scwilliams@nvidia.com>
Original-Change-Id: Ib9863eb383582684eb37ac6d3458f5726d59c337
Jon Mayo [Sat, 22 Jan 2011 01:24:15 +0000 (17:24 -0800)]
arm: tegra: updated cardhu panel timings
use a 1366x768 panel at around 60Hz refresh.
Original-Change-Id: I6a0883e482db9406e6dfb3947b5fe533681c9b97
Reviewed-on: http://git-master/r/16642 Reviewed-by: Jonathan Mayo <jmayo@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com> Tested-by: Scott Williams <scwilliams@nvidia.com>
Original-Change-Id: I38d8f6740f09a1e84f83c7781ba5558a24eb0a22
Laxman Dewangan [Fri, 21 Jan 2011 09:16:17 +0000 (14:46 +0530)]
[ARM] tegra:cardhu: Filling power rails details.
Registering regulator tps6591x and providing different power rails
information.
Original-Change-Id: I43fe1ead2b35cee61641db44cf25971303a1b0ed
Reviewed-on: http://git-master/r/16514 Reviewed-by: Scott Williams <scwilliams@nvidia.com> Tested-by: Scott Williams <scwilliams@nvidia.com>
Original-Change-Id: I9d6696c2af134dcfcde01b99d295e832903a9289
Yen Lin [Thu, 13 Jan 2011 20:37:10 +0000 (12:37 -0800)]
arm: tegra: Add SATA support
Original-Change-Id: I18c63f1c69e155ddc1cec1718af9684d861815b7
Reviewed-on: http://git-master/r/15863 Tested-by: Yen Lin <yelin@nvidia.com> Reviewed-by: Rhyland Klein <rklein@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-on: http://git-master/r/16485
Original-Change-Id: I6afa5a097b4fc7d6c45614107118458da0d9d888
Pavan Kunapuli [Tue, 18 Jan 2011 12:23:34 +0000 (17:53 +0530)]
board-cardhu:configure pull-up/pull-downs for sdmmc
For sdmmc pins, configuring cmd and data lines
to pull-up mode. Setting the rst_n line to
pull-down mode.
Bug 767242
Original-Change-Id: I812375c10a74e508472eb855c7554641a0a56724
Reviewed-on: http://git-master/r/16019 Reviewed-by: Scott Williams <scwilliams@nvidia.com> Tested-by: Scott Williams <scwilliams@nvidia.com>
Original-Change-Id: I3b384c5e295c800d46691392af0d7cdde4d12113
Laxman Dewangan [Tue, 18 Jan 2011 14:07:19 +0000 (19:37 +0530)]
[arm] tegra:cardhu:Registering i2c bus mux PCA954x
Registering i2c bus mux PCA954x for cardhu on cam i2c.
Original-Change-Id: Ia741a06dad88d893a2150be8ee9fd0b448bda375
Reviewed-on: http://git-master/r/16112 Reviewed-by: Scott Williams <scwilliams@nvidia.com> Tested-by: Scott Williams <scwilliams@nvidia.com>
Original-Change-Id: I80154e83cc59bf440e14ad714a313fb7e116fb43
Alex Frid [Wed, 19 Jan 2011 05:40:48 +0000 (21:40 -0800)]
ARM: tegra: clock: Fixed Tegra3 audio pll and board setting
Original-Change-Id: I3fd6622c4f4ff43b8ab03d552dd488a51d2cfdf4
Reviewed-on: http://git-master/r/16209 Reviewed-by: Aleksandr Frid <afrid@nvidia.com> Tested-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Original-Change-Id: I1279516ce261882d9e390cb6adbdb9bcffac0f94
[ARM] tegra: Fixing the details of config TEGRA_FPGA_PLATFORM
Adding the details like default value and help for the config
variable TEGRA_FPGA_PLATFORM in Kconfig file.
Making cardhu as depends on Tegra3 soc architecture.
Original-Change-Id: Ib395ffa09c44a8924fdc6bf514132d98acec7bc8
Reviewed-on: http://git-master/r/15408 Reviewed-by: Scott Williams <scwilliams@nvidia.com> Tested-by: Scott Williams <scwilliams@nvidia.com>
Original-Change-Id: Ic797d7f5fbcec7c7763f8fe4b694afb385e3ad4c
Scott Williams [Tue, 11 Jan 2011 18:50:52 +0000 (10:50 -0800)]
arm: tegra: Fix hardcoded frame buffer addresses
Dynamically obtain the carveout and framebuffer addresses.
Bug 769986
Original-Change-Id: I9b8eeb710e5198ab9ae4e7e6c7095cfd23209e66
Reviewed-on: http://git-master/r/15534 Tested-by: Scott Williams <scwilliams@nvidia.com> Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Krishna Reddy <vdumpa@nvidia.com> Reviewed-by: Jonathan Mayo <jmayo@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Original-Change-Id: Ia6f68817b65281bd5da4f8774476a947fd970950
Scott Williams [Mon, 10 Jan 2011 23:24:55 +0000 (15:24 -0800)]
arm: tegra: Backlight control for aruba2/cardhu platforms
Bug 776857
Original-Change-Id: I0ed5723c381095b684b03c5650820019ab11b8a0
Reviewed-on: http://git-master/r/15430 Tested-by: Scott Williams <scwilliams@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Original-Change-Id: Ie2dc49007c6b70be3bf0c921464cb7c72378b26e
Xin Xie [Sat, 19 Mar 2011 01:08:28 +0000 (18:08 -0700)]
watchdog: tegra_wdt: fix WDT open() kernel panic
Opening the Tegra WDT device from user space is causing the kernel
panic. It is found that the device file private data pointer is passing
incorrectly in the orignal code.
Michael I. Gold [Tue, 14 Jun 2011 19:10:44 +0000 (12:10 -0700)]
video: tegra: dc: add window inversion interface to overlay driver
Support INVERT_H and INVERT_V flags and pass through to the DC driver.
Also support TILED flag instead of a separate tiled field.
Original-Change-Id: If5aa4e24666020d85272a955ef7b6ce6f70aeccb
Reviewed-on: http://git-master/r/36553 Reviewed-by: Daniel Willemsen <dwillemsen@nvidia.com> Reviewed-by: Jonathan Mayo <jmayo@nvidia.com> Tested-by: Michael I Gold <gold@nvidia.com> Reviewed-by: Michael Frydrych <mfrydrych@nvidia.com>
Rebase-Id: R58c32fc4a09ac4f5004d101d29740b934011049f
Heechul Yun [Fri, 20 May 2011 00:18:56 +0000 (17:18 -0700)]
video: tegra: dc: DC and HDMI debug info display
Following files will show information of DC and hdmi
/sys/kernel/debug/tegradc.[01]/{regs,mode,stats}
/sys/kernel/debug/tegra_hdmi/regs
/sys/devices/nvhost/tegradc.[01]/stats_enable
Jon Mayo [Tue, 14 Jun 2011 22:20:24 +0000 (15:20 -0700)]
video: tegra: dc: underflow reset is for tegra2
only tegra2 needs dc underflow reset worker, disable worker if tegra2
support is disabled.
bug 836677
Change-Id: I98ba440f1d93c900fa1ce7d1bfd239e3060c437a
Reviewed-on: http://git-master/r/36597 Reviewed-by: Jonathan Mayo <jmayo@nvidia.com> Tested-by: Jonathan Mayo <jmayo@nvidia.com> Reviewed-by: Kevin Huang <kevinh@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Rebase-Id: R0fc472527407865e5f8d6ec072d16778cd092d31
Chris Johnson [Sat, 30 Apr 2011 21:24:44 +0000 (14:24 -0700)]
nvrm: move stale wait checking into the kernel
The kernel now receives wait tracking data (similar to gathers and
relocs) and compares the current syncpt with the threshold value.
If it's old, it gets a kernel mapping and rewrites the method data
to use a kernel reserved syncpt that is always 0 (so trivially pops
when seen by the HW).
Bug 519650
Bug 785525
Bug 803452
The waitchk implementation is also backward compatible with older
user space code that didn't supply waitchk data as part of the
submit.
Janne Hellsten [Tue, 24 May 2011 12:34:13 +0000 (15:34 +0300)]
arm: tegra: nvhost: Add debugfs entry for null GPU kickoff
Add a debugfs entry for enabling/disabling GPU null kickoff of
graphics submits on a per process basis.
Restructure existing tegra_host debugfs node by making the existing
tegra_host file a directory and moving the status query under its own
status node. Thus the file system structure changes from:
/sys/kernel/debug/tegra_host - status
to
/sys/kernel/debug/tegra_host/status - status
/sys/kernel/debug/tegra_host/null_kickoff_pid - null GPU ctl
Bug 826513
Original-Change-Id: Id7ccbce1bb9e53c6e3b036d10f23563fab6bf481
Reviewed-on: http://git-master/r/32765 Reviewed-by: Janne Hellsten <jhellsten@nvidia.com> Tested-by: Janne Hellsten <jhellsten@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com> Reviewed-by: Daniel Willemsen <dwillemsen@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Rebase-Id: R8bfacafbd0a74cddf33cded06331e52b53564156
Kirill Artamonov [Tue, 24 May 2011 10:12:43 +0000 (13:12 +0300)]
video: tegra: nvmap: single page allocation policy corrected
When user doesn't use default heap policy and selects
GART or carveout allocation, automatic single-page-to-sysmem
rule doesn't work. Because of broken rule many single page
allocations take extra space in carveout and create
unnecessary page mappings in GART and SMMU.
The fix adds sysmem bit to heap mask when allocation is
single page and GART or carveout is present in heap mask.
bug 730124
bug 731923
The change also does sanity check of available system memory
before adding sysmem bit for carveout allocations.
Peter Zu [Sat, 28 May 2011 06:13:15 +0000 (23:13 -0700)]
video: tegra: dc: fix ksv_list query sequence and timeout handling
- remove delay on i2c r/w success to fix hdcp test case 1b-03 failure
- do not turn on hdcp crypt before verifying repeater
bug 829599
Original-Change-Id: I43718636342cb0d396cc702a8374d61da72844a7
Reviewed-on: http://git-master/r/34645 Tested-by: Peter Zu <pzu@nvidia.com> Reviewed-by: Jonathan Mayo <jmayo@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Rebase-Id: R209e114e898cb2052233d6e8d24a2e5be3fbd32a
Min-wuk Lee [Thu, 2 Jun 2011 02:03:01 +0000 (11:03 +0900)]
tegra: dc: fix dc hang during dc reset
1. fix dc hang during dc reset
2. do dc reset after dc clk enabling
in reset worker function
3. remove a few build warnings
Bug 801463
Original-Change-Id: Ib7fe65555d7b0cdc8ae73fd3afd28d2b95e2d57e
Reviewed-on: http://git-master/r/33112 Reviewed-by: Min-wuk Lee <mlee@nvidia.com> Tested-by: Min-wuk Lee <mlee@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Reviewed-by: Hyong Bin Kim <hyongbink@nvidia.com> Tested-by: Hyong Bin Kim <hyongbink@nvidia.com>
Rebase-Id: R4e8a48b950a7f5965953dcb9490a61a486c4d779
Prayas Mohanty [Mon, 2 May 2011 10:54:23 +0000 (16:24 +0530)]
video: tegra: host: add additional syncpoint id
For stereo camera, we need to read syncpoints from
both the rear sensors which are on their own pixel
parsers. Add an additional sw syncpoint for that.
bug 787214
bug 786928
Original-Change-Id: I4dff7fa636ff548de44544f845a5a1ba0c402d6d
Reviewed-on: http://git-master/r/30009 Tested-by: Prayas Mohanty <pmohanty@nvidia.com> Reviewed-by: Andrew Howe <ahowe@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: Gary Zhang <garyz@nvidia.com> Reviewed-by: Erik M Lilliebjerg <elilliebjerg@nvidia.com> Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Rebase-Id: R927b1c2297441f9c30afdc8c623a8299340b6771
Jon Mayo [Sat, 14 May 2011 00:28:58 +0000 (17:28 -0700)]
ARM: tegra: dc: lower hdmi clock before set rate
choose a higher clock divider on hdmi before switching clock parents.
This prevents hdmi from exceeding its DVFS clock limits.
Original-Change-Id: I09c23498bf6450cf19e91accb788715582c3befb
Reviewed-on: http://git-master/r/31605 Reviewed-by: Scott Williams <scwilliams@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com> Reviewed-by: Jonathan Mayo <jmayo@nvidia.com> Tested-by: Jonathan Mayo <jmayo@nvidia.com>
Rebase-Id: Red51c8e99dcc60fe4cda52efba77e1182e89e3b5
Hiro Sugawara [Thu, 17 Mar 2011 20:58:13 +0000 (13:58 -0700)]
arm: tegra: nvmap: Forcing to convert CarveOut requests to IOVM
Adding a build time CONFIG option to enable forcing of conversion
of non-IRAM CarveOut memory allocation requests to IOVM requests.
Default is "y" to force the conversion.
Each forced conversion is reported to console.
Allocation alignments larger than page size for IOVM are enabled.
Single page CarveOut allocations are converted to system memory.
CarveOut memory reservation has been removed for aruba, cardhu,
and enterprise.
Creates /d/tracing/events/nvhost. Logs channel opens, closes,
writes and flushes. For writes, logs number, size and address
of cmdbufs and number of relocs.
Original-Change-Id: I5bdadcb40c31e3f057eb8c4579b95e235d860e39 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/29770 Reviewed-by: Andrew Howe <ahowe@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com> Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Rebase-Id: Rbe763a4da9f5c431170301f91fa1bc4cb4ed8f0e
Includes:
1.) Added basic DC sysfs objects.
2.) Sysfs objects and functions for smartdimmer settings.
3.) Register dump access for smartdimmer.
4.) Improvements to the behavior of smartdimmer (now updates
at the end of vblank instead of the beginning).
5.) Rename v_blank_complete to vblank_complete to keep in
same effective style as the rest of the code.
Jon Mayo [Fri, 29 Apr 2011 23:57:07 +0000 (16:57 -0700)]
video: tegra: dc: stop hdcp when keys are missing
verify Aksv, if it is invalid then quickly disable further hdcp checks.
Bug 792855
Original-Change-Id: I4a9d689d571d2f916e11f92f5b897f287f724068
Reviewed-on: http://git-master/r/29899 Reviewed-by: Jonathan Mayo <jmayo@nvidia.com> Tested-by: Jonathan Mayo <jmayo@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Rebase-Id: R198c9da7c918732a9b764063d12fd7de3792e5b8
Jon Mayo [Fri, 29 Apr 2011 03:25:13 +0000 (20:25 -0700)]
ARM: tegra: dc: clip invalid windows to screen res
clip invalid windows to fix screen size, failure to do so causes display
errors that result in corrupted display and invalid video modes.
prints a warning only once, if this warning is present in the logs then
there is a misbehaving application.
Bug 821094
Original-Change-Id: Ief7b6379026e6abeb31a28aabf920618edd7ab44
Reviewed-on: http://git-master/r/29759 Reviewed-by: Jonathan Mayo <jmayo@nvidia.com> Tested-by: Jonathan Mayo <jmayo@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Rebase-Id: Rbbd1c33e5d4b58b5ddc8a4910b6851dc9bb73d63
Jon Mayo [Fri, 29 Apr 2011 22:08:56 +0000 (15:08 -0700)]
ARM: tegra: dc: fix mutex lock in reset worker
unlock mutex if reset worker finds the display disabled.
Bug 801463
Original-Change-Id: I22bff26b5b72e75f0c46efb68446ec2257e8273f
Reviewed-on: http://git-master/r/29898 Reviewed-by: Jonathan Mayo <jmayo@nvidia.com> Tested-by: Jonathan Mayo <jmayo@nvidia.com> Reviewed-by: Michael I Gold <gold@nvidia.com>
Rebase-Id: Rc38b140352b443963756a0b0385261065a58b1e0
Jon Mayo [Wed, 13 Apr 2011 01:14:22 +0000 (18:14 -0700)]
arm: video: tegra: dc callbacks for hotplug init
add new dc out callback hotplug_init and postsuspend to handle board
specific configuration of power and gpios for detecting hotplug.
bug 812083 bug 811523
Original-Change-Id: Ia7937cc9461465502cabbd2a5efaee0093bccfe0
Reviewed-on: http://git-master/r/27570 Reviewed-by: Jonathan Mayo <jmayo@nvidia.com> Tested-by: Jonathan Mayo <jmayo@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Original-Change-Id: Iab0fbe0e493ad3818416454ba7a2dda679f68dfb
Jon Mayo [Thu, 10 Feb 2011 23:35:38 +0000 (15:35 -0800)]
ARM: tegra: dc: hdmi drive strength changes
use pixel clock to configure HDMI interface signaling properties.
These options are different depending on which SoC.
Bug 786961 Bug 795251
Original-Change-Id: Ic898e87134cbac0fe5723242febdf46bc5b72d32
Reviewed-on: http://git-master/r/19176 Reviewed-by: Jonathan Mayo <jmayo@nvidia.com> Tested-by: Jonathan Mayo <jmayo@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Original-Change-Id: I98d68da65e590a0eb5cf7fac166d05e0c531bd5f
Code Review / linux-2.6.git / log