6 years agoarm: tegra: cardhu: separate pinmux and gpio init
Pritesh Raithatha [Fri, 12 Oct 2012 14:19:15 +0000]
arm: tegra: cardhu: separate pinmux and gpio init

Bug 1003210

Change-Id: If26ee43f7ee37e48998ec91a4f163f3f35aebbc9
Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>
Reviewed-on: http://git-master/r/144101
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

6 years agopinctrl: tegra: set low power mode bank width to 2
Pritesh Raithatha [Mon, 15 Oct 2012 14:18:20 +0000]
pinctrl: tegra: set low power mode bank width to 2

Bug 1003210

Change-Id: I6a119bfd47ad94569cafd4fee9577d053bcffd31
Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>
Reviewed-on: http://git-master/r/144582
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Nitin Kumbhar <nkumbhar@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>

6 years agovideo: tegra: host: Enable MSENC power gating
Terje Bergstrom [Fri, 28 Sep 2012 07:53:07 +0000]
video: tegra: host: Enable MSENC power gating

Enable power gating for MSENC.

Bug 1056631

Change-Id: I1544f9e55a6f2c71b2fa285da9edc78ee82f458a
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/139601
(cherry picked from commit 808e9b8710f2c3bfeee9f60473eed8e2422d9bf1)
Reviewed-on: http://git-master/r/142696
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

6 years agoARM: tegra: Use cbus for MSENC power sequence
Terje Bergstrom [Mon, 8 Oct 2012 05:09:32 +0000]
ARM: tegra: Use cbus for MSENC power sequence

MSENC requires a low enough PLLC clock to be able to be turned on for
power un-gating. If 3D or other fast unit is active at the same time,
PLLC is set to too high rate and MSENC cannot be turned on.

Use the cbus clock to allow clock framework to set the PLL to correct
rate.

Bug 1060834

Change-Id: Id83c33b9a5f2f29466cc55243310642a5f53fd99
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/142190
(cherry picked from commit 94c16a960d7649bdb4b6369ae2a1cdd3fa369d71)
Reviewed-on: http://git-master/r/144889
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

6 years agomedia: video: tegra: Port ad5816 focuser on pluto
Sudhir Vyas [Tue, 16 Oct 2012 12:37:24 +0000]
media: video: tegra: Port ad5816 focuser on pluto

Make ad5816 focuser up on pluto.

Bug 1056458

Change-Id: I79d95cb566549f6568a0bd882d5c337acaeba5b9
Reviewed-on: http://git-master/r/141771
Signed-off-by: Sudhir Vyas <svyas@nvidia.com>
Reviewed-on: http://git-master/r/144885
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

6 years agoarm: tegra: pluto: Add ad5816 focuser support
Sudhir Vyas [Tue, 16 Oct 2012 11:11:52 +0000]
arm: tegra: pluto: Add ad5816 focuser support

Add focuser support for pluto.

Bug 1056458

Change-Id: Icd3c33a6da732a78aba4fe452e56d54192106171
Reviewed-on: http://git-master/r/141724
Signed-off-by: Sudhir Vyas <svyas@nvidia.com>
Reviewed-on: http://git-master/r/144835
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Naren Bhat <nbhat@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

6 years agodt: Document: correct tegra20/30 pinctrl slew-rate name
Pritesh Raithatha [Mon, 15 Oct 2012 14:24:32 +0000]
dt: Document: correct tegra20/30 pinctrl slew-rate name

change nvidia,slew_rate* to nvidia,slew-rate*

Bug 1003210

Change-Id: Ia85a9911c785adaa9066afea9924c25a56fc72dc
Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>
Reviewed-on: http://git-master/r/144585
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Nitin Kumbhar <nkumbhar@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>

6 years agoinput: misc: cm3217: add enable and disable
Shridhar Rasal [Mon, 15 Oct 2012 09:07:33 +0000]
input: misc: cm3217: add enable and disable

For 'enabled' sysfs provide enable and disable and
invoke respective suspend and resume PM. This functionality will
replace early suspend functionality.

bug 1063497

Change-Id: I391e8f4faa66639247cb265b025d8fe4e6428420
Signed-off-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-on: http://git-master/r/144509
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sri Krishna Chowdary <schowdary@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
GVS: Gerrit_Virtual_Submit

6 years agousb: host: tegra: fix coverity issue
Sri Krishna chowdary [Fri, 12 Oct 2012 15:44:20 +0000]
usb: host: tegra: fix coverity issue

Dereference pointer after NULL check.

Bug 1046331

Change-Id: Ib4ca399fd6f81d29c27cb18207fa5da1b7d2c8d1
Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/144111
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Rakesh Bodla <rbodla@nvidia.com>
Reviewed-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agopinctrl: tegra: correct bank for pingroup and drv pingroup
Pritesh Raithatha [Wed, 3 Oct 2012 13:31:49 +0000]
pinctrl: tegra: correct bank for pingroup and drv pingroup

Bug 1003210

Change-Id: Ie0d712a63715a73f110d679007acde4fdf87fb3d
Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>
Reviewed-on: http://git-master/r/144065
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Nitin Kumbhar <nkumbhar@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agoCHROMEOS: config: enable e-Crypt FS
Rhyland Klein [Mon, 15 Oct 2012 17:24:51 +0000]
CHROMEOS: config: enable e-Crypt FS

At some point ecrypt fs support was disabled. It is required for
Chromeos so enable it again.

Signed-off-by: Rhyland Klein <rklein@nvidia.com>
Change-Id: I582601d8f0e6fcb7cc3281e6f76b375758f1682b
Reviewed-on: http://git-master/r/144647
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Allen Martin <amartin@nvidia.com>

6 years agoarm: tegra: uncompress: auto-detect without debug_ll
Jimmy Zhang [Wed, 10 Oct 2012 19:16:35 +0000]
arm: tegra: uncompress: auto-detect without debug_ll

Fixes a kernel crash when DEBUG_LL is not enabled, but the bootloader
still marks a uart port for debug using 'D' for auto detect.

Change-Id: I52146feac3d5a2a904bf43765ceab660c1f2ce89
Signed-off-by: Rhyland Klein <rklein@nvidia.com>
Reviewed-on: http://git-master/r/143329
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jimmy Zhang <jimmzhang@nvidia.com>
Tested-by: Jimmy Zhang <jimmzhang@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Allen Martin <amartin@nvidia.com>

6 years agonet: wireless: bcmdhd: remove wifi chip retry detection loop
Nagarjuna Kristam [Fri, 12 Oct 2012 10:36:37 +0000]
net: wireless: bcmdhd: remove wifi chip retry detection loop

wifi retry chip detection loop uses dummy SDIO register un-register calls
to detect wifi chip. After successful detection of wifi chip, dummy SDIO
driver is un-registered and then dhd bus driver is register to perform wifi
initialization sequence. Sequential SDIO un-register and register calls can cause
race condition in SDIO driver.

Bug 1054985

Change-Id: Ifd3c9cf69af6b58c32cd0a34424b53c04e1fb0e7
Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-on: http://git-master/r/144063
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Rakesh Kumar <krakesh@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agochromeos: disable TEGRA_AVP and MEDIASERVER
Rhyland Klein [Tue, 9 Oct 2012 17:36:23 +0000]
chromeos: disable TEGRA_AVP and MEDIASERVER

Disable TEGRA_AVP and MEDIASERVER as they seem to be deprecated now.

Change-Id: Id88cf53062d2f8acda86c62bc12127ff6b15aae7
Signed-off-by: Rhyland Klein <rklein@nvidia.com>
Reviewed-on: http://git-master/r/142717
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Allen Martin <amartin@nvidia.com>
GVS: Gerrit_Virtual_Submit

6 years agoarm: tegra: pcie: fix coverity issue
Sri Krishna chowdary [Mon, 8 Oct 2012 05:38:38 +0000]
arm: tegra: pcie: fix coverity issue

Check return value.
Deallocate irq properly.

Bug 1046331

Change-Id: I804f671bb04dac4876277ed9365bb2506b188f35
Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/142197
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

6 years agobrcmfmac: load firmware based on chip id
Wei Ni [Fri, 28 Sep 2012 09:20:19 +0000]
brcmfmac: load firmware based on chip id

Choose appropriate firmware at runtime so that brcmfmac driver can be used for
both bcm4329 and bcm4330 chipset.

Change-Id: Ia035874dcb2eb0e01a0a1b8818e60c363c9d018e
Signed-off-by: Wei Ni <wni@nvidia.com>
Reviewed-on: http://git-master/r/139622
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agoARM: tegra: enterprise: enable wl18xx wireless module support
Rakesh Goyal [Tue, 28 Aug 2012 16:46:08 +0000]
ARM: tegra: enterprise: enable wl18xx wireless module support

Bug 990784
Change-Id: I173df3f7244e7d0b40ae5aad98c72885ff42fdab
Signed-off-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-on: http://git-master/r/129103
(cherry picked from commit 32b8cc820fc9f3709c23e6b383825d6cdb0a6085)
Reviewed-on: http://git-master/r/134792
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agowakeup: change formatting alignement
Shridhar Rasal [Tue, 16 Oct 2012 07:37:54 +0000]
wakeup: change formatting alignement

Just sets proper formatting aligment for wakeup_sources stats.

Change-Id: I4bf41e53e39b892e290de9ee2bfdb25573a205fc
Signed-off-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-on: http://git-master/r/144796
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agocrypto: tegra-se: fix coverity issue
Sri Krishna chowdary [Mon, 8 Oct 2012 06:08:52 +0000]
crypto: tegra-se: fix coverity issue

Dereference after NULL check.

Bug 1046331

Change-Id: I9438cf4aba92bec2c0aaccb5e272368a1bd99693
Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/142204
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

6 years agomisc: Removed warnings from MAX1749 driver
Sumit Sharma [Mon, 15 Oct 2012 09:59:43 +0000]
misc: Removed warnings from MAX1749 driver

Removed compile time warnings from MAX1749 vibrator driver

Change-Id: I71521ffb1621fb46cbc51c45d0de7b99836b51d7
Signed-off-by: Sumit Sharma <sumsharma@nvidia.com>
Reviewed-on: http://git-master/r/144526
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

6 years agoChromeOS: config: renormalize splitconfig
Christopher Freeman [Fri, 12 Oct 2012 21:38:11 +0000]
ChromeOS: config: renormalize splitconfig

Update splitconfigs with new kconfig options

Change-Id: I9aa83fcabc886932447fe241b34c809374a35cc5
Signed-off-by: Christopher Freeman <cfreeman@nvidia.com>
Reviewed-on: http://git-master/r/144170
Reviewed-by: Rhyland Klein <rklein@nvidia.com>
Tested-by: Rhyland Klein <rklein@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Andrew Chew <achew@nvidia.com>
Reviewed-by: Allen Martin <amartin@nvidia.com>
GVS: Gerrit_Virtual_Submit

6 years agoarm: tegra: mc: add config option for PTSA.
Krishna Reddy [Fri, 12 Oct 2012 00:48:10 +0000]
arm: tegra: mc: add config option for PTSA.

Add config option for MC PTSA enable/disable.
Move T11x specific registers to t11x file.

Change-Id: I48a7013937faffdf99b1f54135b0b06da961b156
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/143901
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

6 years agomac80211&nl80211: support to abort a scan request on tx
Wei Ni [Thu, 11 Oct 2012 09:35:02 +0000]
mac80211&nl80211: support to abort a scan request on tx

mac80211 & nl80211: add support to abort a scan request on tx

The original issue is the chromium issue:
http://code.google.com/p/chromium-os/issues/detail?id=11485

This fix comes from:
https://gerrit.chromium.org/gerrit/#change,5744
https://gerrit.chromium.org/gerrit/#change,5745

This change will not affect android/l4t.
Add this changes, so that we can support ChromeOs and Android both.

Change-Id: I8a98efcaa706952dd3f3d9872f26138d432d7b0c
Signed-off-by: Wei Ni <wni@nvidia.com>
Reviewed-on: http://git-master/r/143538
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Rhyland Klein <rklein@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agoarm: tegra: cardhu: fix coverity issue
Sri Krishna chowdary [Sun, 14 Oct 2012 08:54:38 +0000]
arm: tegra: cardhu: fix coverity issue

check return values.

Bug 1046331

Change-Id: I216759d1f897c8d248430bbc208b2af459539b36
Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/144376
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agoarm: tegra: cardhu: fix coverity issue
Sri Krishna chowdary [Sun, 14 Oct 2012 08:32:19 +0000]
arm: tegra: cardhu: fix coverity issue

Check return values from gpio_request and
gpio_direction_input.

Bug 1046331

Change-Id: Iea97537572242430bed42d730543f740d1f56b04
Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/144375
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>

6 years agoarm: tegra: clock: fix coverity issue
Sri Krishna chowdary [Thu, 11 Oct 2012 10:15:56 +0000]
arm: tegra: clock: fix coverity issue

Add Null check before pointer dereference.

Bug 1046331

Change-Id: I88c315671b8ca97ad70d579cc921b1dcccc06e71
Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/143579
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

6 years agovideo: tegra: dsi: remove unsigned variable comparison with zero
Deepak Nibade [Thu, 20 Sep 2012 11:35:55 +0000]
video: tegra: dsi: remove unsigned variable comparison with zero

fix coverity issue
unsigned variable 'i' may result in infinite for loop
so change loop to 'while'

bug 1046331

Change-Id: I812845bcac3efda45101e8384ece132e1e6b8866
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/134067
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agoarm: tegra: dalmore: fix coverity issue
Sri Krishna chowdary [Sun, 14 Oct 2012 09:11:06 +0000]
arm: tegra: dalmore: fix coverity issue

Check return values.

Bug 1046331

Change-Id: I090515790bae8c450e00e258ac9b89ce516d37a3
Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/144377
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

6 years agousb: otg: tegra: fix coverity issue
Sri Krishna chowdary [Sun, 14 Oct 2012 06:41:20 +0000]
usb: otg: tegra: fix coverity issue

sscanf reads int into host and host is checked
if it is less than 0. This suggests that host should
be int rather than unsigned int.

Bug 1046331

Change-Id: I8ac4d8113b0602625e2a5019f70f29797148ec5d
Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/144373
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

6 years agomedia: video: tegra: pass device as argument in power_on
Mallikarjun Kasoju [Fri, 12 Oct 2012 16:04:17 +0000]
media: video: tegra: pass device as argument in power_on

modify power_on api to pass device as argument so that from
board files it can be used to get the regulator in place of NULL

Bug 1154495

Change-Id: I5164fa04a14ef0d405e6c9d51f42efc8e6ce14bf
Signed-off-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Reviewed-on: http://git-master/r/143748
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

6 years agoarm: tegra3: clock: fix coverity issue
Sri Krishna chowdary [Thu, 11 Oct 2012 10:48:16 +0000]
arm: tegra3: clock: fix coverity issue

Add null check before pointer dereference.

Bug 1046331

Change-Id: I76f2aa2f0b5bdf67b4c203b1f9d786281fab2a8b
Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/143595
GVS: Gerrit_Virtual_Submit
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

6 years agovideo: tegra: dc: fix memory leak during video playback
Deepak Nibade [Fri, 21 Sep 2012 11:55:47 +0000]
video: tegra: dc: fix memory leak during video playback

-flip_worker flips the windows and in next iteration old handles are
queued up and freed
-during 1080p video playback with hdmi connected, a call from
tegra_fb_blank disables window flag
-because of disabled window flag, old handles of one of the window are
not queued for deletion in next iteration
-so using old handle as condition of deletion marking instead of window
flag

bug 1028179

Reviewed-on: http://git-master/r/134388
(cherry picked from commit be51b49e6ec894ec4a9977fed5690b55144b3d71)

Change-Id: I1cabaad4fc0d7f7812e0a12a32774484fe7c86c6
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/143466
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agoinput: add sysfs for enable and disable device.
Shridhar Rasal [Tue, 7 Aug 2012 09:22:12 +0000]
input: add sysfs for enable and disable device.

New 'enabled' sysfs added to en/disable input device from user space.

bug 1063749

Change-Id: Iea1773254dd9effbb5b618772d8673d1360d6247
Signed-off-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-on: http://git-master/r/130166
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agoarm: tegra: remove unused file.
Krishna Reddy [Fri, 12 Oct 2012 00:13:24 +0000]
arm: tegra: remove unused file.

Change-Id: Ifd2c3bbb1a21330273efb96388095eb641f45df5
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/143890
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit

6 years agoarm: tegra: la: Program PTSA registers in LA module
Krishna Reddy [Fri, 28 Sep 2012 03:21:56 +0000]
arm: tegra: la: Program PTSA registers in LA module

Change-Id: Iaeac46499af6df3550bf000056b93cc474a9b483
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/139556
(cherry picked from commit 64900b9a27845b201002b07bf7b8537a682f3d38)
Reviewed-on: http://git-master/r/143786
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

6 years agoarm: tegra: la:Add support to set initial static LA values
Krishna Reddy [Fri, 14 Sep 2012 06:32:14 +0000]
arm: tegra: la:Add support to set initial static LA values

Change-Id: I6820aeeb4105509f8ede185c4418c384ad0d91b3
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/138721
(cherry picked from commit e42ebbd79029066a30c0b94a3ad1c3055dde3e2f)
Reviewed-on: http://git-master/r/143785
Reviewed-by: Alex Waterman <alexw@nvidia.com>

6 years agoarm: tegra: la: Convert error message to WARN_ONCE
Krishna Reddy [Tue, 25 Sep 2012 21:48:00 +0000]
arm: tegra: la: Convert error message to WARN_ONCE

Change-Id: Ie11de7963ea9c9538d6c6a2db971c47f66eb0912
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/138720
(cherry picked from commit 8a9ab8c39e09ab7e9bea494b7f585a6cba7258dd)
Reviewed-on: http://git-master/r/143783
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User

6 years agoARM: tegra: move uart debug port initialization into common file.
Laxman Dewangan [Thu, 11 Oct 2012 13:44:10 +0000]
ARM: tegra: move uart debug port initialization into common file.

There is lots of duplicate code for initializing
the debug port for all platform.
Move this to board-common file so that duplicate code
can be avoided.

Change-Id: I3e8a10cd3db4db21d6752a0b689136bfe9828197
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/143721
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

6 years agoasoc: tegra: handle multiple registrations for switch device
Nikesh Oswal [Tue, 9 Oct 2012 13:31:38 +0000]
asoc: tegra: handle multiple registrations for switch device

Multiple machine drivers try to register the switch device,
this change ensures that switch device is registered only once

Bug 1002694

Change-Id: If23acb08aad36d5b4c466e7092e261b0bc18d02a
Signed-off-by: Nikesh Oswal <noswal@nvidia.com>
Reviewed-on: http://git-master/r/142681
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

6 years agoARM: tegra11: Call cpu_pm callback in LP2 later
Bo Yan [Sun, 30 Sep 2012 00:06:54 +0000]
ARM: tegra11: Call cpu_pm callback in LP2 later

GIC function tegra_gic_notifier disables interrupt in CPU interface
for callback event CPU_PM_ENTER. Once interrupt is disabled in
CPU interface, wfi instruction can't be used to clock gate since
no interrupt can pass through the GIC to bring CPU out of clock
gating.

Move cpu_pm_enter and cpu_pm_exit closer to the final power gating
code, basically make sure all fallback to clock gating are outside
of cpu_pm_enter and cpu_pm_exit pair, i.e. no clock gating can happen
after interrupt pass through is disabled in CPU interface.

Change-Id: I36d56a0f5e83b86070c3a0a1bc60066e2d0892af
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/139957
(cherry picked from commit c661833556d9757899428e81bb738335ff742586)
Reviewed-on: http://git-master/r/143974
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agoARM: tegra11x: Fix the secondary CPU start up
Bo Yan [Tue, 25 Sep 2012 04:05:48 +0000]
ARM: tegra11x: Fix the secondary CPU start up

The secondary CPU startup sequence of t11x is different because
flow controller behavior has changed, so fix it accordingly

Change-Id: I26aa26593943fde0cf7b599b4fca04644715ca4a
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/138705
(cherry picked from commit 79ecf6b4ba3902b1b5bd79d8d4942884a8dc78eb)
Reviewed-on: http://git-master/r/143973
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agoARM: tegra11: clock: Enable dual cbus sourced by PLLC2/3
Alex Frid [Thu, 4 Oct 2012 23:51:51 +0000]
ARM: tegra11: clock: Enable dual cbus sourced by PLLC2/3

Restore dual c2bus/c3bus operations, removed initial floor settings
to re-enable bus scaling.

Change-Id: I97aa8951c8fd00c5e5a3d0a3c9f945762373438c
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/141784
(cherry picked from commit 8636b4a7ed1efeffd0f0d36430065e55ec65b97b)
Reviewed-on: http://git-master/r/143972
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agoARM: tegra11: clock: Update PLLC2/C3 configuration
Alex Frid [Tue, 25 Sep 2012 21:50:06 +0000]
ARM: tegra11: clock: Update PLLC2/C3 configuration

- Lower vco min to 600MHz
- Do not allow multiples of 3 as post divider values
- Extend unlock frame number

Change-Id: I6cda72842f9258f43400d4213880e6e3e7b6febd
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/138754
(cherry picked from commit 8dea2e5438e76717931b34f5ee3d1f9a88703f0b)
Reviewed-on: http://git-master/r/143971
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Raymond Poudrier <rapoudrier@nvidia.com>
Tested-by: Raymond Poudrier <rapoudrier@nvidia.com>
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>

6 years agoinput: misc: Invensense: Add TAI support.
Robert Collins [Wed, 3 Oct 2012 21:34:15 +0000]
input: misc: Invensense:  Add TAI support.

Change-Id: I461dee23d820af22e6d3295e8d6f0c0a13a269a8
Signed-off-by: Robert Collins <rcollins@nvidia.com>
Reviewed-on: http://git-master/r/141328
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
Tested-by: Gaurav Batra <gbatra@nvidia.com>
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>

6 years agosensors: Invensense: Add debug register interface.
Robert Collins [Wed, 19 Sep 2012 16:46:10 +0000]
sensors: Invensense:  Add debug register interface.

Change-Id: I4d13fde5437e9b956609c89a28266a238713d513
Signed-off-by: Robert Collins <rcollins@nvidia.com>
Reviewed-on: http://git-master/r/133827
(cherry picked from commit e449744c9e16d7339b1c771c9f36118da23e3a52)
Reviewed-on: http://git-master/r/138749
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Gaurav Batra <gbatra@nvidia.com>
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>

6 years agoconfigs: enable Invensense MPU
Erik Lilliebjerg [Wed, 15 Aug 2012 08:28:01 +0000]
configs: enable Invensense MPU

Change-Id: Ieeb0b533575e2bb0fc3ca470ce619f0e138bc073
Signed-off-by: Xiaohui Tao <xtao@nvidia.com>
Signed-off-by: Robert Collins <rcollins@nvidia.com>
Reviewed-on: http://git-master/r/132405
(cherry picked from commit b3809d3487784acf3b2f1703c3c5aa731457b873)
Reviewed-on: http://git-master/r/138747
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Gaurav Batra <gbatra@nvidia.com>
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>

6 years agoarch: arm: board support for Invensense MPU
Graziano Misuraca [Thu, 13 Sep 2012 01:04:13 +0000]
arch: arm: board support for Invensense MPU

Add board support for Invensense MPU

Change-Id: Iefabb4e01f9d0772a3a037696fe82417a51f78fd
Signed-off-by: Xiaohui Tao <xtao@nvidia.com>
Signed-off-by: Robert Collins <rcollins@nvidia.com>
Signed-off-by: Graziano Misuraca <gmisuraca@nvidia.com>
Reviewed-on: http://git-master/r/132404
(cherry picked from commit baea2bfc5696f2f044efc80f5b7a88dda061e3d8)
Reviewed-on: http://git-master/r/138746
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Gaurav Batra <gbatra@nvidia.com>
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>

6 years agoinput: misc: Invensense MPU 5.0.1 driver
Robert Collins [Tue, 11 Sep 2012 23:59:16 +0000]
input: misc: Invensense MPU 5.0.1 driver

Change-Id: I6391dc455d615e63d6b15f0f537805c88c259a15
Signed-off-by: Xiaohui Tao <xtao@nvidia.com>
Signed-off-by: Robert Collins <rcollins@nvidia.com>
Reviewed-on: http://git-master/r/132403
(cherry picked from commit de2d18bbe47fca8d56c3e0717b9463a05a110c88)
Reviewed-on: http://git-master/r/138745
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Gaurav Batra <gbatra@nvidia.com>
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>

6 years agovideo: tegra: nvmap: Add pin, unpin trace events
Krishna Reddy [Thu, 11 Oct 2012 02:05:23 +0000]
video: tegra: nvmap: Add pin, unpin trace events

Change-Id: I62deda9d607476e3dc82428b872ad1a3e396e37e
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/143421
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

6 years agovideo: tegra: nvmap: fix pinning unalloc'd handles
Tuomas Tynkkynen [Mon, 13 Aug 2012 14:10:42 +0000]
video: tegra: nvmap: fix pinning unalloc'd handles

nvmap_pin_ids takes a list of handles to pin from userspace.
Unfortunately, it does not check that the handles are actually
allocated, which will trigger a BUG_ON later in pin_locked().

Bug 1023954

Change-Id: Iba4c53bc0a6c47b7f4f740a93e59b613dc3b95f6
Signed-off-by: Tuomas Tynkkynen <ttynkkynen@nvidia.com>
Reviewed-on: http://git-master/r/131888
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

6 years agovideo: tegra: nvmap: fix cache_maint leak
Tuomas Tynkkynen [Mon, 3 Sep 2012 09:54:34 +0000]
video: tegra: nvmap: fix cache_maint leak

Under certain error conditions, nvmap's cache_maint would do an early
return while holding an incremented refcount and an allocated pte,
causing leaks.

Bug 1042888

Change-Id: Ie6d557f5678e7475cf46c1524a43ed464502e94c
Signed-off-by: Tuomas Tynkkynen <ttynkkynen@nvidia.com>
Reviewed-on: http://git-master/r/131887
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

6 years agoarm: tegra: mc: handle arb emem intr alone case
Krishna Reddy [Tue, 9 Oct 2012 02:05:51 +0000]
arm: tegra: mc: handle arb emem intr alone case

when the intrrupt is for arb emem alone, passing interrupt
through other error checks should be avoided.

Bug 1155067

Change-Id: I8c8f12b8951aab285ff4534b32fb28ccb2d365b1
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/143325
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agovideo: tegra: dc: change enable and hotplug_init arguments
Mallikarjun Kasoju [Thu, 11 Oct 2012 11:35:29 +0000]
video: tegra: dc: change enable and hotplug_init arguments

pass device as argument for enable and hotplug_init so that it
can be used in board files to get the regulator using device name.

Bug 1154495

Change-Id: Ib549e4d9f2c6eaf4fbcc24851a3866f2fd3cbf84
Signed-off-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Reviewed-on: http://git-master/r/142702
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
GVS: Gerrit_Virtual_Submit

6 years agoARM: tegra: m2601: Add m2601 defconfig
Ashutosh Patel [Mon, 8 Oct 2012 07:00:12 +0000]
ARM: tegra: m2601: Add m2601 defconfig

Add a defconfig file for M2601 board

Bug 1042952

Change-Id: I29588ffc42b610a55d87be891bfcf37caf69e926
Signed-off-by: Ashutosh Patel <ashutoshp@nvidia.com>
Reviewed-on: http://git-master/r/142207
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

6 years agomedia: video: tegra: change imx091 sensor resolution
Frank Chen [Tue, 25 Sep 2012 18:16:21 +0000]
media: video: tegra: change imx091 sensor resolution

Update all the sensor modes to the standard
resolution size.

Bug 961418

Change-Id: I792733af741f9764bd848fda21f29e810270b47e
Signed-off-by: Frank Chen <frankc@nvidia.com>
(cherry picked from commit 0d9230af989fa8eb1c580870ac7696efee1ba569)
Reviewed-on: http://git-master/r/142091
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Wei Chen <wechen@nvidia.com>
Reviewed-by: Patrick Shehane <pshehane@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agoARM: tegra: cardhu: add mem table.
Amit Kamath [Tue, 9 Oct 2012 07:27:36 +0000]
ARM: tegra: cardhu: add mem table.

Add memory table supporting pllm 528Mhz for Cardhu with
memory Samsung_1GB_K4P8G304EB-FGC2

Bug 928260

Change-Id: Ia863ee922dc52b7dc3c1e0e63f288a988b7d8076
Signed-off-by: Amit Kamath <akamath@nvidia.com>
Reviewed-on: http://git-master/r/141924
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agoARM: tegra: m2601: Add board support for m2601
Ashutosh Patel [Mon, 8 Oct 2012 05:06:48 +0000]
ARM: tegra: m2601: Add board support for m2601

M2601 is T30 based Automotive platform.

Changes done:
1. New board specific files for M2601 are added
2. Updated GMI,I2S,I2C,GPIO,UART,SDMMC,SPI,PCIE pinmux entries for
M2601.Tristated unused pins.
3. GMI,I2C,SDMMC,UART,SPI,PCIE,USB registered as platform
devices.Comment out LCD,HDMI interfaces.

Bug 1042952

Change-Id: I57167e427c33b4cb0ce6f7068de938d9c4dfb75f
Signed-off-by: Ashutosh Patel <ashutoshp@nvidia.com>
Reviewed-on: http://git-master/r/141872
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

6 years agovideo: tegra: host: add per device module-reg-read-write ioctl
Mayuresh Kulkarni [Wed, 10 Oct 2012 05:06:41 +0000]
video: tegra: host: add per device module-reg-read-write ioctl

- currently, the ioctl NVHOST_IOCTL_CTRL_MODULE_REGRDWR is
a part of nvhost-ctrl node
- however, it doesn't deal with host1x. infact it read/write
actual module registers
- for this kernel needs to maintain a list of all nvhost_devices
registered for a SoC. currently, this is encapsulated within
nvhost_bus which provides a iterator to walk these device list
- however, once we phase out nvhost_bus and adopt the platform_bus
we do not have a way to know the list of these devices
- this commit adds a new per-device ioctl for module register
read-write functionality
- all the new code should be using this new per device ioctl. the
old will be removed as soon as all the clients are ready to use
new ioctl

bug 1154790

Change-Id: I0552aec61a4506243461de82ac0cf6e4c1f3b220
Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-on: http://git-master/r/141579
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
GVS: Gerrit_Virtual_Submit

6 years agoasoc:tegra: disable ext1 clock in suspend
Chandrakanth [Tue, 9 Oct 2012 11:29:52 +0000]
asoc:tegra: disable ext1 clock in suspend

disable ext1 clock in suspend call and enable in resume. disabling
ext1 clock in bias enable/disable is not sufficient now

BUG 1052180

Change-Id: Iff588ac92c2d8cfe62b7a6c597c68b9f1215f64c
Signed-off-by: Chandrakanth <cgorantla@nvidia.com>
Reviewed-on: http://git-master/r/139375
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sumit Bhattacharya <sumitb@nvidia.com>
Reviewed-by: Scott Peterson <speterson@nvidia.com>

6 years agospi: tegra: fix coverity issue
Sri Krishna chowdary [Sun, 23 Sep 2012 09:06:12 +0000]
spi: tegra: fix coverity issue

Add null check before pointer dereference.

Bug 1046331

Change-Id: Ib3594542856b3668b759fbcc049191663b9e0ba1
Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/134654
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agoARM: tegra: enable io direction macro for T114
aghuge [Fri, 5 Oct 2012 10:52:15 +0000]
ARM: tegra: enable io direction macro for T114

Reviewed-on: http://git-master/r/141923
(cherry picked from commit ff471b3fde278e116da427aafd85e0fd38e7f3f2)

Change-Id: I5cb5e18336e73455ca9f350ac701b3ea8769c5e3
Signed-off-by: aghuge <aghuge@nvidia.com>
Reviewed-on: http://git-master/r/143524
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agoARM: tegra11: Dalmore/Pluto: do not use dma mode for spi transfer
Laxman Dewangan [Mon, 1 Oct 2012 15:38:38 +0000]
ARM: tegra11: Dalmore/Pluto: do not use dma mode for spi transfer

The SPI controller produces the rx underrun error randomly
when used in apb dma mode.
Disabling the dma mode of spi transfer.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/140655
(cherry picked from commit 3dd4621f9255cdde2f213e66f4e48c23ce77ec16)

Change-Id: I855ed6c68288fd2817de8f15b063966c60a0538b
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/143278
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agoARM: tegra11: Dalmore/Pluto: Add spi controller data
Laxman Dewangan [Mon, 1 Oct 2012 11:35:43 +0000]
ARM: tegra11: Dalmore/Pluto: Add spi controller data

Adding spi controller data which configure the spi controller
specific to spi device.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/140616
(cherry picked from commit f81b7009966a57a928bcd8ab6b66c4e905e533a6)

Change-Id: I672957276b1c0c6f8747d190dbde8f4a4ad7261b
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/143277
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agoARM: tegra: Dalmore/Pluto: remove spi clock initialization
Laxman Dewangan [Fri, 28 Sep 2012 15:18:09 +0000]
ARM: tegra: Dalmore/Pluto: remove spi clock initialization

remove spi clock initialization from board files as driver
take care of all require configuration.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/139734
(cherry picked from commit 44da485a9cd4c5d7946f569e1319b4ff8b658c96)

Change-Id: Ia3de79dfd2f0937719e767bff03d1acf455c9707
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/143276
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agoARM: tegra: Dalmore/Pluto: enbale dma based transfer for spi
Kunal Agrawal [Wed, 26 Sep 2012 11:49:07 +0000]
ARM: tegra: Dalmore/Pluto: enbale dma based transfer for spi

Configuring spi platform data to enable dma based transfer.

Signed-off-by: Kunal Agrawal <kunala@nvidia.com>
Reviewed-on: http://git-master/r/138937
(cherry picked from commit f7428afd295022643d2c9c9837b780d5d418f801)

Change-Id: I837d24d24bfb562a69429930baecd61e7aecc7a8
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/143275
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agoARM: tegra: Dalmore/Pluto: configure spi platform data
Laxman Dewangan [Mon, 24 Sep 2012 14:04:05 +0000]
ARM: tegra: Dalmore/Pluto: configure spi platform data

Configure spi platform data for:
- non dma based transfer.
- maximum packet size to fifo depth.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/134820
(cherry picked from commit 1697fc32a99c7c9205aa12ba7f6592410b59dd6b)

Change-Id: I9bf497571e1473855bedd8bb9577ac8165a0b10e
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/143274
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agoARM: tegra: pluto: pullup SPI4 data pins.
Linqiang Pu [Thu, 20 Sep 2012 03:40:13 +0000]
ARM: tegra: pluto: pullup SPI4 data pins.

Need to internal pullup data pins to make touch work on pluto.

Signed-off-by: Linqiang Pu <dpu@nvidia.com>
Reviewed-on: http://git-master/r/133965
(cherry picked from commit 55e8e4e675df0bbb1f552d1dc2ed449bee4e852c)

Change-Id: I0f7178aa2e22cbf0b44ccced47ad0a58ef0ec284
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/143273
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agoarm: tegra: dalmore: enable pullup on SPI4 pins
Xin Xie [Thu, 20 Sep 2012 04:48:54 +0000]
arm: tegra: dalmore: enable pullup on SPI4 pins

Signed-off-by: Xin Xie <xxie@nvidia.com>
Reviewed-on: http://git-master/r/133973
(cherry picked from commit f7bdc53ca1c22b8709ff39aefb227eab82023168)

Change-Id: I21f6ec319bff615bff50eafc1642b5cf7a434df1
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/143272
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agoARM: tegra: pluto/dalmore: change SPI4 clk to 12MHz
Linqiang Pu [Sat, 22 Sep 2012 00:19:05 +0000]
ARM: tegra: pluto/dalmore: change SPI4 clk to 12MHz

we found data corruption randomly when running at 18MHz.
WARed by changing to 12MHz.

Signed-off-by: Linqiang Pu <dpu@nvidia.com>
Reviewed-on: http://git-master/r/134529
(cherry picked from commit e32980563ca3b52a6f26e5b5b54367080508492b)

Change-Id: I35bd19766bfa5e3338887cbfdfc3034f64915775
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/143271
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agospi: tegra11: add support for HW based CS
Laxman Dewangan [Mon, 1 Oct 2012 11:41:42 +0000]
spi: tegra11: add support for HW based CS

Add support for HW based CS and add configuration
for CS setup time and hold time.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/140617
(cherry picked from commit 90dcafb1414c8e3cb53bbdf518758210aa73f21b)

Change-Id: If746f74145d3cd0804bb8dccdd8f1d0e3c2ebf3b
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/143270
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agospi: tegra11: support for rx/tx clock tap delay
Laxman Dewangan [Mon, 1 Oct 2012 11:33:22 +0000]
spi: tegra11: support for rx/tx clock tap delay

The spi tegra11 have the configuration for rx and tx
clock tap delay which need to be configure based on
the spi interface speed. It also depends on the platform
on which it is running.
Addign support for configuring this parameter through
platform file.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/140615
(cherry picked from commit b7742640eb264677a47f9944b7711ddbf07bd723)

Change-Id: I4caa2a8405d56f9d85622f540fe6b36e49c2bf39
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/143269
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agospi: tegra11: setclock source based on the speed
Laxman Dewangan [Fri, 28 Sep 2012 15:06:06 +0000]
spi: tegra11: setclock source based on the speed

Change the clock source to reach the speed based on minimum power
and nearest require speed.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/139733
(cherry picked from commit 28102ea1efe53fabf033a3ef31797923c2fed77c)

Change-Id: I4150e97fdccb140fbf5b401a68d2ca4e9802e1ac
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/143268
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agospi: tegra11: make sure SCLK is enable during transfer
Laxman Dewangan [Fri, 28 Sep 2012 14:46:28 +0000]
spi: tegra11: make sure SCLK is enable during transfer

Make sure that SCLK is enabled when spi trasnfer is in progress.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/139732
(cherry picked from commit 4be79e0c084fb7b01a95fccb8d2144b7b9fc16d0)

Change-Id: Ie9f7d398c776d4b9d9e7cfb91bc0eec054183ce4
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/143267
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agospi: tegra: fix dma based transfer issue
Kunal Agrawal [Tue, 25 Sep 2012 15:22:49 +0000]
spi: tegra: fix dma based transfer issue

Tegra11 spi controller not require the Tx fifo
to be fill before enabling dma. Removing this checks.

Signed-off-by: Kunal Agrawal <kunala@nvidia.com>
Reviewed-on: http://git-master/r/135160
(cherry picked from commit c9f0787bd10a9dc17eeb6587a67493e0d042160a)

Change-Id: I366c191b9db6d713389307a1bc9904b2d8b0b064
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/143266
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agospi: tegra11: Set speed as per client request
Laxman Dewangan [Tue, 25 Sep 2012 08:11:25 +0000]
spi: tegra11: Set speed as per client request

The speed was set for 12M. Now removing this fixed
speed and configuring based on client request.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/135047
(cherry picked from commit d4b2de17c941d10c7d1297646c766bd261f82d0f)

Change-Id: I4977a85a0f0a7a9378406458b94f5d7d6f75e271
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/143265
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agospi: tegra: Handle active high CS.
Laxman Dewangan [Mon, 24 Sep 2012 19:55:33 +0000]
spi: tegra: Handle active high CS.

Handling active HIGH CS propery as:
- Low in idle state.
- High during transfer.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/134883
(cherry picked from commit 8a52f4b515e46f839bc4520c77db83b26cd6a7ca)

Change-Id: Ic90825031415f434bf5ebaf4c6d0aea4c3e932a2
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/143264
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agospi: Tegra11: Port all fixes from t30 to tegra11
Laxman Dewangan [Sat, 22 Sep 2012 19:40:15 +0000]
spi: Tegra11: Port all fixes from t30 to tegra11

Fix multiple issue in tegra11 driver which includes:
- Half duplex support.
- Proper selecting CS.
- Port fixes from T30 to T114 driver.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/134607

Change-Id: Ica26924ebbf11c11307fc73ec3f8b2f607b2ff4a
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/143263
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agotouch: Raydium: Remove hex blob data structures from board files.
Robert Collins [Sat, 22 Sep 2012 22:49:55 +0000]
touch: Raydium: Remove hex blob data structures from board files.

Reviewed-on: http://git-master/r/134622
(cherry picked from commit cbab2c1dc0216f4acdf18fdb00744fd0b2be57d1)

Change-Id: Id75021f42bfa7d60cf64b364d93bf34e7b99b7bf
Signed-off-by: Robert Collins <rcollins@nvidia.com>
Signed-off-by: Xiaohui Tao <xtao@nvidia.com>
Reviewed-on: http://git-master/r/142741
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agoMerge remote-tracking branch 'origin/dev/praithatha-pinctrl-dt' into HEAD
Simone Willett [Thu, 11 Oct 2012 18:47:46 +0000]
Merge remote-tracking branch 'origin/dev/praithatha-pinctrl-dt' into HEAD

6 years agoasoc: tegra: pcm: Remove platform specific check.
Manoj Gangwal [Wed, 10 Oct 2012 06:45:31 +0000]
asoc: tegra: pcm: Remove platform specific check.

Bug 1035521

Change-Id: I52764a21f6fe5260da22d150aed247e77f3d2084
Signed-off-by: Manoj Gangwal <mgangwal@nvidia.com>
Reviewed-on: http://git-master/r/143008
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Scott Peterson <speterson@nvidia.com>

6 years agoasoc: codec: spdif: Remove platfrom related check.
Manoj Gangwal [Wed, 10 Oct 2012 06:38:15 +0000]
asoc: codec: spdif: Remove platfrom related check.

Bug 1035521

Change-Id: I63e6c1850a4c3d26abeb500547ec3a58edcea54d
Signed-off-by: Manoj Gangwal <mgangwal@nvidia.com>
Reviewed-on: http://git-master/r/143007
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Scott Peterson <speterson@nvidia.com>

6 years agoARM: tegra: isomgr: ISO BW Manager module
Mark Stadler [Thu, 20 Sep 2012 15:56:06 +0000]
ARM: tegra: isomgr: ISO BW Manager module

So drivers can ensure sufficient ISO BW for unit/operations

BUG 1049929

Change-Id: I28fce8e01be71dbf357ef03c47fc47f420278484
Signed-off-by: Mark Stadler <mastadler@nvidia.com>
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/134109
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

6 years agovideo: tegra: nvmap: Introduce dma-buf exporter
Hiroshi Doyu [Tue, 4 Sep 2012 11:26:51 +0000]
video: tegra: nvmap: Introduce dma-buf exporter

Based on Terje's host nvmap exporter.

Change-Id: I9627ac9c4fc838f2e2c5c95b6972aa6185be7d6b
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Cc: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/133500
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

6 years agoARM: dt: tegra cardhu: add pinmux to device tree
Stephen Warren [Tue, 13 Mar 2012 19:28:02 +0000]
ARM: dt: tegra cardhu: add pinmux to device tree

This adds a minimal pinmux configuration to the Tegra Cardhu device
tree. Initially, just the built-in eMMC and SD card slot are configured.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Olof Johansson <olof@lixom.net
(cherry picked from commit e5cbeef0a4d450787169e29b610455b7d9392b7e)

Change-Id: Ifd97608bb9c23204a48b1e4dcd009f6bb0573c56
Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>

6 years agopinctrl: fix a minor harmless typo
Guennadi Liakhovetski [Tue, 22 May 2012 22:20:17 +0000]
pinctrl: fix a minor harmless typo

The way the for_each_maps() macro is currently used, using "i" instead of
"_i_" works and is harmless. Still, this is a bug, that can trigger any
time, if the code around that macro changes. Better fix it now.

Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
(cherry picked from commit bc66468cee4c23856b2e51d711e62e4ef773001a)

Change-Id: I7515c3fd0d92a85c990ea6b4c5b1ef28b006e517
Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>

6 years agopinctrl: make pinmux disable function optional
Dong Aisheng [Mon, 14 May 2012 11:06:37 +0000]
pinctrl: make pinmux disable function optional

Some SoCs may not have pinmux disable function in HW.

Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Dong Aisheng <dong.aisheng@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
(cherry picked from commit 02b50ce4cb1b6aff7d9f1c0c5b4ceb44107bacb4)

Change-Id: Id9d3ea61ec011634127f2f79edc79cf7a19ff52d
Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>

6 years agopinctrl: a minor error checking improvement for pinconf
Dong Aisheng [Mon, 14 May 2012 11:06:36 +0000]
pinctrl: a minor error checking improvement for pinconf

Also checking invalid num_configs when validate the pinconf map.

Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Dong Aisheng <dong.aisheng@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
(cherry picked from commit c95df2db2cb5a147b42374f391858232517c0576)

Change-Id: Ibfa2037c801e20c610f2bd7229518c9fd618b007
Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>

6 years agopinctrl: add sleep state definition
Linus Walleij [Mon, 7 May 2012 09:17:53 +0000]
pinctrl: add sleep state definition

There is an IDLE definition in the pinctrl framework, but for
ux500 SLEEP is more apropriate.

I've added some comments on the semantics of the common states
so as to avoid misunderstandings.

ChangeLog v1->v2:
- Fixed terminology "on"->"into".

Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
(cherry picked from commit 65697e6b1a7d73d82d114377b448e89b9788e26b)

Change-Id: Id6a11c5e76eda13228b82e58793b237fd791243f
Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>

6 years agopinctrl: (cosmetic) fix two entries in DocBook comments
Guennadi Liakhovetski [Wed, 9 May 2012 07:22:40 +0000]
pinctrl: (cosmetic) fix two entries in DocBook comments

This removes a repeated word and a repeated and incomplete line from two
pinctrl headers.

Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
(cherry picked from commit c7eea50b980b28f4edaa0cfbdf2456532472bc03)

Change-Id: I572c870bc1d0c24eaffc07a7e8e6bb9711ad37b2
Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>

6 years agopinctrl: add more info to error msgs in pin_request
Stephen Warren [Tue, 1 May 2012 17:14:15 +0000]
pinctrl: add more info to error msgs in pin_request

Additionally print which pin the request failed for, which entity already
claimed it, and what entity was trying to claim it.

Remove duplicate device name from a debug message.

Clean up some indentation.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
(cherry picked from commit d4705316c18d371eb404d0ae5dcf51ce6e341d0f)

Change-Id: I41ff4fd31fc29d59b1f9d5646bd79d0f1ed3e56f
Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>

6 years agodt: add of_get_child_count helper function
Dong Aisheng [Fri, 27 Apr 2012 03:36:20 +0000]
dt: add of_get_child_count helper function

Currently most code to get child count in kernel are almost same,
add a helper to implement this function for dt to use.

Cc: Grant Likely <grant.likely@secretlab.ca>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Dong Aisheng <dong.aisheng@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
(cherry picked from commit 183f1d0c6450ee032d97a2d01ed5eb00e0dbaa49)

Change-Id: Iad5b00ef4138f9d72b2e4c2f76b8f0a6586fe3d4
Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>

6 years agopinctrl: support gpio request deferred probing
Dong Aisheng [Wed, 25 Apr 2012 11:38:13 +0000]
pinctrl: support gpio request deferred probing

As pinctrl handles, it may be possible the pinctrl gpio ranges
are still not got registered when user call pinctrl_gpio_request.
Thus, add defer support for it too.

Signed-off-by: Dong Aisheng <dong.aisheng@linaro.org>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
(cherry picked from commit 4650b7cbea4db73f459181f67f939b510e3a17b2)

Change-Id: I9ce3db89b10235afc014485904cc88a61559d68b
Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>

6 years agopinctrl: add pinctrl_provide_dummies interface for platforms to use
Dong Aisheng [Thu, 26 Apr 2012 08:15:50 +0000]
pinctrl: add pinctrl_provide_dummies interface for platforms to use

Add a interface pinctrl_provide_dummies for platform to indicate
whether it needs use pinctrl dummy state.

ChangeLog v3->v4:
* remove dummy gpio support in pinctrl subsystem.
  Let gpio driver decide whether it wants to use pinctrl gpio mux
  function.
ChangeLog v2->v3:
* Also changed the missed pinctrl gpio APIs in v1.
ChangeLog v1->v2:
* Based on sascha's suggestion, drop using kconfig since it will hide
  pinctrl errors on all other boards.
  See: https://lkml.org/lkml/2012/4/18/282
  It seemed both Linus and Stephen agreed with this way, so i'm ok
  with it too.
* Add dummy gpio support.
  pinctrl gpio in the same situation as state.
* Patch name changed.
  Original is pinctrl: handle dummy state in core.
* Split removing old dt dummy interface into a separate patch

Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Dong Aisheng <dong.aisheng@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
(cherry picked from commit 5b3aa5f7c6287b1a0698950a91e94546888e553b)

Change-Id: I41d671fceef9bce91c61f439f30e2fb908328e08
Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>

6 years agopinctrl: enhance reporting of errors when loading from DT
John Crispin [Thu, 26 Apr 2012 14:47:11 +0000]
pinctrl: enhance reporting of errors when loading from DT

There are a few places in the api where the code simply returns -EINVAL when
it finds an error. An example is pinmux_map_to_setting() which now reports an
error if we try to match a group with a function that it does not support.

The reporting of errors in pinconf_check_ops and pinmux_check_ops now has the
same style and is located inside the according functions and not the calling
code.

When the map is found in the DT but the default state can not be selected we
get an error to know that the code at least tried.

The patch also removes a stray word from one comment and a "->" from another
for the sake of consistency.

Finally we replace a few pr_err/debug() calls with dev_err/dbg().

Thanks go to Stephen Warren for reviewing the patch and enhancing the reporting
inside pinmux_map_to_setting().

Signed-off-by: John Crispin <blogic@openwrt.org>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
(cherry picked from commit ad6e1107baa2e7fda55c2020c25127eab9c0122b)

Change-Id: Icce6c3845959d32f2d3630d988cbdde3d27495f3
Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>

6 years agopinctrl: add kerneldoc for pinctrl_ops device tree functions
Stephen Warren [Thu, 26 Apr 2012 16:18:52 +0000]
pinctrl: add kerneldoc for pinctrl_ops device tree functions

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
(cherry picked from commit 02ae6da28fb7aa31d8bf1972c99e83c58b684198)

Change-Id: Ifffcfb9dfc89c123f6c9c83b1e2f48ffa3f7f85a
Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>

6 years agopinctrl: propagate map validation errors
Stephen Warren [Wed, 25 Apr 2012 16:32:16 +0000]
pinctrl: propagate map validation errors

pinctrl_register_map() was returning early if pinmux_validate_map() or
pinconf_validate_map() failed, but was not actually returning the error
code.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
(cherry picked from commit fde04f419a230fb7f7dc018a9deca6f5d431831e)

Change-Id: I24c89783e2d1319a1b060f4335c7f7a800f79d47
Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>

6 years agopinctrl: fix dangling comment
Linus Walleij [Tue, 24 Apr 2012 13:20:02 +0000]
pinctrl: fix dangling comment

This comment was referring to an older PINMUX define, it should
be PINCTRL now.

Reported-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Dong Aisheng <dong.aisheng@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
(cherry picked from commit dd5127010afa560b1cfde7e2cffeadabdd20885d)

Change-Id: I27f7d200f07760de6ea3cf5f5777fae539b28142
Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>

6 years agopinctrl: tegra: error reporting cleanup
Stephen Warren [Mon, 23 Apr 2012 16:05:22 +0000]
pinctrl: tegra: error reporting cleanup

Print an explicit error message in various failure cases to allow
easier diagnosis.

WARN_ON() some internal failures that users/clients shouldn't be able to
trigger.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
(cherry picked from commit aef7704c6cc36db9618603b22194def441d30432)

Change-Id: I0cc9d7e123be8043585e74159f606c7d0eb35ef9
Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>

6 years agopinctrl: fix signed vs unsigned conditionals inside pinmux_map_to_setting
John Crispin [Mon, 23 Apr 2012 17:01:58 +0000]
pinctrl: fix signed vs unsigned conditionals inside pinmux_map_to_setting

pinmux_map_to_setting() uses setting->data.mux.func/group to store the return
code of pinmux_func_name_to_selector/pinctrl_get_group_selector(). However,
struct pinctrl_setting_mux defines these elements as unsigned, resulting in all
error codes getting lost. The conditionals following the assignments will always
evaluate to false thus breaking the error paths.

This bug can be triggered by loading a pinmux group map from the devicetree
with an invalid function/group string.

Signed-off-by: John Crispin <blogic@openwrt.org>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Dong Aisheng <dong.aisheng@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
(cherry picked from commit 15f70e1b9a1a6351c252cb8892272cc4601818c7)

Change-Id: Ic16a3e873dff4475f8bcabbf79e7615722ee22cd
Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>

6 years agopinctrl: tegra: debugfs enhancements
Stephen Warren [Wed, 11 Apr 2012 21:42:56 +0000]
pinctrl: tegra: debugfs enhancements

* Only provide debugfs-relates ops when CONFIG_DEBUG_FS is enabled.
* Implement pin_config_group_dbg_show op.
* Implement pin_config_config_dbg_show op.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
(cherry picked from commit b5badbaad16b44f1d5508701295fa682308da701)

Change-Id: Id68829872c24ddc073a778156a6d182c1c2d9330
Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>