14 years ago[PATCH] pm: fix process freezing
Pavel Machek [Sat, 3 Sep 2005 22:57:05 +0000]
[PATCH] pm: fix process freezing

If process freezing fails, some processes are frozen, and rest are left in
"were asked to be frozen" state.  Thats wrong, we should leave it in some
consistent state.

Signed-off-by: Pavel Machek <pavel@suse.cz>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] swsusp: fix error handling and cleanups
Pavel Machek [Sat, 3 Sep 2005 22:57:05 +0000]
[PATCH] swsusp: fix error handling and cleanups

Drop printing during normal boot (when no image exists in swap), print
message when drivers fail, fix error paths and consolidate near-identical
functions in disk.c (and functions with just one statement).

Signed-off-by: Pavel Machek <pavel@suse.cz>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] swsusp: add locking to software_resume
Shaohua Li [Sat, 3 Sep 2005 22:57:04 +0000]
[PATCH] swsusp: add locking to software_resume

It is trying to protect swsusp_resume_device and software_resume() from two
users banging it from userspace at the same time.

Signed-off-by: Shaohua Li <shaohua.li@intel.com>
Signed-off-by: Pavel Machek <pavel@suse.cz>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] swsusup with dm-crypt mini howto
Andreas Steinmetz [Sat, 3 Sep 2005 22:57:03 +0000]
[PATCH] swsusup with dm-crypt mini howto

The attached patch contains a mini howto for using dm-crypt together with
swsusp.

Signed-off-by: Andreas Steinmetz <ast@domdv.de>
Signed-off-by: Pavel Machek <pavel@suse.cz>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] swsusp: simpler calculation of number of pages in PBE list
Michal Schmidt [Sat, 3 Sep 2005 22:57:02 +0000]
[PATCH] swsusp: simpler calculation of number of pages in PBE list

The function calc_nr uses an iterative algorithm to calculate the number of
pages needed for the image and the pagedir.  Exactly the same result can be
obtained with a one-line expression.

Note that this was even proved correct ;-).

Signed-off-by: Michal Schmidt <xschmi00@stud.feec.vutbr.cz>
Signed-off-by: Pavel Machek <pavel@suse.cz>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] swsusp: prevent disks from spinning down and up
Michal Schmidt [Sat, 3 Sep 2005 22:57:01 +0000]
[PATCH] swsusp: prevent disks from spinning down and up

Stop the disks from spinning down and up on suspend.

Signed-off-by: Michal Schmidt <xschmi00@stud.feec.vutbr.cz>
Cc: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] encrypt suspend data for easy wiping
Andreas Steinmetz [Sat, 3 Sep 2005 22:56:59 +0000]
[PATCH] encrypt suspend data for easy wiping

The patch protects from leaking sensitive data after resume from suspend.
During suspend a temporary key is created and this key is used to encrypt the
data written to disk.  When, during resume, the data was read back into memory
the temporary key is destroyed which simply means that all data written to
disk during suspend are then inaccessible so they can't be stolen lateron.

Think of the following: you suspend while an application is running that keeps
sensitive data in memory.  The application itself prevents the data from being
swapped out.  Suspend, however, must write these data to swap to be able to
resume lateron.  Without suspend encryption your sensitive data are then
stored in plaintext on disk.  This means that after resume your sensitive data
are accessible to all applications having direct access to the swap device
which was used for suspend.  If you don't need swap after resume these data
can remain on disk virtually forever.  Thus it can happen that your system
gets broken in weeks later and sensitive data which you thought were encrypted
and protected are retrieved and stolen from the swap device.

Signed-off-by: Andreas Steinmetz <ast@domdv.de>
Acked-by: Pavel Machek <pavel@suse.cz>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] fix pm_message_t stuff in -mm tree
Pavel Machek [Sat, 3 Sep 2005 22:56:58 +0000]
[PATCH] fix pm_message_t stuff in -mm tree

This should bits from -mm tree that are affected by pm_message_t
conversion.  [I'm not 100% sure I got all of them, but I certainly got all
the errors on make allyesconfig build, and most of warnings, too.  I'll go
through the buildlog tommorow and fix any remaining bits].

Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] swsusp: switch pm_message_t to struct
Pavel Machek [Sat, 3 Sep 2005 22:56:57 +0000]
[PATCH] swsusp: switch pm_message_t to struct

This adds type-checking to pm_message_t, so that people can't confuse it
with int or u32.  It also allows us to fix "disk yoyo" during suspend (disk
spinning down/up/down).

[We've tried that before; since that cpufreq problems were fixed and I've
tried make allyes config and fixed resulting damage.]

Signed-off-by: Pavel Machek <pavel@suse.cz>
Signed-off-by: Alexander Nyberg <alexn@telia.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] swsusp: fix remaining u32 vs. pm_message_t confusion
Pavel Machek [Sat, 3 Sep 2005 22:56:56 +0000]
[PATCH] swsusp: fix remaining u32 vs. pm_message_t confusion

Fix remaining bits of u32 vs.  pm_message confusion.  Should not break
anything.

Signed-off-by: Pavel Machek <pavel@suse.cz>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] suspend: update documentation
Pavel Machek [Sat, 3 Sep 2005 22:56:56 +0000]
[PATCH] suspend: update documentation

Update suspend documentation.

Signed-off-by: Pavel Machek <pavel@suse.cz>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] ISA DMA suspend for x86_64
Pierre Ossman [Sat, 3 Sep 2005 22:56:55 +0000]
[PATCH] ISA DMA suspend for x86_64

Reset the ISA DMA controller into a known state after a suspend.  Primary
concern was reenabling the cascading DMA channel (4).

Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
Cc: Andi Kleen <ak@muc.de>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] ISA DMA suspend for i386
Pierre Ossman [Sat, 3 Sep 2005 22:56:54 +0000]
[PATCH] ISA DMA suspend for i386

Reset the ISA DMA controller into a known state after a suspend.  Primary
concern was reenabling the cascading DMA channel (4).

Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] remove busywait in refrigerator
Pavel Machek [Sat, 3 Sep 2005 22:56:53 +0000]
[PATCH] remove busywait in refrigerator

This should make refrigerator sleep properly, not busywait after the first
schedule() returns.

Signed-off-by: Pavel Machek <pavel@suse.cz>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] unify x86/x86-64 semaphore code
Benjamin LaHaise [Sat, 3 Sep 2005 22:56:52 +0000]
[PATCH] unify x86/x86-64 semaphore code

This patch moves the common code in x86 and x86-64's semaphore.c into a
single file in lib/semaphore-sleepers.c.  The arch specific asm stubs are
left in the arch tree (in semaphore.c for i386 and in the asm for x86-64).
There should be no changes in code/functionality with this patch.

Signed-off-by: Benjamin LaHaise <benjamin.c.lahaise@intel.com>
Cc: Andi Kleen <ak@muc.de>
Signed-off-by: Jeff Dike <jdike@addtoit.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] i386 boottime for_each_cpu broken
Zwane Mwaikambo [Sat, 3 Sep 2005 22:56:51 +0000]
[PATCH] i386 boottime for_each_cpu broken

for_each_cpu walks through all processors in cpu_possible_map, which is
defined as cpu_callout_map on i386 and isn't initialised until all
processors have been booted. This breaks things which do for_each_cpu
iterations early during boot. So, define cpu_possible_map as a bitmap with
NR_CPUS bits populated. This was triggered by a patch i'm working on which
does alloc_percpu before bringing up secondary processors.

From: Alexander Nyberg <alexn@telia.com>

i386-boottime-for_each_cpu-broken.patch
i386-boottime-for_each_cpu-broken-fix.patch

The SMP version of __alloc_percpu checks the cpu_possible_map before
allocating memory for a certain cpu.  With the above patches the BSP cpuid
is never set in cpu_possible_map which breaks CONFIG_SMP on uniprocessor
machines (as soon as someone tries to dereference something allocated via
__alloc_percpu, which in fact is never allocated since the cpu is not set
in cpu_possible_map).

Signed-off-by: Zwane Mwaikambo <zwane@arm.linux.org.uk>
Signed-off-by: Alexander Nyberg <alexn@telia.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] i386: encapsulate copying of pgd entries
Zachary Amsden [Sat, 3 Sep 2005 22:56:50 +0000]
[PATCH] i386: encapsulate copying of pgd entries

Add a clone operation for pgd updates.

This helps complete the encapsulation of updates to page tables (or pages
about to become page tables) into accessor functions rather than using
memcpy() to duplicate them.  This is both generally good for consistency
and also necessary for running in a hypervisor which requires explicit
updates to page table entries.

The new function is:

clone_pgd_range(pgd_t *dst, pgd_t *src, int count);

   dst - pointer to pgd range anwhere on a pgd page
   src - ""
   count - the number of pgds to copy.

   dst and src can be on the same page, but the range must not overlap
   and must not cross a page boundary.

Note that I ommitted using this call to copy pgd entries into the
software suspend page root, since this is not technically a live paging
structure, rather it is used on resume from suspend.  CC'ing Pavel in case
he has any feedback on this.

Thanks to Chris Wright for noticing that this could be more optimal in
PAE compiles by eliminating the memset.

Signed-off-by: Zachary Amsden <zach@vmware.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] x86 NMI: better support for debuggers
George Anzinger [Sat, 3 Sep 2005 22:56:48 +0000]
[PATCH] x86 NMI: better support for debuggers

This patch adds a notify to the die_nmi notify that the system is about to
be taken down.  If the notify is handled with a NOTIFY_STOP return, the
system is given a new lease on life.

We also change the nmi watchdog to carry on if die_nmi returns.

This give debug code a chance to a) catch watchdog timeouts and b) possibly
allow the system to continue, realizing that the time out may be due to
debugger activities such as single stepping which is usually done with
"other" cpus held.

Signed-off-by: George Anzinger<george@mvista.com>
Cc: Keith Owens <kaos@ocs.com.au>
Signed-off-by: George Anzinger <george@mvista.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] x86: introduce a write acessor for updating the current LDT
Zachary Amsden [Sat, 3 Sep 2005 22:56:47 +0000]
[PATCH] x86: introduce a write acessor for updating the current LDT

Introduce a write acessor for updating the current LDT.  This is required
for hypervisors like Xen that do not allow LDT pages to be directly
written.

Testing - here's a fun little LDT test that can be trivially modified to
test limits as well.

/*
 * Copyright (c) 2005, Zachary Amsden (zach@vmware.com)
 * This is licensed under the GPL.
 */

#include <stdio.h>
#include <signal.h>
#include <asm/ldt.h>
#include <asm/segment.h>
#include <sys/types.h>
#include <unistd.h>
#include <sys/mman.h>
#define __KERNEL__
#include <asm/page.h>

void main(void)
{
        struct user_desc desc;
        char *code;
        unsigned long long tsc;

        code = (char *)mmap(0, 8192, PROT_EXEC|PROT_READ|PROT_WRITE,
                                 MAP_PRIVATE | MAP_ANONYMOUS, -1, 0);
        desc.entry_number = 0;
        desc.base_addr = code;
        desc.limit = 1;
        desc.seg_32bit = 1;
        desc.contents = MODIFY_LDT_CONTENTS_CODE;
        desc.read_exec_only = 0;
        desc.limit_in_pages = 1;
        desc.seg_not_present = 0;
        desc.useable = 1;
        if (modify_ldt(1, &desc, sizeof(desc)) != 0) {
                perror("modify_ldt");
        }
        printf("code base is 0x%08x\n", (unsigned)code);
        code[0x0ffe] = 0x0f;  /* rdtsc */
        code[0x0fff] = 0x31;
        code[0x1000] = 0xcb;  /* lret */
        __asm__ __volatile("lcall $7,$0xffe" : "=A" (tsc));
        printf("TSC is 0x%016llx\n", tsc);
}

Signed-off-by: Zachary Amsden <zach@vmware.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] x86: remove redundant TSS clearing
Zachary Amsden [Sat, 3 Sep 2005 22:56:45 +0000]
[PATCH] x86: remove redundant TSS clearing

When reviewing GDT updates, I found the code:

set_tss_desc(cpu,t); /* This just modifies memory; ... */
        per_cpu(cpu_gdt_table, cpu)[GDT_ENTRY_TSS].b &= 0xfffffdff;

This second line is unnecessary, since set_tss_desc() has already cleared
the busy bit.

Commented disassembly, line 1:

c028b8bd:       8b 0c 86                mov    (%esi,%eax,4),%ecx
c028b8c0:       01 cb                   add    %ecx,%ebx
c028b8c2:       8d 0c 39                lea    (%ecx,%edi,1),%ecx

  => %ecx = per_cpu(cpu_gdt_table, cpu)

c028b8c5:       8d 91 80 00 00 00       lea    0x80(%ecx),%edx

  => %edx = &per_cpu(cpu_gdt_table, cpu)[GDT_ENTRY_TSS]

c028b8cb:       66 c7 42 00 73 20       movw   $0x2073,0x0(%edx)
c028b8d1:       66 89 5a 02             mov    %bx,0x2(%edx)
c028b8d5:       c1 cb 10                ror    $0x10,%ebx
c028b8d8:       88 5a 04                mov    %bl,0x4(%edx)
c028b8db:       c6 42 05 89             movb   $0x89,0x5(%edx)

  => ((char *)%edx)[5] = 0x89
  (equivalent) ((char *)per_cpu(cpu_gdt_table, cpu)[GDT_ENTRY_TSS])[5] = 0x89

c028b8df:       c6 42 06 00             movb   $0x0,0x6(%edx)
c028b8e3:       88 7a 07                mov    %bh,0x7(%edx)
c028b8e6:       c1 cb 10                ror    $0x10,%ebx

  => other bits

Commented disassembly, line 2:

c028b8e9:       8b 14 86                mov    (%esi,%eax,4),%edx
c028b8ec:       8d 04 3a                lea    (%edx,%edi,1),%eax

  => %eax = per_cpu(cpu_gdt_table, cpu)

c028b8ef:       81 a0 84 00 00 00 ff    andl   $0xfffffdff,0x84(%eax)

  => per_cpu(cpu_gdt_table, cpu)[GDT_ENTRY_TSS].b &= 0xfffffdff;
  (equivalent) ((char *)per_cpu(cpu_gdt_table, cpu)[GDT_ENTRY_TSS])[5] &= 0xfd

Note that (0x89 & ~0xfd) == 0; i.e, set_tss_desc(cpu,t) has already stored
the type field in the GDT with the busy bit clear.

Eliminating redundant and obscure code is always a good thing; in fact, I
pointed out this same optimization many moons ago in arch/i386/setup.c,
back when it used to be called that.

Signed-off-by: Zachary Amsden <zach@vmware.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] x86: make IOPL explicit
Zachary Amsden [Sat, 3 Sep 2005 22:56:44 +0000]
[PATCH] x86: make IOPL explicit

The pushf/popf in switch_to are ONLY used to switch IOPL.  Making this
explicit in C code is more clear.  This pushf/popf pair was added as a
bugfix for leaking IOPL to unprivileged processes when using
sysenter/sysexit based system calls (sysexit does not restore flags).

When requesting an IOPL change in sys_iopl(), it is just as easy to change
the current flags and the flags in the stack image (in case an IRET is
required), but there is no reason to force an IRET if we came in from the
SYSENTER path.

This change is the minimal solution for supporting a paravirtualized Linux
kernel that allows user processes to run with I/O privilege.  Other
solutions require radical rewrites of part of the low level fault / system
call handling code, or do not fully support sysenter based system calls.

Unfortunately, this added one field to the thread_struct.  But as a bonus,
on P4, the fastest time measured for switch_to() went from 312 to 260
cycles, a win of about 17% in the fast case through this performance
critical path.

Signed-off-by: Zachary Amsden <zach@vmware.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] x86: privilege cleanup
Zachary Amsden [Sat, 3 Sep 2005 22:56:43 +0000]
[PATCH] x86: privilege cleanup

Privilege checking cleanup.  Originally, these diffs were much greater, but
recent cleanups in Linux have already done much of the cleanup.  I added
some explanatory comments in places where the reasoning behind certain
tests is rather subtle.

Also, in traps.c, we can skip the user_mode check in handle_BUG().  The
reason is, there are only two call chains - one via die_if_kernel() and one
via do_page_fault(), both entering from die().  Both of these paths already
ensure that a kernel mode failure has happened.  Also, the original check
here, if (user_mode(regs)) was insufficient anyways, since it would not
rule out BUG faults from V8086 mode execution.

Saving the %ss segment in show_regs() rather than assuming a fixed value
also gives better information about the current kernel state in the
register dump.

Signed-off-by: Zachary Amsden <zach@vmware.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] x86: more asm cleanups
Zachary Amsden [Sat, 3 Sep 2005 22:56:42 +0000]
[PATCH] x86: more asm cleanups

Some more assembler cleanups I noticed along the way.

Signed-off-by: Zachary Amsden <zach@vmware.com>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] i386: fix incorrect TSS entry for LDT
Ingo Molnar [Sat, 3 Sep 2005 22:56:41 +0000]
[PATCH] i386: fix incorrect TSS entry for LDT

Noticed by Chuck Ebbert: the .ldt entry of the TSS was set up incorrectly.
It never mattered since this was a leftover from old times, so remove it.

Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] i386: use set_pte macros in a couple places where they were missing
Zachary Amsden [Sat, 3 Sep 2005 22:56:40 +0000]
[PATCH] i386: use set_pte macros in a couple places where they were missing

Also, setting PDPEs in PAE mode does not require atomic operations, since the
PDPEs are cached by the processor, and only reloaded on an explicit or
implicit reload of CR3.

Since the four PDPEs must always be present in an active root, and the kernel
PDPE is never updated, we are safe even from SMIs and interrupts / NMIs using
task gates (which reload CR3).  Actually, much of this is moot, since the user
PDPEs are never updated either, and the only usage of task gates is by the
doublefault handler.  It appears the only place PGDs get updated in PAE mode
is in init_low_mappings() / zap_low_mapping() for initial page table creation
and recovery from ACPI sleep state, and these sites are safe by inspection.
Getting rid of the cmpxchg8b saves code space and 720 cycles in pgd_alloc on
P4.

Signed-off-by: Zachary Amsden <zach@vmware.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] i386: load_tls() fix
Zachary Amsden [Sat, 3 Sep 2005 22:56:39 +0000]
[PATCH] i386: load_tls() fix

Subtle fix: load_TLS has been moved after saving %fs and %gs segments to avoid
creating non-reversible segments.  This could conceivably cause a bug if the
kernel ever needed to save and restore fs/gs from the NMI handler.  It
currently does not, but this is the safest approach to avoiding fs/gs
corruption.  SMIs are safe, since SMI saves the descriptor hidden state.

Signed-off-by: Zachary Amsden <zach@vmware.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] i386: generate better code around descriptor update and access functions
Zachary Amsden [Sat, 3 Sep 2005 22:56:38 +0000]
[PATCH] i386: generate better code around descriptor update and access functions

GCC can generate better code around descriptor update and access functions
when there is not an explicit "eax" register constraint.

Testing: You won't boot if this is messed up, since the TSS descriptor will be
corrupted.  Verified the assembler and booted.

Signed-off-by: Zachary Amsden <zach@vmware.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] i386: inline assembler: cleanup and encapsulate descriptor and task register...
Zachary Amsden [Sat, 3 Sep 2005 22:56:38 +0000]
[PATCH] i386: inline assembler: cleanup and encapsulate descriptor and task register management

i386 inline assembler cleanup.

This change encapsulates descriptor and task register management.  Also,
it is possible to improve assembler generation in two cases; savesegment
may store the value in a register instead of a memory location, which
allows GCC to optimize stack variables into registers, and MOV MEM, SEG
is always a 16-bit write to memory, making the casting in math-emu
unnecessary.

Signed-off-by: Zachary Amsden <zach@vmware.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] i386: cleanup serialize msr
Zachary Amsden [Sat, 3 Sep 2005 22:56:37 +0000]
[PATCH] i386: cleanup serialize msr

i386 arch cleanup.  Introduce the serialize macro to serialize processor
state.  Why the microcode update needs it I am not quite sure, since wrmsr()
is already a serializing instruction, but it is a microcode update, so I will
keep the semantic the same, since this could be a timing workaround.  As far
as I can tell, this has always been there since the original microcode update
source.

Signed-off-by: Zachary Amsden <zach@vmware.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] i386: inline asm cleanup
Zachary Amsden [Sat, 3 Sep 2005 22:56:36 +0000]
[PATCH] i386: inline asm cleanup

i386 Inline asm cleanup.  Use cr/dr accessor functions.

Also, a potential bugfix.  Also, some CR accessors really should be volatile.
Reads from CR0 (numeric state may change in an exception handler), writes to
CR4 (flipping CR4.TSD) and reads from CR2 (page fault) prevent instruction
re-ordering.  I did not add memory clobber to CR3 / CR4 / CR0 updates, as it
was not there to begin with, and in no case should kernel memory be clobbered,
except when doing a TLB flush, which already has memory clobber.

I noticed that page invalidation does not have a memory clobber.  I can't find
a bug as a result, but there is definitely a potential for a bug here:

#define __flush_tlb_single(addr) \
__asm__ __volatile__("invlpg %0": :"m" (*(char *) addr))

Signed-off-by: Zachary Amsden <zach@vmware.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] i386: clean up vDSO alignment padding
Roland McGrath [Sat, 3 Sep 2005 22:56:35 +0000]
[PATCH] i386: clean up vDSO alignment padding

This makes the vDSO use nops for all its padding around instructions,
rather than sometimes zeros, and nop-pads the end of the area containing
instructions to a 32-byte cache line, to keep text and data in separate
lines.

Signed-off-by: Roland McGrath <roland@redhat.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] ES7000 platform update (i386)
Natalie.Protasevich@unisys.com [Sat, 3 Sep 2005 22:56:34 +0000]
[PATCH] ES7000 platform update (i386)

This is subarch update for ES7000.  I've modified platform check code and
removed unnecessary OEM table parsing for newer systems that don't use OEM
information during boot.  Parsing the table in fact is causing problems,
and the platform doesn't get recognized.  The patch only affects the ES7000
subach.

Signed-off-by: <Natalie.Protasevich@unisys.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] via vt8237 apic bypass deassertion quirk
Karsten Wiese [Sat, 3 Sep 2005 22:56:33 +0000]
[PATCH] via vt8237 apic bypass deassertion quirk

The VIA VT8237's IOAPIC sends 'APIC De-Assert Messages' by default, causing
another CPU interrupt when the IRQ pin is de-asserted.  This feature is
switched off by the patch to get rid of doubled ioapic level interrupt
rates.

Signed-off-by: Karsten Wiese <annabellesgarden@yahoo.de>
Tested-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] x86: Add the check for all the cores in a package in cache information
Venkatesh Pallipadi [Sat, 3 Sep 2005 22:56:32 +0000]
[PATCH] x86: Add the check for all the cores in a package in cache information

Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] x86: sutomatically enable bigsmp when we have more than 8 CPUs
Venkatesh Pallipadi [Sat, 3 Sep 2005 22:56:31 +0000]
[PATCH] x86: sutomatically enable bigsmp when we have more than 8 CPUs

i386 generic subarchitecture requires explicit dmi strings or command line
to enable bigsmp mode.  The patch below removes that restriction, and uses
bigsmp as soon as it finds more than 8 logical CPUs, Intel processors and
xAPIC support.

Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] kdump: Save parameter segment in protected mode (x86)
Vivek Goyal [Sat, 3 Sep 2005 22:56:31 +0000]
[PATCH] kdump: Save parameter segment in protected mode (x86)

o With introduction of kexec as boot-loader, the assumption that parameter
  segment will always be loaded at lower address than kernel and will be
  addressable by early bootup page tables is no longer valid. In kexec on
  panic case parameter segment might well be loaded beyond kernel image and
  might not be addressable by early boot page tables.
o This case might hit in the scenario where user has reserved a chunk of
  memory for second kernel, for example 16MB to 64MB, and has also built
  second kernel for physical memory location 16MB. In this case kexec has no
  choice but to load the parameter segment at a higher address than new kernel
  image at safe location where new kernel does not stomp it.
o Though problem should automatically go away once relocatable kernel for i386
  is in place and kexec can determine the location of new kernel at run time
  and load parameter segment at lower address than kernel image. But till then
  this patch can go in (assuming it does not break something else).
o This patch moves up the boot parameter saving code. Now boot parameters
  are copied out in protected mode before page tables are initialized. This
  will ensure that parameter segment is always addressable irrespective of
  its physical location.

Signed-off-by: Vivek Goyal <vgoyal@in.ibm.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] vm86: Honor TF bit when emulating an instruction
Petr Tesarik [Sat, 3 Sep 2005 22:56:28 +0000]
[PATCH] vm86: Honor TF bit when emulating an instruction

If the virtual 86 machine reaches an instruction which raises a General
Protection Fault (such as CLI or STI), the instruction is emulated (in
handle_vm86_fault).  However, the emulation ignored the TF bit, so the
hardware debug interrupt was not invoked after such an emulated instruction
(and the DOS debugger missed it).

This patch fixes the problem by emulating the hardware debug interrupt as
the last action before control is returned to the VM86 program.

Signed-off-by: Petr Tesarik <kernel@tesarici.cz>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] x86: fix EFI memory map parsing
Matt Tolentino [Sat, 3 Sep 2005 22:56:27 +0000]
[PATCH] x86: fix EFI memory map parsing

The memory descriptors that comprise the EFI memory map are not fixed in
stone such that the size could change in the future.  This uses the memory
descriptor size obtained from EFI to iterate over the memory map entries
during boot.  This enables the removal of an x86 specific pad (and ifdef)
in the EFI header.  I also couldn't stomach the broken up nature of the
function to put EFI runtime calls into virtual mode any longer so I fixed
that up a bit as well.

For reference, this patch only impacts x86.

Signed-off-by: Matt Tolentino <matthew.e.tolentino@intel.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] hpet: use read_timer_tsc only when CPU has TSC
Venkatesh Pallipadi [Sat, 3 Sep 2005 22:56:27 +0000]
[PATCH] hpet: use read_timer_tsc only when CPU has TSC

Only use read_timer_tsc only when CPU has TSC.  Thanks to Andrea for
pointing this out.  Should not be issue on any platforms as all recent
systems that has HPET also has CPUs that supports TSC.  The patch is still
required for correctness.

Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] x86: compress the stack layout of do_page_fault()
Ingo Molnar [Sat, 3 Sep 2005 22:56:26 +0000]
[PATCH] x86: compress the stack layout of do_page_fault()

This patch pushes the creation of a rare signal frame (SIGBUS or SIGSEGV)
into a separate function, thus saving stackspace in the main
do_page_fault() stackframe.  The effect is 132 bytes less of stack used by
the typical do_page_fault() invocation - resulting in a denser
cache-layout.

(Another minor effect is that in case of kernel crashes that come from a
pagefault, we add less space to the already existing frame, giving the
crash functions a slightly higher chance to do their stuff without
overflowing the stack.)

(The changes also result in slightly cleaner code.)

argument bugfix from "Guillaume C." <guichaz@gmail.com>

Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] arch/sh64/Kconfig: doesn't need it's own LOG_BUF_SHIFT
Adrian Bunk [Sat, 3 Sep 2005 22:56:24 +0000]
[PATCH] arch/sh64/Kconfig: doesn't need it's own LOG_BUF_SHIFT

The LOG_BUF_SHIFT from lib/Kconfig.debug is sufficient.

Signed-off-by: Adrian Bunk <bunk@stusta.de>
Acked-by: Paul Mundt <lethal@Linux-SH.ORG>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] mips: kludge envdev to build for 64-bit MIPS with 32-bit compat
Ralf Baechle [Sat, 3 Sep 2005 22:56:23 +0000]
[PATCH] mips: kludge envdev to build for 64-bit MIPS with 32-bit compat

Extend the compat mode kludgeology in envdev to cover MIPS as well.

Or why we should need something like is_compat_task() ...

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Cc: Vojtech Pavlik <vojtech@suse.cz>
Signed-off-by: Dmitry Torokhov <dtor_core@ameritech.net>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] mips: remove timex.h for vr41xx
Yoichi Yuasa [Sat, 3 Sep 2005 22:56:23 +0000]
[PATCH] mips: remove timex.h for vr41xx

vr41xx doesn't need mach-vr41xx/timex.h.  This patch has removed
mach-vr41xx/timex.h.

Signed-off-by: Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
Cc: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] mips: fix build warnings
Yoichi Yuasa [Sat, 3 Sep 2005 22:56:22 +0000]
[PATCH] mips: fix build warnings

This patch has fixed the following warnings.

arch/mips/kernel/genex.S:250:5: warning: "CONFIG_64BIT" is not defined
arch/mips/math-emu/cp1emu.c:1128:5: warning: "__mips64" is not defined
arch/mips/math-emu/cp1emu.c:1206:5: warning: "__mips64" is not defined
arch/mips/math-emu/cp1emu.c:1270:5: warning: "__mips64" is not defined
arch/mips/math-emu/cp1emu.c:323:5: warning: "__mips64" is not defined
arch/mips/math-emu/cp1emu.c:808:5: warning: "__mips64" is not defined
arch/mips/math-emu/cp1emu.c:953:5: warning: "__mips64" is not defined
arch/mips/mm/tlbex.c:519:5: warning: "CONFIG_64BIT" is not defined
include/asm/reg.h:73:5: warning: "CONFIG_64BIT" is not defined

Signed-off-by: Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
Cc: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] mips: add more SYS_SUPPORT_*_KERNEL and CPU_SUPPORTS_*_KERNEL
Yoichi Yuasa [Sat, 3 Sep 2005 22:56:21 +0000]
[PATCH] mips: add more SYS_SUPPORT_*_KERNEL and CPU_SUPPORTS_*_KERNEL

The addtion of SYS_SUPPORTS_*_KERNEL and CPU_SUPPORTS_*_KERNEL is halfway.
This patch has added more SYS_SUPPORTS_*_KERNEL and CPU_SUPPORTS_*_KERNEL
to arch/mips/Kconfig.  Please apply.

Signed-off-by: Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
Cc: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] mips: add pcibios_bus_to_resource
Yoichi Yuasa [Sat, 3 Sep 2005 22:56:20 +0000]
[PATCH] mips: add pcibios_bus_to_resource

This patch has added pcibios_bus_to_resource to MIPS.

Signed-off-by: Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
Cc: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] mips: add pcibios_select_root
Yoichi Yuasa [Sat, 3 Sep 2005 22:56:19 +0000]
[PATCH] mips: add pcibios_select_root

Add pcibios_select_root to MIPS.

Signed-off-by: Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
Cc: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] mips: fix coherency configuration
Ralf Baechle [Sat, 3 Sep 2005 22:56:19 +0000]
[PATCH] mips: fix coherency configuration

Fix the MIPS coherency configuration such that we always keep the mapping
state in <asm/pci.h> when we need to on non-coherent platforms.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] mips: nuke trailing whitespace
Ralf Baechle [Sat, 3 Sep 2005 22:56:17 +0000]
[PATCH] mips: nuke trailing whitespace

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] mips: clean up 32/64-bit configuration
Ralf Baechle [Sat, 3 Sep 2005 22:56:16 +0000]
[PATCH] mips: clean up 32/64-bit configuration

Start cleaning 32-bit vs. 64-bit configuration.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] mips: changed from VR41xx to VR4100 series in Kconfig
Yoichi Yuasa [Sat, 3 Sep 2005 22:56:16 +0000]
[PATCH] mips: changed from VR41xx to VR4100 series in Kconfig

This patch has changed from VR41XX to VR4100 series in arch/mips/Kconfig.

Signed-off-by: Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
Cc: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] mips: remove vrc4171 config
Yoichi Yuasa [Sat, 3 Sep 2005 22:56:15 +0000]
[PATCH] mips: remove vrc4171 config

This patch has removed obsolete VRC4171 config.

Cc: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] fix warning of TANBAC_TB0219 in drivers/char/Kconfig
Yoichi Yuasa [Sat, 3 Sep 2005 22:56:14 +0000]
[PATCH] fix warning of TANBAC_TB0219 in drivers/char/Kconfig

$ make menuconfig
scripts/kconfig/mconf arch/i386/Kconfig
drivers/char/Kconfig:847:warning: 'select' used by config symbol
'TANBAC_TB0219' refer to undefined symbol 'PCI_VR41XX'

Here is a patch for this warning fix.

Signed-off-by: Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] mips: add default select configs for vr41xx
Yoichi Yuasa [Sat, 3 Sep 2005 22:56:14 +0000]
[PATCH] mips: add default select configs for vr41xx

This patch has added default select configs for vr41xx.

Signed-off-by: Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
Cc: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] mips: add TANBAC VR4131 multichip module
Yoichi Yuasa [Sat, 3 Sep 2005 22:56:13 +0000]
[PATCH] mips: add TANBAC VR4131 multichip module

This patch has added TANBAC VR4131 multichip module in arch/mips/Kconfig

Signed-off-by: Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
Cc: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] MIPS Technologies PCI ID bits
Ralf Baechle [Sat, 3 Sep 2005 22:56:12 +0000]
[PATCH] MIPS Technologies PCI ID bits

- MIPS Denmark does no longer exist; the PCI vendor ID is now owned by
  MIPS Technologies.

- Add ID for SOC-it, MIPS's system controller.

Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] mips: add support for Qemu system architecture
Ralf Baechle [Sat, 3 Sep 2005 22:56:11 +0000]
[PATCH] mips: add support for Qemu system architecture

Add support for the virtual MIPS system that is emulated by Qemu.  See
http://www.linux-mips.org/wiki/Qemu for a detailed current status.

Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] DEC PMAGB B framebuffer update
Ralf Baechle [Sat, 3 Sep 2005 22:56:11 +0000]
[PATCH] DEC PMAGB B framebuffer update

Revive HX frame buffer support for 2.6.

Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] DEC PMAG BA frame buffer update
Ralf Baechle [Sat, 3 Sep 2005 22:56:09 +0000]
[PATCH] DEC PMAG BA frame buffer update

Rewrite PMAG BA frame buffer driver for 2.6.

Acked-by: Antonino Daplas <adaplas@pol.net>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] DEC PMAG AA framebuffer update
Ralf Baechle [Sat, 3 Sep 2005 22:56:09 +0000]
[PATCH] DEC PMAG AA framebuffer update

Get it working again.

Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] mips: remove HP Laserjet remains
Ralf Baechle [Sat, 3 Sep 2005 22:56:08 +0000]
[PATCH] mips: remove HP Laserjet remains

Remove the one file which managed to survive the removel of HP Laserjet
support.

Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] more vr4181 removal
Adrian Bunk [Sat, 3 Sep 2005 22:56:07 +0000]
[PATCH] more vr4181 removal

Signed-off-by: Adrian Bunk <bunk@stusta.de>
Cc: Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] mips: moreover remove vr4181
Yoichi Yuasa [Sat, 3 Sep 2005 22:56:07 +0000]
[PATCH] mips: moreover remove vr4181

We also need this patch for removing mips vr4181.

Signed-off-by: Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] mips: remove VR4181 support
Ralf Baechle [Sat, 3 Sep 2005 22:56:06 +0000]
[PATCH] mips: remove VR4181 support

There seem to be no more users or interest in the NEC Osprey evaluation
system for the NEC VR4181 SOC which is an old part anyway, so remove the
code.  More information on the Osprey can be found at
http://www.linux-mips.org/wiki/Osprey.

Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] mips: change system type name in proc for vr41xx
Yoichi Yuasa [Sat, 3 Sep 2005 22:56:05 +0000]
[PATCH] mips: change system type name in proc for vr41xx

This patch has changed system type name in proc for vr41xx.

Signed-off-by: Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
Cc: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] mips: update IRQ handling for vr41xx
Yoichi Yuasa [Sat, 3 Sep 2005 22:56:04 +0000]
[PATCH] mips: update IRQ handling for vr41xx

This patch has updated IRQ handling for vr41xx.
o added common IRQ dispatch
o changed IRQ number in int-handler.S
o added resource management to icu.c

Signed-off-by: Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
Cc: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] mips: remove obsolete GIU function call for vr41xx
Yoichi Yuasa [Sat, 3 Sep 2005 22:56:03 +0000]
[PATCH] mips: remove obsolete GIU function call for vr41xx

This patch has removed obsolete GIU function call for vr41xx.

Signed-off-by: Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
Cc: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] frv: Remove export of strtok()
Jesper Juhl [Sat, 3 Sep 2005 22:56:02 +0000]
[PATCH] frv: Remove export of strtok()

Signed-off-by: Jesper Juhl <jesper.juhl@gmail.com>
Acked-by: David Howells <dhowells@redhat.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] ppc64: replace schedule_timeout() with msleep_interruptible()
Nishanth Aravamudan [Sat, 3 Sep 2005 22:56:01 +0000]
[PATCH] ppc64: replace schedule_timeout() with msleep_interruptible()

Use msleep_interruptible() instead of schedule_timeout() in ppc64-specific
code to cleanup/simplify the sleeping logic.  Change the units of the
parameter of do_event_scan_all_cpus() to milliseconds from jiffies.  The
return value of rtas_extended_busy_delay_time() was incorrectly being used
as a jiffies value (it is actually milliseconds), which is fixed by using
the value as a parameter to msleep_interruptible().  Also, use
rtas_extended_busy_delay_time() in another case where similar logic is
duplicated.

Signed-off-by: Nishanth Aravamudan <nacc@us.ibm.com>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] ppc64: Add VMX save flag to VPA
Olof Johansson [Sat, 3 Sep 2005 22:55:59 +0000]
[PATCH] ppc64: Add VMX save flag to VPA

We need to indicate to the hypervisor that it needs to save our VMX
registers when switching partitions on a shared-processor system, just as
it needs to for FP and PMC registers.

This could be made to be on-demand when VMX is used, but we don't do that
for FP nor PMC right now either so let's not overcomplicate things.

Signed-off-by: Olof Johansson <olof@lixom.net>
Acked-by: Paul Mackerras <paulus@samba.org>
Cc: Anton Blanchard <anton@samba.org>
Cc: <engebret@us.ibm.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] ppc64: update xmon helptext
Olaf Hering [Sat, 3 Sep 2005 22:55:58 +0000]
[PATCH] ppc64: update xmon helptext

xmon will do nothing but noise on a G5 if BOOTX_TEXT is not enabled.
mention the recognized kernel cmdline options for xmon.

Signed-off-by: Olaf Hering <olh@suse.de>
Cc: Paul Mackeras <paulus@samba.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] ppc32: cpci690 updates
Mark A. Greer [Sat, 3 Sep 2005 22:55:57 +0000]
[PATCH] ppc32: cpci690 updates

Update the cpci690 platform code:
- pass mem size in from bootwrapper via bi_rec
- some minor fixups

Signed-off-by: Mark A. Greer <mgreer@mvista.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] ppc32: katana updates
Mark A. Greer [Sat, 3 Sep 2005 22:55:57 +0000]
[PATCH] ppc32: katana updates

Update the katana platform support code:
- if booted as zImage, pass mem size in via bi_req from bootwrapper
- if booted as uImage, get mem size from bd_info passed in from u-boot
- add support for 82544 present on katana 752i's
- set cacheline size on pci devices
- some minor fixups

Signed-off-by: Mark A. Greer <mgreer@mvista.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] ppc32: mv64x60 updates & enhancements
Mark A. Greer [Sat, 3 Sep 2005 22:55:56 +0000]
[PATCH] ppc32: mv64x60 updates & enhancements

Updates and enhancement to the ppc32 mv64x60 code:
- move code to get mem size from mem ctlr to bootwrapper
- address some errata in the mv64360 pic code
- some minor cleanups
- export one of the bridge's regs via sysfs so user daemon can watch for
  extraction events

Signed-off-by: Mark A. Greer <mgreer@mvista.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] ppc32: Added cputable entry for 7448
Kumar Gala [Sat, 3 Sep 2005 22:55:55 +0000]
[PATCH] ppc32: Added cputable entry for 7448

Added cputable entry for 7448 as well adding it to checks for saving and
restoring of cpu state.

Signed-off-by: Kumar Gala <kumar.gala@freescale.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] ppc32: export cacheable_memcpy()
Eugene Surovegin [Sat, 3 Sep 2005 22:55:54 +0000]
[PATCH] ppc32: export cacheable_memcpy()

Add declaration and cacheable_memcpy().  I'll be needing this function in
new 4xx EMAC driver I'm going to submit to netdev soon.

IMHO, the better place for the declaration would be asm-powerpc/string.h,
unfortunately, ppc64 doesn't have this function, so asm-ppc/system.h is the
next best place.

Signed-off-by: Eugene Surovegin <ebs@ebshome.net>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] ppc32: add dcr_base field to ocp_func_mal_data
Eugene Surovegin [Sat, 3 Sep 2005 22:55:53 +0000]
[PATCH] ppc32: add dcr_base field to ocp_func_mal_data

Add dcr_base field to ocp_func_mal_data.  This is preparation step for the
new EMAC driver.

Signed-off-by: Eugene Surovegin <ebs@ebshome.net>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] ppc32: move 4xx PHY_MODE_XXX defines to ibm_ocp.h
Eugene Surovegin [Sat, 3 Sep 2005 22:55:53 +0000]
[PATCH] ppc32: move 4xx PHY_MODE_XXX defines to ibm_ocp.h

Move 4xx PHY_MODE_XXX defines to asm-ppc/ibm_ocp.h.  This is a preparation
step for the new EMAC driver.

Signed-off-by: Eugene Surovegin <ebs@ebshome.net>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] ppc32: Add cputable entry for 750CXe DD2.4 ("Gekko")
Arthur Othieno [Sat, 3 Sep 2005 22:55:52 +0000]
[PATCH] ppc32: Add cputable entry for 750CXe DD2.4 ("Gekko")

Add a table entry for 750CXe DD2.4 ("Gekko") as found in the GameCube from
Nintendo:

  http://www-306.ibm.com/chips/techlib/techlib.nsf/techdocs/291C8D0EF3EAEC1687256B72005C745C#C1

Signed-off-by: Arthur Othieno <a.othieno@bluewin.ch>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] ppc32: Re-order cputable for 750CXe DD2.4 entry
Arthur Othieno [Sat, 3 Sep 2005 22:55:51 +0000]
[PATCH] ppc32: Re-order cputable for 750CXe DD2.4 entry

"745/755" (pvr_value:0x00083000) is a catch-all entry.
Since arch/ppc/kernel/misc.S:identify_cpu() returns on first match,
move this lower in the table so 750CXe DD2.4 (pvr_value:0x00083214)
may be correctly enumerated.

Signed-off-by: Arthur Othieno <a.othieno@bluewin.ch>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] ppc32: Added PCI support MPC83xx
Kumar Gala [Sat, 3 Sep 2005 22:55:50 +0000]
[PATCH] ppc32: Added PCI support MPC83xx

Adds support for the two PCI busses on MPC83xx and the MPC834x SYS/PIBS
reference board.

The code initializes PCI inbound/outbound windows, allocates and registers
PCI memory/io space.  Be aware that setup of the PCI buses on the PIBs
board is expected to be done by the firmware.

Signed-off-by: Tony Li <tony.li@freescale.com>
Signed-off-by: Kumar Gala <kumar.gala@freescale.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] ppc32: defconfig for Marvell EV64360BP board
Lee Nicks [Sat, 3 Sep 2005 22:55:49 +0000]
[PATCH] ppc32: defconfig for Marvell EV64360BP board

Here is the default configuration for Marvell EV64360BP board.  It has been
tested on the board.

Signed-off-by: Lee Nicks <allinux@gmail.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] ppc32: add support for Marvell EV64360BP board
Lee Nicks [Sat, 3 Sep 2005 22:55:48 +0000]
[PATCH] ppc32: add support for Marvell EV64360BP board

This patch adds support for Marvell EV64360BP board.  So far, it supports
mpsc serial console, gigabit ethernet, jffs2 root filesystem, etc.  Other
device support, like watchdog, RTC, will be added later.

Signed-off-by: Lee Nicks <allinux@gmail.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] ppc32: add CONFIG_HZ
Kumar Gala [Sat, 3 Sep 2005 22:55:47 +0000]
[PATCH] ppc32: add CONFIG_HZ

While ppc32 has the CONFIG_HZ Kconfig option, it wasnt actually being used.
Connect it up and set all platforms to 250Hz.  This pretty much mimics the
ppc64 patch from Anton Blanchard.

Signed-off-by: Kumar Gala <kumar.gala@freescale.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] ppc32: ppc_sys system on chip identification additions
Kumar Gala [Sat, 3 Sep 2005 22:55:46 +0000]
[PATCH] ppc32: ppc_sys system on chip identification additions

Add the ability to identify an SOC by a name and id.  There are cases in
which the integer identifier is not sufficient to specify a specific SOC.
In these cases we can use a string to further qualify the match.

Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com>
Signed-off-by: Kumar Gala <kumar.gala@freescale.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] ppc32: disable IBM405_ERR77 and IBM405_ERR51 workarounds for 405EP
Eugene Surovegin [Sat, 3 Sep 2005 22:55:45 +0000]
[PATCH] ppc32: disable IBM405_ERR77 and IBM405_ERR51 workarounds for 405EP

Disable IBM405_ERR77 and IBM405_ERR51 errata workarounds for 405EP.  This
chip has these problems fixed.

Signed-off-by: Eugene Surovegin <ebs@ebshome.net>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] ppc32: fix Bamboo and Luan build warnings
Eugene Surovegin [Sat, 3 Sep 2005 22:55:45 +0000]
[PATCH] ppc32: fix Bamboo and Luan build warnings

Fix STD_UART_OP definitions in Bamboo and Luan board ports which were
causing "initialization makes pointer from integer without a cast"
warnings.

Signed-off-by: Eugene Surovegin <ebs@ebshome.net>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] ppc32: fix EMAC Tx channel assignments for NPe405H
Eugene Surovegin [Sat, 3 Sep 2005 22:55:44 +0000]
[PATCH] ppc32: fix EMAC Tx channel assignments for NPe405H

Fix PowerPC NPe405H EMAC Tx channel assignments.  EMAC unit in this chip
uses common for 4xx "two Tx / one Rx" configuration.

Signed-off-by: Eugene Surovegin <ebs@ebshome.net>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] ppc32: Don't sleep in flush_dcache_icache_page()
Roland Dreier [Sat, 3 Sep 2005 22:55:43 +0000]
[PATCH] ppc32: Don't sleep in flush_dcache_icache_page()

flush_dcache_icache_page() will be called on an instruction page fault.  We
can't sleep in the fault handler, so use kmap_atomic() instead of just
kmap() for the Book-E case.

Signed-off-by: Roland Dreier <rolandd@cisco.com>
Acked-by: Matt Porter <mporter@kernel.crashing.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] ppc32: add cputable entry for 440SP Rev. A
Matt Porter [Sat, 3 Sep 2005 22:55:42 +0000]
[PATCH] ppc32: add cputable entry for 440SP Rev. A

Adds the appropriate cputable entry for PPC440SP so cache line sizes are
configured correctly.

Signed-off-by: Matt Porter <mporter@kernel.crashing.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] ppc32: removed find_name.c
Kumar Gala [Sat, 3 Sep 2005 22:55:41 +0000]
[PATCH] ppc32: removed find_name.c

No one uses find_name.c and no one seems to care about either.  So I'm
removing it.

Signed-off-by: Kumar Gala <kumar.gala@freescale.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] ppc32: add 440GX rev.F cputable entry
Eugene Surovegin [Sat, 3 Sep 2005 22:55:40 +0000]
[PATCH] ppc32: add 440GX rev.F cputable entry

Add PowerPC 440GX rev.F cputable entry.

Signed-off-by: Eugene Surovegin <ebs@ebshome.net>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Matt Porter <mporter@kernel.crashing.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] ppc32: Cleaned up global namespace of Book-E watchdog variables
Kumar Gala [Sat, 3 Sep 2005 22:55:39 +0000]
[PATCH] ppc32: Cleaned up global namespace of Book-E watchdog variables

Renamed global variables used to convey if the watchdog is enabled and
periodicity of the timer and moved the declarations into a header for these
variables

Signed-off-by: Matt McClintock <msm@freescale.com>
Signed-off-by: Kumar Gala <kumar.gala@freescale.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] cpm_uart: Fix baseaddress for SMC 1 and 2
Kumar Gala [Sat, 3 Sep 2005 22:55:38 +0000]
[PATCH] cpm_uart: Fix baseaddress for SMC 1 and 2

Base addess register for SMC 1 and 2 are never initialized.  This means
that they will not work unless a bootloader already configured them.

The DPRAM already have space reserved, this patch just makes sure the base
addess register is updated correctly on initialization.

Signed-off-by: Rune Torgersen <runet@innovsys.com>
Signed-off-by: Kumar Gala <kumar.gala@freescale.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] cpm_uart: use schedule_timeout instead of direct call to schedule
Kumar Gala [Sat, 3 Sep 2005 22:55:37 +0000]
[PATCH] cpm_uart: use schedule_timeout instead of direct call to schedule

use schedule_timeout instead of direct call to schedule

Signed-off-by: Marcelo Tosatti <marcelo.tosatti@cyclades.com>
Signed-off-by: Kumar Gala <kumar.gala@freescale.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] cpm_uart: Fix 2nd serial port on MPC8560 ADS
Kumar Gala [Sat, 3 Sep 2005 22:55:36 +0000]
[PATCH] cpm_uart: Fix 2nd serial port on MPC8560 ADS

The 2nd serial port on the MPC8560 ADS was not being configured correctly
and thus could not be used as a console.  Updated the defconfig for the
board to configure the proper SCC channel for the 2nd serial port.

Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Kumar Gala <kumar.gala@freescale.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] ppc32: add phy excluded features to ocp_func_emac_data
Matt Porter [Sat, 3 Sep 2005 22:55:35 +0000]
[PATCH] ppc32: add phy excluded features to ocp_func_emac_data

This patch adds a field to struct ocp_func_emac_data that allows
platform-specific unsupported PHY features to be passed in to the ibm_emac
ethernet driver.

This patch also adds some logic for the Bamboo eval board to populate this
field based on the dip switches on the board.  This is a workaround for the
improperly biased RJ-45 sockets on the Rev.  0 Bamboo.

Signed-off-by: Wade Farnsworth <wfarnsworth@mvista.com>
Signed-off-by: Matt Porter <mporter@kernel.crashing.org>
Cc: Jeff Garzik <jgarzik@pobox.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] ppc32: Add ppc_sys descriptions for PowerQUICC II devices
Kumar Gala [Sat, 3 Sep 2005 22:55:34 +0000]
[PATCH] ppc32: Add ppc_sys descriptions for PowerQUICC II devices

Added ppc_sys device and system definitions for PowerQUICC II devices.
This will allow drivers for PQ2 to be proper platform device drivers.
Which can be shared on PQ3 processors with the same peripherals.

Signed-off-by: Matt McClintock <msm@freescale.com>
Signed-off-by: Kumar Gala <kumar.gala@freescale.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] ppc32: Added support for the Book-E style Watchdog Timer
Kumar Gala [Sat, 3 Sep 2005 22:55:33 +0000]
[PATCH] ppc32: Added support for the Book-E style Watchdog Timer

PowerPC 40x and Book-E processors support a watchdog timer at the processor
core level.  The timer has implementation dependent timeout frequencies
that can be configured by software.

One the first Watchdog timeout we get a critical exception.  It is left to
board specific code to determine what should happen at this point.  If
nothing is done and another timeout period expires the processor may
attempt to reset the machine.

Command line parameters:
  wdt=0 : disable watchdog (default)
  wdt=1 : enable watchdog

  wdt_period=N : N sets the value of the Watchdog Timer Period.

  The Watchdog Timer Period meaning is implementation specific. Check
  User Manual for the processor for more details.

This patch is based off of work done by Takeharu Kato.

Signed-off-by: Matt McClintock <msm@freescale.com>
Signed-off-by: Kumar Gala <kumar.gala@freescale.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

14 years ago[PATCH] ppc32: Add usb support to IBM stb04xxx platforms
Matt Porter [Sat, 3 Sep 2005 22:55:32 +0000]
[PATCH] ppc32: Add usb support to IBM stb04xxx platforms

Support ochi-ppc-soc.c on IBM stb04xxx platforms

Signed-off-by: Dale Farnsworth <dale@farnsworth.org>
Signed-off-by: Matt Porter <mporter@kernel.crashing.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>