6 years agoARM: tegra: integration of slave mode support.
Ankit Gupta [Fri, 13 Jul 2012 09:28:18 +0000]
ARM: tegra: integration of slave mode support.

Add configurability support for i2s parameters accross all board.

ARM: tegra: board: add i2s params
Add configurability support for i2s parameters accross all board
files.
Signed-off-by: Ankit Gupta <ankitgupta@nvidia.com>
Change-Id: If58788b5126280b7e1dc8c66e9c96d0e71229b5e
Reviewed-on: http://git-master/r/111476
(cherry-picked from commit cac52867b0a0cad3b3c5bf46f08b0b94d0be2e02)

ARM: tegra: include: add configurability support for i2s params.
Add several variables for i2s configuration in platform data
structure.
Signed-off-by: Ankit Gupta <ankitgupta@nvidia.com>
Change-Id: Iea3930f308954471f170513234c2c02a8559ef98
Reviewed-on: http://git-master/r/111473
(cherry picked from commit 35e749770f6046fc82860f1152db2f5f579b9508)
Reviewed-on: http://git-master/r/118071
Reviewed-by: Sumit Bhattacharya <sumitb@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Scott Peterson <speterson@nvidia.com>

6 years agoARM: tegra: move secondary start kernel message
Jake Park [Tue, 24 Jul 2012 04:59:45 +0000]
ARM: tegra: move secondary start kernel message

Using printk before CPU online can make hang or kernel panic.

Bug 1017539
Bug 1019700

Signed-off-by: Jake Park <jakep@nvidia.com>
Reviewed-on: http://git-master/r/117924
(cherry picked from commit 9d7426fdc7e8c70079d37f529517932370355ac6)

Change-Id: Ib55ee06dcaf92af63f8d72ee74939c72dda4296c
Reviewed-on: http://git-master/r/118141
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Peter Boonstoppel <pboonstoppel@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-by: Sang-Hun Lee <sanlee@nvidia.com>
Tested-by: Sang-Hun Lee <sanlee@nvidia.com>

6 years agoarm: tegra: enterprise: Turn LCD_RESET low in display off
Karthik Ramakrishnan [Fri, 15 Jun 2012 00:57:27 +0000]
arm: tegra: enterprise: Turn LCD_RESET low in display off

During early suspend, LCD_RESET output needs to be
turned low. 3mW power savings during display Off and
1mW on lp0.
Bug 969716
Bug 990845

Change-Id: Ia773f0411452fad3eddccb5f293d7f32c4a46a56
signed-off-by: Karthik Ramakrishnan <karthikr@nvidia.com>
(cherry picked from commit 87322ed7e125ae1ac8d05b623c66f6ab7ea40881)
Reviewed-on: http://git-master/r/114057
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agoARM: tegra: cpuquiet: Fix cpuquiet notifiers
Sai Charan Gurrappadi [Wed, 25 Jul 2012 18:16:08 +0000]
ARM: tegra: cpuquiet: Fix cpuquiet notifiers

The notifiers now properly fire on every cluster switch

Change-Id: I381301cf62f25b49532326cc7759696c7f6797b7
Signed-off-by: Sai Charan Gurrappadi <sgurrappadi@nvidia.com>
Reviewed-on: http://git-master/r/118376
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

6 years agousb: cdc-acm: fix packet loss issue
Steve Lin [Thu, 19 Jul 2012 19:36:18 +0000]
usb: cdc-acm: fix packet loss issue

There is race between acm_suspend and acm_read_bulk_callback. Host may
receive bulk transfer right before suspend. The packet will be discarded
if this urb is killed in acm_suspend. This patch checks the actual length
of urb and processes it in this case.

Bug 996268

Signed-off-by: Steve Lin <stlin@nvidia.com>

Change-Id: Ief2b42708160b67903f976ec60da825d46c4720b
Reviewed-on: http://git-master/r/117135
(cherry picked from commit af3e96c987fbae8a135d1ff18872b9c32e09b67f)
Reviewed-on: http://git-master/r/118105
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Steve Lin <stlin@nvidia.com>
Reviewed-by: Steve Lin <stlin@nvidia.com>

6 years agop1852: Adding defconfig file for p1852 mods
Sanjay Sancheti [Mon, 9 Jul 2012 05:45:56 +0000]
p1852: Adding defconfig file for p1852 mods

This is a copy of p1852 defconfig with usb support disabled

Bug 989824

Change-Id: I40089049a35c18782b2e211b63d20fafe8fb9ee8
Reviewed-on: http://git-master/r/114138
Tested-by: Sanjay Sancheti <sasancheti@nvidia.com>
Reviewed-by: Amlan Kundu <akundu@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
(cherry picked from commit a147ad51d486d4aea9a73a11d4c14a13ad2121bb)
Reviewed-on: http://git-master/r/118011
Reviewed-by: Automatic_Commit_Validation_User

6 years agoarm: tegra: pci: Organize pcie initialization code
Jay Agarwal [Sat, 21 Jul 2012 18:17:33 +0000]
arm: tegra: pci: Organize pcie initialization code

1. Initialize PCIe on every resume whether device
   is dock/undocked.
2. Poweroff PCIe if Poweron failed at any stage.
3. Make PCIe initialization robust so that it is
   successful anytime dock is connected i.e while
   in LP0 or after it's exit or else.

Bug 1020949

Change-Id: I79cd75f2bf7164a9b5c8906a370364dba5183ac8
Signed-off-by: Jay Agarwal <jagarwal@nvidia.com>
Reviewed-on: http://git-master/r/117532
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agortc: tps6591x: Prevent wrong date setting
Preetham Chandru [Fri, 20 Jul 2012 05:31:26 +0000]
rtc: tps6591x: Prevent wrong date setting

This CL handles the following:

1. Prevents setting of wrong date in tps6591x_rtc_set_time().

For example the following case was not handled in rtc driver:
if hwclock command wanted to set 31/Dec/1999 then our RTC driver was
setting the date to 31/Dec/2099 and later on when hwclock read the
date back it was getting a invalid date.
Also, the hwclock command can only handle date upto the year 2038.

2. Sets STOP_RTC bit to one when the driver is initialized

Bug 1012914
Bug 1017647
Signed-off-by: Preetham Chandru R <pchandru@nvidia.com>
Change-Id: If8abfebe3ee6da05498deb38d7247ab265729c0c
Reviewed-on: http://git-master/r/117298
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>
Reviewed-by: Kiran Adduri <kadduri@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

6 years agochar: agp: treat compile warning as error
schowdary [Tue, 24 Jul 2012 12:04:46 +0000]
char: agp: treat compile warning as error

-enable warnings as errors compilation flag

bug 949219

Change-Id: I47e2df835985f341ebccdad95f53b4e6f7763e39
Signed-off-by: schowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/118017
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User

6 years agoarm: tegra: xmm: flash modem reset functionality
Vinayak Pane [Fri, 13 Jul 2012 00:13:07 +0000]
arm: tegra: xmm: flash modem reset functionality

Flash version modem need to do reset with gpio
and start enumeration on falling edge of ap wake.

Remove unused variable enum_delay_ms.

Bug 1003141

Change-Id: Ie43c693c3fead5c89b30c1b97cf1f3e4c05e5588
Signed-off-by: Vinayak Pane <vpane@nvidia.com>
Reviewed-on: http://git-master/r/116886
Reviewed-by: Michael Hsu <mhsu@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Ken Chang <kenc@nvidia.com>
Tested-by: Ken Chang <kenc@nvidia.com>
Reviewed-by: Steve Lin <stlin@nvidia.com>

6 years agoARM: tegra: thermal: fix inform edp governor bug
Daniel Fu [Fri, 20 Jul 2012 03:27:27 +0000]
ARM: tegra: thermal: fix inform edp governor bug

Fixed bug using Tj temp to update thermal zone,
It should use EDP temp to update it.

bug 1007726

Change-Id: Ibcf2520a4bad7dc977add0b5c855681d2667a7c2
Signed-off-by: Daniel Fu <danifu@nvidia.com>
Reviewed-on: http://git-master/r/117250
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Joshua Primero <jprimero@nvidia.com>
Tested-by: Joshua Primero <jprimero@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

6 years agommc: core: SDXC speed class support
Pavan Kunapuli [Mon, 16 Jul 2012 09:27:35 +0000]
mmc: core: SDXC speed class support

Unlike SDSC and SDHC, for SDXC cards CMD20 needs to be
issued to meet the class performance for speed class
recording. Adding mmc_speed_class_control() which should
be used by an AV recording app/utility before starting
recording on an SDXC card.

Bug 969360
Reviewed-on: http://git-master/r/39394
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-on: http://git-master/r/115685
(cherry picked from commit 04b8d1287a95e1882d956cdf7997015350408a3c)
Change-Id: Id567effb476ee580de3d49b70201ebae5a13360a
Reviewed-on: http://git-master/r/118038
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Naveen Kumar Arepalli <naveenk@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>

6 years agop1852: clocks: remove duplicate host1x clock limit
Nirav Patel [Tue, 5 Jun 2012 23:00:34 +0000]
p1852: clocks: remove duplicate host1x clock limit

host1x clock limit is already imposed by tegra3_dvfs.c and need not
to be explicitly set for p1852 SKU. Hence, removing the clock limit
duplication.

Bug 925358

Change-Id: I5e936f46ad64b0335561e321d61c4e8b13d7f765
Reviewed-on: http://git-master/r/106637
(cherry picked from commit ccaa3515121b637ce3870bf73f2402846670b63c)
Signed-off-by: Nirav Patel <nipatel@nvidia.com>
Reviewed-on: http://git-master/r/118130
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>

6 years agoARM: tegra: clock: Add Tegra3 cbus profiling sysfs nodes
Alex Frid [Wed, 18 Jul 2012 20:49:28 +0000]
ARM: tegra: clock: Add Tegra3 cbus profiling sysfs nodes

Added:

/sys/kernel/tegra_cap/cbus_cap_level
/sys/kernel/tegra_cap/cbus_cap_state

Change-Id: I06a32ea4001f1f644da4f230870f39523f9b6df3
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/116874
Reviewed-by: Lokesh Pathak <lpathak@nvidia.com>
Tested-by: Lokesh Pathak <lpathak@nvidia.com>

6 years agoARM: tegra: clock: Add Tegra3 cbus profile cap
Alex Frid [Wed, 18 Jul 2012 19:52:06 +0000]
ARM: tegra: clock: Add Tegra3 cbus profile cap

Change-Id: I4d15ef7a9089bf3519155d9ccf5192bf3dcf0bd6
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/116873
Reviewed-by: Lokesh Pathak <lpathak@nvidia.com>
Tested-by: Lokesh Pathak <lpathak@nvidia.com>

6 years agoARM: tegra: cpuquiet: Notify the cpuquiet governor when the driver is busy
Sai Charan Gurrappadi [Wed, 11 Jul 2012 00:33:58 +0000]
ARM: tegra: cpuquiet: Notify the cpuquiet governor when the driver is busy

Added generic busy/free notifiers that the driver can invoke to let the
governor know that it cannot process further core online/offline
requests (invoked in our case whenever we switch to the LP cluster).

Change-Id: I5e3f7f28f38806a7f87050e8d0c8d2f2cf7521aa
Signed-off-by: Sai Charan Gurrappadi <sgurrappadi@nvidia.com>
Reviewed-on: http://git-master/r/114807
Reviewed-by: Lokesh Pathak <lpathak@nvidia.com>
Tested-by: Lokesh Pathak <lpathak@nvidia.com>

6 years agovideo: tegra: dc: synchronize dsi clock-gating
Rakesh Iyer [Thu, 19 Jul 2012 19:44:08 +0000]
video: tegra: dc: synchronize dsi clock-gating

The one shot thread will clock gate the modules periodically. This will ensure
relevant paths in dc driver have an active dc clock and dsi host.

Bug 1013172

Change-Id: Ibb505e35044f31405c06cb9fa0d6fdf78aafd4a6
Signed-off-by: Rakesh Iyer <riyer@nvidia.com>
Reviewed-on: http://git-master/r/117137
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

6 years agousb: ehci: tegra: HSIC remote wakeup support
Vinod Atyam [Tue, 26 Jun 2012 09:08:48 +0000]
usb: ehci: tegra: HSIC remote wakeup support

1) Returning in irq after remote wakeup resume handled
   in ehci irq function.
2) Removed the unused variables.

Bug 889618

Change-Id: I9a1fd25c753a53462bf7742065fa618caae501ab
Signed-off-by: Vinod Atyam <vatyam@nvidia.com>
Reviewed-on: http://git-master/r/111192
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agoarm: tegra: usb: Fix First SOF corruption.
Suresh Mangipudi [Tue, 24 Jul 2012 07:16:47 +0000]
arm: tegra: usb: Fix First SOF corruption.

In ULPI phy first SOF after Reset may be corrupt. Fixing this issue.

Bug 1012500

Change-Id: I45ee1b4c8e0a29298c94813030d22291b79e417b
Signed-off-by: Suresh Mangipudi <smangipudi@nvidia.com>
Reviewed-on: http://git-master/r/117635
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agoarm: tegra: dvfs: update AP37 dvfs entry
Rakesh Iyer [Thu, 12 Jul 2012 21:56:12 +0000]
arm: tegra: dvfs: update AP37 dvfs entry

Update Tegra3 AP37 dvfs table entries.

Bug 841336

Reviewed-on: http://git-master/r/115509
(cherry picked from commit fda92ca92eb421b554fcb50117c92ec59b4b515a)

Change-Id: Ib15ba4731f0770a8af2272c51a90c7dc0fd8f6b9
Signed-off-by: Rakesh Iyer <riyer@nvidia.com>
Reviewed-on: http://git-master/r/117926
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
GVS: Gerrit_Virtual_Submit

6 years agopower: tps80031: charger: enable max current limit to 2.25A
Xin Xie [Wed, 11 Jul 2012 00:33:43 +0000]
power: tps80031: charger: enable max current limit to 2.25A

Current max USB bus current limit is 1.5A, add up to 2.25A support based
on TPS8003x register documentation.

BUG 1014876

Change-Id: Iae23e2473d9a7b52dac2d92029af03729e1e8a11
Reviewed-on: http://git-master/r/114801
(cherry picked from commit 04638c07f0b5a4ecea405ed914e144004b60877d)
Reviewed-on: http://git-master/r/116115
Reviewed-by: Xin Xie <xxie@nvidia.com>
Tested-by: Xin Xie <xxie@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agovideo: tegra: host: fix memory leak in ctx save
Mayuresh Kulkarni [Tue, 17 Jul 2012 10:33:21 +0000]
video: tegra: host: fix memory leak in ctx save

- host1x_save_context() explicitly updated the ref count on context
- with the re-factoring of nvhost_job code, nvhost_job_alloc()
takes a ref count on context
- this caused the explicit ref count in host1x_save_context()
redundant and lead to memory leak. hence remove it

Bug 1015924

Change-Id: Id18c74412e8659b60288700972690d1b895de4c1
Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-on: http://git-master/r/116409
(cherry picked from commit c98d0cfbbdacdda8e540b5d9e0d513e279b3b2f5)
Reviewed-on: http://git-master/r/117326
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agoARM: tegra: usb: Turn off built in host on otg
Krishna Yarlagadda [Fri, 20 Jul 2012 06:20:47 +0000]
ARM: tegra: usb: Turn off built in host on otg

Disable built in host support on OTG port
for Whistler and Enterprise boards.

Bug 1012273
Bug 947300

Change-Id: I88574c37795ee204e0cc67ed71f424443950494f
Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
Reviewed-on: http://git-master/r/117307
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agoARM: tegra: usb: regulator on during lp0 on T20
Krishna Yarlagadda [Wed, 18 Jul 2012 11:34:33 +0000]
ARM: tegra: usb: regulator on during lp0 on T20

Tegra 2 requires regulator to be on during lp0

Bug 1012273

Change-Id: I750892fd391be327e617c70b7da4c984019a32fa
Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
Reviewed-on: http://git-master/r/116743
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agoarm: tegra: enterprise: increase drive strength for sdmmc1
Rakesh Goyal [Fri, 20 Jul 2012 09:19:57 +0000]
arm: tegra: enterprise: increase drive strength for sdmmc1

Bug 987713

Change-Id: I4e6fb47007e337ec992d5ee58510c664957b448d
Signed-off-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-on: http://git-master/r/117592
GVS: Gerrit_Virtual_Submit
Reviewed-by: Rakesh Kumar <krakesh@nvidia.com>
Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

6 years agovideo: tegra: 2d: reset 2d clock to minimum
Bharat Nihalani [Mon, 23 Jul 2012 05:28:47 +0000]
video: tegra: 2d: reset 2d clock to minimum

This was accidently reverted to be set to max with commit 9774bbe31a.
With 2d clock at max, there is a hit on video power numbers.

Change-Id: Iaf73c6f7800d56229d35fb6a2b00f61d460e986d
Reviewed-on: http://git-master/r/117589
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Donghan Ryu <dryu@nvidia.com>

6 years agoARM: tegra: enable REGULATOR_TPS51632
Laxman Dewangan [Mon, 23 Jul 2012 08:00:28 +0000]
ARM: tegra: enable REGULATOR_TPS51632

Enable regualtor REGULATOR_TPS51632 which is used
for cpu regulator.

Change-Id: I5ba78608e6c5480e8b0d8d54ee59c9bba0b58428
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/117602
Reviewed-by: Automatic_Commit_Validation_User

6 years agoregulator: tps51632: add regulator driver for TI tps51632
Laxman Dewangan [Mon, 23 Jul 2012 07:57:17 +0000]
regulator: tps51632: add regulator driver for TI tps51632

This driver supports voltage regulator driver for TI TPS51632
voltage regulator chip. The TPS52632 is 3-2-1 Phase D-Cap+ Step
Down Driverless Controller with Serial VID control and DVFS.
This device has only one voltage output.

bug 978821

Change-Id: I73f3fd696bab5267e76e788fb4b5bf8d9f10b5b5
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/117381

6 years agoarm: tegra: E1506 Tristate and pull down LCD pins
Prem Sasidharan [Tue, 26 Jun 2012 23:27:42 +0000]
arm: tegra: E1506 Tristate and pull down LCD pins

Tristating and pulling down LCD_PCLK,LCD_WR_N,LCD_HSYNC,LCD_VSYNC
LCD_SCK,LCD_SDOUT and LCD_SCIN for E1506 DSI panel.

Bug 999702
Signed-off-by: Prem Sasidharan <psasidharan@nvidia.com>

Reviewed-on: http://git-master/r/111390
(cherry picked from commit 822a1c8ce2a50ff7b53cdd811c3ae1e47568d69d)

Change-Id: Icba97ddcbc4e7bd0b8c4744703e85bf8bc94ba69
Reviewed-on: http://git-master/r/117308
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agousb: ehci: tegra: prevent illegal register access
Rakesh Bodla [Tue, 17 Jul 2012 05:55:51 +0000]
usb: ehci: tegra: prevent illegal register access

Make sure phy is turned ON before reading USB
registers.

Bug 993380
Bug 1006579

Reviewed-on: http://git-master/r/116045
(cherry picked from commit a1a6db7dc88880fb3d4bca0036ce421e4032adae)
Change-Id: If94e691bf9b5b46dd8f8562f27cf86e59a4d6353
Reviewed-on: http://git-master/r/117257
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Rakesh Bodla <rbodla@nvidia.com>
Tested-by: Rakesh Bodla <rbodla@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

6 years agoARM: tegra: phy: avoid illegal access to registers
Rakesh Bodla [Fri, 20 Jul 2012 06:11:09 +0000]
ARM: tegra: phy: avoid illegal access to registers

Adding the conditions to prevent illegal register access.

Bug 993380
Bug 1006579

Reviewed-on: http://git-master/r/113138
(cherry picked from commit a3c026a229bbce614d7f40319bada1d7bf42942d)

Change-Id: I0d8e6c20aab04aa43ae484dc8ceb6fcb2c27d151
Reviewed-on: http://git-master/r/117256
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Rakesh Bodla <rbodla@nvidia.com>
Tested-by: Rakesh Bodla <rbodla@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

6 years agoarm: config: tegra3: Enable IrDA support
Ramalingam C [Thu, 19 Jul 2012 09:24:30 +0000]
arm: config: tegra3: Enable IrDA support

Enables the IrDA support on E1198 and E1186 platforms.
This will enable the access to the IrDA transceiver through
(/dev/ttyHS1) UARTB of verbier (E1240).

Bug 999895

Change-Id: Ib2b8391facddf12b3b48d319e11f548d9f963712
Signed-off-by: Ramalingam C <ramalingamc@nvidia.com>
Reviewed-on: http://git-master/r/114952
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

6 years agoarm: tegra: cardhu: IrDA support on UARTB
Ramalingam C [Wed, 11 Jul 2012 09:17:48 +0000]
arm: tegra: cardhu: IrDA support on UARTB

Adds the IrDA support functions to the platform_data of UARTB on Verbier
boards(E1198 and E1186). And also adds a config variable CONFIG_TEGRA_IRDA
to control the IrDA support on Tegra.

Bug 999895

Change-Id: Iab77c419004292190421d55fd02e249ff98c728e
Signed-off-by: Ramalingam C <ramalingamc@nvidia.com>
Reviewed-on: http://git-master/r/114930
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agotty: serial: tegra: IrDA support with tegra_hsuart
Ramalingam C [Wed, 11 Jul 2012 07:00:44 +0000]
tty: serial: tegra: IrDA support with tegra_hsuart

Adds the IrDA transceiver handling support to tegra_hsuart driver based on
the platform data.

Bug 999895

Change-Id: Ia475639d97c540d014c7128ef392fa394a5b26ad
Signed-off-by: Ramalingam C <ramalingamc@nvidia.com>
Reviewed-on: http://git-master/r/114927
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

6 years agoARM: Tegra3: clocks: Configurable cbus divider
Mohit Kataria [Wed, 20 Jun 2012 05:35:39 +0000]
ARM: Tegra3: clocks: Configurable cbus divider

Added config option to set cbus divider.

Bug 978870

Change-Id: I49c57064ce695dd703ad97a50b8c0d373f5a05d0
Signed-off-by: Mohit Kataria <mkataria@nvidia.com>
Reviewed-on: http://git-master/r/114197
(cherry picked from commit 3f2b0e2b973a106d62e1f4bfb75bb40bd1a96b9b)
Reviewed-on: http://git-master/r/109962
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agoARM: Tegra11: cl_dvfs: change MAX_CL_DVFS_VOLTAGES from 33 to 41
Varun Wadekar [Mon, 30 Jul 2012 10:20:48 +0000]
ARM: Tegra11: cl_dvfs: change MAX_CL_DVFS_VOLTAGES from 33 to 41

This fixes compilation errors while building Curacao images

Change-Id: If23eb7da1c647386eddd8a488d635b04748163e3
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

6 years agomfd: tps80031: use regmap for register access
Laxman Dewangan [Thu, 19 Jul 2012 14:47:14 +0000]
mfd: tps80031: use regmap for register access

Use regmap for register access of device in place of
direct i2c calls.
This helps to have the debug FS support through regmap and
also help to caching register with minimum configuration.

Change-Id: I2a1285ab750639babcda40ba53001e7d1bd10a71
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/117332
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
GVS: Gerrit_Virtual_Submit

6 years agomfd: tps80031: use devm managed resources
Laxman Dewangan [Thu, 19 Jul 2012 08:35:52 +0000]
mfd: tps80031: use devm managed resources

Allocate memory for device state using devm_kzalloc()
to simplify accounting and letting the kernel do the
garbage-collection.

Change-Id: I8dcde205556c43f4fdfe5e335507df206f204177
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/117331
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
GVS: Gerrit_Virtual_Submit

6 years agomfd: tps80031: Use struct dev_pm_ops for power management
Laxman Dewangan [Wed, 18 Jul 2012 13:21:55 +0000]
mfd: tps80031: Use struct dev_pm_ops for power management

Make the tps80031 driver define its PM callbacks through a
struct dev_pm_ops object rather than by using legacy PM hooks
in struct i2c_driver

Change-Id: I3963426c26eb7609794c6fe761d69f31ee630cb2
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/117330
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
GVS: Gerrit_Virtual_Submit

6 years agomfd: tps80031: fix compilation warning
Laxman Dewangan [Thu, 19 Jul 2012 10:13:58 +0000]
mfd: tps80031: fix compilation warning

Fixing compilation warning:

kernel/drivers/mfd/tps80031.c: In function 'tps80031_init_ext_control.isra.4':
kernel/drivers/mfd/tps80031.c:594:6: warning: 'ret' is used uninitialized in this
function [-Wuninitialized]

Change-Id: I7d9cfab7b03ffe085ef4db7c9b08b0f2cb4e6fec
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/117329
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
GVS: Gerrit_Virtual_Submit

6 years agoCHROMIUM: config: enable DM_CRYPT target
Kees Cook [Thu, 9 Feb 2012 00:53:31 +0000]
CHROMIUM: config: enable DM_CRYPT target

The dm "crypt" target is needed for encrypted /var support.
Additionally, since the expected hash alg will be sha256, built it in,
and ready future support for sha512 as a module.

BUG=chromium-os:22172
TEST=build, boot amd64-generic, verify target listed in "dmsetup targets"

Signed-off-by: Kees Cook <keescook@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/15548
Reviewed-by: Kees Cook <keescook@chromium.org>
Tested-by: Kees Cook <keescook@chromium.org>
Commit-Ready: Kees Cook <keescook@chromium.org>
(cherry-picked from commit 50180f134a6e23be3ce763524b6b5193d848c0f7)

Modified to use:
chromeos/config/config.common.chromeos

instead of:
chromeos/config/base.config

Change-Id: Iac31f59f340f52a7017948fd5add3d316d38a123
Signed-off-by: Rhyland Klein <rklein@nvidia.com>
Reviewed-on: http://git-master/r/117151
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>

6 years agodrivers: net: raw-ip: Add IPv6 support.
Michael Hsu [Wed, 28 Mar 2012 21:57:53 +0000]
drivers: net: raw-ip: Add IPv6 support.

Upon receiving IPv6 packet, set ethernet header's ether type
to 0x86dd.  For transmission of IPv6, nothing extra required,
as the 14 byte ethernet header (containing the 0x86dd ether
type) is already stripped off as part of the raw-ip protocol.

Bug 1010735

Change-Id: Id574a7feeefbde0504ad0ea449dff28340e9356a
Signed-off-by: Michael Hsu <mhsu@nvidia.com>
Reviewed-on: http://git-master/r/113761
(cherry picked from commit 8bdfd06cae7eede4856ef825ea26b69c9ea065ef)
Reviewed-on: http://git-master/r/117148
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Vinayak Pane <vpane@nvidia.com>
Tested-by: Vinayak Pane <vpane@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Steve Lin <stlin@nvidia.com>

6 years agoARM: tegra: clock: Reduce Tegra3 pll post-lock delay
Alex Frid [Sun, 15 Jul 2012 03:11:04 +0000]
ARM: tegra: clock: Reduce Tegra3 pll post-lock delay

Reduced pll post-lock delay from 50us to 2us.

Rearranged wait for lock loop to delay first check of lock bit
by 2us after pll is enabled.

Added read fence for PLLM lock via PMC (in this case enable bit is
in APB bus register, but lock detect bit is in PPSB bus register).

Bug 1017271

Change-Id: Ibc963533854383e884d87be61e1b98e9d54d3ea0
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/115933
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agoARM: tegra: power: Enforce CPU rate range in secondary boot
Alex Frid [Fri, 18 May 2012 05:11:55 +0000]
ARM: tegra: power: Enforce CPU rate range in secondary boot

On Tegra3 make sure cpu rate is within G-mode range before LP to G
mode switch triggered by secondary cpu boot directly from LP mode.

Bug 988544

Change-Id: I0d86fbf0727a6bbf6069159e7c532947a9d0af73
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/115930
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Peter Boonstoppel <pboonstoppel@nvidia.com>
Reviewed-by: Greg Lo <glo@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

6 years agoARM: tegra: clock: relax memory efficiency if 3d clock is off
Peter Zu [Thu, 5 Jul 2012 01:56:48 +0000]
ARM: tegra: clock: relax memory efficiency if 3d clock is off

Bug 1003509

Change-Id: I8fb2c0cff7106671f8470b836ea26c09350d6206
Signed-off-by: Peter Zu <pzu@nvidia.com>
(cherry picked from commit df2dda0438c2aed3a961d197dce7319fefdf5b30)
Reviewed-on: http://git-master/r/115468
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agoARM: tegra: dvfs: add back 916mV & 1007mV entries
Peter Zu [Fri, 6 Jul 2012 00:01:12 +0000]
ARM: tegra: dvfs: add back 916mV & 1007mV entries

Bug 841336

Signed-off-by: Peter Zu <pzu@nvidia.com>
Signed-off-by: Manoj Chourasia <mchourasia@nvidia.com>
Reviewed-on: http://git-master/r/113751
(cherry picked from commit 833f9d47a350358000e9201f77a3c9fd655d2900)

Change-Id: I679093d9d2577625bff3e02e25ffe90d396ea5a6
Reviewed-on: http://git-master/r/116134
Tested-by: Matt Wagner <mwagner@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agoARM: tegra: dvfs: update Tegra3 single-core dvfs table
Peter Zu [Fri, 22 Jun 2012 18:11:49 +0000]
ARM: tegra: dvfs: update Tegra3 single-core dvfs table

Bug 841336

Signed-off-by: Peter Zu <pzu@nvidia.com>
Reviewed-on: http://git-master/r/110587
(cherry picked from commit c0e7904245168cafc426219948ab132a4d832376)

Change-Id: I370f4af1d4ce888ebc71351519c1018b82d91913
Reviewed-on: http://git-master/r/116132
Tested-by: Matt Wagner <mwagner@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agoarm: tegra: pci: unmap/map memory while pwroff/on
Jay Agarwal [Mon, 16 Jul 2012 11:14:15 +0000]
arm: tegra: pci: unmap/map memory while pwroff/on

Rearranged the code to release all memory and res-
ources whenever poweroff is called and re-allocate
them whenever power on is called.

Bug 963969

Change-Id: I31d9cd1e8603e638714bba765aadfdd4eed78d93
Signed-off-by: Jay Agarwal <jagarwal@nvidia.com>
Reviewed-on: http://git-master/r/116048
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agoARM: tegra: reset io dpd mode
Bitan Biswas [Thu, 12 Jul 2012 13:03:37 +0000]
ARM: tegra: reset io dpd mode

Bootloader io dpd settings are cleared during kernel initialization

bug 758856

Change-Id: Ic6d5250a5ae127bb45ab37b9200ca06c8d1f11a2
Signed-off-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-on: http://git-master/r/115395
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agocpufreq: interactive: clean up sysfs declarations
Ilan Aelion [Mon, 2 Jul 2012 18:27:45 +0000]
cpufreq: interactive: clean up sysfs declarations

Cosmetics: introducing a macro to define unsigned long sysfs nodes.

Change-Id: I594a527dc977437405167237e8d5ac6d3a3167d2
Signed-off-by: Ilan Aelion <iaelion@nvidia.com>
Reviewed-on: http://git-master/r/113020
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Matthew Longnecker <mlongnecker@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agoi2c: tegra: enable/disable clock unconditionally during xfer
Laxman Dewangan [Tue, 17 Jul 2012 14:28:16 +0000]
i2c: tegra: enable/disable clock unconditionally during xfer

Do the clock control for enable/disable during each transfer
regardless of whether clock is always on or not.

If clock is always on then in probe the reference count of the
clock incremented and doing again enable will just increment
reference and disable will decrement the reference count
and so there is no harm on calling enable/disable always
during transfer.

Change-Id: Ibf67413fb84f826f04e890fe3dd2a20cd0469922
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/116473
Tested-by: Bandi Krishna Chaitanya <bandik@nvidia.com>

6 years agoi2c: tegra: remove unused member variable
Laxman Dewangan [Tue, 10 Jul 2012 11:40:21 +0000]
i2c: tegra: remove unused member variable

Remove unused member variable "iomem" of the
i2c device structure.

This variable becomes unused when converted all allocation
to devm_* in following change:
    i2c: tegra: make all resource allocation through devm_*

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Cherry-picked from mainline
57c0dc3e69439a2ddf239226c318d676da773492

Change-Id: I8a3db21524a20ee4cbd1b87dff82bac80a2763de
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/116472
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Bandi Krishna Chaitanya <bandik@nvidia.com>

6 years agoi2c: tegra: i2c slave initialization for non-dvc i2c
Laxman Dewangan [Tue, 17 Jul 2012 14:01:04 +0000]
i2c: tegra: i2c slave initialization for non-dvc i2c

The slave configuration is required for non-dvc i2c.
This can be done by checking the i2c type "is_dvc"
in place of having another variable.

Change-Id: Ia80ba0f7a68e2dfaa13b5da94896b87f2877e047
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/116471
Tested-by: Bandi Krishna Chaitanya <bandik@nvidia.com>

6 years agoRevert "i2c: tegra: Fix i2c unknown interrupt issue"
Laxman Dewangan [Tue, 17 Jul 2012 13:24:24 +0000]
Revert "i2c: tegra: Fix i2c unknown interrupt issue"

This reverts commit 021d8866c80fab07cb4cd2753ed67d0c1b49c174.

The reason for revert the change:
The readback is done at the time of i2c_writel() and hence
it is not require to have this in scattered manner.
This is towards the aligning driver with mainline.

Change-Id: I74184683301d7a3c26550d97fb1ce3596273a0bb
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/116470
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Tested-by: Bandi Krishna Chaitanya <bandik@nvidia.com>

6 years agoi2c: tegra: make sure register writes completes
Laxman Dewangan [Wed, 13 Jun 2012 10:12:36 +0000]
i2c: tegra: make sure register writes completes

The Tegra PPSB (an peripheral bus) queues writes transactions.
In order to guarantee that writes have completed before a
certain time, a read transaction to a register on the same
bus must be executed.
This is necessary in situations such as when clearing an
interrupt status or enable, so that when returning from an
interrupt handler, the HW has already de-asserted its
interrupt status output, which will avoid spurious interrupts.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Cherry-picked from mainline
ec7aaca2f64f509f45d463d784b41d0b3d2be083

Change-Id: I4f064c38993031303bfeef794015efd5517561cc
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/116469
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Tested-by: Bandi Krishna Chaitanya <bandik@nvidia.com>

6 years agoi2c: tegra: make all resource allocation through devm_*
Laxman Dewangan [Wed, 13 Jun 2012 10:12:39 +0000]
i2c: tegra: make all resource allocation through devm_*

Use the devm_* for the memory region allocation, interrupt request,
clock handler request.
By doing this, it does not require to explicitly free it and hence
saving some code.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Cherry-picked from mainline
9cbb6b2b92d0fdade0fe00cc00e3658b44c86676

Change-Id: I0bc86dbd2bd4e460c75f6d425131f9e27bdace71
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/116468
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Tested-by: Bandi Krishna Chaitanya <bandik@nvidia.com>

6 years agoi2c: tegra: rename dev_pm_ops variables/macro
Laxman Dewangan [Tue, 17 Jul 2012 12:51:54 +0000]
i2c: tegra: rename dev_pm_ops variables/macro

To align the downstream to mainline, renaming the
variable/macro of dev_pm_ops as per mainline.

The original change on mainline is:
commit 6a7b3c3c465cef29d92dfc3fbbff0d958aa8be04
Author: Rafael J. Wysocki <rjw@sisk.pl>
    i2c-tegra: Use struct dev_pm_ops for power management

Change-Id: Ica427ee339390a76ac8004bef96b4c12ef4ecae4
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/116465
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Tested-by: Bandi Krishna Chaitanya <bandik@nvidia.com>

6 years agoi2c: tegra: use of_match_ptr() for match_table initialization
Laxman Dewangan [Tue, 10 Jul 2012 11:20:42 +0000]
i2c: tegra: use of_match_ptr() for match_table initialization

In place of defining match_table for non-DT based as NULL,
use of_match_ptr() for initialzing the of_match_table.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>

Cherry-picked from mainline
02d8bf8dc6b09cb810599c64d47da3bdf4f85882
Fixed conflicts.

Change-Id: I71994c49813396ad6b3dfa3fd616d9585203adba
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/116464
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Tested-by: Bandi Krishna Chaitanya <bandik@nvidia.com>

6 years agoarm: tegra3: usb_phy: HSIC rail consumes 4mA in suspend
srinivas [Mon, 16 Jul 2012 10:39:12 +0000]
arm: tegra3: usb_phy: HSIC rail consumes 4mA in suspend

In auto-suspend, removed power downs for HSIC from
 PADS_CFG1 register.

Bug 1011912

Change-Id: I646c196ef9b822ae8d9e12a0f918507fcdd16f0b
Signed-off-by: srinivas <sthaduvai@nvidia.com>
Reviewed-on: http://git-master/r/116044
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agoarm: config: tegra3: enable alsa usb audio
Ravindra Lokhande [Thu, 19 Jul 2012 14:22:54 +0000]
arm: config: tegra3: enable alsa usb audio

Change-Id: I6b6348ec3b604bbf9b8e40fe551023cf94b0b153
Reviewed-on: http://git-master/r/117083
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agoARM: mm: cache-l2x0: Implement outer_clean_all()
Kirill Artamonov [Mon, 16 Jul 2012 14:24:00 +0000]
ARM: mm: cache-l2x0: Implement outer_clean_all()

There is already implemented full outer clean routine in
arch/arm/mm/cache-l2x0.c.

Make it possible to use it through outer_cache interface,
like other outer maintenance functions.

bug 983964

Change-Id: I47f1fad536c151c255e6a42d6517114c334ddfef
Reviewed-on: http://git-master/r/116074
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Kirill Artamonov <kartamonov@nvidia.com>
Tested-by: Kirill Artamonov <kartamonov@nvidia.com>
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-by: Justin Paver <jpaver@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agoarm: tegra: PLLX LP/G ports switching ON/OFF
Prem Sasidharan [Thu, 5 Jul 2012 18:56:14 +0000]
arm: tegra: PLLX LP/G ports switching ON/OFF

Enable target PLLX port(LP/G) before cluster switch and disable
the previous PLLX port(LP/G) after cluster switch is finished.
Seeing a power improvement of ~10mW when core operates at
max. voltage and max. frequency.

Bug 997358
Signed-off-by: Prem Sasidharan <psasidharan@nvidia.com>
Change-Id: I9d05245977f9f63a8f4c53b1c6797118d2d8b903
Reviewed-on: http://git-master/r/113399
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agoRevert "mmc: host: Disable SDIO card clock when idle for Tegra 3 only"
Pavan Kunapuli [Mon, 25 Jun 2012 10:07:46 +0000]
Revert "mmc: host: Disable SDIO card clock when idle for Tegra 3 only"

Without the card clock, inband interrupt is not working on
some wifi chips.

Bug 981683

This reverts commit 0467657691ba046b492504272baf7c626d9a3713.

Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-on: http://git-master/r/110826
(cherry picked from commit 33c8e504328387097ed0160082cce6b36b994bd8)

Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Change-Id: I6683720a9bda1f779a63133d8ca64a024c5d8a08
Reviewed-on: http://git-master/r/116707
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

6 years agoarm: tegra: p1852: Make TDM1 as 16 channels
Nitin Pai [Thu, 28 Jun 2012 08:50:50 +0000]
arm: tegra: p1852: Make TDM1 as 16 channels

Made TDM1 as 16 channels so that both devices
work in the same configuration.

Bug 1008391

Signed-off-by: Nitin Pai <npai@nvidia.com>
Reviewed-on: http://git-master/r/112090
(cherry picked from commit 4d042a0e613ba1c2d715d6ed47daddd61be14a28)
Change-Id: I622b046b3b36147b82d47f612febb7ae7ba0767c
Reviewed-on: http://git-master/r/116059
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

6 years agoARM: tegra: dvfs: Handle Tegra3 alternative dvfs errors
Rohan Somvanshi [Tue, 3 Jul 2012 12:28:01 +0000]
ARM: tegra: dvfs: Handle Tegra3 alternative dvfs errors

Propagate error to the caller when switching between alternative
cpu dvfs tables. Change dvfs table during cpu hotplug operation
only after the new edp limit is set, and abort bringing cpu core
on-line in case of failure in applying new (less conservative)
table. When cpu core is removed change dvfs table before setting
new edp limit, and ignore error (it is safe to continue with more
conservative table).

Signed-off-by: Alex Frid <afrid@nvidia.com>
(cherry picked from commit 951710ec179fd620a2251d0815ca7bff15da014b)

Change-Id: Ib1ad8e41093fb9bee75d3d6bd18d0ac406da8271
Reviewed-on: http://git-master/r/114779
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

6 years agoARM: tegra: Fix build issue for no-SMP
Alex Waterman [Tue, 10 Jul 2012 00:23:50 +0000]
ARM: tegra: Fix build issue for no-SMP

Fix issues causing the kernel build to fail with CONFIG_SMP not set.

Change-Id: I8c7a49970e55354e38ce41d2d1e0dab00ba78f24
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/114317
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

6 years agommc: tegra: clean up interrupts logic in tuning
Pavan Kunapuli [Wed, 27 Jun 2012 12:21:54 +0000]
mmc: tegra: clean up interrupts logic in tuning

Disable the normal interrupts signalling before
tuning and enable it only after the entire tuning
process is done.

Bug 860102

Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-on: http://git-master/r/111589
(cherry picked from commit 15a97f33f6cf1fc1c25441142f69f62ce5f7029b)
Change-Id: I9eba9af65a50928dc4bb475e06cbf401963751bc
Reviewed-on: http://git-master/r/116433
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

6 years agommc: tegra: Fix SDR50 clock rate configuration
Pavan Kunapuli [Wed, 27 Jun 2012 11:28:10 +0000]
mmc: tegra: Fix SDR50 clock rate configuration

The host clock configuration in SDR50 mode is
incorrectly grouped with DDR50 mode due to which
DDR50 mode clock limits are wrongly applied even
in SDR50 mode.

Bug 965298

Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-on: http://git-master/r/111566
(cherry picked from commit 2ad290d477e8198bace22d2623856555f07b9bf9)

Change-Id: I5d3a446e39a349209e5842d385c1b728bfb7012e
Reviewed-on: http://git-master/r/116428
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Tested-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-by: Naveen Kumar Arepalli <naveenk@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>

6 years agovideo: tegra: dsi: Implement dcs video + host
Animesh Kishore [Wed, 11 Jul 2012 12:25:28 +0000]
video: tegra: dsi: Implement dcs video + host

Send host commands to panel during vertical blanking
of a frame. Implementation is generic enough to
handle both long and short packets.

Bug 1009863

Change-Id: I9a80641df2d8b67eb3649d220c028543b246a5f3
Signed-off-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-on: http://git-master/r/114990
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>

6 years agoarm: tegra: usb: phy code clean up
Venu Byravarasu [Fri, 13 Jul 2012 06:08:04 +0000]
arm: tegra: usb: phy code clean up

Code clean up of usb phy driver

Change-Id: If951ed461b096be76938504d9e1073a70f59860a
Signed-off-by: Venu Byravarasu <vbyravarasu@nvidia.com>
Reviewed-on: http://git-master/r/115339
(cherry picked from commit 6d4046a6f2170dadaf5647f0bf47aa546dd705b0)
Reviewed-on: http://git-master/r/104055
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>

6 years agoregulator: tps80031: adjust tolerance if req minuV > dev minuV
Mallikarjun Kasoju [Tue, 17 Jul 2012 10:34:01 +0000]
regulator: tps80031: adjust tolerance if req minuV > dev minuV

Adjust the tolerance voltage only when requested minimum voltage is
more than the rail's minimum voltage.

bug 997415

Change-Id: Ie139c657f8550adba07b74a0cd5d69e2b53d62c2
Signed-off-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Reviewed-on: http://git-master/r/116405
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

6 years agoARM: tegra: enterprise: allow 3mv tolerance for cpu voltage
Laxman Dewangan [Fri, 22 Jun 2012 06:53:36 +0000]
ARM: tegra: enterprise: allow 3mv tolerance for cpu voltage

Allow 3mv tolerance on minimum voltage side for cpu voltage.
This saves power when system require 900/975mV.

bug 997415

Change-Id: I273cdeda6980f5ddf50be7980bced443b386dae8
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/110524
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agochromeos: config: renormalize cfgs and drop debug_ll
Rhyland Klein [Mon, 16 Jul 2012 19:43:50 +0000]
chromeos: config: renormalize cfgs and drop debug_ll

Renormalize split configs based on current TOT k3.1 kernel and
remove DEBUG_LL to clean up the kernel log a bit.

BUG=None
TEST=Verified generated config doesn't prompt.

Signed-off-by: Rhyland Klein <rklein@nvidia.com>
Change-Id: Ib13e633742a2c4e0060629d145e0571e7a7d5241
Reviewed-on: http://git-master/r/116136
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Allen Martin <amartin@nvidia.com>

6 years agoasoc: tegra: p852: Added machine driver for P852
Nitin Pai [Fri, 6 Jul 2012 11:01:11 +0000]
asoc: tegra: p852: Added machine driver for P852

Renamed P1852 machine driver to VCM so that can be used
for P1852/P852 and E1853 as well.

Bug 1008391

Signed-off-by: Nitin Pai <npai@nvidia.com>
Reviewed-on: http://git-master/r/113886
(cherry picked from commit 5eb23e30bab716b28146b85438989e58761c7136)
Change-Id: I8d1363a6419c6381b8d23ebd38d625fb482084dc
Reviewed-on: http://git-master/r/116056
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Scott Peterson <speterson@nvidia.com>

6 years agoARM: Tegra3: clocks: optional se.cbus
Mohit Kataria [Wed, 20 Jun 2012 05:29:37 +0000]
ARM: Tegra3: clocks: optional se.cbus

Made se.cbus optional so that se clock can be derived
from other clocks and not just from the clocks which drive cbus.

Added config option for the same.

Bug 978870

Change-Id: I7b5bf405efb58bbb53143f52d2bfe0ebcf6b8322
Signed-off-by: Mohit Kataria <mkataria@nvidia.com>
Reviewed-on: http://git-master/r/110827
(cherry picked from commit 35e9017b79a3a4b4e0b4098cd2e63ad24018d3de)
Reviewed-on: http://git-master/r/106397
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agoARM: tegra: thermal: Call pm register only once
Joshua Primero [Tue, 17 Jul 2012 00:09:42 +0000]
ARM: tegra: thermal: Call pm register only once

Fixed bug where pm register was being called multiple times.

Change-Id: I32f7b10547275e0a9bdad1073f9842589180c0f8
Signed-off-by: Joshua Primero <jprimero@nvidia.com>
Reviewed-on: http://git-master/r/116203
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>

6 years agoarm: tegra: pcie: Enable cardhu a02+ Dock detect GPIO
Jay Agarwal [Fri, 13 Jul 2012 12:50:18 +0000]
arm: tegra: pcie: Enable cardhu a02+ Dock detect GPIO

Set E_INPUT and PUPD bit of GPIO_PU4 used for dock
detect event for cardhu a02+ board versions and
hence enable pcie hotplug for them.

Bug 955043
Bug 1009086
Bug 1016722

Change-Id: Ibb66e5bc6fd9cf5333a81988b975b611fe9c5312
Signed-off-by: Jay Agarwal <jagarwal@nvidia.com>
Reviewed-on: http://git-master/r/115692
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Thota <kthota@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

6 years agonet: wireless: bcmdhd: disable WLC_E_TXFAIL event.
Narayan Reddy [Fri, 13 Jul 2012 09:09:54 +0000]
net: wireless: bcmdhd: disable WLC_E_TXFAIL event.

In suspend mode WLC_E_TXFAIL event is causing autowake
when the device is connected to an AP, so discarding the
WLC_E_TXFAIL event initialization as per BRCM team suggestion.

Bug 1014610

Change-Id: I297dab7ee589f458bba3e26be090665a36c78502
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: http://git-master/r/115633
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Rakesh Goyal <rgoyal@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agonet: usb: raw-ip: support more rmnet interfaces
Vinayak Pane [Fri, 29 Jun 2012 23:31:15 +0000]
net: usb: raw-ip: support more rmnet interfaces

New requirement to support upto 5 rmnet interfaces with
raw-ip. Driver will be able to support dynamically multiple
number of interfaces, maximum to 5.

Bug 1006183

Signed-off-by: Vinayak Pane <vpane@nvidia.com>
Reviewed-on: http://git-master/r/112790
(cherry picked from commit 0dde53830d9e21004b2e90c1b997a54c89767fa1)

Change-Id: I8166c448dbfef0391491ffdef9dff2b0e2693d75
Reviewed-on: http://git-master/r/115611
Tested-by: Vinayak Pane <vpane@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Steve Lin <stlin@nvidia.com>

6 years agoarm: tegra: xmm: flashed modem start with hsic_active low
Vinayak Pane [Fri, 29 Jun 2012 20:08:36 +0000]
arm: tegra: xmm: flashed modem start with hsic_active low

Flashed modem should start with hsic_active signal as low.
The hsic register is done at falling edge of ap_wake.

Bug 1006183

Signed-off-by: Vinayak Pane <vpane@nvidia.com>
Reviewed-on: http://git-master/r/112781
(cherry picked from commit 6437d1453d2a7694c2efa183cff135297f9f45e3)

Change-Id: I7bf355088096788b030fd861ef257a9f635c66e7
Reviewed-on: http://git-master/r/115610
Tested-by: Vinayak Pane <vpane@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Steve Lin <stlin@nvidia.com>

6 years agousb: serial: baseband: buffer allocations at init
Vinayak Pane [Wed, 21 Mar 2012 22:06:43 +0000]
usb: serial: baseband: buffer allocations at init

The usb transaction buffers are allocated in module init.
In device open, close and disconnect the buffers will not be
freed. Instead they will be reused to avoid allocation failure
in low-mem conditions.

The usb driver register moved to init so that rmmod and
insmod is not required.

Bug 956211

Signed-off-by: Vinayak Pane <vpane@nvidia.com>
Reviewed-on: http://git-master/r/109935
(cherry picked from commit a4e8219a86f80fd06aaaae2c40a657098d5dcfa5)

Change-Id: Id88cfe3b0a75cb2e6f39176b5297f81f4f9e978b
Reviewed-on: http://git-master/r/115609
Tested-by: Vinayak Pane <vpane@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Steve Lin <stlin@nvidia.com>

6 years agoARM: tegra: curacao_sim: Enable ashmem service
Lauri Peltonen [Fri, 27 Jul 2012 13:29:16 +0000]
ARM: tegra: curacao_sim: Enable ashmem service

Enable ashmem service which is required on Android.

Change-Id: I11abf0d543260ebd7c91fb3f50c3f685ad0055eb
Reviewed-on: http://git-master/r/118985
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Lauri Peltonen <lpeltonen@nvidia.com>
Tested-by: Lauri Peltonen <lpeltonen@nvidia.com>
Reviewed-by: Bo Yan <byan@nvidia.com>
Reviewed-by: Mark Stadler <mastadler@nvidia.com>

6 years agoARM: tegra: remove duplicate file inclusions
Bitan Biswas [Fri, 27 Jul 2012 10:51:57 +0000]
ARM: tegra: remove duplicate file inclusions

Tegra2 or Tegra3 specific files are included multiple time.
Conditions used when including files are also changing. This
patch cleans the Makefile in above respect.

Change-Id: I9d21db141909ded1f44ed56590ea824d4e0b5de6
Signed-off-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-on: http://git-master/r/118943
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Bo Yan <byan@nvidia.com>

6 years agotegra: dc: fix build errors
Seshendra Gadagottu [Fri, 27 Jul 2012 00:51:23 +0000]
tegra: dc: fix build errors

Fixed compilation erros with CONFIG_TEGRA_DC enable:
1. Unused variables in dc.c and board-curacao-panel.c
2. Merge issue related to window.c

Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Change-Id: I087b6f15b68ef5fa9739c84dc3abc81db7d7b9d2
Reviewed-on: http://git-master/r/118821
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

6 years agoARM: tegra11: dvfs: Update CL-DVFS clock definitions
Alex Frid [Wed, 25 Jul 2012 04:17:00 +0000]
ARM: tegra11: dvfs: Update CL-DVFS clock definitions

- Added i2c fast clock to CL_DVFS clocks
- Limited CL_DVFS parent clocks to PLLP and CLKM only
- Changed device id for CL_DVFS clocks to "cpu_cl_dvfs"

Bug 871124

Change-Id: Ife7883a096aef30c351704c960a153047d14284f
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/118471
Reviewed-by: Bo Yan <byan@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User

6 years agoARM: tegra11: dvfs: Re-factor CL-DVFS initialization
Alex Frid [Tue, 24 Jul 2012 03:16:14 +0000]
ARM: tegra11: dvfs: Re-factor CL-DVFS initialization

Moved clock binding for CL-DVFS control logic from common code
to SoC-specific DFLL clock initialization.

Instead of indirect access to safe dvfs table through CPU clock,
use direct access pointer in CL-DVFS object. This pointer is still
populated with CPI legacy dvfs reference.

Serialized DFLL initialization with CPU clock operations, since DFLL
is enabled as possible CPU clock source as a result of initialization.

Bug 871124

Change-Id: I90be05c27dcd9380403380f80c849f1d3f5b51e3
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/118470
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bo Yan <byan@nvidia.com>

6 years agoARM: tegra11: dvfs: Wait for CL_DVFS pending transaction
Alex Frid [Tue, 24 Jul 2012 19:48:03 +0000]
ARM: tegra11: dvfs: Wait for CL_DVFS pending transaction

When disabling CL-DVFS output interface, wait for pending I2C
transaction to complete.

Bug 871124

Change-Id: I7afebc0d218f29bd3efec04cf8dafd9fc767ece7
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/118469
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bo Yan <byan@nvidia.com>

6 years agoARM: tegra11: dvfs: Update CL-DVFS configuration
Alex Frid [Mon, 23 Jul 2012 23:23:39 +0000]
ARM: tegra11: dvfs: Update CL-DVFS configuration

- Account for gain control scale in force value calculation
- Use hs mode rate only as mode support indicator (allow zero
hs master code to be specified)
- Round up rate dividers so that final rate is always below
requested
- Fixed I2C divisor fields definitions

Bug 871124

Change-Id: I41721432e0fa74751342baced7bdda7fcf3a560e
Signed-off-by: Alex Frid <afrid@nvidia.com>

tmp

Change-Id: I6c7eb02622889aae10e11d7a8bccd755008e43ad
Reviewed-on: http://git-master/r/118468
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Bo Yan <byan@nvidia.com>

6 years agoarm: tegra: usb: removal of WAR for SOF
Suresh Mangipudi [Tue, 24 Jul 2012 06:19:49 +0000]
arm: tegra: usb: removal of WAR for SOF

NULL phy while switching from FS to HS will lead to incorrect line
state and a dropped packet. This issue is fixed in T11x.
Hence remove the WAR.

Bug 969330

Change-Id: I79bb3e311053252839d2c0474d6908b23337f8a4
Signed-off-by: Suresh Mangipudi <smangipudi@nvidia.com>
Reviewed-on: http://git-master/r/117939
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

6 years agoarm: tegra: usb: restore the AP/modem handshaking
Suresh Mangipudi [Tue, 24 Jul 2012 06:17:40 +0000]
arm: tegra: usb: restore the AP/modem handshaking

Restore the AP/modem handshaking functions and clean up the null
phy driver.

Bug 996035

Change-Id: I5a7f4af217b1ae99b56c6b82cdc4417cc20f5ca0
Signed-off-by: Suresh Mangipudi <smangipudi@nvidia.com>
Reviewed-on: http://git-master/r/117938
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

6 years agoARM: Tegra: remove CONFIG_TEGRA_CONVSERVATIVE_GOV_ON_EARLYSUPSEND
Varun Wadekar [Wed, 25 Jul 2012 07:36:09 +0000]
ARM: Tegra: remove CONFIG_TEGRA_CONVSERVATIVE_GOV_ON_EARLYSUPSEND

Android kernel v3.4 no longer supports early_suspend state. So we
cannot change the governor to achieve low power with display off
in the kernel. This has to happen from the user space when we
switch from interactive to non-interactive state.

Bug 959487

Change-Id: I4bdc7058a4bdbdd54c7856d83db78b44bf0ec110
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/118287
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

6 years agoARM: tegra11: Use CPU private timer for LP2
Bo Yan [Wed, 25 Jul 2012 01:32:12 +0000]
ARM: tegra11: Use CPU private timer for LP2

There is no new change for T20 and T30. For SoCs with arch timer
support, arch timer is used for LP2 accounting.

Also removed ARM_SMP_TWD option from Kconfig, it's no longer
necessary and deprecated.

Change-Id: I4292e333df97da296318224e0aa1411330f67900
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/118365
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>

6 years agoARM: Tegra: remove early_suspend/late_resume use
Varun Wadekar [Wed, 25 Jul 2012 07:24:41 +0000]
ARM: Tegra: remove early_suspend/late_resume use

Bug 959487

Change-Id: Iab813eab0f93a547bb5c94de46ea9a2e7edaab54
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/118286
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Bo Yan <byan@nvidia.com>

6 years agoarm: config: tegra20: Disable GART and SMMU
Bo Yan [Mon, 23 Jul 2012 20:14:49 +0000]
arm: config: tegra20: Disable GART and SMMU

This is to fix the broken T20 build.

Change-Id: I7970e95a22a2bac079fe064ee602112b0a4bb36d
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/117751
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Hiroshi Doyu <hdoyu@nvidia.com>
Tested-by: Hiroshi Doyu <hdoyu@nvidia.com>

6 years agoUSB: gadget: tegra: SW WAR for dTD issue
Krishna Yarlagadda [Mon, 18 Jun 2012 15:09:34 +0000]
USB: gadget: tegra: SW WAR for dTD issue

SW WAR implementation for h/w issue observed on all tegra platforms
Adding a dTD to a Primed Endpoint May Not Get Recognized

TD freeing will be delayed until next TD is completed

Bug 1002166
Bug 989108

(cherry-picked from  http://git-master/r/#change,109562)

Change-Id: I22690a15e2a7e83b4a3812a72242ef8c75f3626e
Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
Reviewed-on: http://git-master/r/117640
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-by: Rakesh Bodla <rbodla@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>

6 years agoMerge remote branch 'origin/dev/android-t114-3.4-next' into promotion_build
Rohan Somvanshi [Thu, 26 Jul 2012 17:22:18 +0000]
Merge remote branch 'origin/dev/android-t114-3.4-next' into promotion_build

6 years agoARM: tegra: nvmap: Add missing newline in kernel messages
Hiro Sugawara [Tue, 12 Jun 2012 20:23:50 +0000]
ARM: tegra: nvmap: Add missing newline in kernel messages

Change-Id: I96547276254c2d3c02d7b43f8eeb2ba6255e3c7d
Signed-off-by: Hiro Sugawara <hsugawara@nvidia.com>
Reviewed-on: http://git-master/r/118147
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bo Yan <byan@nvidia.com>

6 years agoARM: tegra: Increase meminfo array size
Hiro Sugawara [Tue, 24 Jul 2012 18:07:19 +0000]
ARM: tegra: Increase meminfo array size

SOCs supporting full 4GB physical memory need fragmented physical
memory information passed in kernel command line.

Change-Id: I19501a3f03db2467c746384cf1a9e390b1a6742d
Signed-off-by: Hiro Sugawara <hsugawara@nvidia.com>
Reviewed-on: http://git-master/r/118116
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

6 years agoARM: tegra: New macro name for LP2 timer config
Bo Yan [Tue, 24 Jul 2012 17:03:39 +0000]
ARM: tegra: New macro name for LP2 timer config

The config macro TEGRA_LP2_ARM_TWD was defined when only Cortex-A9
was used in Tegra SoC, but the feature enabled by this configuration
option is not just for Cortex-A9. In fact, any CPU with private timer
can make use of this feature. Therefore, change macro name to a more
generic one "TEGRA_LP2_CPU_TIMER" so it can be used with new CPU
architecture (CortexA15)

Change-Id: I6903dba056c554c72bb8d1416df90145a4043295
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/118099
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>

6 years agoARM: tegra11: clock: Add XUSB clocks support
Alex Frid [Tue, 17 Jul 2012 05:56:56 +0000]
ARM: tegra11: clock: Add XUSB clocks support

Change-Id: I754ad041eb884dcf6f8451cb595ab6f9d3c3626c
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/117735
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bo Yan <byan@nvidia.com>