7 years agovideo: tegra: host: refactor for upstreaming
Mayuresh Kulkarni [Mon, 13 Feb 2012 15:04:41 +0000]
video: tegra: host: refactor for upstreaming

- split the nvhost clients into their own directories
- each client is a nvhost_device and nvhost_driver
- all the code related to host1x control node is centralized
at single place in dev.c
- all the code related to host1x modules nodes is centralized
at single place in bus_client.c
- update the copyright notice & year for new files

Bug 871237

Change-Id: Ief85064699e35ad02b48a7e54496928d7f085af4
Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-on: http://git-master/r/83491
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

7 years agocpufreq: update target freq always
Shridhar Rasal [Mon, 19 Mar 2012 16:08:57 +0000]
cpufreq: update target freq always

set determined target freq always

bug 941275

Change-Id: If72936ed145867abd32b43c5c5100290df2fc187
Signed-off-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-on: http://git-master/r/91010
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Satya Popuri <spopuri@nvidia.com>
Reviewed-by: Peter Boonstoppel <pboonstoppel@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

7 years agoARM: tegra: cardhu: Enable Enter key if RCK mode
Ashwini Ghuge [Tue, 20 Mar 2012 05:46:52 +0000]
ARM: tegra: cardhu: Enable Enter key if RCK mode

Added support to change Power key to
Enter key in RCK mode

Bug 948270

Change-Id: I054aa98972494476ea26b5fd815032453a4231b0
Signed-off-by: Ashwini Ghuge <aghuge@nvidia.com>
Reviewed-on: http://git-master/r/90917
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User

7 years agoARM: tegra: Add support to identify if image RCK
Ashwini Ghuge [Mon, 19 Mar 2012 11:51:38 +0000]
ARM: tegra: Add support to identify if image RCK

With this change, we can identify if system
enters RCK mode in kernel.

Bug 948270

Change-Id: I4240fd4171b6b71fbc5f1271f21a588d62db88b1
Signed-off-by: Ashwini Ghuge <aghuge@nvidia.com>
Reviewed-on: http://git-master/r/90914
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoARM: tegra: clock: Update parameterized cluster switch
Alex Frid [Sun, 26 Feb 2012 08:23:37 +0000]
ARM: tegra: clock: Update parameterized cluster switch

Adjusted CPU rate during parametrized (enforced from sysfs) cluster
switch, so that target rate meets min/max constraints on both sides
of the switch. Updated local timer rate accordingly.

Bug 945975

Signed-off-by: Alex Frid <afrid@nvidia.com>
(cherry picked from commit c27f5a2e7380cb667f1f6a4ba61daf67c63ef2d4)

Change-Id: I130ec1a32ecaf8adfd7eff1ec2042f569b54ac54
Reviewed-on: http://git-master/r/90805
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agovideo: tegra: dsi: Clear host trigger bit explicitly on fifo empty
Animesh Kishore [Wed, 14 Mar 2012 11:25:12 +0000]
video: tegra: dsi: Clear host trigger bit explicitly on fifo empty

dsi HW does not clear host trigger bit automatically
on dsi interface disable if host fifo is empty.
This leads to hang. Clearing the bit explicitly.

Bug 930453

Change-Id: Id24359dc274f187f8ac634ad838ef4a6a29a6a5e
Signed-off-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-on: http://git-master/r/90043
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User

7 years agoARM: tegra: Add AHB EMEM to MC Flush Register IO
Rakesh Bodla [Mon, 6 Feb 2012 10:51:03 +0000]
ARM: tegra: Add AHB EMEM to MC Flush Register IO

Add the AHB EMEM to MC Flush Register
area to the statically mapped io regions

Bug 729267

Change-Id: I86542cd3ffec587e7213cbc34129e8b5124aab9c
Signed-off-by: Rakesh Bodla <rbodla@nvidia.com>
Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
Reviewed-on: http://git-master/r/88283
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

7 years agoARM: tegra: clock: Fix activity monitor resume
Alex Frid [Mon, 12 Mar 2012 19:01:17 +0000]
ARM: tegra: clock: Fix activity monitor resume

Properly restore Tegra3 actmon sampling period after suspend.

Bug 952739

Signed-off-by: Alex Frid <afrid@nvidia.com>
(cherry picked from commit eb6e96a39dbc5d310e8e59046d6e1b787b780e60)

Change-Id: I6a61c2aa1d384a8d17d7ef579000cf59ac218435
Reviewed-on: http://git-master/r/90804
Tested-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

7 years agoarm: tegra: fuse: let ODM production mode be world readable
Chris Johnson [Sat, 10 Mar 2012 01:52:50 +0000]
arm: tegra: fuse: let ODM production mode be world readable

Also, fixup some of the bit offsets that were leading to incorrect
values being returned from get_fuse() on T20/T30.

Bug 912862

Signed-off-by: Chris Johnson <cwj@nvidia.com>
Reviewed-on: http://git-master/r/89283
(cherry picked from commit f6323c7f32017b51202d478671cbf366beb0b0f5)

Change-Id: Ieb9f92e36760cbc470d63257d26c09388cec7e1e
Reviewed-on: http://git-master/r/90762
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Chris Johnson <cwj@nvidia.com>
Tested-by: Chris Johnson <cwj@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

7 years agoarm: tegra: nvmap: Update nvmap_alloc api.
Krishna Reddy [Fri, 16 Mar 2012 02:14:53 +0000]
arm: tegra: nvmap: Update nvmap_alloc api.

Update nvmap_alloc api to take heap_mask as arg.
This is to let clients specify the specific heap needed.

Change-Id: I9950b3e60e6dac0301b6dc66be3e9d0bab8e0fee
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/90471
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User

7 years agovideo: tegra: host: Fix sync point comparison
Terje Bergstrom [Mon, 20 Feb 2012 12:50:26 +0000]
video: tegra: host: Fix sync point comparison

Fix sync point comparison to take into account old expired values, and
do proper comparison taking into account wrapping.

Bug 941327

Change-Id: I70724637ba870b2e29bac695abc0ea2b968394d7
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/84808
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Ilan Aelion <iaelion@nvidia.com>
Reviewed-by: Acorn Pooley <apooley@nvidia.com>

7 years agoarm: tegra: enable pll_p clocks by default
Peter Zu [Mon, 6 Feb 2012 06:10:42 +0000]
arm: tegra: enable pll_p clocks by default

Setting pll_p init state to false may cause lp0 resume issue when
cpu_restore_complex tries to restore pll_p state on CPU cluster
switching.

Bug 932820

Signed-off-by: Peter Zu <pzu@nvidia.com>
Reviewed-on: http://git-master/r/86904
(cherry picked from commit 939e6c177927a4731b043ac77543f075ac17fca2)

Change-Id: I4513470515a20edcf54a9aa11a54e65838012fe5
Reviewed-on: http://git-master/r/90568
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

7 years agovideo: tegra: nvmap: Optimze nvmap page pool shrink time
Krishna Reddy [Fri, 9 Mar 2012 07:51:51 +0000]
video: tegra: nvmap: Optimze nvmap page pool shrink time

Bug 925987

Change-Id: Ifab4e515c7dd06b92d798e7eb93094c35e02b878
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/89414
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoDrivers: MTD: NAND: restore to the NAND controller
Ramalingam C [Mon, 19 Mar 2012 06:18:27 +0000]
Drivers: MTD: NAND: restore to the NAND controller

On entering the power saving mode NAND controller registers are getting reset.
With this change resume will restore the controller registers' values.

Bug 933291

Change-Id: Ia1a43827b4b4a91ab1383bf07c3c0fe3068b666b
Signed-off-by: Ramalingam C <ramalingamc@nvidia.com>
Reviewed-on: http://git-master/r/90883
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>
Reviewed-by: Preetham Chandru <pchandru@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

7 years agoARM: tegra3: dvfs: Changed max values of clocks
Mohit Kataria [Tue, 10 Jan 2012 12:05:24 +0000]
ARM: tegra3: dvfs: Changed max values of clocks

Changed clock frequency of some clocks as per
Automotive POR.

Bug 882186

Signed-off-by: Mohit Kataria <mkataria@nvidia.com>
Reviewed-on: http://git-master/r/75210
(cherry picked from commit 9cc17e9cddfedc6fe977f103c5e21ae3f82c3496)

Change-Id: Ibb0e79e75c2fca7d9f09d373c163ef08cc636819
Reviewed-on: http://git-master/r/90490
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Tested-by: Mohit Kataria <mkataria@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>

7 years agovideo: tegra: clean-up warnings and code style
Jon Mayo [Tue, 13 Mar 2012 01:42:28 +0000]
video: tegra: clean-up warnings and code style

fix some build warnings and bad code style.

Change-Id: I907296ce0e5437dfd6acd0b2b3c119b6dbde7b1c
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/89634
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

7 years agoARM: tegra: disable proximity sensor in defconfig
Winnie Hsu [Tue, 6 Mar 2012 01:19:02 +0000]
ARM: tegra: disable proximity sensor in defconfig

Disable isl29028 proximity sensor.

bug 946330

Change-Id: I7a5d9f1defbb1de5f02fe851f7a24cd70d49d47b
Signed-off-by: Winnie Hsu <whsu@nvidia.com>
Reviewed-on: http://git-master/r/87897
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

7 years agoregulator: tps65910: Provide settling time for DCDC voltage change
Laxman Dewangan [Wed, 14 Mar 2012 07:30:58 +0000]
regulator: tps65910: Provide settling time for DCDC voltage change

Settling time is require when there is dcdc rail's voltage change.
Returning proper delay time for dcdc voltage change to settle down
the output voltage to new value.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit 18039e0f16d50c8243fe0388a587c25a3b155ece)

Change-Id: Ibd67d2661dd1d5b014754c221d44963baeb13726
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/90518
Reviewed-by: Automatic_Commit_Validation_User

7 years agoregulator: tps65910: Provide settling time for enabling rails
Laxman Dewangan [Tue, 13 Mar 2012 06:05:20 +0000]
regulator: tps65910: Provide settling time for enabling rails

There is settling time for each rails when it is switched to
ON. Implementing enable time for returning proper settling time
of regulator rails when it is enabled.
Filling the on-time for each rail as per tps65910/tps65911
datasheets.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit 0651eed5e094a079a0a9fccd80a41cb3e7f2aa99)

Change-Id: Ibdb05171cfb4c4e7a064c8f65193647997e8e9a8
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/90517
Reviewed-by: Automatic_Commit_Validation_User

7 years agoregulator: Fix the logic of tps65910_get_mode
Axel Lin [Mon, 12 Mar 2012 23:15:27 +0000]
regulator: Fix the logic of tps65910_get_mode

We actually clear LDO_ST_ON_BIT for standby mode in tps65910_set_mode.
Fix the logic in tps65910_get_mode.

Supply state (EEPROM bits):
ST[1:0] = 00 : Off
ST[1:0] = 01 : On high power (ACTIVE)
ST[1:0] = 10 : Off
ST[1:0] = 11 : On low power (SLEEP)

Signed-off-by: Axel Lin <axel.lin@gmail.com>
Acked-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit 585993932ccc44ab6a8c6dc590a2f3d6b2facb41)

Change-Id: I1cb46d05396a286ba34c84b1836b9070f0f78003
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/90516
Reviewed-by: Automatic_Commit_Validation_User

7 years agoregulator: Rename set_voltage_sel callback function name to *_sel
Axel Lin [Fri, 9 Mar 2012 02:22:20 +0000]
regulator: Rename set_voltage_sel callback function name to *_sel

This change improves readability.

Signed-off-by: Axel Lin <axel.lin@gmail.com>
Acked-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>

Cherry-picked from mainline
94732b97c39859427cf99c34fc9de9750be7e5a5

Change-Id: Ie3eb5462a99cceab40ba0e26e4e3cdb93c5f3f0f
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/90515
Reviewed-by: Automatic_Commit_Validation_User

7 years agoarm: tegra: p1852: Add proc interface for board specific info
Bob Johnston [Thu, 15 Mar 2012 17:45:52 +0000]
arm: tegra: p1852: Add proc interface for board specific info

1) /proc/board_serial will have the board serial number.
2) /proc/skuinfo will have 18 character sku information.
3) /proc/skuver will have 2 character sku version number.
4) /proc/prodinfo will have product information
5) /proc/prodver will have product version number.

bug 931053

Change-Id: I7daccf932d3ee55b13c89eb4aaa519f51d8dba3e
Signed-off-by: Bob Johnston <bjohnston@nvidia.com>
Reviewed-on: http://git-master/r/90378
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoarm: tegra: p1852: instantiated audio drivers
Nitin Pai [Thu, 15 Mar 2012 05:27:11 +0000]
arm: tegra: p1852: instantiated audio drivers

Instantiated audio drivers for I2S and AHUB.
Instantiated the machine driver for P1852 boards.
Added clocks that were not initialized by QB which are needed to be on.

Bug 948478

Change-Id: I6e696f97ed114ae684a74d9b9869066606dfaa22
Signed-off-by: Nitin Pai <npai@nvidia.com>
Reviewed-on: http://git-master/r/90252
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Manoj Chourasia <mchourasia@nvidia.com>
Reviewed-by: Bob Johnston <bjohnston@nvidia.com>
Tested-by: Bob Johnston <bjohnston@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>

7 years agoiommu: tegra/gart: use correct gart_device
Vandana Salve [Wed, 14 Mar 2012 12:47:53 +0000]
iommu: tegra/gart: use correct gart_device

Pass the correct gart device pointer.

Change-Id: Ia54c3df7ce013855bf8843161f5ee0816482bda6
Reviewed-on: http://git-master/r/90064
Reviewed-by: Vandana Salve <vsalve@nvidia.com>
Tested-by: Vandana Salve <vsalve@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

7 years agoARM: tegra3: cardhu: Enable TPS65910 configs
Laxman Dewangan [Wed, 14 Mar 2012 11:35:15 +0000]
ARM: tegra3: cardhu: Enable TPS65910 configs

In order to use the mainline tps65910 driver for PMIC and
getting rid of NV's tps6591x driver, enabling config
variable for TPS65910 mfd and regulator driver.

bug 927501

Change-Id: I0dc30b248f648d554024adfdf7beb2dc3db7e844
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/90049
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoarm: tegra: configs: Enable LTR558 ALS
Sachin Nikam [Wed, 14 Mar 2012 08:16:57 +0000]
arm: tegra: configs: Enable LTR558 ALS

Enable CONFIG_SENSORS_LTR558 for Ambient Light and Proximity Sensor.

Bug 901133

Change-Id: I66245046add9ada58064490fa154c9b2190e15b9
Signed-off-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-on: http://git-master/r/89994
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agovideo: tegra: host: disable 3d powergating
Donghan Ryu [Tue, 6 Mar 2012 05:33:40 +0000]
video: tegra: host: disable 3d powergating

this is a workaround for the SLI scissor bug which can happen
intermittently.

Bug 914785

Change-Id: I5b7071df5bbfdd03bfe8b6f6b12ac7279221bd4e
Signed-off-by: Donghan Ryu <dryu@nvidia.com>
Reviewed-on: http://git-master/r/87968
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User

7 years agoARM: tegra: fuse: Implement caching of fuse sku_id
Laxman Dewangan [Tue, 13 Mar 2012 03:19:12 +0000]
ARM: tegra: fuse: Implement caching of fuse sku_id

In place of reading the sku id from the fuse every time,
read once and stored it for future use.

Based on orginal change from Simon Je's
http://git-master/r/#change,51502

bug 950922
bug 949620

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/89647
(cherry picked from commit 8eda0d2b574f7dda5975115ba6990790a2d4e1cc)

Change-Id: I4aed1a7c34008b4b3f4df17f7a41e3446ad8fe4f
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/90305
Reviewed-by: Automatic_Commit_Validation_User

7 years agospi: tegra: Make sure SCLK frequency to be in minimum require value.
Laxman Dewangan [Thu, 15 Mar 2012 09:42:38 +0000]
spi: tegra: Make sure SCLK frequency to be in minimum require value.

Making sure that SCLK frequency should be maintain on minimum
require value during spi transfer. This is require to proper
functioning of spi controller.

bug 949393

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/89526

Cherry-picked from commit
7d83f658b39b2ab1a5105eec7649246fddea7325

Change-Id: I60fa0fef98e5f2882c646c29e1773194deddd6da
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/90296
Reviewed-by: Automatic_Commit_Validation_User

7 years agoARM: tegra: common: Set SCLK to 40MHz for spi
Laxman Dewangan [Mon, 12 Mar 2012 17:33:55 +0000]
ARM: tegra: common: Set SCLK to 40MHz for spi

Setting sclk frequency for spi to 40MHz.

bug 949393

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/89525
cherry-picked from
171f5693e4137e9fe5a8b4e496c0c5db3b7838f1

Change-Id: I34808a64b834111dfff1592dd9244a45e9d3312c
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/90295
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agovideo: tegra: dsi: Add checks to dsi for HOST1X power
Terje Bergstrom [Tue, 28 Feb 2012 15:25:07 +0000]
video: tegra: dsi: Add checks to dsi for HOST1X power

Add checks to ensure host1x is powered when DSI is used.

Change-Id: I2e61abdd5c0741571fb18262fd2efa16ffee71d9
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/86361
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoARM: tegra: clock: Entry for spi-sclk clock control
Laxman Dewangan [Mon, 12 Mar 2012 17:32:59 +0000]
ARM: tegra: clock: Entry for spi-sclk clock control

Tegra's spi requires some minimum sclk clock frequency for
proper functioning.
Making entry for spi-sclk clock so that spi driver can get the
proper clock for controlling the minimum rate of sclk.

bug 949393

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/89524
(cherry picked from commit 542cbe457b1b19b8fdf8cbf193e38a00027060c2)

Change-Id: I3f829b36b1b42bb8b1c6e4e21745855e113c17c1
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/90294
Reviewed-by: Automatic_Commit_Validation_User

7 years agoRevert "crypto: testmgr: add support for aes ofb mode"
Mallikarjun Kasoju [Wed, 14 Mar 2012 13:49:25 +0000]
Revert "crypto: testmgr: add support for aes ofb mode"

This reverts commit 2afef0391f30a2831f8beed6a89351682c8a81f6.

Change-Id: Ieef8fd28ba78334a4a0a1b7c64ba6fd4d0f4cb05
Reviewed-on: http://git-master/r/90082
Reviewed-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Tested-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

7 years agovideo: tegra: host: Refactor context handling logic
Terje Bergstrom [Tue, 21 Feb 2012 08:21:18 +0000]
video: tegra: host: Refactor context handling logic

Currently nvhost hard codes usage of context handler and sync point
id. Split the context handler and context structures into generic and
host1x specific parts, and move the allocation to happen via a
function pointer in nvhost_device.

Also updates gr3d and mpe to use sync point id and waitbase from
nvhost_device.

Bug 926690

Change-Id: I7f00b450cac99f3816baa27b37ee4e4cf68cfe24
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/84901
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoarm: config: tegra3: enable wl12xx gps char driver
Rakesh Goyal [Wed, 14 Mar 2012 16:08:19 +0000]
arm: config: tegra3: enable wl12xx gps char driver

Bug 933797

Change-Id: I13c066f9902af43e1958a445dcb2b8e710b6e644
Signed-off-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-on: http://git-master/r/90117
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agovideo: tegra: nvmap: Fix issue in handle_page_alloc
Krishna Reddy [Tue, 13 Mar 2012 00:02:44 +0000]
video: tegra: nvmap: Fix issue in handle_page_alloc

Fix race condition in handle_page_alloc. Page allocations
should not try allocate from pool, once it fails for a
request. If it tries and allocation passes during subsequent
attempts, the page_index is not valid for CPA and cache won't be
flushed for all the necessary pages.

Change-Id: I5548e11b713f271cc8473a3f2ae193a69e832f99
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/89611
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoGPS: GPS Char Driver for Texas Instrument's Connectivity Chip.
Satish Chandra [Tue, 13 Mar 2012 12:10:13 +0000]
GPS: GPS Char Driver for Texas Instrument's Connectivity Chip.

This enables the GPS driver for TI WL128x BT/FM/GPS combo devices.
It will provide a character device for the TI GPS host software to
access the GPS core on the WL128x.
Bug 933797

Change-Id: If0ea53a1b246a88fc895a95599d8bd38689b72fc
Signed-off-by: Satish Chandra <x0141690@ti.com>
Reviewed-on: http://git-master/r/90110
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-by: Maria Bornski <mbornski@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

7 years agonet: wireless: bcmdhd: disable WLC_E_TXFAIL event.
Narayan Reddy [Wed, 14 Mar 2012 13:28:18 +0000]
net: wireless: bcmdhd: disable WLC_E_TXFAIL event.

In suspend mode WLC_E_TXFAIL event is causing autowake
when the device is connected to an AP,so discarding the
WLC_E_TXFAIL event initialization as per BRCM team suggestion.

Bug 880970
Bug 941420

Change-Id: I5db727004873a77b8b264e7dde2525e678519c54
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: http://git-master/r/90074
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

7 years agoarm: tegra: cardhu: registering ALS based on board sku
Sachin Nikam [Wed, 14 Mar 2012 07:29:00 +0000]
arm: tegra: cardhu: registering ALS based on board sku

If board_info.sku is 0xb11 this board has ltr558 ALS on it
else isl29028 sensor.

Bug 901133

Change-Id: Id0fb5b59b55393e52147e7f9d8d114651a5e0561
Signed-off-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-on: http://git-master/r/89977
Reviewed-by: Automatic_Commit_Validation_User

7 years agopower: smb349: fix otg driver callback function
Syed Rafiuddin [Fri, 9 Mar 2012 11:08:09 +0000]
power: smb349: fix otg driver callback function

Allows OTG enable/disable only while USB OTG state
swithes between SUSPEND and HOST

Bug 937188

Change-Id: If651dfb19db37f8822e6d1473aa573246aca8d45
Signed-off-by: Syed Rafiuddin <srafiuddin@nvidia.com>
Reviewed-on: http://git-master/r/89111
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

7 years agoARM: tegra: defconfig: disable kernel debug features
Shridhar Rasal [Wed, 14 Mar 2012 12:51:55 +0000]
ARM: tegra: defconfig: disable kernel debug features

Following debug features are disabled:

- DETECT_HUNG_TASK
- DEBUG_SLAB
- DEBUG_MUTEXES
- DEBUG_SG

This helps in CPU performance boost. Most of these were already
disabled for tegra3.

Reviewed-on: http://git-master/r/76534
(cherry picked from commit 3ba53a37cfc02b44fe12db03a786b59b82152efd)

Change-Id: Ia1725b9f86d2d3132ecc77b826c70364cc9bca01
Signed-off-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-on: http://git-master/r/90065
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

7 years agovideo: tegra: hdmi: validate clocks per frame of HDMI mode
Youngjin Kim [Fri, 9 Mar 2012 07:30:09 +0000]
video: tegra: hdmi: validate clocks per frame of HDMI mode

There are HDMI modes which have different margin/sync values
although resolution and pixel clock are the same. One example
is 1080p/24Hz and 1080p/30Hz case.

Those modes are not distinguished when we check if given two
modes are equal. So clocks per frame also should be validated
to decide sameness of the modes.

Bug 950935

Signed-off-by: Youngjin Kim <nkim@nvidia.com>
Reviewed-on: http://git-master/r/89026
(cherry picked from commit b9e6316850a47445be7545aaec85c6a247c44cb9)
Change-Id: I06d3c0f41e63d65f1908614d09df4d16028895f0
Reviewed-on: http://git-master/r/90030
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

7 years agoASoC: Tegra wm8903 machine: suspend/resume code for HP detection
Ankit Gupta [Wed, 14 Mar 2012 07:00:08 +0000]
ASoC: Tegra wm8903 machine: suspend/resume code for HP detection

Suspend and resume code included for headphone detection. Earlier,
it was causing problem in HP detection when device enters into LP0
state and headphone is plugged in. (Bug 937153)

Change-Id: If625f0e7b857b40b0535f8bc8d1c262650886fa7
Signed-off-by: Ankit Gupta <ankitgupta@nvidia.com>
Reviewed-on: http://git-master/r/89975
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sumit Bhattacharya <sumitb@nvidia.com>
Reviewed-by: Scott Peterson <speterson@nvidia.com>

7 years agoarm: tegra: kai: ehci0 USB host default enable
Chandler Zhang [Wed, 14 Mar 2012 05:13:01 +0000]
arm: tegra: kai: ehci0 USB host default enable

set ehci 0 USB host mode to default enable

Bug 937188

Change-Id: I89a3886df7b9a6574ab9f293e5b6164007990be4
Signed-off-by: Chandler Zhang <chazhang@nvidia.com>
Reviewed-on: http://git-master/r/89968
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

7 years agoarm: tegra: enterprise: Add rated refresh rate for one-shot mode.
Kevin Huang [Tue, 13 Mar 2012 22:39:52 +0000]
arm: tegra: enterprise: Add rated refresh rate for one-shot mode.

Bug 946370
Bug 934977

Change-Id: I33d1b15dc3d7612f44e79da04a13bae6d3446dc7
Signed-off-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-on: http://git-master/r/89879
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

7 years agoARM: kernel: flush console and disable irqs before machine_shutdown
Tom Cherry [Tue, 13 Mar 2012 22:31:08 +0000]
ARM: kernel: flush console and disable irqs before machine_shutdown

Bug 952455

Change-Id: I7400b519eccb274c1b5251032696e10e16ee1c42
Signed-off-by: Tom Cherry <tcherry@nvidia.com>
Reviewed-on: http://git-master/r/89876
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bo Yan <byan@nvidia.com>
Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>

7 years agoARM: tegra: use common console flush on reboot
Tom Cherry [Tue, 13 Mar 2012 22:23:20 +0000]
ARM: tegra: use common console flush on reboot

Bug 952455

Change-Id: I5272bdf2fc726994f3a22fd42671bb807bc30a21
Signed-off-by: Tom Cherry <tcherry@nvidia.com>
Reviewed-on: http://git-master/r/89875
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

7 years agovideo: tegra: dc: Add rated refresh rate for one-shot mode.
Kevin Huang [Tue, 13 Mar 2012 22:01:00 +0000]
video: tegra: dc: Add rated refresh rate for one-shot mode.

We add this variable for two purposes. First, it would remind developer
to make sure actual refresh rate is larger than rated refresh rate.
Second, gralloc would read rated refresh rate for one-shot mode since
actual refresh rates of most devices are expected running at rated
refresh rate.

Bug 946370
Bug 934977

Change-Id: Ib4121337df1a388b40440b22687c39f373f08890
Signed-off-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-on: http://git-master/r/89871
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

7 years agovideo: tegra: dsi: Add phy timing check for hblank
Animesh Kishore [Tue, 13 Mar 2012 15:02:41 +0000]
video: tegra: dsi: Add phy timing check for hblank

Horizontal blank must be greater than phy timing for
HS transmission.

Bug 938043

Change-Id: I5afe68ec04341f7b83c2897c586d4618bd518222
Signed-off-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-on: http://git-master/r/89789
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

7 years agovideo: tegra: dsi: Fix phy timing HW increment
Animesh Kishore [Tue, 13 Mar 2012 11:29:48 +0000]
video: tegra: dsi: Fix phy timing HW increment

Adding support to accomodate hw increment to
phy timing reg values.

Bug 938043

Change-Id: I8de14648c0994b03c37a2ee455a656ff11c3cc34
Signed-off-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-on: http://git-master/r/89741
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

7 years agoARM: tegra: clock: Add tegra_cpu_user_cap_set function
Jinyoung Park [Fri, 2 Mar 2012 05:17:09 +0000]
ARM: tegra: clock: Add tegra_cpu_user_cap_set function

To set cpu_user_cap in tegra drivers, added tegra_cpu_user_cap_set
function.

Bug 945552

Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/87109
(cherry picked from commit db954aafdfdbe1fa122466b8e8ec4ea4273efb90)

Change-Id: I765c44de4ed4ae908ef56914db53533605bd6d88
Reviewed-on: http://git-master/r/89740
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

7 years agovideo: tegra: host: Replace license information
Terje Bergstrom [Tue, 13 Mar 2012 11:49:02 +0000]
video: tegra: host: Replace license information

Replace license information in nvhost with GPLv2. Also adds
copyright year 2012 in files which have been changed in 2012.

Change-Id: I86e8ed27095df13d99e0250e57e244d531fdacec
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/89735
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

7 years agoARM: tegra: power: Set awake system CPU rate floor
Wen Yi [Mon, 12 Mar 2012 23:27:02 +0000]
ARM: tegra: power: Set awake system CPU rate floor

Set CPU rate floor to 100MHz when the system is awake (after boot,
or on late resume). Remove the floor when the system enters early
suspend.

Bug 922351

Change-Id: Ibaca50791a5b04b4b4165ceac5018d4cfd7c1bcf
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/89587
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

7 years agopower: max17048: update charging status at probe
Chandler Zhang [Mon, 12 Mar 2012 09:12:15 +0000]
power: max17048: update charging status at probe

Add update charging status at probe to fix unknown charging status.

Bug 951750

Change-Id: I5d828b38adfe74531925be4356d50214f8f8522e
Signed-off-by: Chandler Zhang <chazhang@nvidia.com>
Reviewed-on: http://git-master/r/89437
Reviewed-by: Syed Rafiuddin <srafiuddin@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

7 years agopower: smb349: add callback to update charger
Chandler Zhang [Mon, 12 Mar 2012 09:05:16 +0000]
power: smb349: add callback to update charger

Add update_charger_status() function callback to fix unknown
charging status at start up issue.

Bug 951750

Change-Id: Ib264479b0a251a07d136c245afa85c3444754ee0
Signed-off-by: Chandler Zhang <chazhang@nvidia.com>
Reviewed-on: http://git-master/r/89436
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

7 years agovideo: tegra: host: Disable irq on shutdown
Terje Bergstrom [Mon, 12 Mar 2012 05:49:47 +0000]
video: tegra: host: Disable irq on shutdown

Disable interrupts when driver is being removed.

Bug 952600

Change-Id: I1d697c3c87aca935deadfe20b5e8fa8852b0e556
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/89405
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>
Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>

7 years agoarm: tegra: kai: add ti_bluesleep support
Rakesh Goyal [Sat, 10 Mar 2012 02:39:57 +0000]
arm: tegra: kai: add ti_bluesleep support

Add ti_bluesleep support
Remove plat_kim_suspend and plat_kim_resume
Remove return from functions with void return type

Bug 933054
Bug 931931

Change-Id: I847e39de7444fe62ecd91f5e039f7b85ca64f1cf
Signed-off-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-on: http://git-master/r/89284
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
Tested-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User

7 years agoarm: config: tegra: enable BT_TIBLUESLEEP
Rakesh Goyal [Sat, 10 Mar 2012 02:22:06 +0000]
arm: config: tegra: enable BT_TIBLUESLEEP

Bug 933054
Bug 931931

Change-Id: I3875000a1b109e3180d8f7481efc9b3083358bd8
Signed-off-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-on: http://git-master/r/89281
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

7 years agomisc: bluetooth: clean ti_bluesleep patch
Rakesh Goyal [Sat, 10 Mar 2012 01:33:17 +0000]
misc: bluetooth: clean ti_bluesleep patch

Remove dead code
Remove whitespace
Remove platform callback function and add wake_lock/wake_unlock
Fix compilation warnings

Bug 933054
Bug 931931

Change-Id: I5b0947ad2053f9e0437ffe89879df2c84786ec9c
Signed-off-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-on: http://git-master/r/89274
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
Tested-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

7 years agocpufreq: Add a knob to treat IO wait as busy
satya popuri [Fri, 9 Mar 2012 18:57:31 +0000]
cpufreq: Add a knob to treat IO wait as busy

The new sysfs node io_is_busy enables the interactive governor to
account any time spent by the CPU waiting for IO as non-idle time.
This helps us improve run-time of IO bound tasks by making up for
lost IO time in speeding up the CPU bound parts of the task.

Reviewed on http://git-master/r/#change,86894
cherry picked from 13a15aadc1134b5dae05cdcf9687396644f87411
Signed-off-by: satya popuri <spopuri@nvidia.com>

Change-Id: I4a14ed7fef5fbce00054bb02d52d2d3e0f011f70
Reviewed-on: http://git-master/r/89218
Reviewed-by: Satya Popuri <spopuri@nvidia.com>
Tested-by: Satya Popuri <spopuri@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

7 years agocpufreq: change min_sample_time
satya popuri [Fri, 9 Mar 2012 18:41:33 +0000]
cpufreq: change min_sample_time

We prefer a min_sample_time of 30ms. This is tied to our cluster switch
and auto-hotplug artificial delays.

Signed-off-by: satya popuri <spopuri@nvidia.com>

original commit message:

cpufreq: reduce min_sample_time

Reduce the minimum amount of time the interactive governor spends at a
frequency before ramping down. This parameter (min_sample_time) was 80ms
now reduced to 30 ms based on perf and power sweep numbers.

Reviewed-on: http://git-master/r/86900 (cherry picked from commit
581f20a5b7b8c3e4ee2c211b28dbc81510af2ae7).
Signed-off-by: satya popuri <spopuri@nvidia.com>

Change-Id: I24f4cd52737950fd4e78a36b4ee34a84551e0e12
Reviewed-on: http://git-master/r/89217
Reviewed-by: Satya Popuri <spopuri@nvidia.com>
Tested-by: Satya Popuri <spopuri@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

7 years agoTI Wl128x support of bluesleep & Wake on BT Driver changes
Anjan Rao [Mon, 5 Mar 2012 12:41:13 +0000]
TI Wl128x support of bluesleep & Wake on BT Driver changes

Bug 933054
Bug 931931

Change-Id: Id84bcc1791114a50d26547de41daeb4774f6026b
Signed-off-by: Anjan Rao <anjan.rao@ti.com>
Reviewed-on: http://git-master/r/89136
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
Tested-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

7 years agopower: smb349: set PGOOD to active low at OTG
Chandler Zhang [Fri, 9 Mar 2012 07:48:42 +0000]
power: smb349: set PGOOD to active low at OTG

1. Turn PGOOD to active low when OTG is enabled
2. Free irq in error handling and smb349_remove

Bug 937188

Change-Id: I94a58c8dfd9066034335ec4507b80d1607fe029f
Signed-off-by: Chandler Zhang <chazhang@nvidia.com>
Reviewed-on: http://git-master/r/89028
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

7 years agodtv: Added description for interface configuration
Adam Jiang [Wed, 29 Feb 2012 02:07:36 +0000]
dtv: Added description for interface configuration

fixed bug 947324

Change-Id: Ib85ee5d7e67def321cbde49ad41e2b194e1bd2e8
Signed-off-by: Adam Jiang <chaoj@nvidia.com>
Reviewed-on: http://git-master/r/86483
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User

7 years agortc: max77663: Use alrm->enabled flag to enable rtc alarm irq
Jinyoung Park [Tue, 6 Mar 2012 14:02:12 +0000]
rtc: max77663: Use alrm->enabled flag to enable rtc alarm irq

Use alrm->enabled flag to enable rtc alarm irq in rtc_set_alrm function.

Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/88048
(cherry picked from commit 41e8686fc049fbdc0e83ecfa3f68da06ff813b99)

Change-Id: Ieb3b9863233b9d5bfc06459ef479c47a5e700d3b
Reviewed-on: http://git-master/r/89739
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

7 years agortc: max77663: Update read buffer before read RTC IRQ status register
Jinyoung Park [Tue, 6 Mar 2012 12:54:26 +0000]
rtc: max77663: Update read buffer before read RTC IRQ status register

To get actual current RTC IRQ status, it have to update read buffer
before read RTC IRQ status register.

Bug 918156
Bug 924219

Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/88037
(cherry picked from commit 50528b7d136624ef0014deecba18d7bd9b8d8cc8)

Change-Id: I5ffcc9b24fec0f3688f641ab9f7cf82a69d77aeb
Reviewed-on: http://git-master/r/89738
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

7 years agoarm: tegra: ventana: use fixed regulator instead of direct gpio
Pritesh Raithatha [Tue, 13 Mar 2012 11:47:46 +0000]
arm: tegra: ventana: use fixed regulator instead of direct gpio

Bug 925547

Change-Id: I81f87cef3a9767d9bd60b72e33a23620392ab5fc
Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>
Reviewed-on: http://git-master/r/89736
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

7 years agoASoC: tegra: p1852: Add P1852-board machine driver
Nitin Pai [Mon, 12 Mar 2012 11:54:04 +0000]
ASoC: tegra: p1852: Add P1852-board machine driver

Added machine driver for P1852 board.
The driver supports a plug/play architecture where the
details of the codec_driver/codec_dai will come from the top level
board config file.

Bug 948478

Change-Id: Id34a34b224e02b61475ca17253c1b13893a09e6c
Signed-off-by: Nitin Pai <npai@nvidia.com>
Reviewed-on: http://git-master/r/89474
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

7 years agoarm: tegra: add support for P1852 machine driver
Nitin Pai [Mon, 12 Mar 2012 11:49:53 +0000]
arm: tegra: add support for P1852 machine driver

Added support for the platform data that needs to be passed for the
ASoC P1852 machine driver

Bug 948478

Change-Id: Iac2c0310bf87ceddb892fd4b1ed3c0890558f97b
Signed-off-by: Nitin Pai <npai@nvidia.com>
Reviewed-on: http://git-master/r/89473
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

7 years agoARM: tegra: power: Boost CPU rate before device resume
Alex Frid [Tue, 28 Feb 2012 21:52:58 +0000]
ARM: tegra: power: Boost CPU rate before device resume

Boost CPU frequency in tegra platform resume finish phase, just
before driver resume. Boost level is specified by platform suspend
data (ignored if 0).

Bug 946301

Signed-off-by: Alex Frid <afrid@nvidia.com>
(cherry picked from commit eaedf228861e4456454ca13f0958ed97e799fc59)

Change-Id: Ica0cff28f9651e38787ec98f54563d95d876d79e
Reviewed-on: http://git-master/r/89353
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

7 years agoARM: tegra: power: Use CPU G mode in suspend prepare
Alex Frid [Tue, 28 Feb 2012 19:33:07 +0000]
ARM: tegra: power: Use CPU G mode in suspend prepare

Switch to CPU G mode in Tegra3 suspend prepare if CPU suspend
rate is high enough. By symmetry, it guarantees that device
resume will be happening in G mode as well.

Bug 946301

Signed-off-by: Alex Frid <afrid@nvidia.com>
(cherry picked from commit 082be3604056c39442e1b42f5cfceeb089ffdaae)

Change-Id: I42e37ce8847e4916dd0fca9e4bd44096b65f7032
Reviewed-on: http://git-master/r/89352
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

7 years agoARM: tegra: clock: Update Tegra3 CPU suspend rate
Alex Frid [Mon, 6 Feb 2012 22:45:06 +0000]
ARM: tegra: clock: Update Tegra3 CPU suspend rate

Set Tegra3 CPU suspend entry rate to maximum LP mode rate - speed up
suspend, and still allow to switch to LP CPU mode on suspend entry.

Bug 946301

Signed-off-by: Alex Frid <afrid@nvidia.com>
(cherry picked from commit 5e7fa33ebcb5602093f9bf86e37f0478e389c633)

Change-Id: I5df4305579a9992817bae168925c4bb208934481
Reviewed-on: http://git-master/r/89351
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

7 years agovideo: tegra: dc: Fix the EMC bandwidth clear.
Kevin Huang [Fri, 9 Mar 2012 10:05:56 +0000]
video: tegra: dc: Fix the EMC bandwidth clear.

Bug 951626

Change-Id: Ia7c7474aa0f066cba8bd1519a98e302c4b3992e0
Signed-off-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-on: http://git-master/r/89076
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

7 years agotegra2: dvfs: enable dvfs for sdmmc
Shridhar Rasal [Thu, 9 Feb 2012 10:36:34 +0000]
tegra2: dvfs: enable dvfs for sdmmc

Enabled dvfs table for sdmmc clocks

bug 893886

Reviewed-on: http://git-master/r/82687
(cherry picked from commit 45c6c0426fdde8d338d10029cc83b598e7e49e61)

Change-Id: I26e07b45ef6331b99c57dd792ad0cc66a94242fb
Signed-off-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-on: http://git-master/r/89410
Tested-by: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

7 years agotegra: usb: host: Fix the race condition in hub control
vjagadish [Mon, 5 Mar 2012 13:44:58 +0000]
tegra: usb: host: Fix the race condition in hub control

Fix the race condition in tegra_ehci_hub_control which
is causing the usb not to work on usb instance 1.

Bug 948702

Change-Id: I3e8c7ecc90ee1ec96642292f9a83b09c413e9400
Signed-off-by: vjagadish <vjagadish@nvidia.com>
Reviewed-on: http://git-master/r/89002
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

7 years agoASoC: Tegra wm8903 machine: Fix to control names
Ramalingam C [Thu, 8 Mar 2012 11:13:38 +0000]
ASoC: Tegra wm8903 machine: Fix to control names

Fixing the typos in the member of cardhu_controls.

Bug 946932

Change-Id: I26f2a5a60f40d55846a89aaa76dab00741e018d0
Signed-off-by: Ramalingam C <ramalingamc@nvidia.com>
Reviewed-on: http://git-master/r/88824
Reviewed-by: Sumit Bhattacharya <sumitb@nvidia.com>
Reviewed-by: Preetham Chandru <pchandru@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

7 years agoarm: tegra: cardhu: properly map volume, back, menu GPIO keys
Eric Brower [Tue, 28 Feb 2012 00:33:45 +0000]
arm: tegra: cardhu: properly map volume, back, menu GPIO keys

Specify proper GPIO pin assignments for volume up/down, back and menu keys.

Bug 915638

Change-Id: I8898aed002a0e9b6e4bd389fb1813cabb7f13c65
Signed-off-by: Eric Brower <ebrower@nvidia.com>
Reviewed-on: http://git-master/r/86221
Reviewed-by: Allen Martin <amartin@nvidia.com>
Reviewed-by: Kiran Adduri <kadduri@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Gerrit_Virtual_Submit
Tested-by: Ashwini Ghuge <aghuge@nvidia.com>

7 years agoarm: tegra: xmm: add usb interface check
Xin Xie [Wed, 25 Jan 2012 00:56:23 +0000]
arm: tegra: xmm: add usb interface check

BUG 928909

Signed-off-by: Xin Xie <xxie@nvidia.com>
Reviewed-on: http://git-master/r/82756
(cherry picked from commit f24375055ecba7c40c740a6b88ad03e38ea8b10c)

Change-Id: I2b3d59ea433555f595a1468cae3242b7dc54958a
Signed-off-by: Xin Xie <xxie@nvidia.com>
Reviewed-on: http://git-master/r/89565
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Steve Lin <stlin@nvidia.com>

7 years agoARM: tegra: pm: only identity map lowmem area
Ray Poudrier [Fri, 2 Mar 2012 03:56:35 +0000]
ARM: tegra: pm: only identity map lowmem area

Bug 941380
Signed-off-by: Ray Poudrier <rapoudrier@nvidia.com>

Reviewed-on: http://git-master/r/87095
(cherry picked from commit 72b72afb18f852ee0b352b0644bf30b4afeaa055)

Change-Id: I7e10b6180044a6fb58b2fee835991812c193d9b1
Reviewed-on: http://git-master/r/89564
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Raymond Poudrier <rapoudrier@nvidia.com>
Tested-by: Raymond Poudrier <rapoudrier@nvidia.com>
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>

7 years agoARM: tegra: clock: Add SoC-to-DDR bit swap support
Alex Frid [Sat, 18 Feb 2012 07:25:06 +0000]
ARM: tegra: clock: Add SoC-to-DDR bit swap support

Since Tegra3 allows bit swapping when routing SoC-to-DDR data bus,
added the respective decoding mechanism for reading LPDDR2 mode
registers. Populated mapping table for PM269 board.

Bug 939626

Signed-off-by: Alex Frid <afrid@nvidia.com>
(cherry picked from commit 5f5329596167681b528c87fd088d60030eee6fdc)

Change-Id: I6670110a828df4264b8f7a8c8e6e67611a830033
Reviewed-on: http://git-master/r/89350
Tested-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

7 years agoARM: tegra: clock: Add LPDDR2 temperature controls
Alex Frid [Wed, 15 Feb 2012 07:00:41 +0000]
ARM: tegra: clock: Add LPDDR2 temperature controls

Added interfaces for
- reading scaled  LPDDR2 temperature from MR4 register
- controlling refresh rate according LPDDR2 specification

For now, these interfaces are only used by debufs nodes:

/sys/kernel/debug/tegra_emc/dram_temperature (read only)

/sys/kernel/debug/tegra_emc/over_temp_state (read/write,
0 - set regular low temperature refresh rate,
1 - speed up refresh for high temperature)

Bug 939626

Signed-off-by: Alex Frid <afrid@nvidia.com>
(cherry picked from commit 373ff7e49235f6e222b42e324b6a2dc9eac633e6)

Change-Id: I9cfaaeeab16d5b49acb91824fecc6b0ee8f3cdbb
Reviewed-on: http://git-master/r/89349
Tested-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

7 years agoARM: tegra: clock: Update Tegra3 EMC timing tracking
Alex Frid [Wed, 15 Feb 2012 06:44:58 +0000]
ARM: tegra: clock: Update Tegra3 EMC timing tracking

Separated tracking of Tegra3 EMC timing settings from EMC rate
statistic, as the same rate may be configured with different
timing (e.g., BCT timing and DVFS timing are not the same even
for the same rate).

Signed-off-by: Alex Frid <afrid@nvidia.com>
(cherry picked from commit cbf5634f67d3fb53ad01bb632905cf311052e2f1)

Change-Id: I4015d31297e9be29ec2d3f298ad33bc59bf45836
Reviewed-on: http://git-master/r/89348
Tested-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

7 years agoARM: tegra: clock: Disable early-ack during EMC clock change
Alex Frid [Wed, 15 Feb 2012 03:14:36 +0000]
ARM: tegra: clock: Disable early-ack during EMC clock change

Bug 935079

Signed-off-by: Alex Frid <afrid@nvidia.com>
(cherry picked from commit edf6b3ed22c4f803bf13d1bf6316ffb01c8946dc)

Change-Id: Ifd155a66469e9463da89639b6577c1f90972f4ac
Reviewed-on: http://git-master/r/89347
Tested-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

7 years agodefconfig: tegra3: enable wext feature of bcmdhd
Mursalin Akon [Fri, 9 Mar 2012 16:33:46 +0000]
defconfig: tegra3: enable wext feature of bcmdhd

enable wext to make the bcmdhd driver integrate with
network manager

Bug 924521

Change-Id: I5cd90a72e844d024256323e936bfba072766adf0
Signed-off-by: Mursalin Akon <makon@nvidia.com>
Reviewed-on: http://git-master/r/89158
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Allen Martin <amartin@nvidia.com>
Tested-by: Gerrit_Virtual_Submit

7 years agowireless: bcmdhd: make wext and cfg80211 choices
Mursalin Akon [Thu, 8 Mar 2012 22:00:21 +0000]
wireless: bcmdhd: make wext and cfg80211 choices

make wext and cfg80211 integration from
bcmdhd choices

Bug 924521

Change-Id: Ie0c46159003985e4e4b29b2809fe881ce924dbee
Signed-off-by: Mursalin Akon <makon@nvidia.com>
Reviewed-on: http://git-master/r/88908
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Allen Martin <amartin@nvidia.com>
Tested-by: Gerrit_Virtual_Submit

7 years agoasoc: machine: add api to query voice call state
Nikesh Oswal [Wed, 7 Mar 2012 07:39:39 +0000]
asoc: machine: add api to query voice call state

Change-Id: I0b2b50c007d9e7b722b2c4bbc0282c51a8d18b00
Reviewed-on: http://git-master/r/88239
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

7 years agoserial: tegra: Define correct port type
Laxman Dewangan [Fri, 9 Mar 2012 11:41:06 +0000]
serial: tegra: Define correct port type

When doing the cat /proc/tty/driver/tegra_uart, the serial
core display the message as
0: uart:unknown port:00000000 irq:68 tx:0 rx:0 CTS|DSR|CD|RI
4: uart:unknown port:00000000 irq:123 tx:0 rx:0 CTS|DSR|CD|RI

This is because the correct port type and iotype are not getting
set in tegra serial driver.

Setting these parameter to proper to display the information as
1: uart:TEGRA_UART mmio:0x70006040 irq:69 tx:0 rx:0 CTS|DSR|CD|RI
2: uart:TEGRA_UART mmio:0x70006200 irq:78 tx:477 rx:1603 RTS|CTS|DTR|DSR|CD|RI
3: uart:TEGRA_UART mmio:0x70006300 irq:122 tx:0 rx:0 CTS|DSR|CD|RI
4: uart:TEGRA_UART mmio:0x70006400 irq:123 tx:0 rx:0 CTS|DSR|CD|RI

bug 889724

Change-Id: Ia095623c53d1a3840c4d3759141cdf23cc2d4547
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/89122
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>

7 years agoarm: tegra: kai: turn off status LED all the time
Kerwin Wan [Fri, 9 Mar 2012 11:35:34 +0000]
arm: tegra: kai: turn off status LED all the time

Bug 949015
Bug 947228
Bug 947203

Change-Id: Iaca9ff0aba45546c0c16699ae35cc89ff7a043aa
Signed-off-by: Kerwin Wan <kerwinw@nvidia.com>
Reviewed-on: http://git-master/r/89120
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

7 years agoarm: tegra: whistler: Add board suspend/resume
Laxman Dewangan [Mon, 30 Jan 2012 13:30:34 +0000]
arm: tegra: whistler: Add board suspend/resume

Adding board suspend/resume functionality for whistler.

bug 907612

Change-Id: Ibb4178bbed7e4fa5f0d8b0080a34e85a3fe5aefc
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/88278
Reviewed-by: Shridhar Rasal <srasal@nvidia.com>
Tested-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

7 years agoarm: tegra: kai: registering LTR558 ALS on I2C
Sachin Nikam [Wed, 7 Mar 2012 06:59:55 +0000]
arm: tegra: kai: registering LTR558 ALS on I2C

Registering LTR558 Ambient light and Proximity sensor on I2C bus.

Bug 901133

Change-Id: I34b996813a409229a1baa25a069f0ba4758b154e
Signed-off-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-on: http://git-master/r/88228
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

7 years agomfd: max77663: Handle case for PWR_OFF and SFT_RST setting simultaneously
Jinyoung Park [Tue, 6 Mar 2012 07:56:50 +0000]
mfd: max77663: Handle case for PWR_OFF and SFT_RST setting simultaneously

MAX77663 PMU doesn't allow PWR_OFF and SFT_RST setting in ONOFF_CFG1
at the same time. So if it try to set PWR_OFF and SFT_RST to ONOFF_CFG1
simultaneously, handle only SFT_RST and ignore PWR_OFF.

Bug 949650

Change-Id: I90c602e22c813b05fcd9047153cea3ed2cbd596f
Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/87981
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Johnny Qiu <joqiu@nvidia.com>

7 years agoregulator: max77663: Don't use low-power mode for N-Channel LDOs
Johnny Qiu [Mon, 5 Mar 2012 09:51:43 +0000]
regulator: max77663: Don't use low-power mode for N-Channel LDOs

N-Channel LDOs on MAX77663 doesn't work well. It has glitches. Don't
use it as WAR.

Bug 949641

Change-Id: Ib0c8918137bccc0ce3b30bd6d97ad5f9bd39277e
Signed-off-by: Johnny Qiu <joqiu@nvidia.com>
Reviewed-on: http://git-master/r/87691
Tested-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

7 years agoiio: light: ALS driver for LTR558
Sachin Nikam [Tue, 14 Feb 2012 15:17:59 +0000]
iio: light: ALS driver for LTR558

Adding driver for Ambient Light and Proximity sensor from
Lite On Technology.
This driver has sysfs interface to get the als and proximity values
and enable/disable als and proximity.

Bug 901133

Change-Id: Iafa0346d74825a67d94143181922de7a16cc7718
Signed-off-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-on: http://git-master/r/83837
Reviewed-by: Darrell Hunt <dhunt@nvidia.com>

7 years agoARM: mm: Use CONFIG_CPA
Krishna Reddy [Wed, 7 Mar 2012 22:35:37 +0000]
ARM: mm: Use CONFIG_CPA

Use CONFIG_CPA flag to allow disabling CPA code.

Change-Id: Ic6a4993dbabbef8d9847295f698887d73d81269a
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/88464
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>

7 years agocrypto: tegra-se: Check for valid reqeusted buffer size
Mallikarjun Kasoju [Mon, 12 Mar 2012 03:51:25 +0000]
crypto: tegra-se: Check for valid reqeusted buffer size

Added check for valid requested process buffer size.

Bug 928454

Change-Id: I2dc389af64cb3de2f0a0a3f0bbc5057dd9bd676c
Reviewed-on: http://git-master/r/89381
Reviewed-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Tested-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

7 years agomisc: tegra-baseband: Add support for L2 and cleanup code.
Raj Jayaraman [Mon, 13 Feb 2012 22:12:04 +0000]
misc: tegra-baseband: Add support for L2 and cleanup code.

Bug 886459

Signed-off-by: Raj Jayaraman <rjayaraman@nvidia.com>
(cherry picked from commit 9032b38a76d8337ee6b9582265171ca09473a3e9)

Change-Id: Ifa5ad5bdb3a782119a2920281bc39ce5f6fd2a5a
Reviewed-on: http://git-master/r/88868
Reviewed-by: Rajkumar Jayaraman <rjayaraman@nvidia.com>
Tested-by: Rajkumar Jayaraman <rjayaraman@nvidia.com>
Reviewed-by: Steve Lin <stlin@nvidia.com>

7 years agovideo: tegra: nvmap: optimize uc & wc allocations.
Krishna Reddy [Mon, 12 Mar 2012 07:13:24 +0000]
video: tegra: nvmap: optimize uc & wc allocations.

Changing page attributes and cache maintenance reduces
performance in applications doing runtime reallocations.

Keep pool of UC & WC pages to avoid expensive
operations when doing allocations.

bug 865816
(refactored initial changes from Kirill and added shrinker
notification handling)

Change-Id: I43206efb1adc750ded672bfe074e0648f2f9490b
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/87532
Reviewed-by: Donghan Ryu <dryu@nvidia.com>
Reviewed-by: Kirill Artamonov <kartamonov@nvidia.com>
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

7 years agoasoc: wm8753 machine: change M/S configuration for bt
Nikesh Oswal [Fri, 9 Mar 2012 11:33:27 +0000]
asoc: wm8753 machine: change M/S configuration for bt

change M/S configuration for bt, with BT as Slave and Modem
as Master

Change-Id: Ifae5ca228f3bcf0f882f47e79448c10bcc33ec4d
Reviewed-on: http://git-master/r/89127
Tested-by: Nikesh Oswal <noswal@nvidia.com>
Reviewed-by: Ravindra Lokhande <rlokhande@nvidia.com>
Reviewed-by: Scott Peterson <speterson@nvidia.com>

7 years agoregulator: tps65910: Sleep off rails when ext sleep configured
Laxman Dewangan [Wed, 7 Mar 2012 12:51:49 +0000]
regulator: tps65910: Sleep off rails when ext sleep configured

Keep the rails OFF in sleep mode only when the rails are
controlled by external sleep control.
The devices tps65910 and tps65911, both has the sleep input.
The tps65911's sleep input is not same as tps65910's EN3 and hence
taking care of SLEEP input as separate external sleep control input.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
cherry picked from mainline commit
87ae88a17396fe3f91c34ab44f460e5680eb6f61

Change-Id: I05645082ad5268a4553891db6b35af33650b7a95
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/89125

7 years agoARM: tegra: Put all Tegra Kconfig entries under if ARCH_TEGRA
Scott Williams [Fri, 9 Mar 2012 01:01:00 +0000]
ARM: tegra: Put all Tegra Kconfig entries under if ARCH_TEGRA

Change-Id: I49041ada720045908a433b44f301036fc4913462
Signed-off-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-on: http://git-master/r/88955
Reviewed-by: Stephen Warren <swarren@nvidia.com>