6 years agoregulator: bq2419x: add power off on suspend support
Yunfan Zhang [Thu, 14 Mar 2013 03:55:37 +0000]
regulator: bq2419x: add power off on suspend support

Add flag power_off_on_suspend to support shutdown output
unconditionally when suspend.

Change-Id: Iff958a82271c05d4d519246d85e8ab616ff79c5a
Signed-off-by: Yunfan Zhang <yunfanz@nvidia.com>
Reviewed-on: http://git-master/r/209393
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

6 years agoARM: tegra11: pluto: add more E-states to core
Sivaram Nair [Tue, 12 Mar 2013 18:18:58 +0000]
ARM: tegra11: pluto: add more E-states to core

For pluto, the sum of all E0s is ~23W. Since our default battery cap is
at 20W, this is preventing some of the EDP clients from registering to
the framework (which is obliged to guarantee that it can meet E0s from
all clients at any given time). This patch adds more E-states and lowers
the E0 of the core client in order to resolve the above conflict.

Change-Id: I8ede5695b0d8c8f3e1e392ecaaef899080fc33fc
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-on: http://git-master/r/208519
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

6 years agousb: otg: tegra: support for id detection using pmu
Rakesh Bodla [Sun, 17 Mar 2013 12:13:37 +0000]
usb: otg: tegra: support for id detection using pmu

Adding the support for id detection using
PMU ID interrupt.

Bug 1227226

Change-Id: Ie53ece815d6512cca14d5d9d50831630af548ec0
Signed-off-by: Rakesh Bodla <rbodla@nvidia.com>
Reviewed-on: http://git-master/r/208406
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

6 years agoARM: tegra: phy: Power off USB AO pads
Rakesh Bodla [Tue, 12 Mar 2013 12:04:06 +0000]
ARM: tegra: phy: Power off USB AO pads

Disable USB AO pads if gpio/pmu based id
detection is supported.

Bug 1227226

Change-Id: Idede651f9396a20f21009329c53a58e84b65d818
Signed-off-by: Rakesh Bodla <rbodla@nvidia.com>
Reviewed-on: http://git-master/r/208405
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

6 years agousb: tegra: add different id detection types
Rakesh Bodla [Tue, 12 Mar 2013 11:59:43 +0000]
usb: tegra: add different id detection types

Add different ID detection methods. Now id cable
can be detected through controller id, pmu id, gpio
or virtual id.

Bug 1227226

Change-Id: I9a3fc5e1fa2f34e0d7973a36f0302cdae64c3ce2
Signed-off-by: Rakesh Bodla <rbodla@nvidia.com>
Reviewed-on: http://git-master/r/208404
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

6 years agoARM: tegra: change hs_slew to 0xE
Ajay Gupta [Sat, 16 Mar 2013 00:15:10 +0000]
ARM: tegra: change hs_slew to 0xE

This is needed as per hardware team's recommendation

Bug 1254391

Change-Id: Ie5af4a4fa5a2f9b21cd075e09aff172462c37f80
Signed-off-by: Ajay Gupta <ajayg@nvidia.com>
Reviewed-on: http://git-master/r/210419
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Ashutosh Jha <ajha@nvidia.com>
GVS: Gerrit_Virtual_Submit

6 years agovideo: tegra: dc: fix the logic for dis ref-count.
Kevin Huang [Thu, 14 Mar 2013 05:25:37 +0000]
video: tegra: dc: fix the logic for dis ref-count.

Use simple logic to meet the requirement of use cases.
All logic is implemented in powergate module. Dependency
of dis partitions are transparent to client.

Change-Id: I3ad900c80a1b12e8397643c078d1269ae9f3dac1
Signed-off-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-on: http://git-master/r/210088
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

6 years agoEDP: tegra: core E-state request via sysfs
Sivaram Nair [Fri, 15 Mar 2013 00:01:50 +0000]
EDP: tegra: core E-state request via sysfs

A new sysfs entry is added to core EDP client for changing its E-state
request. This is required to limit the maximum power the core (AP+DRAM)
can be allocated.

Bug 1252183

Change-Id: I2f30284df3994e714f828480ac89390a21a121ee
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-on: http://git-master/r/209803
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

6 years agoEDP: client specific sysfs attrbs
Sivaram Nair [Thu, 14 Mar 2013 23:58:23 +0000]
EDP: client specific sysfs attrbs

This patch implements support for adding client specific sysfs
attributes.

Change-Id: I41b81ebe29f49db8242dbb958078536499b7ef8f
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-on: http://git-master/r/209802
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

6 years agoarm: tegra: therm: change the ordering of suspend
Sang-Hun Lee [Thu, 14 Mar 2013 23:47:43 +0000]
arm: tegra: therm: change the ordering of suspend

- clock should not be disabled until all clients are done

Bug 1224342

Change-Id: I389700b78d9773d0c44aaf9cb7829ffd3cb4ed9c
Signed-off-by: Sang-Hun Lee <sanlee@nvidia.com>
Reviewed-on: http://git-master/r/209786
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

6 years agoARM: tegra: macallan: enable prepower for macallan
Shobek Sam Attupurath [Thu, 14 Mar 2013 11:20:54 +0000]
ARM: tegra: macallan: enable prepower for macallan

1) Enable prepower for macallan
2) Change GPIO_PU5 to NORMAL as recommended by syseng

Bug 1245397

Change-Id: I62cf696819bf0be9e5830d8a12458e3e5744eb80
Signed-off-by: Shobek Sam Attupurath <sattupurath@nvidia.com>
Reviewed-on: http://git-master/r/209565
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

6 years agoarm: tegra: soctherm: Program hotspot offsets specified
Diwakar Tundlam [Mon, 11 Mar 2013 19:36:28 +0000]
arm: tegra: soctherm: Program hotspot offsets specified

Add support for configuring hotspot offsets in soctherm between
CPU/GPU-zone and the PLLx-zone.

Specify offset value between CPU/GPU-zone and PLLx for Tegra11x as 6C
in the board files.

Bug 1250096

Change-Id: I35d61404d62738d81137affe441e0e6d7589ee0b
Signed-off-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-on: http://git-master/r/208193
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

6 years agoARM: tegra: dalmore: Fix avdd_hdmi_pll regulator
Pradeep Goudagunta [Mon, 18 Mar 2013 10:08:31 +0000]
ARM: tegra: dalmore: Fix avdd_hdmi_pll regulator

Keep GPIO_PO1 active high.

Bug 1246643

Change-Id: Ib5752bde465f384507de8e1b40cb32b7a1f0bdb9
Signed-off-by: Pradeep Goudagunta <pgoudagunta@nvidia.com>
Reviewed-on: http://git-master/r/210279
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

6 years agommc: core: remove redundant HPI enable routine.
Roger Hsieh [Mon, 18 Mar 2013 04:57:45 +0000]
mmc: core: remove redundant HPI enable routine.

It's unnecessary to call HPI enable twice. Remove 1st copy for
code clean-up.

Bug 1251431

Change-Id: I891c9c4f6110e41864edc291d71a9c6a99112641
Signed-off-by: Roger Hsieh <rhsieh@nvidia.com>
Reviewed-on: http://git-master/r/210266
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agogadget:tegra decrease uFrame count for interrupt latency
Philip Rakity [Sat, 9 Mar 2013 01:50:15 +0000]
gadget:tegra decrease uFrame count for interrupt latency

The usb command register defines the minimum time
that the usb controller can interrupt the cpu. This
is set (by default) to 1ms (8 uFrames). This value
was set in the standard a LONG time ago. Reduce the
interrupt time to 125uS as tegra is able to handle
interrupts at this rate. This change improves the
adb throughtput.

This change improves the adb throughtput from 1.2 MB/sec
to 5.5-5.9 MB/Sec.

Bug 1216801

Change-Id: I43957cf23247846e8cab11eea7a9a0d4e4def2e1
Signed-off-by: Philip Rakity <prakity@nvidia.com>
(cherry picked from commit c38b808fd744bbdab760a7e601f0624571838d1c)
Reviewed-on: http://git-master/r/210013
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Rakesh Bodla <rbodla@nvidia.com>
Tested-by: Rakesh Bodla <rbodla@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

6 years agoasoc: tegra: aic326x: Fix LP1 power for VDDIO_AUDIO
Rahul Mittal [Fri, 15 Mar 2013 11:46:57 +0000]
asoc: tegra: aic326x: Fix LP1 power for VDDIO_AUDIO

- Register DAPM map/widgets with snd_soc_card structure
- Enable idle bias off for TI codec
- Correct an error in handling bias level setting

Bug 1251424

Change-Id: Id1ed89955a2b8e705c3fd8b0557ca51afeef616d
Signed-off-by: Rahul Mittal <rmittal@nvidia.com>
Reviewed-on: http://git-master/r/209997
Reviewed-by: Vijay Mali <vmali@nvidia.com>
Reviewed-by: Scott Peterson <speterson@nvidia.com>
Reviewed-by: Sumit Bhattacharya <sumitb@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agopower: sbs-battery: Use dev_pm_ops for suspend/resume
Darbha Sriharsha [Fri, 15 Mar 2013 06:58:32 +0000]
power: sbs-battery: Use dev_pm_ops for suspend/resume

This change is intended to modify sbs-battery fuel
gauge driver to use dev_pm_ops to specify suspend/resume
operations in place of the legacy method.

Bug 1249600

Change-Id: Ied18fac007ccaafe3113594dbc0c4eda18dcbd1f
Signed-off-by: Darbha Sriharsha <dsriharsha@nvidia.com>
Reviewed-on: http://git-master/r/209897
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit

6 years agocrypto: tegra-se: put device into runtime suspend state when suspending
Eric Miao [Wed, 6 Mar 2013 11:30:26 +0000]
crypto: tegra-se: put device into runtime suspend state when suspending

To prevent the device being accidentally put into runtime suspend state
during the whole system suspend process, pm_runtime_get_noresume() is
called upon _every_ device to increase the usage count (please refer to
drivers/base/power/main.c).

Since we don't explicitly disable the clock, pm_runtime_put_sync() in
each operation in tegra_se_suspend() will not actually call the runtime
suspend function, thus leaving the clock still enabled.

To fix this issue in a simple way, we call pm_runtime_put_sync() in the
end of tegra_se_suspend() to decrease the usage count to "0" and thus
call tegra_se_runtime_suspend() in turn to disable the clock. To pair
the usage count, we do a pm_runtime_get_noresume() in tegra_se_resume()
as we don't actually need to runtime resume the device there.

Bug 1246029

Change-Id: I64520b022b896f2867934255a55b852fafac4b63
Signed-off-by: Eric Miao <emiao@nvidia.com>
Reviewed-on: http://git-master/r/206658
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agoARM: tegra: dalmore: Update power rails
Pradeep Goudagunta [Wed, 28 Nov 2012 09:11:02 +0000]
ARM: tegra: dalmore: Update power rails

Support to update power rails based on power-configuration
received from the bootlaoder.

Bug 1175109

Change-Id: I516890a5b3a4bd7c59560765cef11bb643c55c45
Signed-off-by: Pradeep Goudagunta <pgoudagunta@nvidia.com>
Reviewed-on: http://git-master/r/205374
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

6 years agoARM: tegra: pluto: Change LP1 core voltage
Daniel Solomon [Sun, 17 Mar 2013 22:25:07 +0000]
ARM: tegra: pluto: Change LP1 core voltage

Increase LP1 VDD_CORE voltage from 0.9V to 0.95V due
to low temperature qualification data.

Bug 1035684

Change-Id: I1c75d207d7ed814334d3be4ef1c92bb32c557731
Signed-off-by: Daniel Solomon <daniels@nvidia.com>
Reviewed-on: http://git-master/r/210253
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agomisc: tegra-baseband: Adding dual modem support
Steve Lin [Thu, 14 Mar 2013 23:37:50 +0000]
misc: tegra-baseband: Adding dual modem support

Bug 1249542

Change-Id: I3aac999c6b19340b17c8dc8f558731257b0fd627
Signed-off-by: Steve Lin <stlin@nvidia.com>
Reviewed-on: http://git-master/r/209781
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Neil Patel <neilp@nvidia.com>

6 years agoARM: tegra11: Remove display from pg skiplist
Terje Bergstrom [Tue, 19 Feb 2013 11:31:30 +0000]
ARM: tegra11: Remove display from pg skiplist

Bug 1248768

Change-Id: Ifcfde1727496a1c7185d6c6037dde84b0a18fd89
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/202024
(cherry picked from commit fe3b50f3379c4e0491600b6fa2d3d0ff011a817c)
Reviewed-on: http://git-master/r/209553
Reviewed-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com>
Tested-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agoarm: tegra: refactor powergate code per-SoC
Mayuresh Kulkarni [Fri, 16 Nov 2012 13:58:17 +0000]
arm: tegra: refactor powergate code per-SoC

- split the current power-gate code into common and
SoC specific code
- every SoC now exports a set of ops to the common APIs
- following is the new file structure:
powergate.c - common powergate APIs
powergate-ops-txx.c - t20/t30 specific common implementation
powergate-ops-t1xx.c - t114 specific common implementation.
powergate-t20 - t20 specific structures and ids
powergate-t30 - t30 specific strcutures and ids
powergate-t11x - t11x specific structures and ids
- powergate.c also provides a low level common APIs
for all SoCs
- each SoC now has 2 arrays: 1 for power partition info
and other for mc client list info. amongst these 2 arrays,
mc client list array is static

Bug 1180197
Bug 1248768

Change-Id: I62b2d894c683fe9a18b82c7f9d87c08ce5b3864f
Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-on: http://git-master/r/145591
(original commit 87e48e91cc45eac61b8b2c1dd279b1e2ecb27383)
Reviewed-on: http://git-master/r/209545
GVS: Gerrit_Virtual_Submit
Tested-by: Daniel Solomon <daniels@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agoARM: tegra11: clock: Update PLLD/D2 configuration
Alex Frid [Thu, 14 Mar 2013 01:56:48 +0000]
ARM: tegra11: clock: Update PLLD/D2 configuration

For non-tabulated PLLD/D2 output rates selected comparison frequency
according to recommendations in pll specification.

Change-Id: Icb652d9dd5d0131e959f7cd280e5d8e41960f7af
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/209375
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

6 years agovideo: tegra: host: always update 3dfs status
Samuel Russell [Wed, 13 Mar 2013 21:09:02 +0000]
video: tegra: host: always update 3dfs status

Always update 3dfs dev_status whether scaling is enabled or
disabled

Bug 1242049

Change-Id: Ifb2b9b3ee4134697aefbd99ff8234399770df0b4
Signed-off-by: Samuel Russell <samuelr@nvidia.com>
Reviewed-on: http://git-master/r/208953
(cherry picked from commit 4bfd0e76b36fdf3e88cedc5604af172695b5508b)
Reviewed-on: http://git-master/r/208981
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

6 years agoarm: tegra: soctherm: fix hyteresis bug
Hyungwoo Yang [Wed, 13 Mar 2013 07:03:16 +0000]
arm: tegra: soctherm: fix hyteresis bug

Fixed hyteresis bug which generates unexpected interrupts

Change-Id: I5a472b8b5aa5588f945c38ca157441c1d4a9cfba
Signed-off-by: Hyungwoo Yang <hyungwooy@nvidia.com>
Reviewed-on: http://git-master/r/208910
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

6 years agovideo: tegra: dc: Change HDMI drive strength
Rakesh Iyer [Wed, 13 Mar 2013 18:39:30 +0000]
video: tegra: dc: Change HDMI drive strength

Modify HDMI drive strength to avoid clock jitter and eye diagram issues.

Bug 1157049.
Bug 1226687.

Change-Id: Ibf30356898d9ce2191f1794fc942dcb89d9bfe6f
Signed-off-by: Rakesh Iyer <riyer@nvidia.com>
Reviewed-on: http://git-master/r/208905
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

6 years agoARM: tegra11: clock: modify plld settings
Rakesh Iyer [Wed, 13 Mar 2013 18:35:51 +0000]
ARM: tegra11: clock: modify plld settings

Modify plld settings for 4K jitter issues.

Bug 1157049.
Bug 1226687.

Change-Id: I126a054a1b20cac333a376c81eae3602f7cef97d
Signed-off-by: Rakesh Iyer <riyer@nvidia.com>
Reviewed-on: http://git-master/r/208904
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

6 years agovideo: tegra: camera: set iso EMC clock
Jihoon Bang [Fri, 8 Mar 2013 00:20:35 +0000]
video: tegra: camera: set iso EMC clock

Take into account iso efficiency of 35% in T114/vi
until isomgr is enabled.

Bug 1231863
Bug 1246180

Change-Id: I1994d54e51ed81631d0411bec49ca90059ef693a
Signed-off-by: Jihoon Bang <jbang@nvidia.com>
Reviewed-on: http://git-master/r/207352
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

6 years agoarm: tegra: Enable TEGRA_LP1_LOW_COREVOLTAGE config
Karthik Ramakrishnan [Thu, 14 Feb 2013 20:18:59 +0000]
arm: tegra: Enable TEGRA_LP1_LOW_COREVOLTAGE config

Enable LP1 Core voltage settings for T114

The feature is added in the below change.
Refer to http://git-master/r/#change,124135 for more details.
Bug 1035684

Change-Id: Ia967ba4f95e47f678335550402a2f75b80ba9f0d
Signed-off-by: Karthik Ramakrishnan <karthikr@nvidia.com>
Reviewed-on: http://git-master/r/200875
Tested-by: Daniel Solomon <daniels@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agoarm: tegra: Board files settings for LP1 Low Core Voltage
Karthik Ramakrishnan [Fri, 25 Jan 2013 03:35:10 +0000]
arm: tegra: Board files settings for LP1 Low Core Voltage

Set the register values for each of the board files to
keep the Core voltage to 0.9V in LP1 in Pluto.

This change is only for those platforms where LP1 is supported.
Dalmore and Roth is not needed.

This change is part of the feature to set VCore to lowest Core
Voltage in LP1
Refer to http://git-master/r/194011 for more details
Bug 1035684

Change-Id: I838bd3b65bab85ae5870b59ac2be6611abbbb075
Signed-off-by: Karthik Ramakrishnan <karthikr@nvidia.com>
Signed-off-by: Hunk Lin <hulin@nvidia.com>
Reviewed-on: http://git-master/r/194027
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

6 years agoarm: tegra: LP1 Low Core Voltage Support for T114
Karthik Ramakrishnan [Fri, 25 Jan 2013 23:05:33 +0000]
arm: tegra: LP1 Low Core Voltage Support for T114

The feature was added for T30 and the config name referred to
the lowest Core voltage for Enterprise(CONFIG_TEGRA_LP1_950).
Changed the Kconfig to include T114 support and renamed the
feature name to refer to the lowest Core voltage possible for
the particular platform and not just 950mV.

The initial change for this feature is in http://git-master/r/124135

Bug 1035684

Change-Id: I4318c66fd70ab227ef0786d6a13286e020e4541d
Signed-off-by: Karthik Ramakrishnan <karthikr@nvidia.com>
Signed-off-by: Hunk Lin <hulin@nvidia.com>
Reviewed-on: http://git-master/r/194011
Tested-by: Daniel Solomon <daniels@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agoarm: tegra: soctherm: No hysteresis needed since HW has it implicitly
Diwakar Tundlam [Thu, 14 Mar 2013 02:00:44 +0000]
arm: tegra: soctherm: No hysteresis needed since HW has it implicitly

Due to the way HW implements up and down threholds for a trip_point,
there is an implicit hysteresis of about 1C. Additional hysteresis is
not needed.

Removed setting default hysteresis in driver and edp cooling device.

If additional hysteresis is needed, setting it in trip_info in board
files will take effect as before for PASSIVE trip points.

Bug 1250096

Change-Id: I84597bccc46f19f02b4fa710035f13dd9102e2f3
Signed-off-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-on: http://git-master/r/209376
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

6 years agosched: reinitialize rq->next_balance when a CPU is hot-added
Paul Walmsley [Thu, 7 Mar 2013 03:02:56 +0000]
sched: reinitialize rq->next_balance when a CPU is hot-added

Reinitialize rq->next_balance when a CPU is hot-added.  Otherwise,
scheduler domain rebalancing may be skipped if rq->next_balance was
set to a future time when the CPU was last active, and the
newly-re-added CPU is in idle_balance().  As a result, the
newly-re-added CPU will remain idle with no tasks scheduled until the
softlockup watchdog runs - potentially 4 seconds later.  This can
waste energy and reduce performance.

This behavior can be observed in some SoC kernels, which use CPU
hotplug to dynamically remove and add CPUs in response to load.  In
one case that triggered this behavior,

0. the system started with all cores enabled, running multi-threaded
   CPU-bound code;

1. the system entered some single-threaded code;

2. a CPU went idle and was hot-removed;

3. the system started executing a multi-threaded CPU-bound task;

4. the CPU from event 2 was re-added, to respond to the load.

The time interval between events 2 and 4 was approximately 300
milliseconds.

Of course, ideally CPU hotplug would not be used in this manner,
but this patch does appear to fix a real bug.

Nvidia folks: this patch is submitted as at least a partial fix for
bug 1243368 ("[sched] Load-balancing not happening correctly after
cores brought online")

Change-Id: Iabac21e110402bb581b7db40c42babc951d378d0
Signed-off-by: Paul Walmsley <pwalmsley@nvidia.com>
Cc: Peter Boonstoppel <pboonstoppel@nvidia.com>
Reviewed-on: http://git-master/r/206918
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Amit Kamath <akamath@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Peter Boonstoppel <pboonstoppel@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
(cherry picked from commit 3a4a383487ef1d8d074a2eef608543ac1fb50675)
Reviewed-on: http://git-master/r/208936

6 years agommc: host: Enable packed command for eMMC4.5
Naveen Kumar Arepalli [Fri, 22 Feb 2013 16:10:54 +0000]
mmc: host: Enable packed command for eMMC4.5

Enable  packed command support for eMMC4.5 devices

Bug 1242730

Change-Id: I6c68c5477cd20b49230ac04f17351de8ff4a3b1d
Signed-off-by: Naveen Kumar Arepalli <naveenk@nvidia.com>
Reviewed-on: http://git-master/r/203327
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

6 years agoregulator: palmas: use correct bit for finding smps enabled or not
Laxman Dewangan [Fri, 15 Mar 2013 10:44:22 +0000]
regulator: palmas: use correct bit for finding smps enabled or not

SMPS registers are cached for higher performance on voltage control
and hence it need to check the proper bits for enabled or not in place
of volatile bits.

bug 1250602

Change-Id: I8d2e1fca3926c551523a616b605ac5fd93352c33
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/209976
Reviewed-by: Kerwin Wan <kerwinw@nvidia.com>
Reviewed-by: Ken Chang <kenc@nvidia.com>
Tested-by: Ken Chang <kenc@nvidia.com>
GVS: Gerrit_Virtual_Submit

6 years agoARM: tegra3: defconfig: Enable CONFIG_TEGRA_NVAVP_AUDIO
Bharat Nihalani [Fri, 15 Mar 2013 06:43:59 +0000]
ARM: tegra3: defconfig: Enable CONFIG_TEGRA_NVAVP_AUDIO

Enable NVAVP audio channel.

Bug 1234208

Change-Id: I4cb486c6c0cfdb1f5bd49ad506baf43f8f6fbc95
Signed-off-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-on: http://git-master/r/209889
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit

6 years agoARM: tegra: Update trim value for eMMC HS200 mode
Naveen Kumar Arepalli [Thu, 14 Mar 2013 13:13:35 +0000]
ARM: tegra: Update trim value for eMMC HS200 mode

Set trim value of 3 for eMMC HS200 mode for t114
based platforms.

Bug 1172577

Change-Id: I11200adf861cdf11c3aaacc460e1aca97dc49d21
Signed-off-by: Naveen Kumar Arepalli <naveenk@nvidia.com>
Reviewed-on: http://git-master/r/209597
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

6 years agoarm: tegra: Modify pull-up of GMI_IORDY pin
Sumit Sharma [Thu, 14 Mar 2013 10:41:07 +0000]
arm: tegra: Modify pull-up of GMI_IORDY pin

Change pull up of GMI_IORDY pin for ringer switch

Bug 1157359

Change-Id: I91d76bb85c54559c951023bfd002bbd84247290e
Signed-off-by: Sumit Sharma <sumsharma@nvidia.com>
Reviewed-on: http://git-master/r/209550
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

6 years agousb: otg: tegra: Enable id interrupts in resume
Rakesh Bodla [Thu, 14 Mar 2013 09:31:29 +0000]
usb: otg: tegra: Enable id interrupts in resume

Enable id interrupts in otg resume for boards which
support pmu vbus detection. Also removing the mutex
lock from interrupt context.

Bug 1245272

Change-Id: I9e0790909d9cff8c577ce5040776a44b2f03cb23
Signed-off-by: Rakesh Bodla <rbodla@nvidia.com>
Reviewed-on: http://git-master/r/209517
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

6 years agoThermal: pid_thermal_gov: Fix passive polling stop issue
Jinyoung Park [Thu, 14 Mar 2013 06:28:41 +0000]
Thermal: pid_thermal_gov: Fix passive polling stop issue

Fixed passive polling stop issue when old target state is not zero and
new target state is 0, even though zone temperature is higher than
passive trip temperature.

Bug 1200111

Change-Id: I7f9a1c371b3687a8cfcce47994a5fbe5291140a1
Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/209448
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Diwakar Tundlam <dtundlam@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-by: Edward Riegelsberger <eriegels@nvidia.com>

6 years agoasoc: aic326x codec: Switch off MiniDSP during Playback
Vijay Mali [Thu, 14 Mar 2013 05:38:02 +0000]
asoc: aic326x codec: Switch off MiniDSP during Playback

Use "Low Power Playback" mode does not require MiniDSP.
Switch off minidsp during playback usecase.

Bug 1238662

Change-Id: I55be90366d8e2320d9f8190daa3cf7a8ff45bf4f
Signed-off-by: Vijay Mali <vmali@nvidia.com>
Reviewed-on: http://git-master/r/209428
Reviewed-by: Ravindra Lokhande <rlokhande@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Scott Peterson <speterson@nvidia.com>

6 years agoarm: tegra: sdhci: Add EDP support platform data for macallan
Kerwin Wan [Thu, 14 Mar 2013 05:34:04 +0000]
arm: tegra: sdhci: Add EDP support platform data for macallan

Added platform data for eMMC/microSD to support EDP

Bug 1160688

Change-Id: Ic971e8cd22d7c9aebcce82c876649c871a6ca21f
Signed-off-by: Kerwin Wan <kerwinw@nvidia.com>
Reviewed-on: http://git-master/r/209426
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

6 years agoARM: tegra: macallan: Mask UHS Modes for SDMMC1, SDMMC3
Kerwin Wan [Thu, 14 Mar 2013 05:12:21 +0000]
ARM: tegra: macallan: Mask UHS Modes for SDMMC1, SDMMC3

Bug 1189241

Change-Id: I57f3a47bfca434b787f2968b37b314073c413ef6
Signed-off-by: Kerwin Wan <kerwinw@nvidia.com>
Reviewed-on: http://git-master/r/209425
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>

6 years agoARM: tegra: macallan: limit sdmmc1, sdmmc3 max clock
Kerwin Wan [Thu, 14 Mar 2013 05:00:24 +0000]
ARM: tegra: macallan: limit sdmmc1, sdmmc3 max clock

CRC errors are seen in higher clock rates.
limiting sdmmc1, sdmmc3 max clock to 82 MHZ.

Bug 1189241

Change-Id: I36e26f93c215ecfa019e5e332898b47b31d2adf7
Signed-off-by: Kerwin Wan <kerwinw@nvidia.com>
Reviewed-on: http://git-master/r/209424
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>

6 years agoARM: tegra: macallan: vdd_core consumers for sdmmc
Kerwin Wan [Thu, 14 Mar 2013 02:27:04 +0000]
ARM: tegra: macallan: vdd_core consumers for sdmmc

Adding vdd_core regulators for sdmmc1 and sdmmc4 to be used for
setting core voltage constraints during frequency tuning.

Bug 1167519
Bug 1225343

Change-Id: Id7f480040475821343f72fa9919736517580ad45
Signed-off-by: Kerwin Wan <kerwinw@nvidia.com>
Reviewed-on: http://git-master/r/209378
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

6 years agopower: max17042: changes to battery depletion calc
Sivaram Nair [Thu, 14 Mar 2013 00:11:39 +0000]
power: max17042: changes to battery depletion calc

The depletion equations are updated to reflect the reference document.

Bug 1252120

Change-Id: I5ed9dfd96828c915ddca313d8971861d3a8f46ca
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-on: http://git-master/r/209351
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

6 years agoARM: tegra: cpuquiet: augment no_lp to force both LP and G
Simo Melenius [Fri, 8 Mar 2013 09:24:12 +0000]
ARM: tegra: cpuquiet: augment no_lp to force both LP and G

- tegra_cpuquiet 'no_lp' node now accepts '-1' to force LP cluster on
- when a cluster is forced the switches take place immediately without
  any delay

Bug 1247636

Change-Id: I1ec07acc3cf51419a4770542c6a1c90b92e0bf66
Signed-off-by: Simo Melenius <smelenius@nvidia.com>
Reviewed-on: http://git-master/r/208772
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

6 years agoarm: tegra: soctherm: Return trend STABLE if temp within hysteresis
Diwakar Tundlam [Wed, 13 Mar 2013 00:48:50 +0000]
arm: tegra: soctherm: Return trend STABLE if temp within hysteresis

Bug 1250096

Change-Id: I7e1ff0e8c5a294311d14fbfdfb32cfdd8311d854
Signed-off-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-on: http://git-master/r/208611
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

6 years agovideo: tegra: dsi: need clear indication to track LP0 resuming latency
Li Li [Tue, 12 Mar 2013 23:51:15 +0000]
video: tegra: dsi: need clear indication to track LP0 resuming latency

To better measure how long the device actually resumes back to a usable
state, we need to know when the display is turned on.

Bug 1252226

Change-Id: I85e1662eb1a169d22195c45e4e75198ba49caca5
Signed-off-by: Li Li <lli5@nvidia.com>
Reviewed-on: http://git-master/r/208600
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

6 years agoARM: tegra: add more E-states to depletion client
Sivaram Nair [Fri, 8 Mar 2013 23:10:20 +0000]
ARM: tegra: add more E-states to depletion client

More E-states are added to the battery depletion client by increasing
the resolution.

Change-Id: If004db2a207dc2a4eb7408a9e713f7cc15557d06
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-on: http://git-master/r/208518
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

6 years agoarm: tegra: soctherm: decouple update for CPU and GPU zones
Diwakar Tundlam [Sat, 9 Mar 2013 00:34:28 +0000]
arm: tegra: soctherm: decouple update for CPU and GPU zones

Bug 1250096

Change-Id: I391f459ce9945bb3fa0013232258ba11d1eb8ec1
Signed-off-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-on: http://git-master/r/207786
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit

6 years agoARM: tegra: cpuquiet: make userspace governor actions synchronous
Peter De Schrijver [Tue, 12 Feb 2013 15:51:26 +0000]
ARM: tegra: cpuquiet: make userspace governor actions synchronous

Userspace expects changes to happen synchronously. Implement this by waiting
with a (configureable) timeout for the action to happen.

Bug 1220065

Change-Id: I81301719707e4baf2b3aea62c38fc771ffe1205d
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
(cherry picked from commit 9de8f56142e64ebf388b5427ef7fd142078dfa87)
Reviewed-on: http://git-master/r/#change,200013
Reviewed-on: http://git-master/r/206802
Tested-by: Ilan Aelion <iaelion@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

6 years agommc: tegra: Enable MMC_CAP_CMD23
Naveen Kumar Arepalli [Tue, 5 Mar 2013 08:38:12 +0000]
mmc: tegra: Enable MMC_CAP_CMD23

Enable MMC_CAP_CMD23 for SDMMC

Bug 1242730

Change-Id: Idda40647870dc198ce7105e32d60406404674437
Signed-off-by: Naveen Kumar Arepalli <naveenk@nvidia.com>
Reviewed-on: http://git-master/r/206245
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

6 years agoARM: tegra11: dvfs: Re-arrange DFLL clock initialization
Alex Frid [Wed, 27 Feb 2013 22:59:31 +0000]
ARM: tegra11: dvfs: Re-arrange DFLL clock initialization

- Re-assigned DFLL clock init operation to late init function inside
init operation itslef (instead of external assignment during global
tegra11x clocks initialization)

- Included into DFLL clock initialization call to Cl-DVFS debug init,
so that DFLL clock pointer can be passed as an argument, rather than
retrieved in CL-DVFS debug init from hard coded DFLL clock name.

- Added write attribute to tune_high_mv debugfs entry

Change-Id: I03c4cd5e33d7f27ad73ae3319ee1c318e135a639
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/204969
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

6 years agousb: gadget: composite: Fix USB CV compliance testing
Petlozu Pravareshwar [Fri, 8 Feb 2013 11:10:04 +0000]
usb: gadget: composite: Fix USB CV compliance testing

Enable USB_CONFIG_ATT_SELFPOWER in bmAttributes when the
device is self-powered. Also fixing the GET_CONFIGURATION
when the config field is set to NULL.

Bug 965634

Change-Id: I069da940b1473d5c0b49b2ce2abc7f8862956534
Signed-off-by: Petlozu Pravareshwar <petlozup@nvidia.com>
Reviewed-on: http://git-master/r/197438
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

6 years agoARM: Tegra: nct1008: I2C client registration error
Naveen Kumar S [Mon, 31 Dec 2012 13:17:20 +0000]
ARM: Tegra: nct1008: I2C client registration error

Removed duplicate device registration of nct1008.

Bug 1178324

Signed-off-by: Naveen Kumar S <nkumars@nvidia.com>
Change-Id: I53d4f2575b9104b43f10c82d31a6bca5f7b1f873
Reviewed-on: http://git-master/r/187798
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>
Reviewed-on: http://git-master/r/195443

6 years agoRevert "mmc: block: Ignore mmc_blk_abort for out_of_range"
Naveen Kumar Arepalli [Mon, 28 Jan 2013 12:55:59 +0000]
Revert "mmc: block: Ignore mmc_blk_abort for out_of_range"

This reverts commit 24312e84e15f2ead4d372b8678b56349fab27988.

Bug 947965
Bug 1194300

Change-Id: Icf54d83ccb4a92d78bc613117c75344c2979f214
Signed-off-by: Naveen Kumar Arepalli <naveenk@nvidia.com>
Reviewed-on: http://git-master/r/194664
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

6 years agoARM: tegra: usb_phy: Fix IDDQ_OVERRIDE programming
Rakesh Bodla [Thu, 14 Mar 2013 11:31:40 +0000]
ARM: tegra: usb_phy: Fix IDDQ_OVERRIDE programming

Put UTMIPLL to IDDQ if all UTMIP USB2 controllers
are in reset or suspend states. Also, bring UTMIPLL
out of to IDDQ while controllers exiting reset or
suspend states.

Bug 1201974

Change-Id: I1696905601962e372b361a6473ec12a86b816124
Signed-off-by: Rakesh Bodla <rbodla@nvidia.com>
Reviewed-on: http://git-master/r/192639
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

6 years agoarm: tegra: macallan: Enable pid_thermal_gov as default for Tj throttling
Jinyoung Park [Thu, 14 Mar 2013 05:12:10 +0000]
arm: tegra: macallan: Enable pid_thermal_gov as default for Tj throttling

Enable pid_thermal_gov as default thermal governor for Tj throttling.

Bug 1200111

Change-Id: Id0970f69b35f59372da24fb2aa60d79cbcc0f6eb
Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/209415
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

6 years agoarm: tegra: apply new balanced throttling table
Hyungwoo Yang [Thu, 7 Mar 2013 00:10:05 +0000]
arm: tegra: apply new balanced throttling table

apply new balanced throttling table.

Change-Id: I3d04f0e425721a9a2536e4f60a347bd659c803cc
Signed-off-by: Hyungwoo Yang <hyungwooy@nvidia.com>
Reviewed-on: http://git-master/r/206862
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

6 years agocpuquiet: Make stats optional
Peter De Schrijver [Wed, 5 Dec 2012 14:13:09 +0000]
cpuquiet: Make stats optional

Make the per CPU statistics a configureable option.

bug 1049625

Change-Id: I28b248bbbad89a19e8d8d69400733dfd4a2cf052
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
(cherry picked from commit 94ade9be87aeda9353808d0f9331acf3e3639d3a)
Reviewed-on: http://git-master/r/#change,168749
Reviewed-on: http://git-master/r/206801
Tested-by: Ilan Aelion <iaelion@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

6 years agoregulator: bq2419x: Fix hot-plug functionality
Sumit Sharma [Fri, 1 Mar 2013 12:33:32 +0000]
regulator: bq2419x: Fix hot-plug functionality

Fix hot-plug functionality in bq2419x regulator driver

Bug 1245272

Change-Id: I5877310bb346666d97ead811d00683aa8e243db6
Signed-off-by: Sumit Sharma <sumsharma@nvidia.com>
Reviewed-on: http://git-master/r/205552
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

6 years agomfd: bq2419x: Fix hot-plug functionality
Sumit Sharma [Fri, 1 Mar 2013 11:51:35 +0000]
mfd: bq2419x: Fix hot-plug functionality

Fix hot-plug funtionality in bq2419x mfd driver

Bug 1245272

Change-Id: I8ba74f77215f8d69e494856d9599d714653d1d67
Signed-off-by: Sumit Sharma <sumsharma@nvidia.com>
Reviewed-on: http://git-master/r/205551
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

6 years agoARM: Tegra: Pluto: Update emc dvfs table
Gaurav Batra [Sat, 23 Feb 2013 01:41:43 +0000]
ARM: Tegra: Pluto: Update emc dvfs table

Change-Id: I96c91fa81abf44cb1a4a71714922a2822be3cfdb
Signed-off-by: Gaurav Batra <gbatra@nvidia.com>
Reviewed-on: http://git-master/r/203514
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agomfd: palma: enable cache of SMPS regulator register.
Laxman Dewangan [Tue, 19 Feb 2013 07:36:46 +0000]
mfd: palma: enable cache of SMPS regulator register.

Enable caching of SMPS regulator registers. This reduces
the number of i2c transaction from 7 to 1 when changing
voltage of rail.

bug 1238267

Change-Id: Ida1d1c3a634c1e3c1bf8a8b008aea17aeaa5ced3
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/201949
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

6 years agoblock: prevent race/cleanup
Derek Basehore [Tue, 18 Dec 2012 20:27:20 +0000]
block: prevent race/cleanup

Remove a race condition which causes a warning in disk_clear_events.  This
is a race between disk_clear_events() and disk_flush_events().
ev->clearing will be altered by disk_flush_events() even though we are
blocking event checking through disk_flush_events().  If this happens
after ev->clearing was cleared for disk_clear_events(), this can cause the
WARN_ON_ONCE() in that function to be triggered.

This change also has disk_clear_events() not go through a workqueue.
Since we have to wait for the work to complete, we should just call the
function directly.  Also, since this work cannot be put on a freezable
workqueue, it will have to contend with increased demand, so calling the
function directly avoids this.

Bug 1234886

Change-Id: Iad761c120d85971589b0282b6067c48ee1b7800f

[akpm@linux-foundation.org: fix spello in comment]
Signed-off-by: Derek Basehore <dbasehore@chromium.org>
Cc: Mandeep Singh Baines <msb@chromium.org>
Cc: Jens Axboe <axboe@kernel.dk>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Jens Axboe <axboe@kernel.dk>
Change-Id: Iab90b73bee677911f77ca50ff368b95d52e8d3b9
Reviewed-on: http://git-master/r/208469
Reviewed-by: Ajay Gupta <ajayg@nvidia.com>
Tested-by: Ajay Gupta <ajayg@nvidia.com>
Reviewed-by: Bo Yan <byan@nvidia.com>
(cherry picked from commit 75a5e8ba186728b7310341d7df6ed4e2991f0357)
Reviewed-on: http://git-master/r/208866
Reviewed-by: Ashutosh Jha <ajha@nvidia.com>
GVS: Gerrit_Virtual_Submit

6 years agoblock: remove deadlock in disk_clear_events
Derek Basehore [Tue, 18 Dec 2012 20:27:18 +0000]
block: remove deadlock in disk_clear_events

In disk_clear_events, do not put work on system_nrt_freezable_wq.
Instead, put it on system_nrt_wq.

There is a race between probing a usb and suspending the device.  Since
probing a usb calls disk_clear_events, which puts work on a frozen
workqueue, probing cannot finish after the workqueue is frozen.  However,
suspending cannot finish until the usb probe is finished, so we get a
deadlock, causing the system to reboot.

The way to reproduce this bug is to wake up from suspend with a usb
storage device plugged in, or plugging in a usb storage device right
before suspend.  The window of time is on the order of time it takes to
probe the usb device.  As long as the workqueues are frozen before the
call to add_disk within sd_probe_async finishes, there will be a deadlock
(which calls blkdev_get, sd_open, check_disk_change, then
disk_clear_events).  This is not difficult to reproduce after figuring out
the timings.

Bug 1234886

Change-Id: I326339a5ba7011b46a2e8b80a3dbd4fe383096a7
[akpm@linux-foundation.org: fix up comment]
Signed-off-by: Derek Basehore <dbasehore@chromium.org>
Reviewed-by: Mandeep Singh Baines <msb@chromium.org>
Cc: Jens Axboe <axboe@kernel.dk>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Jens Axboe <axboe@kernel.dk>
Reviewed-on: http://git-master/r/208468
Reviewed-by: Ajay Gupta <ajayg@nvidia.com>
Tested-by: Ajay Gupta <ajayg@nvidia.com>
Reviewed-by: Bo Yan <byan@nvidia.com>
(cherry picked from commit 80daddb927db9f4b24276147a17eba220e85bdcc)
Reviewed-on: http://git-master/r/208865
Reviewed-by: Ashutosh Jha <ajha@nvidia.com>
GVS: Gerrit_Virtual_Submit

6 years agousb: xhci: tegra: remove sw WAR for hs_curr_level
Ajay Gupta [Mon, 4 Mar 2013 22:39:31 +0000]
usb: xhci: tegra: remove sw WAR for hs_curr_level

We had seen SS/HS/FS hub re-enumerating in LP0 path with hs_curr_level
value read from usb_calib0 fuse and so had overwritten it to working value
of 0x30. This is no more needed so removing the sw WAR

Bug 1211445

Change-Id: Ib5c7039f76b75d0e40e6fa0221036e72b58454ab
Signed-off-by: Ajay Gupta <ajayg@nvidia.com>
Reviewed-on: http://git-master/r/206463
Reviewed-by: Joy Wang <joyw@nvidia.com>
Reviewed-by: Jui Chang Kuo <jckuo@nvidia.com>
Reviewed-by: Bo Yan <byan@nvidia.com>
(cherry picked from commit d046ffa5903d04212be44159b778ed78321c1ac3)
Reviewed-on: http://git-master/r/208864
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Ashutosh Jha <ajha@nvidia.com>
GVS: Gerrit_Virtual_Submit

6 years agousb: xhci: tegra: set ss_clk at 120MHz before fw loading
Ajay Gupta [Mon, 4 Mar 2013 20:26:16 +0000]
usb: xhci: tegra: set ss_clk at 120MHz before fw loading

This is needed to avoid SS device getting in compliance.

Bug 1246619

Change-Id: I3cbb95f318aae70573d392729f5b8bf069b484db
Signed-off-by: Ajay Gupta <ajayg@nvidia.com>
Reviewed-on: http://git-master/r/206462
Reviewed-by: Henry Lin <henryl@nvidia.com>
Reviewed-by: Jui Chang Kuo <jckuo@nvidia.com>
Reviewed-by: Bo Yan <byan@nvidia.com>
(cherry picked from commit 892f2022442f45b58109de3f304829e7a2c43907)
Reviewed-on: http://git-master/r/208863
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Ashutosh Jha <ajha@nvidia.com>
GVS: Gerrit_Virtual_Submit

6 years agousb: xhci: tegra: enable MC FLUSH of partition before ELPG
Ajay Gupta [Sat, 2 Mar 2013 01:02:58 +0000]
usb: xhci: tegra: enable MC FLUSH of partition before ELPG

The partition client maintains credits for requests to MC. At the time of
ELPG entry, if there are any outstanding requests before the partition reset
is asserted, the credits are returned from MC at the time of ELPG exit after
the reset is released. This will result in overflow of credits and either cause
deadlock/lead to undesirable side effects in all future transactions.

In order to avoid this, SW needs to assert a hot reset to the PC which will
send out a FLUSH_DONE signal at a clean boundary after which all future
transactions are blocked. Only then partition reset can be asserted followed
by ELPG entry.

Bug 1237267

Change-Id: Ide45db658a327b1d663d0293817c7526b7068e74
Signed-off-by: Ajay Gupta <ajayg@nvidia.com>
Reviewed-on: http://git-master/r/205738
Reviewed-by: Henry Lin <henryl@nvidia.com>
Reviewed-by: Jui Chang Kuo <jckuo@nvidia.com>
Reviewed-by: Bo Yan <byan@nvidia.com>
(cherry picked from commit 782cecfe449e08fec201c0ebf011bc57b7545fbd)
Reviewed-on: http://git-master/r/208862
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Ashutosh Jha <ajha@nvidia.com>
GVS: Gerrit_Virtual_Submit

6 years agousb: xhci: tegra: set rxidle mode override
Ajay Gupta [Sat, 2 Mar 2013 00:19:15 +0000]
usb: xhci: tegra: set rxidle mode override

This is need to save power leakage when usb3 link is in
suspend/disconnect state and so SS clock frequency is being
decreased.

Bug 1241968

Change-Id: I354b86643151755ea0517ff1cf0d29be8ef50c94
Signed-off-by: Ajay Gupta <ajayg@nvidia.com>
Reviewed-on: http://git-master/r/205737
Reviewed-by: Henry Lin <henryl@nvidia.com>
Reviewed-by: Jui Chang Kuo <jckuo@nvidia.com>
Reviewed-by: Bo Yan <byan@nvidia.com>
(cherry picked from commit cdd32a2f416772974a264be0b4e24cb82bf5d7fb)
Reviewed-on: http://git-master/r/208861
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Ashutosh Jha <ajha@nvidia.com>
GVS: Gerrit_Virtual_Submit

6 years agousb: xhci: tegra: disable regulators in lp0 path
Ajay Gupta [Fri, 1 Mar 2013 19:40:56 +0000]
usb: xhci: tegra: disable regulators in lp0 path

We should be disabling all xusb regulators except vbus to
save power. Vbus regualtor is needed for xusb LP0 wakeup
capability.

Also changes the sequence of regualtor enable and disable
as listed below. The older sequence is causing kernel
panic during LP0 exit path.

Enable sequence:
regulator_enable(tegra->xusb_vddio_hsic_reg);
regulator_enable(tegra->xusb_hvdd_usb3_reg);
regulator_enable(tegra->xusb_vbus_reg);
regulator_enable(tegra->xusb_avddio_usb3_reg);
regulator_enable(tegra->xusb_avdd_usb3_pll_reg);

Disable sequence:
regulator_disable(tegra->xusb_avdd_usb3_pll_reg);
regulator_disable(tegra->xusb_avddio_usb3_reg);
regulator_disable(tegra->xusb_vbus_reg);
regulator_disable(tegra->xusb_hvdd_usb3_reg);
regulator_disable(tegra->xusb_vddio_hsic_reg);

Bug 1245553

Change-Id: I39b2c5437f39306965e49d7247347a0e91241f0f
Signed-off-by: Ajay Gupta <ajayg@nvidia.com>
Reviewed-on: http://git-master/r/205735
Reviewed-by: Ashutosh Jha <ajha@nvidia.com>
(cherry picked from commit ebcf579b7d2450691a2d9e377b796477ddedcc77)
Reviewed-on: http://git-master/r/208860
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit

6 years agousb: xhci: tegra: fix padctl intr handler
Bharath Yadav [Thu, 28 Feb 2013 09:51:53 +0000]
usb: xhci: tegra: fix padctl intr handler

This fixes the hang issue seen when SS link training fails,
causing constant padctl intr triggering elpg entry/exit.

We should not be doing ss elpg exit without host elpg exit.

Bug 1238452

Change-Id: I340b4556b22b2c729ea121966b29f013b935e532
Signed-off-by: Bharath Yadav <byadav@nvidia.com>
Signed-off-by: Ajay Gupta <ajayg@nvidia.com>
Reviewed-on: http://git-master/r/205729
Reviewed-by: Ashutosh Jha <ajha@nvidia.com>
(cherry picked from commit 86b318e7fe2142942be432223326ce8830c0f358)
Reviewed-on: http://git-master/r/205060
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit

6 years agoxhci: tegra: firmware load to deal with Tegra SMMU
JC Kuo [Tue, 19 Feb 2013 10:41:52 +0000]
xhci: tegra: firmware load to deal with Tegra SMMU

Tegra SMMU was enabled (CONFIG_PLATFORM_ENABLE_IOMMU=y) and driver
needs to create a dma mapping in SMMU so that dma request from
controller can be accepted by Tegra SMMU.

This patch fixes the following error.
SMMU: nr-nw-s (0x6000004a) [......] xusb_host (non-secure read MC_DECERR)

Bug 1222494

Change-Id: I2db1baee7f37dc81b9f8215e02d312ee183085b8
Signed-off-by: JC Kuo <jckuo@nvidia.com>
Reviewed-on: http://git-master/r/202017
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>
(cherry picked from commit 5832f2affcb8b5cb5806698fec53d15af0486665)
Reviewed-on: http://git-master/r/208859
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Ajay Gupta <ajayg@nvidia.com>
Tested-by: Ajay Gupta <ajayg@nvidia.com>
Reviewed-by: Ashutosh Jha <ajha@nvidia.com>
GVS: Gerrit_Virtual_Submit

6 years agostaging: iio: adc: Add Palma gpadc support
Pradeep Goudagunta [Wed, 13 Mar 2013 10:57:55 +0000]
staging: iio: adc: Add Palma gpadc support

TI Palma series pmic chips have a 16-channel general
purpose adc module, add support for it.

Bug 1242265

Change-Id: I3133aed7ac8781161665b7e8f5125d40bbc3a17a
Signed-off-by: Pradeep Goudagunta <pgoudagunta@nvidia.com>
Reviewed-on: http://git-master/r/208790
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

6 years agovideo: tegra: dsi: Fix h_blank too small warning
Animesh Kishore [Wed, 6 Mar 2013 09:42:13 +0000]
video: tegra: dsi: Fix h_blank too small warning

Add changes for video/command mode case and
continuous/tx_only clock mode case.

Bug 1239034

Change-Id: I8c6c4b55bf212debcd2d124035a17fa8cae5f668
Signed-off-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-on: http://git-master/r/206635
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
(cherry picked from commit f7828775fd4466d4009162425f43b44d01705784)
Reviewed-on: http://git-master/r/208366
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

6 years agovideo: tegra: dsi: Remove spurious warnings
Animesh Kishore [Tue, 26 Feb 2013 12:07:06 +0000]
video: tegra: dsi: Remove spurious warnings

Change-Id: I40b55d66258f06c1eb19dddc2815153b4f8346ec
Signed-off-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-on: http://git-master/r/204178
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
(cherry picked from commit 95861c68d23f881985cc139ce6f8dcb8ebfcdf4a)
Reviewed-on: http://git-master/r/208365
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

6 years agomfd: palmas: Implement irq chip for driver locally
Laxman Dewangan [Tue, 12 Mar 2013 09:26:54 +0000]
mfd: palmas: Implement irq chip for driver locally

In place of using regmap irq for the plamas interrupt support,
implement the same in locally. This gives the oportunity to
implement irq_set_type() which is needed for the gpio edge
trigger level.

bug 1251695

Change-Id: I16879a29003176ce7ba34b2e16880a07e0d3e32e
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/208360
Tested-by: Pradeep Goudagunta <pgoudagunta@nvidia.com>

6 years agogpio: palmas: use palmas API for getting irq
Laxman Dewangan [Tue, 12 Mar 2013 08:32:39 +0000]
gpio: palmas: use palmas API for getting irq

To get the irq number for given gpio, use the palmas API
palmas_irq_get_virq() in place of directly using regmap API.

Change-Id: I2305b6c6c852a914efd08c4e020dba4301bd83fc
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/208339
Reviewed-by: Mallikarjun Kasoju <mkasoju@nvidia.com>

6 years agortc: palmas: get irq number through platform_get_irq()
Laxman Dewangan [Tue, 12 Mar 2013 08:30:29 +0000]
rtc: palmas: get irq number through platform_get_irq()

The palmas mfd driver pass the RTC interrupt through the IRQ_RESOURCE
and hence RTC driver can get the irq by calling platform_get_irq().

Change-Id: Ib6e4afd0511ab6cf80df43defe29ffe50480f27c
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/208338
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mallikarjun Kasoju <mkasoju@nvidia.com>

6 years agousb: otg: tegra: Remove duplicated irq_work call.
Harry Hong [Tue, 12 Mar 2013 05:10:10 +0000]
usb: otg: tegra: Remove duplicated irq_work call.

Even vbus is floating state, sometimes vbus is recognized
as high.
To prevent it, do not set USB_VBUS_INT_STATUS
if support_pmu_vbus is set to true.
It'll not call irq_work by vbus status of USB_PHY_WAKEUP.

bug 1242710

Change-Id: I7725aac8f100e8edb02b9bd00dc7b5325a70fa9e
Signed-off-by: Harry Hong <hhong@nvidia.com>
Reviewed-on: http://git-master/r/208287
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Rakesh Bodla <rbodla@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

6 years agoARM: tegra: usb_phy:remove unnecessary phy api
Rakesh Bodla [Fri, 8 Mar 2013 17:45:13 +0000]
ARM: tegra: usb_phy:remove unnecessary phy api

Removing unnecessary phy apis.

Bug 1242710

Change-Id: I920c5fd41f6daa2d3e7eb2964904574901a4d585
Signed-off-by: Rakesh Bodla <rbodla@nvidia.com>
Reviewed-on: http://git-master/r/207635
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

6 years agousb: host: tegra:remove unnecessary phy api calls
Rakesh Bodla [Fri, 8 Mar 2013 17:42:14 +0000]
usb: host: tegra:remove unnecessary phy api calls

Some of the variables are passed through platform data,
no need to call phy callbacks for initialization.

Bug 1242710

Change-Id: Ic16db9c1daefb19e2ffa8cc0bd6ac4ac48fdd569
Signed-off-by: Rakesh Bodla <rbodla@nvidia.com>
Reviewed-on: http://git-master/r/207634
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

6 years agousb: gadget: tegra:remove unnecessary phy api calls
Rakesh Bodla [Fri, 8 Mar 2013 17:41:46 +0000]
usb: gadget: tegra:remove unnecessary phy api calls

Some of the variables are passed through platform data,
no need to call phy callbacks for initialization.

Bug 1242710

Change-Id: Ib143d9c56b695fd4f27b8e38444f68077bea48ec
Signed-off-by: Rakesh Bodla <rbodla@nvidia.com>
Reviewed-on: http://git-master/r/207633
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

6 years agoARM: tegra: usb: Increase CPU frequency range
Rakesh Bodla [Fri, 8 Mar 2013 12:17:02 +0000]
ARM: tegra: usb: Increase CPU frequency range

Now tegra chips cpu frequency has increased and updating
the range accordingly.

Bug 1216779

Change-Id: I57d530bcc5f4b8d5969ed7b5ffc21987e23809e8
Signed-off-by: Rakesh Bodla <rbodla@nvidia.com>
Reviewed-on: http://git-master/r/207587
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

6 years agovideo: tegra: camera: increase max iso BW
Jihoon Bang [Tue, 5 Mar 2013 19:43:06 +0000]
video: tegra: camera: increase max iso BW

Change max iso BW from 540MBps to calculated peak BW.
Peak BW is calculated using max VI clock and total
byte per pixel of VI output.

Bug 1245734

Change-Id: I40516c2416e504fd8b7098e2aae40326bac5b0a3
Reviewed-on: http://git-master/r/206391
(cherry picked from commit ddb3591f0270ba6e0f43a91c29c69518b565785f)
Signed-off-by: Jihoon Bang <jbang@nvidia.com>
Reviewed-on: http://git-master/r/207391
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

6 years agosoc: tegra: fix coverity errors
Dara Ramesh [Tue, 5 Mar 2013 10:44:53 +0000]
soc: tegra: fix coverity errors

fix memory cleanup and array comparison with null.

Change-Id: Ib27b0814c2744024f36fa3f3f510927eceb490a1
Signed-off-by: Dara Ramesh <dramesh@nvidia.com>
Reviewed-on: http://git-master/r/206284
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

6 years agoarm: tegra: pluto: fix coverity error
Dara Ramesh [Tue, 5 Mar 2013 10:36:08 +0000]
arm: tegra: pluto: fix coverity error

added new variable to check edp support.

Change-Id: Ia5d63c8e6ddfb98c7218efa53103aaa286c67298
Signed-off-by: Dara Ramesh <dramesh@nvidia.com>
Reviewed-on: http://git-master/r/206282
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

6 years agoARM: tegra: usb_phy: Reset Controller during open
Suresh Mangipudi [Wed, 27 Feb 2013 08:57:29 +0000]
ARM: tegra: usb_phy: Reset Controller during open

The USB(HSIC) controller is reset during the open of the driver.

Bug 1237224

Change-Id: Ic881689752b7c89b8c8b3342ad870bc1b90be5f0

Signed-off-by: Suresh Mangipudi <smangipudi@nvidia.com>
Change-Id: I0fe674086711ae1788ed42d4708eee92ffd0f9e4
Reviewed-on: http://git-master/r/204501
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

6 years agommc: tegra: Enable cache control for eMMC4.5 device
Naveen Kumar Arepalli [Fri, 22 Feb 2013 15:01:00 +0000]
mmc: tegra: Enable cache control for eMMC4.5 device

Enable cache control for eMMC4.5 devices.

Bug 1247699
Bug 1238635

Change-Id: Id0ede63599e8c3713fc2b95f0741cbcd1e7086bc
Signed-off-by: Naveen Kumar Arepalli <naveenk@nvidia.com>
Reviewed-on: http://git-master/r/203326
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

6 years agovideo: tegra: dc: Fix display blink during boot
Vineel Kumar Reddy Kovvuri [Mon, 18 Feb 2013 05:35:23 +0000]
video: tegra: dc: Fix display blink during boot

Fix for display flashing multiple times when jumping from bootloader
to kernel during boot

Bug 1229530

Change-Id: I59ffccf5f41b70d377f817c3a8f95ff2159fdcb3
Signed-off-by: Vineel Kumar Reddy Kovvuri <vineelkumarr@nvidia.com>
Reviewed-on: http://git-master/r/201152
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>

6 years agoarm: tegra: dalmore: Fix display blink during boot
Vineel Kumar Reddy Kovvuri [Mon, 18 Feb 2013 05:34:19 +0000]
arm: tegra: dalmore: Fix display blink during boot

Fix for display flashing multiple times when jumping from bootloader
to kernel during boot

Bug 1229530

Change-Id: I2888206c6f49820b7742da92394ae5ec78d64f6b
Signed-off-by: Vineel Kumar Reddy Kovvuri <vineelkumarr@nvidia.com>
Reviewed-on: http://git-master/r/201151
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>

6 years agoARM: tegra: dvfs: Add dvfs rails thermal profiles
Alex Frid [Wed, 6 Mar 2013 07:34:16 +0000]
ARM: tegra: dvfs: Add dvfs rails thermal profiles

Added thermal profiles for dvfs rails: vdd_cpu and vdd_core. Thermal
profile for each rail specifies a set of temperature trip-points and
matching minimum voltage levels (thermal floors) that limit voltage
down scaling within the respective temperature ranges. For now, only
monotonically descending profiles are supported.

Converted Tegra11 implementation of cold temperature minimum voltage
limit into single-trip-point profile.

Bug 1248374

Change-Id: Ib7f32c2266fdf7c8a28fe4cfaaeefe5a5a6eaacb
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/208151
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

6 years agowatchdog: tegra: Only support one wdt device
Bo Yan [Fri, 8 Mar 2013 02:12:01 +0000]
watchdog: tegra: Only support one wdt device

Change-Id: I91dd3214092ab5b450e74bc5bf772ee02f6b432e
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/207770
Reviewed-by: Kamal Balagopalan <kbalagopalan@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User

6 years agoARM: tegra: TMR8/TMR9 not to be used for watchdog
Bo Yan [Fri, 8 Mar 2013 02:02:32 +0000]
ARM: tegra: TMR8/TMR9 not to be used for watchdog

TMR7 is used for watchdog. TMR10 is used for suspend/resume
recovery only.

Change-Id: If62a1da879d61e95c48c47ab0d0cbb549c5dfc37
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/207769
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

6 years agovideo: tegra: camera: change unit of emc clock
Jihoon Bang [Wed, 20 Feb 2013 04:17:40 +0000]
video: tegra: camera: change unit of emc clock

Change unit of emc clock from Hz to Byte/sec.
Camera SW in userspce submits required peak
memory BW to camera driver.

Bug 1237491

Change-Id: Idb425509af33acb92c84379efd07f0d6fe5dd165
Reviewed-on: http://git-master/r/202315
(cherry picked from commit ac1c8164a72900d86c66559e960b4eeb42191295)
Signed-off-by: Jihoon Bang <jbang@nvidia.com>
Reviewed-on: http://git-master/r/207390
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>

6 years agoarm: tegra: macallan: add regulator for gyro sensor
Kerwin Wan [Mon, 4 Mar 2013 02:41:39 +0000]
arm: tegra: macallan: add regulator for gyro sensor

Bug 1245415

Change-Id: I76e4997aeeff4e6cfc5a7c3ffcc996feee8c6732
Signed-off-by: Kerwin Wan <kerwinw@nvidia.com>
Reviewed-on: http://git-master/r/205809
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
GVS: Gerrit_Virtual_Submit

6 years agoARM: tegra: clock: Fix spelling in function names
Alex Frid [Sun, 3 Mar 2013 04:01:10 +0000]
ARM: tegra: clock: Fix spelling in function names

Change-Id: I9e37f91e7b7ae7adec40e6290a6c3c423cd2d912
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/205782
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

6 years agommc: Tegra: Fix calculation for partial_win_tap
Graziano Misuraca [Thu, 28 Feb 2013 23:02:50 +0000]
mmc: Tegra: Fix calculation for partial_win_tap

Bug 1241780

Change-Id: I1dd88a0a463fa90908a4a4bfe749fa526eba3689
Signed-off-by: Graziano Misuraca <gmisuraca@nvidia.com>
Reviewed-on: http://git-master/r/205283
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>