7 years agoARM: Tegra: fix compilation warnings
Varun Wadekar [Tue, 10 Jul 2012 10:26:10 +0000]
ARM: Tegra: fix compilation warnings

Change-Id: I00c67d6ec68c7566c2764aa8d135c101bacc17d7
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

7 years agoARM: Tegra: Enable 900MHz at 1V on restricted pll_m
Graziano Misuraca [Fri, 18 May 2012 23:32:34 +0000]
ARM: Tegra: Enable 900MHz at 1V on restricted pll_m

Allow pll_m to reach 900MHz at 1V on T30, T33, T37
rev A02+ SKUs.

Bug 891320

Change-Id: Idbfb10014ae2a1d06abc3bc1d0bed59c583fac98
Signed-off-by: Graziano Misuraca <gmisuraca@nvidia.com>
Reviewed-on: http://git-master/r/103453
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoARM: Tegra: cardhu: Let emc to 450MHz on T33+ at 1V
Graziano Misuraca [Fri, 11 May 2012 00:35:33 +0000]
ARM: Tegra: cardhu: Let emc to 450MHz on T33+ at 1V

Change dvfs table to allow emc to hit 450MHz at 1V VDD_CORE.
Line in emc table is also used for T30/T30s but because
those can't reach 1350mV they should never use a 450MHz
bct and therefore jump from 400@1V to 800@1.2V as before.

Bug 973238

Change-Id: I4f1f96c959658e6f9aeca8841c2bfa86fe20cfb8
Signed-off-by: Graziano Misuraca <gmisuraca@nvidia.com>
Reviewed-on: http://git-master/r/101868
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agodrivers: cpuquiet: fix error message
Peter De Schrijver [Mon, 11 Jun 2012 15:41:27 +0000]
drivers: cpuquiet: fix error message

Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>

Change-Id: If04c699e002542bd8ce4b37b2367d7ec496c284e
Reviewed-on: http://git-master/r/107959
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sai Gurrappadi <sgurrappadi@nvidia.com>
Tested-by: Sai Gurrappadi <sgurrappadi@nvidia.com>
Reviewed-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Tested-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Reviewed-by: Matthew Longnecker <mlongnecker@nvidia.com>
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

7 years agoARM: tegra: dvfs: Update Tegra3 I/O dvfs tables
Alex Frid [Sat, 9 Jun 2012 00:38:40 +0000]
ARM: tegra: dvfs: Update Tegra3 I/O dvfs tables

Updated 0.95V entries in Tegra3 dvfs tables for nand, nor, spi, and
pwm clocks with recent characterization results. Removed usb, pcie,
and spdif dvfs since characterization allows running these interfaces
in the entire supported voltage range.

Bug 817679
Bug 841336

Change-Id: Iaaa2a3ff8b3c07915f1cb05e7b14da545428888e
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/107779
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Wen Yi <wyi@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

7 years agoARM: tegra: dvfs: Update Tegra3 display subsystem dvfs tables
Alex Frid [Fri, 8 Jun 2012 20:30:09 +0000]
ARM: tegra: dvfs: Update Tegra3 display subsystem dvfs tables

Updated 0.95V entries in Tegra3 dvfs tables for display and dsi
with recent characterization results. Removed hdmi and crt dvfs
since characterization allows running these modules at max rate
in the entire supported voltage range.

Bug 817679
Bug 841336

Change-Id: I28651a692e30a20536613460ea0e45155a530af7
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/107778
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Wen Yi <wyi@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

7 years agoARM: tegra: dvfs: Update Tegra3 sclk and cbus dvfs tables
Alex Frid [Fri, 8 Jun 2012 20:03:58 +0000]
ARM: tegra: dvfs: Update Tegra3 sclk and cbus dvfs tables

Updated 0.95V entries in Tegra3 dvfs tables for sclk and cbus clocks
with recent characterization results.

Bug 817679
Bug 841336

Change-Id: I892690aea4c584b34be5dbfcbcd8b35abd86a997
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/107777
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Wen Yi <wyi@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

7 years agomedia: video: tegra: ar0832: Make focuser range, slew rate tunable
Naren Bhat [Thu, 17 May 2012 01:49:21 +0000]
media: video: tegra: ar0832: Make focuser range, slew rate tunable

The range parameters & slew rate from the blocks-camera are being passed
down to ODM and then to kernel. Generic structure added for sharing
the data between ODM and kernel instead of specific structure.

Bug 954874

Change-Id: I84656e36a5a2721c007de78aa5c20f5dfeb00361
Signed-off-by: Naren Bhat <nbhat@nvidia.com>
Reviewed-on: http://git-master/r/102077
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

7 years agovideo: tegra: dc: fix bug causing drawing before flipping
I-Gene Leong [Fri, 18 Nov 2011 02:49:15 +0000]
video: tegra: dc: fix bug causing drawing before flipping

The tegra_dc_trigger_windows function was improperly using the
WIN_x_UPDATE bits to determine when a flip has occurred instead of the
WIN_x_ACT_REQ bits. Without this change, it's possible for the postflip
syncpoint for a buffer to get incremented before it actually flips.
Still need to figure out why that's even possible...

Fixes bug 902955

Change-Id: I67ba093a0114646977cc8cb95a040ec4178cebfc
Reviewed-on: http://git-master/r/65389
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-by: Nate Huang <nhuang@nvidia.com>
Tested-by: Nate Huang <nhuang@nvidia.com>
Reviewed-on: http://git-master/r/98024
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

7 years agoARM: tegra: resolve compilation time warnings
Sanjay Singh Rawat [Tue, 12 Jun 2012 16:53:56 +0000]
ARM: tegra: resolve compilation time warnings

- Adding flag to treat warning as error.
- Handling warnings of unused variable, structures and functions,
wrong return type, wrong type comparision.

Bug 949219

Change-Id: I9d02387ce1073c4e46f69d01669285aa3754f1d9
Signed-off-by: Sanjay Singh Rawat <srawat@nvidia.com>
Reviewed-on: http://git-master/r/104968
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

7 years agosmsc95xx: Add module params to read MAC address
Manoj Chourasia [Sun, 12 Feb 2012 14:18:06 +0000]
smsc95xx: Add module params to read MAC address

This patch adds support for mac_addr module param

mac_addr : MAC address which will be assigned to the
above device. example
mac_addr=0x0,0x2,0x2,0x3,0x3,0x4

If EEPROM read fails for MAC address for a smsc
interface and if the mac_addr module param is set
then driver will set that device MAC address provided
in mac_addr. This can be set for only one device

bug 719410, bug 921146

Change-Id: I6eb0363951d91fad857b76af8a4a097cd0fb7623
Signed-off-by: Manoj Chourasia <mchourasia@nvidia.com>
Reviewed-on: http://git-master/r/108237
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>

7 years agomedia: video: tegra: ov5650: enable DPC feature
Charlie Huang [Fri, 25 May 2012 18:35:42 +0000]
media: video: tegra: ov5650: enable DPC feature

enable Defective Pixel Correction block on sensor SOC.

bug 976218

Change-Id: I754200b7f625509950b061173c7e5de2a831d607
Signed-off-by: Charlie Huang <chahuang@nvidia.com>
Reviewed-on: http://git-master/r/104776
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bhushan Rayrikar <brayrikar@nvidia.com>
Reviewed-by: Krupal Divvela <kdivvela@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Amy Deng <amyd@nvidia.com>
Reviewed-by: Frank Chen <frankc@nvidia.com>
Reviewed-by: Wei Chen <wechen@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

7 years agovideo: tegra: dc: Use ref-count to mask vblank interrupt.
Kevin Huang [Fri, 8 Jun 2012 23:15:55 +0000]
video: tegra: dc: Use ref-count to mask vblank interrupt.

Bug 990586

Change-Id: I63da2bd0aaae86070718e0d769b8c9555db18547
Signed-off-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-on: http://git-master/r/107714
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

7 years agovideo: tegra: dc: Fix backlight on/off sequence
Mark Zhang [Thu, 31 May 2012 08:01:31 +0000]
video: tegra: dc: Fix backlight on/off sequence

Register backlight device after tegradc.0 and tegradc.1. This makes
sure turning on/off backlight in correct sequence and eliminates the
flicker during suspending and resuming.

Bug 964626

Change-Id: I16a545b0148faa341b2443c76d9ca4c7eb7f636c
Signed-off-by: Mark Zhang <markz@nvidia.com>
Reviewed-on: http://git-master/r/105611
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Peer Chen <pchen@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Shashank Sharma <shashanks@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

7 years agoAvoid aliasing mappings in DMA coherent allocator
Manoj Chourasia [Mon, 4 Jun 2012 11:55:43 +0000]
Avoid aliasing mappings in DMA coherent allocator

Avoid multiple mappings with DMA coherent/writecombine allocator by pre-
allocating the mappings, and removing that memory from the system memory
mapping.  (See previous discussions on linux-arm-kernel as to why this
is bad.)

NB1: By default, we preallocate 2MB for DMA coherent, and 2MB for write
combine memory, rather than 1MB for each in case 1MB is not sufficient
for existing platform usage.  Platforms have the option of shrinking
this down to 1MB DMA / 1MB WC (or even 2MB DMA / 0MB WC) if they so wish.
The DMA memory must be a multiple of 1MB, the write combine memory must
also be a multiple of 1MB, and the two together must be a multiple of
2MB.

NB2: On ARMv6/7 where we use 'normal uncacheable' memory for both DMA
and WC, the two pools are combined into one, as was the case with the
previous implementation.

The down side to this change is that the memory is permanently set aside
for DMA purposes, but I believe that to be unavoidable if we are to
avoid the possibility of the cache getting in the way on VIPT CPUs.

This removes the last known offender (at this time) from the kernel.

Given that DMA memory is fully coherent by this patch, cache
invalidation/clean is not required and so, we skip cache related
activities for the memory managed by the DMA layer. The bus
address -> virtual address conversion normally used in the calling
path and the fact that we remove kernel static mapping corresponding
to the DMA buffers leads to exceptions otherwise.

bug 876019
bug 965047
bug 987589

Change-Id: I72beb386605aafe1a301494a95a67d094ea6b2e4
Signed-off-by: Russell King <rmk@arm.linux.org.uk>
Signed-off-by: Manoj Chourasia <mchourasia@nvidia.com>
Reviewed-on: http://git-master/r/106212
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

7 years agopower: smb349: fix I2C error when unplug ext power
Syed Rafiuddin [Thu, 7 Jun 2012 06:12:28 +0000]
power: smb349: fix I2C error when unplug ext power

When unplug the external power, SMB349 will reload the OTP setting.
It sometimes caused I2c errors. See bug 996103 and 991401.

Add a 50ms delay when hotplugging the external power to fix the
issue.

SMB349 might mistakenly detect dedicated USB charger as standard
USB device if plug in the USB at low speed. See Bug 996108.

Add a 500ms delay to fix the issue.

Bug 996103
Bug 996108
Bug 991401

Change-Id: I008a45fa221e9a566af64afb1988bbbd7a9f5c79
Signed-off-by: Chandler Zhang <chazhang@nvidia.com>
Signed-off-by: Syed Rafiuddin <srafiuddin@nvidia.com>
Reviewed-on: http://git-master/r/106684
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

7 years agoarm: tegra: p1852: drive touch panel with resolution 1366x768
Dongfang Shi [Tue, 8 May 2012 22:24:25 +0000]
arm: tegra: p1852: drive touch panel with resolution 1366x768

Enable WXGA display and touch input for p1852 touch panel.

board-p1852-panel.c:
added WXGA timing for atmel touch panel.

board-p1852.c:
initialize touch panel if touch input is defined.

board-p1852.h:
added p1852 touch panel GPIO and bus.

tegra_p1852_gnu_linux_defconfig:
added touch panel flags, not defined by default.

bug 936232

Change-Id: Ia50b991f6aa5ed0ece458ad3871a68684a9234a6
Signed-off-by: Dongfang Shi <dshi@nvidia.com>
Reviewed-on: http://git-master/r/101348
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoARM: Tegra: Kai: Move Raydium init declaration
Graziano Misuraca [Wed, 11 Apr 2012 19:03:47 +0000]
ARM: Tegra: Kai: Move Raydium init declaration

Move Raydium touch init declaration from board-specific
board-kai.h to generic board-touch.h

Signed-off-by: Graziano Misuraca <gmisuraca@nvidia.com>
Change-Id: If82572a296ad6e5a3b1733827289e9b71a624176
Reviewed-on: http://git-master/r/95919
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoemc: tegra3: Change debug eack_state permissions
Hao Tang [Tue, 5 Jun 2012 11:24:37 +0000]
emc: tegra3: Change debug eack_state permissions

Remove write permission of eack_state for cts verification. The init script
will make it acessible on engineering builds

Bug 906796

Change-Id: I1b5d77f4ee3d0e39106840eca0c53e6347c34ea1
Signed-off-by: Hao Tang <htang@nvidia.com>
Reviewed-on: http://git-master/r/106668
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Raymond Poudrier <rapoudrier@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>

7 years agoinput: touchscreen: rmi: Change permissions
Hao Tang [Tue, 5 Jun 2012 10:39:42 +0000]
input: touchscreen: rmi: Change permissions

Remove write permission for cts verification. The init script
will make it acessible on engineering builds

Bug 906796

Change-Id: I43170f61871018d15a710c1a75b5298dffec6f87
Signed-off-by: Hao Tang <htang@nvidia.com>
Reviewed-on: http://git-master/r/106667
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: David Schalig <dschalig@nvidia.com>
Reviewed-by: Robert Collins <rcollins@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>

7 years agoasoc: max98095: probe with no device there fix
Rhyland Klein [Wed, 6 Jun 2012 19:28:40 +0000]
asoc: max98095: probe with no device there fix

There is path through which registering a card will fail to probe,
but that error code is not propogated back to the tegra machine
driver. To catch this case in the machine driver's probe routine,
we need to ensure that after registering the card, the card is
instantiated and fail probe if not.

Change-Id: I64ba952685ef193a3b248502943771c518396808
Signed-off-by: Rhyland Klein <rklein@nvidia.com>
Reviewed-on: http://git-master/r/106837
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Scott Peterson <speterson@nvidia.com>

7 years agovideo: tegra: dc: Clock-gate display modules dynamically.
Kevin Huang [Wed, 6 Jun 2012 17:48:18 +0000]
video: tegra: dc: Clock-gate display modules dynamically.

Bug 936337
Bug 899053

Change-Id: I2b3d8cfc8a00881338c1e17d03f2844d15ba7d3e
Signed-off-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-on: http://git-master/r/106313
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoARM: tegra: p1852: remove tegra_gpio_enable/tegra_gpio_disable
Mohit Kataria [Tue, 5 Jun 2012 08:54:40 +0000]
ARM: tegra: p1852: remove tegra_gpio_enable/tegra_gpio_disable

tegra_gpio driver supports configuring gpio when direction is set.
So removed tegra_gpio_enable/tegra_gpio_disable from p1852 board
file.

Bug 984442

Change-Id: I176b99fb277e01d0ef426c793ce0d1b3bbbb847d
Signed-off-by: Mohit Kataria <mkataria@nvidia.com>
Reviewed-on: http://git-master/r/105902
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

7 years agommc: proactively issue bkops_start and refresh
Mohit Kataria [Tue, 5 Jun 2012 09:35:31 +0000]
mmc: proactively issue bkops_start and refresh

Adding CMD56 implementation.
Doing the following for manfid 0x90 and FW revisions 0x73 and
0x7b (both are non-standard custom FW):
1. Adding change to issue BKOPS_START whenever 20 seconds have gone
by without any slow write operations.
2. Adding change to issue CMD56 to refresh (custom feature) 1 block
whenever 60 seconds have gone by without any slow write operations.

Corresponding changes are already there in embedded branches:
http://git-master/r/#change,93247
http://git-master/r/#change,97555

Bug 847037.
Bug 874256.
Bug 963737.

Change-Id: Ie36b52620a75320abfedc36d1408647b36eddb46
Signed-off-by: Vishal Singh <vissingh@nvidia.com>
Reviewed-on: http://git-master/r/102259
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Luis Dib <ldib@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

7 years agopower: smb349: added debugfs to dump registers.
Linqiang Pu [Mon, 4 Jun 2012 13:22:34 +0000]
power: smb349: added debugfs to dump registers.

also cleanup the driver code to remove warnings and indent issue.

Change-Id: I6fd81a369be9141a5819bf086078bc609360efd8
Signed-off-by: Linqiang Pu <dpu@nvidia.com>
Reviewed-on: http://git-master/r/106682
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agousb: ehci: tegra: fix HSIC bus reset issues.
Vinod Atyam [Fri, 8 Jun 2012 09:24:06 +0000]
usb: ehci: tegra: fix HSIC bus reset issues.

Corrected wIndex in the hub control to call the bus reset sequence properly.

Change-Id: I7d410262d55ad4ad5acfe72e8725616238f863ac
(cherry picked from commit fee4a582584e24e93b9c43446a0d223664d70e6b)
(cherry picked from commit f8b775561696979ad08f53ea3b3c571bc07734bb)
Reviewed-on: http://git-master/r/107593
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Vinod Atyam <vatyam@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
GVS: Gerrit_Virtual_Submit

7 years agofat: Remove FAT Directory Bread message
naveenk [Fri, 27 Apr 2012 06:33:50 +0000]
fat: Remove FAT Directory Bread message

Remove FAT Directory Bread message which is
causing timing issues.

Bug 992496

Change-Id: Ieb58e38bf8ac81f6c0558361f9f296a8e9071b33
Signed-off-by: venkata jagadish <vjagadish@nvidia.com>
Reviewed-on: http://git-master/r/105354
Reviewed-by: Naveen Kumar Arepalli <naveenk@nvidia.com>
Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>

7 years agomedia: video: tegra: Update ad5816 focuser driver
Sudhir Vyas [Fri, 1 Jun 2012 12:42:41 +0000]
media: video: tegra: Update ad5816 focuser driver

Modify code structure and incorporate
few review comments raised in base change
of ad5816 driver implementation.

Bug 947792

Change-Id: I4b9e95669353f6e9bb71f4e172b71b4e31b1f0d7
Signed-off-by: Sudhir Vyas <svyas@nvidia.com>
Reviewed-on: http://git-master/r/105933
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

7 years agoRevert "usb: otg: tegra: change logic for 'from' in irq_work"
Ankit Pashiney [Wed, 6 Jun 2012 22:50:05 +0000]
Revert "usb: otg: tegra: change logic for 'from' in irq_work"

This reverts commit d92da78335899834f8f667eb7c865aaf47bdff48.

Change-Id: I433bacc1d2b0a57a49057895593eb30f8b410d45
Reviewed-on: http://git-master/r/106885
Reviewed-by: Ankit Pashiney <apashiney@nvidia.com>
Tested-by: Ankit Pashiney <apashiney@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>

7 years agolightsensor: adding LIGHTSENSOR_IOCTL_SET_DELAY
Sachin Nikam [Mon, 4 Jun 2012 12:20:15 +0000]
lightsensor: adding LIGHTSENSOR_IOCTL_SET_DELAY

Introducing LIGHTSENSOR_IOCTL_SET_DELAY to set the polling interval

Bug 993924

Change-Id: I3a4513799d3d96b9c3b701c1194b31562bf8f1e2
Signed-off-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-on: http://git-master/r/106185
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

7 years agolightsensor: cm3217: increasing polling_dealy for als
Sachin Nikam [Fri, 1 Jun 2012 10:15:04 +0000]
lightsensor: cm3217: increasing polling_dealy for als

- Increasing default polling_delay from 500mS to 1000mS
  to reduce unnecessary cpu hogging
- Supporting LIGHTSENSOR_IOCTL_SET_DELAY to have facility
  to set delay from sensor HAL
- Less prints spew on console by changing pr_info -> pr_debug

Bug 993924

Change-Id: Iac0770553a1d426e4953aa4c8ff976b6cdc8fd81
Signed-off-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-on: http://git-master/r/105898
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

7 years agousb: otg: tegra: change logic for 'from' in irq_work
Tom Cherry [Tue, 29 May 2012 22:54:57 +0000]
usb: otg: tegra: change logic for 'from' in irq_work

Change-Id: I8e23c1d1afd67e5b7456d63b0aa2db254c6434cf
Signed-off-by: Tom Cherry <tcherry@nvidia.com>
Reviewed-on: http://git-master/r/105211

7 years agovideo: tegra: dc: recover underflow error
Jay Cheng [Thu, 5 Apr 2012 00:30:58 +0000]
video: tegra: dc: recover underflow error

1. set UF_LINE_FLUSH to 0 by default.
2. if it gets 4 consecutive frames with underflows, enable UF_LINE_FLUSH to
get rid of underflow condition.

Signed-off-by: Jay Cheng <jacheng@nvidia.com>
Change-Id: I6d647d958484ee355809036bec7ca1b0c716017b
Reviewed-on: http://git-master/r/103227
Reviewed-by: Michael I Gold <gold@nvidia.com>

7 years agovideo: tegra: nvavp: Add a clock request ioctl
Hyung Taek Ryoo [Fri, 11 May 2012 18:19:00 +0000]
video: tegra: nvavp: Add a clock request ioctl

Add nvavp_force_clock_stay_on ioctl which provides way for user-mode driver
to request the VDE/BSEV clocks. This change is to fix a hang during DRM
session close. The AVP driver may have already turned
the clocks off since playback was paused prior to session teardown. This
situation can cause the OTF driver on secure side to hang if the VDE/BSEV
clocks are not explicitly enabled prior to calling session terminate.

Bug 960130
Bug 961015
Bug 979102

Change-Id: I3c09a6766f50a01ed04fbfd03e723ad9e978909f
Reviewed-on: http://git-master/r/102024
Reviewed-by: Prajakta Gudadhe <pgudadhe@nvidia.com>
Tested-by: Prajakta Gudadhe <pgudadhe@nvidia.com>

7 years agomedia: nvavp: make the clock requests be reference counted
Dima Zavin [Fri, 11 May 2012 18:12:32 +0000]
media: nvavp: make the clock requests be reference counted

Previously we only managed the clocks around pushbuffer submit by using
the non-emptiness of the pushbuffer as an implicit refcnt on the clock.
Add an actual refcnt on the clocks to allow other entities to keep
references on the clocks. Still use the queue being non-empty to request
clock, now represented by the pending flag.

This is a prerequisite for a follow-on patch that will allow avp client
to keep extra refs on the clocks to workaround an issue where the bsev
clocks need to be on to erase the DRM keys AFTER decode has been
finished. Currently, this would cause a lockup since the clocks would
be turned off at the end of decode.

Change-Id: I8314657d0073614ab6a2f6708ed1785e9aff2ff2
Reviewed-on: http://git-master/r/102023
Reviewed-by: Karan Jhavar <kjhavar@nvidia.com>
Reviewed-by: Prajakta Gudadhe <pgudadhe@nvidia.com>
Tested-by: Prajakta Gudadhe <pgudadhe@nvidia.com>

7 years agoARM: curacao: Fix bad merge
Pradeep Kumar [Wed, 11 Jul 2012 10:24:59 +0000]
ARM: curacao: Fix bad merge

Enable SDMMC1_CD, which was disabled by bad merge.

Change-Id: Ib73771fdfca0fe7df08eae3600d079e4f403c72d
Signed-off-by: Pradeep Kumar <pgoudagunta@nvidia.com>
Reviewed-on: http://git-master/r/114956
Reviewed-by: Naveen Kumar Arepalli <naveenk@nvidia.com>
Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-by: Bo Yan <byan@nvidia.com>

7 years agoDelete dmesg.txt which was submitted accidentally
Bo Yan [Wed, 11 Jul 2012 00:30:50 +0000]
Delete dmesg.txt which was submitted accidentally

Change-Id: Ib839ec632dbdffe430d3a5707f83b621b3592b07
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/114799
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>

7 years agoARM: tegra: Fix diagnostic register save & restore
Bo Yan [Mon, 9 Jul 2012 21:25:09 +0000]
ARM: tegra: Fix diagnostic register save & restore

The diagnostic register saved & restored across power gating/ungating
cycle is only applicable for Cortex A9.

Change-Id: I57169d38215a298300ba985c85a83dc5a58e0902
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/114266
Reviewed-by: Automatic_Commit_Validation_User

7 years agommc: tegra: Clear SPI_MODE_CLKEN_OVERRIDE bit by default
naveenk [Mon, 9 Jul 2012 10:53:40 +0000]
mmc: tegra: Clear SPI_MODE_CLKEN_OVERRIDE bit by default

This bit should always be 0 according to TRM.

Bug 837103

Change-Id: I9d7915614326df3fed257dbeac862c629b55b83f
Signed-off-by: naveen kumar arepalli <naveenk@nvidia.com>
Reviewed-on: http://git-master/r/114185
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

7 years agoRevert "mtd: nand: Add naieve panic_write support for generic nand devices."
Bo Yan [Tue, 10 Jul 2012 22:41:22 +0000]
Revert "mtd: nand: Add naieve panic_write support for generic nand devices."

This reverts commit 1b5fe8980209d3cc7f974222843d091bd60cf57e.

Change-Id: I13f4ad94cebc5f5f03d711d2284d1b383ab88188
Reviewed-on: http://git-master/r/114750
Reviewed-by: Bo Yan <byan@nvidia.com>
Tested-by: Bo Yan <byan@nvidia.com>

7 years agoARM: tegra: pinmux: Fix compilation warnings
Bo Yan [Wed, 4 Jul 2012 16:44:50 +0000]
ARM: tegra: pinmux: Fix compilation warnings

Use explicit type cast to supress warnings

Change-Id: Ia3e1c06cdc024d9f3b626cf849e212d26abaf906
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/113557
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>

7 years agoMerge remote branch 'origin/android-tegra-nv-3.4' into tot
Bo Yan [Mon, 9 Jul 2012 21:11:09 +0000]
Merge remote branch 'origin/android-tegra-nv-3.4' into tot

Conflicts:
arch/arm/mach-imx/hotplug.c

Change-Id: I33c5f2e4c2d556c09173be3c5fd36bf59f7c9ca8

7 years agoARM: tegra11: clock: Add memory PLLM support
Alex Frid [Wed, 4 Jul 2012 01:19:48 +0000]
ARM: tegra11: clock: Add memory PLLM support

Change-Id: I2e0eee672b04c0a6838fb6d2c7ff4e70700d3920
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/113807
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

7 years agoARM: tegra11: clock: Re-factor pll set rate operation
Alex Frid [Wed, 4 Jul 2012 03:57:51 +0000]
ARM: tegra11: clock: Re-factor pll set rate operation

Re-factor set rate operation for dynamic ramp plls (PLLC2/PLLC3 and
PLLX/PLLC) to extract common configuration code.

Change-Id: Ib37837dd480f7ef887107b995b6b9e25a150394a
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/113806
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

7 years agoARM: tegra11: clock: Change PLLX/PLLC iddq mode entry order
Alex Frid [Wed, 4 Jul 2012 01:34:01 +0000]
ARM: tegra11: clock: Change PLLX/PLLC iddq mode entry order

Entered PLLX/PLLC iddq mode after pll is disabled (was entering
before). Either way allowed by pll specification, but the new
one include less delays.

Change-Id: Ic689037edb782bf6792fbe9b595918c4d94e5149
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/113805
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

7 years agoARM: tegra11: clock: Remove non-existing PLLX/PLLC bypass control.
Alex Frid [Wed, 4 Jul 2012 01:27:54 +0000]
ARM: tegra11: clock: Remove non-existing PLLX/PLLC bypass control.

Change-Id: I8f91c3777b70d0200f82389d301d04b867e35c6e
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/113804
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
(cherry picked from commit b69cde5dfeaee4218de8fae35190280c58ec3181)

Signed-off-by: Bo Yan <byan@nvidia.com>

7 years agoRevert "Revert "Revert "ARM: vfp: Always save VFP state in vfp_pm_suspend"""
Varun Wadekar [Mon, 9 Jul 2012 13:10:17 +0000]
Revert "Revert "Revert "ARM: vfp: Always save VFP state in vfp_pm_suspend"""

This reverts commit 748d7407e529d24ab8782d141a1db76d63a436c6 since it got
reverted accidentally.

Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

7 years agoRevert "Revert "ARM: vfp: Always save VFP state in vfp_pm_suspend""
Varun Wadekar [Mon, 9 Jul 2012 12:35:28 +0000]
Revert "Revert "ARM: vfp: Always save VFP state in vfp_pm_suspend""

This reverts commit d990c395f9c80572bb97f065adf5090ba28fde0e.

Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

7 years agoMerge commit 'v3.4.4' into android-tegra-nv-3.4
Varun Wadekar [Mon, 9 Jul 2012 10:47:52 +0000]
Merge commit 'v3.4.4' into android-tegra-nv-3.4

7 years agoRevert "Revert "ARM: vfp: Always save VFP state in vfp_pm_suspend""
Varun Wadekar [Mon, 9 Jul 2012 10:26:05 +0000]
Revert "Revert "ARM: vfp: Always save VFP state in vfp_pm_suspend""

This reverts commit d990c395f9c80572bb97f065adf5090ba28fde0e.

7 years agoMerge branch 'android-tegra-nv-3.4' into android-t114-3.4
Varun Wadekar [Mon, 9 Jul 2012 10:07:15 +0000]
Merge branch 'android-tegra-nv-3.4' into android-t114-3.4

7 years agoARM: vfp: only clear vfp state for current cpu in vfp_pm_suspend
Colin Cross [Sat, 28 Apr 2012 01:04:18 +0000]
ARM: vfp: only clear vfp state for current cpu in vfp_pm_suspend

vfp_pm_suspend runs on each cpu, only clear the hardware state
pointer for the current cpu.  Prevents a possible crash if one
cpu clears the hw state pointer when another cpu has already
checked if it is valid.

Change-Id: I997ab1554944eba86730818ff242d7ebe1b32736
Signed-off-by: Colin Cross <ccross@android.com>
Reviewed-on: http://git-master/r/114168
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Tested-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>

7 years agoarm: vfp: Fix memory corruption on PM suspend
Ido Yariv [Sat, 14 Apr 2012 20:20:30 +0000]
arm: vfp: Fix memory corruption on PM suspend

Commit 36af2a47 ("ARM: vfp: Always save VFP state in vfp_pm_suspend")
introduced a potential use-after-free bug. On SMP systems,
vfp_current_hw_state might hold dangling pointers in case a task which
used the VFP last migrates to another CPU and then exits. If
vfp_pm_suspend is called while vfp_current_hw_state still holds a
pointer to the freed thread_info, that memory location will be written,
potentially overwriting a new object allocated there.

The original problem is only relevant to UP systems in which the VFP
state is stored lazily.

Fix this by only storing the VFP state on UP systems, and avoid doing so
on SMP ones.

Change-Id: I8f7026eb735b340fcef4cf12fbd12b9a0ea08d3f
Signed-off-by: Ido Yariv <ido@wizery.com>
Signed-off-by: Eyal Shapira <eyal@wizery.com>
Signed-off-by: Colin Cross <ccross@android.com>
Reviewed-on: http://git-master/r/114167
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Tested-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>

7 years agoRevert "ARM: vfp: Always save VFP state in vfp_pm_suspend"
Prashant Gaikwad [Mon, 9 Jul 2012 08:19:53 +0000]
Revert "ARM: vfp: Always save VFP state in vfp_pm_suspend"

This reverts commit 342a48aab5112922a701461b40e143b86465a0a7.

Change-Id: I14d31098f6d172c79aeb5e823813ebe0c0b76e14
Reviewed-on: http://git-master/r/114166
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Tested-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>

7 years agoARM: tegra11x: Powering up secondary CPUs
Bo Yan [Fri, 6 Jul 2012 01:10:56 +0000]
ARM: tegra11x: Powering up secondary CPUs

Change-Id: I30e115061c24f1a8f3f11cab0f21678d3cf096f1
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/113766
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>

7 years agoARM: tegra: fuse: Add chip ID for tegra11x
Bo Yan [Thu, 5 Jul 2012 23:02:34 +0000]
ARM: tegra: fuse: Add chip ID for tegra11x

Change-Id: If45216f3fff5a02699f94c745dc8154b3cf8be80
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/113765
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>

7 years agoARM: Tegra20: defconfig: convert bcmdhd to a statically linked driver
Varun Wadekar [Fri, 6 Jul 2012 09:35:07 +0000]
ARM: Tegra20: defconfig: convert bcmdhd to a statically linked driver

Change-Id: I292169f27dde29aeaa8de3912e0d4ac656f92bf4
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

7 years agoARM: Tegra: remove WIFI_CONTROL_FUNC from mach-tegra/Kconfig
Varun Wadekar [Fri, 6 Jul 2012 09:28:23 +0000]
ARM: Tegra: remove WIFI_CONTROL_FUNC from mach-tegra/Kconfig

Change-Id: I36b18ff655a8c2ed3be50fb9cc29c0c9592bffd1
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

7 years agoARM: tegra: dma: Fix compilation warnings
Bo Yan [Wed, 4 Jul 2012 16:46:33 +0000]
ARM: tegra: dma: Fix compilation warnings

Use conditional compilation to remove unused variable when not needed

Change-Id: I621e675f54ce24c6bb751b9fb227faf6c3e4333a
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/113706
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bandi Krishna Chaitanya <bandik@nvidia.com>

7 years agoARM: tegra: Add Tegra11x power partitions
Scott Williams [Wed, 25 Jan 2012 20:17:45 +0000]
ARM: tegra: Add Tegra11x power partitions

Change-Id: I156890916b0cd6d1483368cb004f56fc807cd605
Signed-off-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-on: http://git-master/r/77171
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mark Stadler <mastadler@nvidia.com>
Reviewed-by: Jeff Smith <jsmith@nvidia.com>
Tested-by: Mark Stadler <mastadler@nvidia.com>

7 years agoARM: tegra: Fix compilation warnings
Bo Yan [Wed, 4 Jul 2012 16:44:13 +0000]
ARM: tegra: Fix compilation warnings

Remove unused variables in timer.c and pm-t3.c

Change-Id: I1116678431775f2d33d345e93de1c47c3ed67a16
Signed-off-by: Bo Yan <byan@nvidia.com>

7 years agoARM: tegra: Fix merge error by adding header files
Bo Yan [Wed, 4 Jul 2012 01:22:41 +0000]
ARM: tegra: Fix merge error by adding header files

When migrating to K3.4, some headers need to be included explicitly.

Change-Id: I59794e0a62adeef18d81420ac4d1484a0002e8cd
Signed-off-by: Bo Yan <byan@nvidia.com>

7 years agoARM: tegra: Enterprise: Remove unused variables
Bo Yan [Wed, 4 Jul 2012 16:48:28 +0000]
ARM: tegra: Enterprise: Remove unused variables

Change-Id: I37df3beb927d53ea2cbc681afd0806c9dd72b086
Signed-off-by: Bo Yan <byan@nvidia.com>

7 years agoARM: tegra: Remove unused variable from common.c
Bo Yan [Wed, 4 Jul 2012 16:47:56 +0000]
ARM: tegra: Remove unused variable from common.c

Change-Id: Ic34ecba1449226129d5ae495d6cf5ca7eefb3bd0
Signed-off-by: Bo Yan <byan@nvidia.com>

7 years agoARM: tegra11: Do not restore FW bit in ACTLR
Bo Yan [Thu, 28 Jun 2012 21:54:08 +0000]
ARM: tegra11: Do not restore FW bit in ACTLR

For Cortex-A15, the bit 0 of ACTLR controls the behavior of
"Invalidate Instruction Cache All" and "by MVA", not TLB maintenance
broadcast. So we do not need to set it. We invalidate branch
predictor in a separate step when invalidating CPU state.

Change-Id: I9f71566f2e3aa5061b53a8d6d4ced281122534c8
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/111971
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>

7 years agoARM: tegra11: Pull in activity monitors support
Alex Frid [Wed, 20 Jun 2012 20:18:28 +0000]
ARM: tegra11: Pull in activity monitors support

Pull in Tegra3 activity monitors support and use it for Tegra11
as well.

Change-Id: Ib4e4e789dfa32d527a042c75dd6713c80a9998e7
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/111740
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bo Yan <byan@nvidia.com>
(cherry picked from commit fc2f146b0f4e1c06b6b1d5023612f0b8eb626d2b)

7 years agoARM: tegra11: clock: Correct audio device ids
Vijay Mali [Mon, 2 Jul 2012 05:21:14 +0000]
ARM: tegra11: clock: Correct audio device ids

Tegra30 audio devices are reused for Tegra11.
Correcting the device ids in clock table.

Change-Id: Ia7bf620ab8f975267a7a4b6d67b549579d064520
Signed-off-by: Vijay Mali <vmali@nvidia.com>
Reviewed-on: http://git-master/r/112883
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Ravindra Lokhande <rlokhande@nvidia.com>
Reviewed-by: Scott Peterson <speterson@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
(cherry picked from commit 096ac85b198782c6c60c06a3e293a7dde056ea3c)

7 years agoALSA: HDA: Support for playback from VPR
Rahul Mittal [Tue, 26 Jun 2012 09:22:02 +0000]
ALSA: HDA: Support for playback from VPR

Bug 966763

Support for HDaudio playback from video protected region

Change-Id: I053d055305b1f11643c4f8cc7a5c848015950b0a
Signed-off-by: Rahul Mittal <rmittal@nvidia.com>
Reviewed-on: http://git-master/r/102002
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
(cherry picked from commit 4dc95c8646a581dca8c089621be549ac634a1fef)

7 years agoARM: tegra11: L1 cache shift is 6 for Cortex-A15
Bo Yan [Sat, 23 Jun 2012 05:14:16 +0000]
ARM: tegra11: L1 cache shift is 6 for Cortex-A15

Change-Id: I77eb1e1b23ce4fd46c0c37c59f1fdd52c620d3c2
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/110681
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mark Stadler <mastadler@nvidia.com>
GVS: Gerrit_Virtual_Submit
(cherry picked from commit 458e4b57534dc1b53746bb1d27876733f61692b3)

7 years agosdhci: enable tuning support for eMMC v4.5
naveenk [Tue, 19 Jun 2012 09:58:39 +0000]
sdhci: enable tuning support for eMMC v4.5

enable tuning support for eMMC v4.5, command 21
is used for eMMC v4.5 tuning.

Bug 837103
Bug 998368
Bug 1000080

Change-Id: I23bba39f4e6ce36416c6d76cf4a39447d01961f1
Signed-off-by: naveen kumar arepalli <naveenk@nvidia.com>
Reviewed-on: http://git-master/r/109751
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

7 years agosdhci: tegra: enable HS200 capable
naveenk [Fri, 15 Jun 2012 12:49:39 +0000]
sdhci: tegra: enable HS200 capable

set MMC_CAP2_HS200 capability to enable HS200 mode
support for eMMC 4.5

Bug 837103
Bug 998368
Bug 1000080

Change-Id: Iddbfb19b07ef45bd6959d3a19a7fbdec093c3959
Signed-off-by: naveen kumar arepalli <naveenk@nvidia.com>
Reviewed-on: http://git-master/r/109230
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
(cherry picked from commit 6a7c34cb51d808484b11a0c323121f3a95bcc20f)

7 years agoHACK: curacao: set SDMMC max clk supported to 26MHz
Pradeep Kumar [Fri, 27 Apr 2012 13:05:17 +0000]
HACK: curacao: set SDMMC max clk supported to 26MHz

HACK to handle ambiguity of clk setting for SDMMC controller and
use card clock div 2 always.

Bug 953433

Change-Id: Ia59a81e36fbcadbe9c866ba9fdc27584961e38c9
Signed-off-by: Pradeep Kumar <pgoudagunta@nvidia.com>
Reviewed-on: http://git-master/r/99409
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

7 years agovideo: tegra: host: Use Tegra11 headers for Tegra11
Terje Bergstrom [Wed, 20 Jun 2012 10:09:12 +0000]
video: tegra: host: Use Tegra11 headers for Tegra11

Use Tegra11 hardware headers on Tegra11 build. At the same time,
restore original T30 headers to remove the actmon values copied
by hand.

Move actmon specific isr processing to host1x_actmon, as generic
isr code does not know about actmon registers.

Bug 982965

Change-Id: Ibb8556f2da29d8562d34e3b3b00a158c0be4b43a
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/110037
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
(cherry picked from commit fa2f467d6f479760d93c76556a8febfa4169b0fd)

7 years agovideo: tegra: host: Support per Soc hardware headers
Terje Bergstrom [Fri, 8 Jun 2012 08:40:27 +0000]
video: tegra: host: Support per Soc hardware headers

Make all chip specific functions static. Include the chip specific
functions in SoC files after including the hardware headers. This
makes the chip specific functions to be compiled per SoC, and with
the correct hardware definitions.

Bug 982965

Change-Id: I4774d4dc351951cb886d9d4da66cf021f3f0121e
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/107581
(cherry picked from commit f4f4b4d6567ac6102e90a8d74c61474696766946)
Reviewed-on: http://git-master/r/110036
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

Signed-off-by: Bo Yan <byan@nvidia.com>

7 years agovideo: tegra: host: Give names to chip_support parts
Terje Bergstrom [Fri, 15 Jun 2012 04:48:17 +0000]
video: tegra: host: Give names to chip_support parts

Give names to the structures inside nvhost_chip_support. This way
they can be referred to individually.

Change-Id: I9b727bfc232d11957a8bd3e3570583d47cff778e
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/109103
(cherry picked from commit 31c29c8bd6eb33ccc0a6e45d7c7a965de45a8a2d)
Reviewed-on: http://git-master/r/110035
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

7 years agovideo: tegra: host: Remove unused functions
Terje Bergstrom [Fri, 15 Jun 2012 04:45:44 +0000]
video: tegra: host: Remove unused functions

Remove unused functions in CDMA and debug. They were left unused
when debug dump started using sync queue instead of channel
registers for detecting current position.

Change-Id: Ib1f0bc8f702667d0453079e6d5f5d8ca08f8db09
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/109102
(cherry picked from commit 20e1eb9daf61663383c245c8fa1939fe2ba588d6)
Reviewed-on: http://git-master/r/110034
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

7 years agovideo: tegra: host: Use chip_ops for save context
Terje Bergstrom [Fri, 15 Jun 2012 04:43:07 +0000]
video: tegra: host: Use chip_ops for save context

Call drain fifo and save context functions via nvhost_chip_support.
Earlier client drivers called into host1x code directly, which
makes each client driver SoC specific.

Change-Id: I4f805abad21012e59e11bf6a98fa46441c71c51a
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/109101
(cherry picked from commit 4624dd8bed05435978ae4381cbcfc0382726941c)
Reviewed-on: http://git-master/r/110033
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

7 years agovideo: tegra: host: expose power management paramters via sysfs
Mayuresh Kulkarni [Tue, 12 Jun 2012 12:52:26 +0000]
video: tegra: host: expose power management paramters via sysfs

this commit exposes following power management parameter through
sysfs:
- clockgate_delay: delay after which module is clock gated after
it goes idle. this read/write attribute & unit is ms.
- powergate_delay: delay after which module is power gated after
it is clock gated. this is read/write attribute & unit is ms.
- refcount: current reference count on the module. this is
read-only attribute.

path is: /sys/devices/host1x/<device-name>/acm/ where
<device-name> = name of device node like gr2d or gr3d etc

Bug 845598

Change-Id: I6011eb90ee85b5fc576320272e657ce31f9e264d
Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-on: http://git-master/r/108827
(cherry picked from commit 6cc2ba059bc9760f185834e67d9456af36bf5a9f)
Reviewed-on: http://git-master/r/110032
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

7 years agovideo: tegra: host: Remove version from Tegra11 gr3d
Terje Bergstrom [Fri, 15 Jun 2012 13:50:59 +0000]
video: tegra: host: Remove version from Tegra11 gr3d

Remove version from the name of Tegra11 gr3d device.

Change-Id: I60071a314f1ee637867d4b4ba09a7ff75fa40c6e
Reviewed-on: http://git-master/r/109270
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

7 years agovideo: tegra: host: Remove version from dev name
Terje Bergstrom [Wed, 13 Jun 2012 08:57:59 +0000]
video: tegra: host: Remove version from dev name

Remove version from nvhost_device name, and use a new field,
version, to distinguish between IP versions. This restores the
sysfs API for 3D clock scaling back to its original path.

Change-Id: I444ef728b7cab9e5ea3a08f3c7be0f1661209686
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/108501
(cherry picked from commit c986dcfd3bfae55fbab9d27c2be57464011f7b28)
Reviewed-on: http://git-master/r/109269
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

7 years agovideo: tegra: host: Parameterize Tegra11 modules
Terje Bergstrom [Fri, 15 Jun 2012 13:41:01 +0000]
video: tegra: host: Parameterize Tegra11 modules

Tegra2 and Tegra3 host1x was parameterized and made to use generated hardware
headers. Adjust Tegra11 modules to do the same.

Bug 982965

Change-Id: Icc17a970cbaf419cabc41b5c475ae1a7a7851ac2
Reviewed-on: http://git-master/r/109268
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
Reviewed-by: Ken Adams <kadams@nvidia.com>
(cherry picked from commit 970f779f18e7bd498752c9f755cd530a2d8f157b)

7 years agovideo: tegra: host: Parametrize host1x
Terje Bergstrom [Wed, 30 May 2012 12:28:19 +0000]
video: tegra: host: Parametrize host1x

Add parameters in host1x nvhost_device on
* number of sync points
* number of wait bases
* number of channels
* number of mlocks
* client managed bitmask
* naming of sync points

Add automatically generated headers and use symbols from them to
access hardware.

Move host1x device definition from generic host1x to SoC specific
source files t20.c and t30.c.

Bug 982965

Change-Id: Ibec84be22d75b363900d10bcbd59d4d8321d54a1
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/104974
(cherry picked from commit f2dd85f69f329f372db29d2e20d71f7e0e0f85bb)
Reviewed-on: http://git-master/r/109267
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

Signed-off-by: Bo Yan <byan@nvidia.com>

7 years agoARM: tegra: Fix merge error in host1x
Bo Yan [Wed, 4 Jul 2012 00:26:11 +0000]
ARM: tegra: Fix merge error in host1x

Change-Id: I403b27b18d22e660d45d4b4fdd6d7a30ea9b2480
Signed-off-by: Bo Yan <byan@nvidia.com>

7 years agovideo: tegra: host: Register Tegra11 devices
Terje Bergstrom [Fri, 15 Jun 2012 12:12:07 +0000]
video: tegra: host: Register Tegra11 devices

Tegra2 and Tegra3 device structures were moved to be registered in
SoC files. Do the same move for Tegra11.

Bug 982965

Change-Id: I88dbaf3a04a69ea917948bc079c4d5c2623787e3
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/109266
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
Reviewed-by: Ken Adams <kadams@nvidia.com>
Reviewed-by: Mark Stadler <mastadler@nvidia.com>
Signed-off-by: Bo Yan <byan@nvidia.com>

7 years agovideo: tegra: host: Register devices in SoC files
Terje Bergstrom [Tue, 22 May 2012 12:23:13 +0000]
video: tegra: host: Register devices in SoC files

Move the device structures to the driver source code files. Register
all nvhost_device's in one loop which is called from board file.

host1x driver code is moved to live under host1x, too. This causes
a need to add host to include path of tegradc and nvavp.

Bug 982965

Change-Id: If99cf9d1ef6bc24663ee8294c19370429ed04ca7
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
(cherry picked from commit fe19b0ab25e721a77944268d31081e801dda9184)
Reviewed-on: http://git-master/r/109265
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

Signed-off-by: Bo Yan <byan@nvidia.com>

7 years agoMerge branch 'android-tegra-nv-3.4' into android-t114-3.4
Varun Wadekar [Thu, 5 Jul 2012 07:16:57 +0000]
Merge branch 'android-tegra-nv-3.4' into android-t114-3.4

Conflicts:
arch/arm/mach-tegra/tegra3_usb_phy.c

Change-Id: I9ce33061dcbf7ce41a2fe04da4e7b754b2a659c8
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

7 years agoARM: tegra: curacao: Enable NVAVP in K3.4
Bo Yan [Wed, 4 Jul 2012 22:52:05 +0000]
ARM: tegra: curacao: Enable NVAVP in K3.4

Change-Id: Id65241e81682b5726faaadc36e510c200ab44ea7
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/113567
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Shashank Garg <sgarg@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>

7 years agoARM: tegra: curacao: Enable camera sensor
Krupal Divvela [Thu, 5 Jul 2012 05:05:32 +0000]
ARM: tegra: curacao: Enable camera sensor

Enable camera sensor on t114 FPGA

Change-Id: I19172fc9f6045f2b84d2882cc6c57075bb873c6b
Signed-off-by: Krupal Divvela <kdivvela@nvidia.com>
Reviewed-on: http://git-master/r/113527
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>

7 years agoARM: Tegra: iomap: round up virtual addresses only with CONFIG_ARM_LPAE
Varun Wadekar [Wed, 4 Jul 2012 11:15:46 +0000]
ARM: Tegra: iomap: round up virtual addresses only with CONFIG_ARM_LPAE

Add section mapping boundary (2 MB) rounding only when LPAE is enabled. Enabling this
by default messes the vmalloc static allocations and we see random crashes in vmalloc
on platforms which do are not LPAE enabled.

Change-Id: Icbdc8adcef9658e0e941590759b1ea46b480630a
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/113509
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bo Yan <byan@nvidia.com>
Tested-by: Bo Yan <byan@nvidia.com>

7 years agoARM: tegra: Use late_time_init to register twd
Bo Yan [Tue, 3 Jul 2012 19:13:01 +0000]
ARM: tegra: Use late_time_init to register twd

twd registration can't be done before percpu initial setup is
finished, so delete the twd_local_timer_register from timer early
init function. The twd_local_timer_register is already called in
tegra_init_late_timer.

Change-Id: I5f60a735c1616ee5bcd2877f2b5597b5a13f4edb
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/113323
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
Tested-by: Varun Wadekar <vwadekar@nvidia.com>

7 years agoARM: tegra: fix build for smc with 4.6 toolchain
Dima Zavin [Mon, 30 Apr 2012 23:23:56 +0000]
ARM: tegra: fix build for smc with 4.6 toolchain

Reviewed-on: http://git-master/r/99741
(cherry picked from commit 828c895ed9e74bffdb55a18d6a010350a4dd7c50)

Change-Id: Icf806dc87ec538b8b3604f8c545fd3fc21ec0a3e
Signed-off-by: Dima Zavin <dima@android.com>
Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>
Reviewed-on: http://git-master/r/113525
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>

7 years agomedia: video: tegra: fix uninitialized variable error
Nitin Kumbhar [Wed, 4 Jul 2012 01:14:55 +0000]
media: video: tegra: fix uninitialized variable error

data_ptr may be used uninitialized in ad5816_param_rd().
Initialize data_ptr variable with NULL to fix the error.

Change-Id: I60af359ebffaef4f244ad49751b486424cb521c8
Signed-off-by: Nitin Kumbhar <nkumbhar@nvidia.com>
Reviewed-on: http://git-master/r/113421
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
Tested-by: Varun Wadekar <vwadekar@nvidia.com>

7 years agotty: serial: tegra: deadlock with tty_wakeup
Pradeep Kumar [Wed, 20 Jun 2012 11:17:06 +0000]
tty: serial: tegra: deadlock with tty_wakeup

Tegra hsuart calls uart write wakeup which inturn calls tty_wakeup
from irq context while holding device spin lock. If line discipline
driver  calls a write call then system ends up deadlock on device
spinlock. Using tasklet to call uart write wakeup solves the problem.

Bug 989309
Signed-off-by: Pradeep Kumar <pgoudagunta@nvidia.com>

Change-Id: I11fb5f691356da1146bde0796d5b1c247eaca68a
Reviewed-on: http://git-master/r/110029
Tested-by: Pradeep Goudagunta <pgoudagunta@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

7 years agommc: sdhci: tegra: remove platform specific wp callback
Bo Yan [Tue, 3 Jul 2012 20:50:53 +0000]
mmc: sdhci: tegra: remove platform specific wp callback

T114 has WP host controller support.

Bug 960825
Bug 837138

Change-Id: Id2918e9b946f929e697535d3798c4ebfd9b547cc
Signed-off-by: Pradeep Kumar <pgoudagunta@nvidia.com>
Reviewed-on: http://git-master/r/97941
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

Conflicts:

drivers/mmc/host/sdhci-tegra.c

7 years agomedia: video: nvavp: Add nvhost to include path
Terje Bergstrom [Tue, 12 Jun 2012 10:45:52 +0000]
media: video: nvavp: Add nvhost to include path

Add nvhost directory to #include path. This allows making dev.h a
stub in a later commit.

Bug 982965

Change-Id: I651b619422c26a5dc6766ddb381bd05c1fd9c462
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
(cherry picked from commit 85ce72da8a4a8c9e069f394877906f158305c715)
Reviewed-on: http://git-master/r/109264
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

7 years agovideo: tegra: dc: Move #includes from dc_priv.h
Terje Bergstrom [Tue, 12 Jun 2012 10:44:15 +0000]
video: tegra: dc: Move #includes from dc_priv.h

Move #include directives for nvhost headers from dc_priv.h to the
source files that need the #includes. This allows #including
dc_priv.h without access to all nvhost headers.

Also adds nvhost to the #include path of dc to allow making dev.h a
stub in a later commit.

Bug 982965

Change-Id: Icfe7084d295f57926195b178174f81047eb01187
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
(cherry picked from commit 4577283233907c3538076bab1f7a5cca49dbc674)
Reviewed-on: http://git-master/r/109263
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

7 years agokernel: Add ioctl constants for i2s flow controller test
Vijay Mali [Fri, 15 Jun 2012 13:43:53 +0000]
kernel: Add ioctl constants for i2s flow controller test

Add required ioctl constant for i2s flow controller test.
Remove unused ioctls.

Change-Id: I447724c95065ee43078176489013b08836bb1d6b
Signed-off-by: Vijay Mali <vmali@nvidia.com>
Reviewed-on: http://git-master/r/109251
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

7 years agokernel: add ioctl constants for spdif tests
Rahul Mittal [Thu, 21 Jun 2012 11:44:47 +0000]
kernel: add ioctl constants for spdif tests

Added ioctl constants for audio test manager spdif kernel module

Change-Id: Ife740e21da1a82c71cd93b91e60491b33ceda0cc
Signed-off-by: Rahul Mittal <rmittal@nvidia.com>
Reviewed-on: http://git-master/r/108833
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

7 years agoARM: tegra11: clock: Add shared floor EMC and cbus users
Alex Frid [Tue, 12 Jun 2012 06:20:25 +0000]
ARM: tegra11: clock: Add shared floor EMC and cbus users

Change-Id: I0b01aaa39f862b3b13947a52a426bc9b5f1188d4
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/108415
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bo Yan <byan@nvidia.com>

7 years agomisc: kernel_debugger: Add help command
Dmitry Shmidt [Tue, 16 Nov 2010 23:39:43 +0000]
misc: kernel_debugger: Add help command

Signed-off-by: Dmitry Shmidt <dimitrysh@google.com>
Change-Id: I304982de2e02a00d60f2b9a2280e236a2c321e5e
Reviewed-on: http://git-master/r/111425
Reviewed-by: Prashant Malani <pmalani@nvidia.com>
Tested-by: Prashant Malani <pmalani@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bo Yan <byan@nvidia.com>