6 years agoinput: misc: Changed sysfs permissions
Sumit Sharma [Thu, 13 Dec 2012 09:41:27 +0000]
input: misc: Changed sysfs permissions

Allow only root to write in sysfs

Bug 1179366

Change-Id: I6afffb8fbc9a2ef1b18d730c8b5d39ed0fd383ee
Signed-off-by: Sumit Sharma <sumsharma@nvidia.com>
Reviewed-on: http://git-master/r/170927
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

6 years agomedia: video: tegra: imx091: Fix pll_mult value
Sudhir Vyas [Thu, 13 Dec 2012 09:16:50 +0000]
media: video: tegra: imx091: Fix pll_mult value

The pll_mult value for imx091 new mode [524x390]
is incorrectly set. Which is being used to derive
VtPixelClk and later this clock is used to calculate
coarse-time, frame-length and frame-rate, hence all
are being calculated to wrong values.
Slow-mo faces the incorrect fps issue when same mode
needs to be programmed with different fps.

Bug 1180474

Change-Id: I668095cf3927c58947df79fd3f59b99e3bfac24a
Signed-off-by: Sudhir Vyas <svyas@nvidia.com>
Reviewed-on: http://git-master/r/#change,170414
Reviewed-on: http://git-master/r/170910
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

6 years agoARM: tegra: Rework timer for clusterswitching
Peter De Schrijver [Wed, 12 Dec 2012 16:44:10 +0000]
ARM: tegra: Rework timer for clusterswitching

This patch introduces a separate timer for clusterswitching. The timer will
queue the usual workitem on expiry. This allows all other operations to
happen immediately without having to cancel a delayed workitem. It also allows
the timer itself to be canceled when the conditions for a clusterswitch are
no longer fulfilled.

bug 1178947

Change-Id: Ieb63baf5a38ebcca29ad938365e46530f755a105
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
(cherry picked from commit 1dec3e79989d37f46c585a5265276bc2871c87a7)
Reviewed-on: http://git-master/r/170634
Reviewed-by: Peter Boonstoppel <pboonstoppel@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Peter Boonstoppel <pboonstoppel@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

6 years agoARM: tegra: usb: Fix phy_power_on condition
Petlozu Pravareshwar [Mon, 3 Dec 2012 06:01:39 +0000]
ARM: tegra: usb: Fix phy_power_on condition

When the Phy is left powered on, in non LP0 event phy_resume
should not be programmed while after an LP0 event it should be
programmed.

Bug 1166740

Change-Id: I046c38bcf5589e270fdd99dcd99af057f9bfba1c
Signed-off-by: Petlozu Pravareshwar <petlozup@nvidia.com>
Reviewed-on: http://git-master/r/167715
(cherry picked from commit 4f036fdcc489310dd88b48166f6f86af98b6d3eb)
Reviewed-on: http://git-master/r/170439
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

6 years agoARM: tegra: usb: fix hsic resume sequence
Suresh Mangipudi [Fri, 23 Nov 2012 10:40:31 +0000]
ARM: tegra: usb: fix hsic resume sequence

2LS sequnence for HSIC resume is removed.

Bug 1164414

Change-Id: I31fed9cc0edcdf447543c54284742f7ce35cb44b
Signed-off-by: Suresh Mangipudi <smangipudi@nvidia.com>
Reviewed-on: http://git-master/r/165893
(cherry picked from commit 9900e863f85fcb8e9c6acc00318e18223360845b)
Reviewed-on: http://git-master/r/170429
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

6 years agovideo: tegra: host: save devfreq_rate in scale3d
Jihoon Bang [Thu, 6 Dec 2012 22:58:56 +0000]
video: tegra: host: save devfreq_rate in scale3d

Save 3d clock and 3d.emc clock to devfreq_rate.
This allows nvhost to set current devfreq_rate
before it goes idle instead of setting default_rate
which is max frequency for 3d.

Bug 1166272

Reviewed-on: http://git-master/r/169184
(cherry picked from commit c733ee60a6fc9bba859fbaa983218a3fb1227315)

Change-Id: Ide54cf8ff620b95ddf57a86c77f5930bd134028e
Signed-off-by: Jihoon Bang <jbang@nvidia.com>
Reviewed-on: http://git-master/r/170552
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

6 years agoregulator: bq24192: Disable supply by default
Rakesh Bodla [Tue, 11 Dec 2012 14:44:10 +0000]
regulator: bq24192: Disable supply by default

Disable voltage supply by default.

Bug 1179219

Change-Id: Ibf963a88be446acaf76ffa3364c6e6b12068fc16
Signed-off-by: Rakesh Bodla <rbodla@nvidia.com>
Reviewed-on: http://git-master/r/170378
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

6 years agoARM: t11x: Enable hazard detection timeout
Bo Yan [Mon, 3 Dec 2012 18:22:41 +0000]
ARM: t11x: Enable hazard detection timeout

bug 1159132

Change-Id: Ie7987f590926a9c246e8b3312020af406d1ac7ef
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/170387
Reviewed-by: Sang-Hun Lee <sanlee@nvidia.com>
Tested-by: Sang-Hun Lee <sanlee@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User

6 years agoARM: tegra11: config: Enable INA3221 config
Anshul Jain [Thu, 13 Dec 2012 20:46:22 +0000]
ARM: tegra11: config: Enable INA3221 config

Bug 1160066

Change-Id: I80d6ea65c437b21dbb3e7459282876e09e80db78
Signed-off-by: Anshul Jain <anshulj@nvidia.com>
Reviewed-on: http://git-master/r/#change,169216
Reviewed-on: http://git-master/r/170327
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

6 years agoARM: config: tegra11: enable FAN_THERM_EST config
Anshul Jain [Thu, 13 Dec 2012 20:37:56 +0000]
ARM: config: tegra11: enable FAN_THERM_EST config

Bug 1159205

Change-Id: Ic17a7344387ac3eaa507ac5d144fde8a750d28df
Signed-off-by: Anshul Jain <anshulj@nvidia.com>
Reviewed-on: http://git-master/r/169223
Reviewed-on: http://git-master/r/170326
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

6 years agoARM: config: tegra11: enable PWM_FAN config
Anshul Jain [Thu, 13 Dec 2012 21:12:26 +0000]
ARM: config: tegra11: enable PWM_FAN config

bug 1179033

Change-Id: Ib3ec36bca0ceec6d260c3d5e093b5dda7c2f42b6
Signed-off-by: Anshul Jain <anshulj@nvidia.com>
Reviewed-on: http://git-master/r/169234
Reviewed-on: http://git-master/r/170324
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

6 years agoARM: tegra: roth: Add fan pwm device support
Anshul Jain [Wed, 5 Dec 2012 04:41:22 +0000]
ARM: tegra: roth: Add fan pwm device support

Following updates:
Makefile includes board-roth-fan
board-roth-fan initialized platform data for pwm fan driver
board-roth-pinmux change setting of PWM0
Change pll_p to 37Mhz

Bug 1179033

Change-Id: I36918256aed4e73c537cbfcbac57c3b011538d0a
Signed-off-by: Anshul Jain <anshulj@nvidia.com>
Reviewed-on: http://git-master/r/167680
Reviewed-on: http://git-master/r/170323
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

6 years agomedia: video: tegra: nvavp: Fix nvmap handle issue
Gajanan Bhat [Wed, 12 Dec 2012 20:06:04 +0000]
media: video: tegra: nvavp: Fix nvmap handle issue

In open call we were assigning the driver's nvmap handle to
the nvavp's client context which would get released in release
call to driver. This will cause driver's nvmap handle to be
invalid if a parallel client context is running and driver does
any nvmap operation.

Bug 1013063
Bug 1192772

Change-Id: I9528d233755ddf7cc3dd9cce52816c5521e687e7
Signed-off-by: Gajanan Bhat <gbhat@nvidia.com>
Reviewed-on: http://git-master/r/170997
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User

6 years agoArm: tegra: config: Enable bq2419x charger driver
Syed Rafiuddin [Wed, 12 Dec 2012 11:57:01 +0000]
Arm: tegra: config: Enable bq2419x charger driver

Enable bq2419x battery charger driver

Bug 1179923

Change-Id: Ie7453b7f13167733fa924c810377cee3f68d149b
Signed-off-by: Syed Rafiuddin <srafiuddin@nvidia.com>
Reviewed-on: http://git-master/r/170523
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User

6 years agoArm: tegra: roth: remove tfa9887L audio codec
Syed Rafiuddin [Tue, 11 Dec 2012 05:03:20 +0000]
Arm: tegra: roth: remove tfa9887L audio codec

remove audio codec tfa9887L registration as we
are not using the componenet on roth platform

Bug 1179923

Change-Id: I0380066dcaf84aafd26c1a7cf008ed14ea81267f
Signed-off-by: Syed Rafiuddin <srafiuddin@nvidia.com>
Reviewed-on: http://git-master/r/170522
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User

6 years agoArm: tegra: roth: add max17048 battery data
Syed Rafiuddin [Mon, 10 Dec 2012 09:12:14 +0000]
Arm: tegra: roth: add max17048 battery data

Add battery characterization data for max17048
fuel-gauge driver.

Bug 1179923

Change-Id: I2d50b3c82f42c12e2fcb09c31557d0e2f2a2396d
Signed-off-by: Syed Rafiuddin <srafiuddin@nvidia.com>
Reviewed-on: http://git-master/r/170521
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

6 years agoArm: tegra: roth: add callback for max17048
Syed Rafiuddin [Wed, 12 Dec 2012 14:15:33 +0000]
Arm: tegra: roth: add callback for max17048

Add callback in bq24192 platform data to update status
to max17048

Bug 1179923

Change-Id: I98b272cf91304a3a6d1332194b2837712b3b7380
Signed-off-by: Syed Rafiuddin <srafiuddin@nvidia.com>
Reviewed-on: http://git-master/r/170520
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User

6 years agopower: bq24192: update charger status to fg driver
Syed Rafiuddin [Wed, 12 Dec 2012 15:28:29 +0000]
power: bq24192: update charger status to fg driver

update charger status to fuel-gauge dirver to
reflect the same in GUI

Bug 1179923

Change-Id: Ib2f60fc611d1753447a94461ad0aa8baf523f4bb
Signed-off-by: Syed Rafiuddin <srafiuddin@nvidia.com>
Reviewed-on: http://git-master/r/170519
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User

6 years agopower: max17048: remove charger driver dependencies
Syed Rafiuddin [Thu, 13 Dec 2012 07:25:32 +0000]
power: max17048: remove charger driver dependencies

max17048 driver uses api's available in the smb349 charger driver.

Removing the dependencies from max17048 driver

Bug 1179923

Change-Id: Iacf36278a8bf3f7c83ac89007d6a6d2f63f954ee
Signed-off-by: Syed Rafiuddin <srafiuddin@nvidia.com>
Reviewed-on: http://git-master/r/170518
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User

6 years agoARM: tegra: dalmore: Mask SDR104,DDR50 for SDIO
Pavan Kunapuli [Fri, 7 Dec 2012 13:41:30 +0000]
ARM: tegra: dalmore: Mask SDR104,DDR50 for SDIO

Mask SDR104 and DDR50 UHS mode support for SDIO
devices as CRC errors are observed in these modes.

Bug 1181574

Reviewed-on: http://git-master/r/169397
(cherry picked from commit e09cb1caf153f614e06ac7c788d43a19e808d0c8)

Change-Id: I93fb9fecc5eadcccc4c1c7180100d723719bc74b
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-on: http://git-master/r/170405
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>

6 years agommc: tegra: Allow masking of UHS modes
Pavan Kunapuli [Fri, 7 Dec 2012 14:47:46 +0000]
mmc: tegra: Allow masking of UHS modes

Add support for masking any of the UHS modes
due to issues on specific platforms.

Bug 1181574

Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-on: http://git-master/r/169396
(cherry picked from commit e8e28a080144de184d57b2037460a3e9b0133bb9)

Change-Id: Ic898a1d178a3cc200d3993a558ad732243e189f9
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-on: http://git-master/r/170404
Reviewed-by: Rakesh Kumar <krakesh@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>

6 years agoARM: Tegra: Pluto: Dalmore: Enable disable_smps10_boost_suspend
Matt Wagner [Tue, 11 Dec 2012 05:45:42 +0000]
ARM: Tegra: Pluto: Dalmore: Enable disable_smps10_boost_suspend

Choose to disable smps10 boost on suspend for Pluto and Dalmore

Bug 1172908

Change-Id: Ie1f3ea13fd58bf7ff222d7ad921ebbe9e7ca4aab
Signed-off-by: Matt Wagner <mwagner@nvidia.com>
Reviewed-on: http://git-master/r/170341
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

6 years agodrivers: mfd: palmas: make smps10_boost_disable optional
Matt Wagner [Tue, 11 Dec 2012 05:43:47 +0000]
drivers: mfd: palmas: make smps10_boost_disable optional

Allow the board to pick whether they want to disable
smps10_boost on suspend

Bug 1172908

Change-Id: I0121f7e24716eb8731af3b14100d81ef63168929
Signed-off-by: Matt Wagner <mwagner@nvidia.com>
Reviewed-on: http://git-master/r/170340
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

6 years agothermal: pwm_fan: Add PWM controlled fan driver
Anshul Jain [Sat, 1 Dec 2012 00:41:54 +0000]
thermal: pwm_fan: Add PWM controlled fan driver

This change includes:
Kconfig for TEGRA_FAN
Makefile update
fan driver that is controlled by pwm
platform data

Bug 1179033

Change-Id: Ifca06402227a7a2162633490a6d7b29523b1ee6e
Signed-off-by: Anshul Jain <anshulj@nvidia.com>
Reviewed-on: http://git-master/r/167679
Reviewed-on: http://git-master/r/170322
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>

6 years agocpuquiet: Fix race in runnable governor
Peter Boonstoppel [Wed, 5 Dec 2012 18:45:53 +0000]
cpuquiet: Fix race in runnable governor

Fixed a race where the cpuquiet driver would call device_free() before
the governor was started, which would lead to a kernel panic because
runnables_timer was not initialized.

Introduced RUNNING state, so states are:
- DISABLED: truly disabled
- IDLE: enabled, but not polling upon request from the driver
- RUNNING: actively polling

Bug 1189042

Change-Id: I45b9ce40e61e1cfddde74ff7b2691722204045bb
Signed-off-by: Peter Boonstoppel <pboonstoppel@nvidia.com>
Reviewed-on: http://git-master/r/168803
(cherry picked from commit 097e9b869eda242b4f19ffe486422b048ea7f3ef)
Reviewed-on: http://git-master/r/170254
Reviewed-by: Sang-Hun Lee <sanlee@nvidia.com>
Tested-by: Sang-Hun Lee <sanlee@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

6 years agoaudio: Add support for programming TFA9887.
Vinod Subbarayalu [Mon, 3 Dec 2012 02:02:29 +0000]
audio: Add support for programming TFA9887.

Change-Id: I82b85cea36a5cb6160ded5b65766ae82b11118ea
Signed-off-by: Vinod Subbarayalu <vsubbarayalu@nvidia.com>
(cherry picked from commit 60eb75c265f04fc3c16438bbe54802dea33cb50e)
Reviewed-on: http://git-master/r/170282
Reviewed-by: Scott Peterson <speterson@nvidia.com>

6 years agodrivers: tegra: imx091/max77665: fix edp issue
Charlie Huang [Tue, 11 Dec 2012 20:17:10 +0000]
drivers: tegra: imx091/max77665: fix edp issue

Fix the potential NULL pointer usage in the case there is no edp client
allocated.

bug 1193275

Change-Id: I901920b65ca9ffef0d859c2746106ad7ffdbcf10
Signed-off-by: Charlie Huang <chahuang@nvidia.com>
Reviewed-on: http://git-master/r/170249
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agommc: tegra: handle function return value
Deepak Nibade [Fri, 7 Dec 2012 09:24:04 +0000]
mmc: tegra: handle function return value

Fix Coverity issue
Coverity id : 10587

Bug 1046331

Change-Id: I568bf9a17ac86d3cd24a531734f165cafd4f7955
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/169334
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agovideo: tegra: dc: set cmu table when enabling cmu.
Kevin Huang [Fri, 7 Dec 2012 04:33:40 +0000]
video: tegra: dc: set cmu table when enabling cmu.

Before we only change cmu enable bit when enabling/disabling cmu.
But if cmu is not set properly, it causes the display corruption.
Therefore, we set cmu table everytime cmu is enabled through sysfs.

Bug 1185222

Change-Id: Icf04cc7d8925f6cfe76105b964751d5df6d0c702
Signed-off-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-on: http://git-master/r/169279
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agovideo: tegra: fb: conditionalize screen panning
Rakesh Iyer [Thu, 6 Dec 2012 22:48:39 +0000]
video: tegra: fb: conditionalize screen panning

Conditionalize screen panning to only cases where display parameters change.

Bug 1046614

Change-Id: I9be3b9b474f90dc0966161f6b0b00d439eab30e7
Signed-off-by: Rakesh Iyer <riyer@nvidia.com>
Signed-off-by: Mitch Luban <mluban@nvidia.com>
Reviewed-on: http://git-master/r/169218
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com>

6 years agovideo: tegra: dc: fix refresh rate function
Rakesh Iyer [Thu, 6 Dec 2012 22:46:49 +0000]
video: tegra: dc: fix refresh rate function

Fix the refresh rate function so mode's refresh parameter is correct.

Bug 1046614

Change-Id: Id67fc98a592c44ab823544efd9fe088410000236
Signed-off-by: Rakesh Iyer <riyer@nvidia.com>
Signed-off-by: Mitch Luban <mluban@nvidia.com>
Reviewed-on: http://git-master/r/169217
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com>

6 years agoARM: tegra11: dvfs: Update SDMMC4 dvfs table
Alex Frid [Thu, 6 Dec 2012 23:37:00 +0000]
ARM: tegra11: dvfs: Update SDMMC4 dvfs table

Change-Id: I082b4606334e64c9e6efc4f678dc3c2551892687
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/169215
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agoARM: tegra11: dvfs: Limit SCLK operations to 0.95V minimum
Alex Frid [Thu, 6 Dec 2012 21:17:31 +0000]
ARM: tegra11: dvfs: Limit SCLK operations to 0.95V minimum

Restricted system bus (and respectively the entire SoC) operations
to 0.95V and above.

Change-Id: I3ea2882d4dee33b9256a630fc647cbb183a670d8
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/169214
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agoARM: tegra11: clock: Double PLLC VCO for 624MHz output
Alex Frid [Thu, 6 Dec 2012 20:35:32 +0000]
ARM: tegra11: clock: Double PLLC VCO for 624MHz output

Bug 1190880

Change-Id: If768c8812575d57b5ac02e99cf878bec4a9ea740
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/169137
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agoARM: tegra: Do L2 CMO before last CPU power down
Bo Yan [Thu, 6 Dec 2012 17:20:22 +0000]
ARM: tegra: Do L2 CMO before last CPU power down

Whether L2 flush is needed before powering down the last CPU
depends on the existence of external L2.  Therefore, fix the
conditional compilation appropriately.

Change-Id: I9f135edb71b8df22b04388676fa9365ee3908b52
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/169098
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>

6 years agoarm: tegra: baseband: enable wake out of low power modes
Neil Patel [Thu, 6 Dec 2012 16:09:34 +0000]
arm: tegra: baseband: enable wake out of low power modes

For modem devices supporting remote wake the kernel device wakeup
flag should be set to true. This ensures the SET_FEATURE remote
wakeup request is sent to the device before the AP enters LP0.

Bug 1191502

Change-Id: I4da5f332fc024c213aae0052d50bf5b884523840
Signed-off-by: Neil Patel <neilp@nvidia.com>
Reviewed-on: http://git-master/r/169086
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Steve Lin <stlin@nvidia.com>
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>

6 years agomach: pluto: add baseband and bt bit clock
Dara Ramesh [Thu, 6 Dec 2012 08:53:29 +0000]
mach: pluto: add baseband and bt bit clock

Add parameter to specify the I2S bitclock
to use as part of pdata structure.

bug 1171615

Change-Id: Ia8a67555009cfa812ebf3cfdfeafe93782c8acd5
Signed-off-by: Dara Ramesh <dramesh@nvidia.com>
Reviewed-on: http://git-master/r/169006
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agoThermal: Increase maximum number of trip-points to 32
Alex Frid [Thu, 6 Dec 2012 07:33:18 +0000]
Thermal: Increase maximum number of trip-points to 32

Change-Id: I499710dba6dc14aeedca4ed481e8da02f64d4099
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/168998
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
GVS: Gerrit_Virtual_Submit

6 years agoARM: tegra: configs: roth: disable un-used bluetooth modules
Nagarjuna Kristam [Thu, 6 Dec 2012 04:08:04 +0000]
ARM: tegra: configs: roth: disable un-used bluetooth modules

From Android 4.2, only hidp-bluez is needed for bluetooth. So, remove other
not needed bluetooth modules

Bug 1188713

Change-Id: Ic9a679439f25411531f707b8d44b51140f59dd34
Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-on: http://git-master/r/168941
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agoARM: tegra: power: Update core EDP with temperature
Alex Frid [Sun, 25 Nov 2012 03:13:04 +0000]
ARM: tegra: power: Update core EDP with temperature

Added core EDP thermal layer as active cooling device, and updated
core EDP limits when temperature threshold are tripped.

Bug 1165638

Change-Id: I37cd8ab0a94909d198f21ba02e9308ca4d23bcb6
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/168929
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agovideo: tegra: host: Set host1x on Tegra11 to 136MHz
Terje Bergstrom [Wed, 5 Dec 2012 13:58:44 +0000]
video: tegra: host: Set host1x on Tegra11 to 136MHz

New DVFS tables list 144MHz as the maximum frequency for host1x at
lowest voltage. host1x is sourced from PLLP, so nearest step to
that is 136MHz. Use that as default clock rate.

Change-Id: I2554ef883d76d21387d6b5f4b6fbd6db8feff672
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/168748
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

6 years agoarm: config: tegra11: Enable TEGRA_IOMMU_SMMU
Alex Waterman [Wed, 5 Dec 2012 08:51:33 +0000]
arm: config: tegra11: Enable TEGRA_IOMMU_SMMU

Change-Id: I7a79e40f6540a9c99b4f42459950500b9776d233
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/168674
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agoARM: tegra: configs: roth: enable bluedroid_pm
Nagarjuna Kristam [Wed, 5 Dec 2012 08:05:34 +0000]
ARM: tegra: configs: roth: enable bluedroid_pm

enable bluedroid_pm driver
cleanup defconfigs

Bug 1188713

Change-Id: I4c012cb035a43d09af400b60e6b357dcada74508
Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-on: http://git-master/r/168662
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agotouch: raydium: change Dalmore to 12 MHz SPI
David Jung [Tue, 4 Dec 2012 21:29:23 +0000]
touch: raydium: change Dalmore to 12 MHz SPI

Revert frequency of Dalmore SPI bus back to
12 MHz.

Bug 1168827

Change-Id: I038e39e783cf7e48241dba556db1b1784eb3a09e
Signed-off-by: David Jung <djung@nvidia.com>
Reviewed-on: http://git-master/r/168437
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agommc: core: Ignore secure erase for eMMC4.5
rrajk [Tue, 4 Dec 2012 13:45:42 +0000]
mmc: core: Ignore secure erase for eMMC4.5

Secure erase feature is deprecated in eMMC v4.5
specification. Use this feature only for v4.41 or
lower cards.

Bug 1172910

Change-Id: I8ce335b4636f521c710fe254cfa9fbdf518ddf6b
Signed-off-by: rrajk <rrajk@nvidia.com>
Reviewed-on: http://git-master/r/168363
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agommc: host: Enable infinite erase timeout limit
rrajk [Tue, 4 Dec 2012 13:37:45 +0000]
mmc: host: Enable infinite erase timeout limit

Enable infinite erase timeout limit in the host by setting
the override bit in the misc vendor control register.

Bug 1172910

Change-Id: I45ab0da39c34097c87a22df29142d50193c3b6e0
Signed-off-by: rrajk <rrajk@nvidia.com>
Reviewed-on: http://git-master/r/168359
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agoARM: tegra11: clock: Update EMC clock change procedure
Alex Frid [Tue, 4 Dec 2012 07:57:39 +0000]
ARM: tegra11: clock: Update EMC clock change procedure

- Removed auto-cal enable/disable steps
- Expanded EMC_CFG mask updated when clock is changed

Change-Id: I0b09855f41f308abef1d55e4802e3ea421064179
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/168287
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

6 years agoARM: tegra: pluto: imx091/max77665 edp control
Charlie Huang [Mon, 3 Dec 2012 23:20:42 +0000]
ARM: tegra: pluto: imx091/max77665 edp control

add edp control on max77665 flash device and imx091 camera sensor.
the E-state tables added are not finetuned, need calibrate later.

bug 1159987
bug 1159989

Change-Id: I30e635d0b39be371779664eeb23bc4afa321acea
Signed-off-by: Charlie Huang <chahuang@nvidia.com>
Reviewed-on: http://git-master/r/168179
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agovideo: tegra: dc: fix explicit null dereference
Deepak Nibade [Mon, 3 Dec 2012 13:07:24 +0000]
video: tegra: dc: fix explicit null dereference

Fix Coverity issue
In error path, dc->fb is assigned to NULL and
then is referenced in code to follow
Modify the error path to have correct roll back
Coverity id : 21156

Bug 1046331

Change-Id: Ice2460e1a204e50b98c6f58bded85870d180e785
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/168077
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agoarm: tegra: power: Remove tegra3 thermal layer
Jinyoung Park [Wed, 21 Nov 2012 23:04:45 +0000]
arm: tegra: power: Remove tegra3 thermal layer

The tegra3 thermal layer is not used anymore after using Linux thermal
framework.

Change-Id: Ib0a7dc771ea4c13e6fe027b3a0c5460d23115f9a
Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/167878
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Tested-by: Diwakar Tundlam <dtundlam@nvidia.com>

6 years agovideo: tegra: host: tune 3dfs algorithm for 114
Samuel Russell [Thu, 29 Nov 2012 21:30:17 +0000]
video: tegra: host: tune 3dfs algorithm for 114

Tune the 3dfs algorithm parameters for 114 chips to
improve perf/power.

Change-Id: I3c61ac53d69f1f53d9f762c3ff97c65b498a6fef
Signed-off-by: Samuel Russell <samuelr@nvidia.com>
Reviewed-on: http://git-master/r/167417
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Ilan Aelion <iaelion@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

6 years agovideo: tegra: imx091: add debugfs support
Wei Chen [Wed, 28 Nov 2012 02:20:40 +0000]
video: tegra: imx091: add debugfs support

add debugfs support for imx091 to facilitate
sensor tunning and debug etc.

Bug 1037602

Change-Id: I5ac3e7bc24765e2bb924666eeb7631c5909f0a40
Signed-off-by: Wei Chen <wechen@nvidia.com>
Reviewed-on: http://git-master/r/166742
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agodrivers: tegra: max77665 flash/imx091: edp support
Charlie Huang [Wed, 28 Nov 2012 00:15:16 +0000]
drivers: tegra: max77665 flash/imx091: edp support

enable edp support on max77665 flash device and imx091 camera sensor.
the E-state tables added are not finetuned, need calibrate later.

bug 1159989
bug 1159987

Change-Id: I9b4339247099ec1808a677f9a4bfc7b10325d625
Signed-off-by: Charlie Huang <chahuang@nvidia.com>
Reviewed-on: http://git-master/r/166733
Reviewed-by: Frank Chen <frankc@nvidia.com>
Reviewed-by: Wei Chen <wechen@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

6 years agovideo: tegra: mipi_cal: Remove hardwired code
Animesh Kishore [Tue, 27 Nov 2012 13:07:18 +0000]
video: tegra: mipi_cal: Remove hardwired code

Move calibration code under DSI_VS_1

Change-Id: If561e3007220a0b0190cb88701e0b37b033ad0ae
Signed-off-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-on: http://git-master/r/166585
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>

6 years agoARM: tegra: Set scratch1_eco register for memory dpd
Karthik Ramakrishnan [Thu, 15 Nov 2012 00:15:02 +0000]
ARM: tegra: Set scratch1_eco register for memory dpd

Set proper memory settings for LP0 state.
Bug 1175084
Bug 1156167

Change-Id: I958af3f0dcd4805e195f6286894a011a3ed85537
Signed-off-by: Karthik Ramakrishnan <karthikr@nvidia.com>
Reviewed-on: http://git-master/r/164230
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>

6 years agoarm: tegra: roth: Correct pclk values
Rakesh Iyer [Wed, 5 Dec 2012 23:06:37 +0000]
arm: tegra: roth: Correct pclk values

Upper layers depend on correct values of mode's pixel clock.

Bug 1183265.

Change-Id: Ide13e368ea9b1493626aff0d843377c4ab8fcd4a
Signed-off-by: Rakesh Iyer <riyer@nvidia.com>
Reviewed-on: http://git-master/r/168858
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

6 years agoarm: tegra: dalmore: Correct pclk values
Rakesh Iyer [Wed, 5 Dec 2012 22:59:27 +0000]
arm: tegra: dalmore: Correct pclk values

Upper layers depend on correct values of mode's pixel clock.

Bug 1183265.

Change-Id: I30890fe36dd1fc580ded0e92c2a76db889c4f7f7
Signed-off-by: Rakesh Iyer <riyer@nvidia.com>
Reviewed-on: http://git-master/r/168857
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

6 years agoARM: tegra11x: Eliminate redundant cache flush
Bo Yan [Wed, 28 Nov 2012 21:44:29 +0000]
ARM: tegra11x: Eliminate redundant cache flush

Tegra specific code flushes L1 cache when entering suspend, there
is no need to do the same thing in __cpu_suspend_save.

The L1 cache flush has to be done in Tegra specific code because:

1. we have to clear SCTLR.C bit before flushing cache and we can
   not write anything to external memory between clearing SCTLR.C
   and flushing cache.
2. we want to reduce entry latency by disabling cache at very late
   stage of suspend entry sequence.

Change-Id: I56ef4713bcd638ce6af88f0367c462f216b1bbf4
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/167060
Reviewed-by: Automatic_Commit_Validation_User

6 years agocrypto: tegra-se: change SE freq based on algo
Mallikarjun Kasoju [Wed, 5 Dec 2012 12:44:58 +0000]
crypto: tegra-se: change SE freq based on algo

change S.E frequency based on the algorithm
being used

Bug 1014636

Change-Id: I49d1d15d0da0a9c76c3eda7d86872678dfe8d911
Signed-off-by: Venkatajagadish <vjagadish@nvidia.com>
Signed-off-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Reviewed-on: http://git-master/r/132551
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>

6 years agoARM: tegra11: clock: Update clock rate limits
Alex Frid [Wed, 5 Dec 2012 06:26:32 +0000]
ARM: tegra11: clock: Update clock rate limits

- Set minimum 24 MHz rate for system and AHB clocks (SCLK and HCLK),
keep APB clock (PCLK) minimum rate at 12 MHz, to maintain HCLK:PCLK
2:1 ratio (Bug 1057646)

- Set maximum 12MHz rate for TSENSOR and OWR clocks base on results
of characterization

Change-Id: Id45cfe5f218603c44fb2e609cfd78df78193df79
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/168643
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

6 years agoARM: Tegra: Roth: location for NCT72/1008 sensors
Anshul Jain [Thu, 22 Nov 2012 07:37:10 +0000]
ARM: Tegra: Roth: location for NCT72/1008 sensors

Roth has multiple NCT sensors, left, right and on tegra. This
change specifies different platform data based on the location
of the NCT device.

Change-Id: I7067e6bb13d64d498d31534316e3e944f299794e
Signed-off-by: Anshul Jain <anshulj@nvidia.com>
Reviewed-on: http://git-master/r/167620
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

6 years agodrivers: nct: tsensor: use location in nct drivers
Matt Wagner [Thu, 6 Dec 2012 05:14:15 +0000]
drivers: nct: tsensor: use location in nct drivers

Some boards have multiple nct sensors. This changes enables
platform data to specify location of the sensor by giving them
unique name.

Change-Id: I421dc4c5b147257f14f5da9fca200ad0491d080d
Signed-off-by: Matt Wagner <mwagner@nvidia.com>
Reviewed-on: http://git-master/r/168225
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

6 years agoARM: tegra11: dvfs: Update pll output tables
Alex Frid [Wed, 5 Dec 2012 00:47:38 +0000]
ARM: tegra11: dvfs: Update pll output tables

- Updated dvfs tables for PLLC/C2/C3, PLLM and PLLP outputs to take
into account limitation of all tegra "big blocks" dividers to integer
settings only.

- Removed PLLD/D2 and PLL_REFE tables - these PLLs can run at maximum
frequency in the entire voltage range their downstream clients (DSI,
CSI, and XUSB) can operate in.

Change-Id: Ie0e837ea76e53dc41ea8d62c5b49eeb8d0b8499e
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/168560
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

6 years agovideo: tegra: dc: clean up powergate code
Jon Mayo [Wed, 5 Dec 2012 21:10:44 +0000]
video: tegra: dc: clean up powergate code

Change-Id: Iec88ab24e676707dc51f1aa4eea0a176d7491186
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/168830
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

6 years agoarm: tegra: soctherm: high precision fuse handling computation
Diwakar Tundlam [Wed, 5 Dec 2012 00:26:43 +0000]
arm: tegra: soctherm: high precision fuse handling computation

bug 1169070

Change-Id: I59bf1aa6f4bcefda0914cd133d113afb4c54b56c
Signed-off-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-on: http://git-master/r/168486
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Matthew Longnecker <mlongnecker@nvidia.com>

6 years agomisc: nct: add regulator enable/disable functionality
Sri Krishna chowdary [Wed, 5 Dec 2012 09:46:15 +0000]
misc: nct: add regulator enable/disable functionality

Bug 1189700

Change-Id: Idc2ad394a8b4bead90de757b5016c0d49fe54f26
Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/168690
Reviewed-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
GVS: Gerrit_Virtual_Submit

6 years agoarm: tegra: pluto: Correct pclk values
Rakesh Iyer [Wed, 5 Dec 2012 22:38:26 +0000]
arm: tegra: pluto: Correct pclk values

Upper layers depend on correct values of mode's pixel clock.

Bug 1183265.

Change-Id: Ieae424a163bda5114c5f9519b017d037551ef69f
Signed-off-by: Rakesh Iyer <riyer@nvidia.com>
Reviewed-on: http://git-master/r/168856
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Michael I Gold <gold@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

6 years agoARM: tegra: thermal: Update Tegra11 thermal parameters
Diwakar Tundlam [Thu, 6 Dec 2012 01:26:29 +0000]
ARM: tegra: thermal: Update Tegra11 thermal parameters

Updated hotspot-offset for nct1008 device on Tegra11 platforms
Updated thermal throttle point and shutdown point appropriately

Bug 1058013

Change-Id: I16464dd3a832c69efb6dba8dc2335022965f7557
Signed-off-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-on: http://git-master/r/168894
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

6 years agovideo: tegra: dc: apply CMU changes only if active
Jon Mayo [Thu, 6 Dec 2012 01:49:51 +0000]
video: tegra: dc: apply CMU changes only if active

Bug 1189604

Change-Id: I2f80ba92137a8a9153dad00fa3afea7ce4a1b0a1
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/168912
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

6 years agoARM: Tegra: Add Roth DTB file
Matt Wagner [Thu, 6 Dec 2012 05:56:22 +0000]
ARM: Tegra: Add Roth DTB file

Add tegra114-roth.dtb to Makefile.boot

Bug 1190672

Change-Id: I27864dd6225b222225f4686621bdc5610a68e328
Signed-off-by: Matt Wagner <mwagner@nvidia.com>
Reviewed-on: http://git-master/r/168964
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>

6 years agoARM: dt: tegra: add default pinctrl nodes for pluto
Pritesh Raithatha [Fri, 30 Nov 2012 14:29:54 +0000]
ARM: dt: tegra: add default pinctrl nodes for pluto

Bug 1003210

Change-Id: Ie1b7243b6f4ed2570f875f9c6995b0ebcd9cfaa8
Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>
Reviewed-on: http://git-master/r/167756
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User

6 years agoARM: dt: tegra: add default pinctrl nodes for dalmore
Pritesh Raithatha [Fri, 30 Nov 2012 14:23:55 +0000]
ARM: dt: tegra: add default pinctrl nodes for dalmore

Bug 1003210

Change-Id: I773fdd1618a05d38028bb5a2516158647c9af585
Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>
Reviewed-on: http://git-master/r/167755
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User

6 years agoARM: dt: tegra: add pinctrl support for Tegra114
Pritesh Raithatha [Wed, 7 Nov 2012 15:04:37 +0000]
ARM: dt: tegra: add pinctrl support for Tegra114

Bug 1003210

Change-Id: I901462c9372c574c624d3c40441c7e7e0fad4d22
Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>
Reviewed-on: http://git-master/r/162049
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User

6 years agoARM: Tegra: Roth: Add fan thermal estimator device
Anshul Jain [Wed, 5 Dec 2012 06:15:20 +0000]
ARM: Tegra: Roth: Add fan thermal estimator device

This device estimates the thermal point that drives fan

Change-Id: I7152cb237029d89773eff6f43f43c1e7c22a4fd2
Signed-off-by: Anshul Jain <anshulj@nvidia.com>
Reviewed-on: http://git-master/r/167701
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agoARM: tegra: pluto: remove Tegra3x support
Laxman Dewangan [Wed, 5 Dec 2012 07:35:52 +0000]
ARM: tegra: pluto: remove Tegra3x support

Tegra3x support was added in pluto interposer board.
It is not require now. Removing Tegra3x support from
pluto.

Change-Id: Icbaaf6312bd54fb61d3eb23b7ce132115f76060c
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/168653
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agopinctrl: add support for Tegra114
Pritesh Raithatha [Wed, 7 Nov 2012 15:02:03 +0000]
pinctrl: add support for Tegra114

Bug 1003210

Change-Id: I7166fc60969b68840b24adcbb71559c69b47763b
Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>
Reviewed-on: http://git-master/r/162048
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

6 years agopinctrl: tegra: add drive-type config param
Pritesh Raithatha [Fri, 30 Nov 2012 13:16:32 +0000]
pinctrl: tegra: add drive-type config param

drive-type is not supported for pinctrl-tegra20 and pinctrl-tegra30
so set drvtype_reg to -1 for them.

Bug 1003210

Change-Id: I330fb8049a3e3d6f905e385aedb782d06f1ca002
Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>
Reviewed-on: http://git-master/r/167754
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User

6 years agoEnabling PD_RX on HSIC causing extra power on PLLU
srinivas thaduvai [Wed, 5 Dec 2012 07:22:07 +0000]
Enabling PD_RX on HSIC causing extra power on PLLU

PD_RX disabled during PHY power off so that there is
no extra power on PLLU and also not seen any extra
Power on HSIC IO rail for T114.

Bug 1178557

Change-Id: I2b9c21849097d2d7966df139066994c3246fa954
Signed-off-by: srinivas thaduvai <sthaduvai@nvidia.com>
Reviewed-on: http://git-master/r/168651
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agodrivers: misc: fan thermal estimator driver
Anshul Jain [Fri, 30 Nov 2012 11:42:42 +0000]
drivers: misc: fan thermal estimator driver

Thermal estimator driver that estimates temperature based on
a linear formula from other temperature sensors

This estimated thermal point is used to drive fan

Change-Id: Ic6f82473435901514bca47cfda7a453ab64468e0
Signed-off-by: Anshul Jain <anshulj@nvidia.com>
Reviewed-on: http://git-master/r/167700
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Matt Wagner <mwagner@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

6 years agoARM: tegra: dalmore: remove Tegra3x support
Laxman Dewangan [Thu, 6 Dec 2012 08:23:18 +0000]
ARM: tegra: dalmore: remove Tegra3x support

Tegra3x support was added in dalmore interposer board.
It is not require now. Removing Tegra3x support from
dalmore.

Change-Id: I027fd9e21238aa863fd8588ef8c25aabc3be9bce
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/168635
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agopinctrl: tegra: add missing rcv_sel config params
Pritesh Raithatha [Wed, 5 Dec 2012 12:39:00 +0000]
pinctrl: tegra: add missing rcv_sel config params

rcv_sel is not supported for pinctrl-tegra20 and pinctrl-tegra30
so set rcv_sel_reg to -1 for them.

Bug 1003210

Change-Id: If7670036ec9a43e243745d9c4989189681bc2468
Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>
Reviewed-on: http://git-master/r/168381
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Stephen Warren <swarren@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

6 years agoARM: tegra: dalmore: set tps65090 wait_timeout values
Yen Lin [Wed, 5 Dec 2012 18:35:08 +0000]
ARM: tegra: dalmore: set tps65090 wait_timeout values

Set 800us wait_timeout to FET1 only.

bug 1178161

Signed-off-by: Yen Lin <yelin@nvidia.com>
Change-Id: I0601dcd2bbd13af01d58293f2ee6d0985eaf12dc
Reviewed-on: http://git-master/r/168798
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

6 years agoARM: tegra: configs: enable Bluez-HIDP
Nagarjuna Kristam [Wed, 5 Dec 2012 07:11:52 +0000]
ARM: tegra: configs: enable Bluez-HIDP

BlueZ HIDP is required for BT HID data processing on adnroid 4.2

bug 1190006

Change-Id: I7c7bbae95605caa7fb256b557c4b22d003a36058
Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-on: http://git-master/r/168645
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agovideo: tegra: nvavp: Disable powergating of VDE
Jaiprakash Khemkar [Wed, 5 Dec 2012 06:13:34 +0000]
video: tegra: nvavp: Disable powergating of VDE

* For widevine playback key programming is done in secure OS and
  VDE should be powered ON.

Bug 1190582

Change-Id: I0cea07c20a8f9d7dd0b61810137ae03b20d85161
Signed-off-by: Jaiprakash Khemkar <jkhemkar@nvidia.com>
Reviewed-on: http://git-master/r/168615
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User

6 years agoCHROMIUM: config: renormalize split configs
Rhyland Klein [Tue, 4 Dec 2012 20:14:35 +0000]
CHROMIUM: config: renormalize split configs

Renormalize the split configs to adapt to changes since the last
renormalization. Also fix the DEFAULT_HOSTNAME change which was
accidentally reverted in the last round of normalization.

Signed-off-by: Rhyland Klein <rklein@nvidia.com>
Change-Id: I4aee8d0efd4315ad57e7053c5cf7baad89435f11
Reviewed-on: http://git-master/r/168432
Reviewed-by: Christopher Freeman <cfreeman@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Allen Martin <amartin@nvidia.com>

6 years agoARM: tegra11: dvfs: Fix kernel warning
Rhyland Klein [Tue, 4 Dec 2012 15:31:20 +0000]
ARM: tegra11: dvfs: Fix kernel warning

Gcc 4.7 has flagged cpu_max_freq_index as a variable
which might possibly be used without being initialized, so
initializing it to 0.

Signed-off-by: Rhyland Klein <rklein@nvidia.com>
Change-Id: Icb279761dafb9dc29abf9382ab280399e6050e51
Reviewed-on: http://git-master/r/168391
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

6 years agoARM: tegra: t11x: disable sdmmc3 clock by default
Pavan Kunapuli [Tue, 4 Dec 2012 14:02:29 +0000]
ARM: tegra: t11x: disable sdmmc3 clock by default

Sdmmc3 clock need not be always ON. It will be
enabled by the driver when the card is present.

Bug 1188788

Change-Id: Ia345515435f79e7c31501926d4b8bc9381228a51
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-on: http://git-master/r/168371
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

6 years agoARM: tegra: roth: correct bluetooth configurations
Nagarjuna Kristam [Tue, 4 Dec 2012 09:08:58 +0000]
ARM: tegra: roth: correct bluetooth configurations

 - correct shutdown_gpio and host_wake irq in bluedroid_pm resources.
 - remove user-space consumers for bluetooth as bluedroid_pm handles
BT regulator operations

Bug 1188713

Change-Id: I773b8322f7aa4b80d9a6200c98e45e1ba42d1c0d
Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-on: http://git-master/r/168303
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

6 years agousb: Fixing USB wake up irqs based on board config
Venu Byravarasu [Tue, 4 Dec 2012 07:47:26 +0000]
usb: Fixing USB wake up irqs based on board config

Default wakeup irqs table is updated w.r.t Pluto needs.
Based on board id, added USB wake irqs for Dalmore.

bug 1048524

Change-Id: Ic68ee780deb32977f7d32ad7e081a8b11eda728b
Signed-off-by: Venu Byravarasu <vbyravarasu@nvidia.com>
Reviewed-on: http://git-master/r/168047
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

6 years agoarm: e1853: Enable host1x, DC driver
Raghavendra VK [Thu, 29 Nov 2012 19:42:01 +0000]
arm: e1853: Enable host1x, DC driver

bug 1178963

Change-Id: I865b4e4fe446b4bec85f445d2472ec4a54273334
Signed-off-by: Raghavendra VK <rvk@nvidia.com>
Reviewed-on: http://git-master/r/167391
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Nirav Patel <nipatel@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

6 years agovideo: tegra: nvmap: use phys_addr_t to hold phys addr
Krishna Reddy [Thu, 29 Nov 2012 00:20:29 +0000]
video: tegra: nvmap: use phys_addr_t to hold phys addr

Bug 1182878

Change-Id: I1f4888bf049ec362388c8db07ee0b0b43a375e46
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/167111
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

6 years agoARM: tegra: avoid race condition between cpufreq and clusterswitch
Peter De Schrijver [Wed, 21 Nov 2012 15:39:58 +0000]
ARM: tegra: avoid race condition between cpufreq and clusterswitch

Avoid a race condition between cpufreq and clusterswitch and also make writes
to no_lp and enable synchronous operations.

bug 1178947

Change-Id: Ib9608f8a0a22be84d3c0916babb7e43c1f6df2e1
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Reviewed-on: http://git-master/r/165751
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

6 years agovideo: tegra: host: Restore several regs from other regs
Wei Sun [Sat, 17 Nov 2012 01:27:50 +0000]
video: tegra: host: Restore several regs from other regs

Part 3/3 checkin.

restore reg 0xe44 from reg 0x40e
restore reg 0x403 and 0xe45 from reg 0x411

bug 972588
bug 962360
bug 1159659

Change-Id: I9ff6dba35747a910df79a0345decdba2d32c9f89
Signed-off-by: Wei Sun <wsun@nvidia.com>
Reviewed-on: http://git-master/r/164481
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>

6 years agoARM: tegra: Add t11x AMX/ADX address
Songhee Baek [Wed, 31 Oct 2012 22:44:44 +0000]
ARM: tegra: Add t11x AMX/ADX address

Change-Id: I39447ad0588405eb52677c7c2e98838d6370f1aa
Signed-off-by: Songhee Baek <sbaek@nvidia.com>
Reviewed-on: http://git-master/r/160346
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Ravindra Lokhande <rlokhande@nvidia.com>
Reviewed-by: Gajanan Bhat <gbhat@nvidia.com>
Reviewed-by: Scott Peterson <speterson@nvidia.com>

6 years agoARM: tegra11: fuse: Set speedo/process IDs based on fuses
Alex Frid [Tue, 20 Nov 2012 06:09:22 +0000]
ARM: tegra11: fuse: Set speedo/process IDs based on fuses

Bug 1170986

Change-Id: Id95f7eb8465204ba444c41b44d9736169c2ffd7b
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/165539
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Tested-by: Diwakar Tundlam <dtundlam@nvidia.com>

6 years agonet: wireless: bcmdhd: Increase scan unassoc active time to 80 ms
Dmitry Shmidt [Wed, 3 Oct 2012 23:37:16 +0000]
net: wireless: bcmdhd: Increase scan unassoc active time to 80 ms

source of the commit:

https://android.googlesource.com/kernel/common
branch- remotes/origin/android-3.4

Bug 7088022
Bug 1188165

Change-Id: Ie38ff2bf657a65ef3f2e0102cd9f7003f1097f5c
Signed-off-by: Dmitry Shmidt <dimitrysh@google.com>
(cherry picked from commit 54ae97fbeb043604912c8152fc822dd422812096)
Signed-off-by: bibhayr <bibhayr@nvidia.com>
Reviewed-on: http://git-master/r/167238
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agoARM: tegra11: thermal: Clean duplicated definitions
Alex Frid [Sun, 2 Dec 2012 07:16:05 +0000]
ARM: tegra11: thermal: Clean duplicated definitions

Same Tegra throttling data structures and function prototypes were
defined in

mach-tegra/include/mach/thermal.h
and
mach-tegra/cpu-tegra.h

Consolidated all definitions in thermal.h header.

Change-Id: I52f6a964d04cb74513e5fc7be2f2aa7762b90c3d
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/168663
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Tested-by: Diwakar Tundlam <dtundlam@nvidia.com>

6 years agoARM: tegra11: clock: Don't set cbus to the same rate
Alex Frid [Wed, 5 Dec 2012 04:02:13 +0000]
ARM: tegra11: clock: Don't set cbus to the same rate

Skipped cbus set rate operation, if the new target rate is the
same as the old one.

Change-Id: I8404b240a5fa7bbbc37b48afce8eaae95185211f
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/168605
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agoARM: tegra11: clock: Use XUSB clock source integer divisors
Alex Frid [Wed, 5 Dec 2012 00:36:36 +0000]
ARM: tegra11: clock: Use XUSB clock source integer divisors

Only integer divisors are allowed from now on for XUSB clock
sources.

Change-Id: I2f0888d4ab36f81196ecdcaadc2a7e27e689207d
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/168559
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agoARM: tegra11: clock: Use AVP clock source integer divisors
Alex Frid [Tue, 4 Dec 2012 21:03:55 +0000]
ARM: tegra11: clock: Use AVP clock source integer divisors

Only integer divisors are allowed from now on for AVP/SCLK clock
sources.

Change-Id: I5d846e8c304c18cff2e2da5a8ff2d2ed821ea727
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/168558
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>