8 years agomisc: nct1008: add id for nct72
Chandler Zhang [Fri, 4 May 2012 02:32:36 +0000]
misc: nct1008: add id for nct72

Add id for nct1008 compatible thermal sensor:
NCT72

Bug 961970

Change-Id: I792af664f73b6d1c8317a35c66330cf571cf3aba
Reviewed-on: http://git-master/r/100465
Signed-off-by: Chandler Zhang <chazhang@nvidia.com>
[danifu@nvidia.com: resolved conflicits in nct1008.c]
Signed-off-by: Daniel Fu <danifu@nvidia.com>
Reviewed-on: http://git-master/r/103581
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

8 years agovideo: tegra: dc: Open-up HDMI mode filter
Shashank Sharma [Tue, 8 May 2012 09:40:42 +0000]
video: tegra: dc: Open-up HDMI mode filter

We support dynamic pixel-clock setting now, so open HDMI mode
filter by not rejecting a mode due to pixel clock mismatch. If the
mode's requested pixclock is within the suppoted range, check few
constraints of hardware and allow it.

Add aspect ratio check to reject modes with awkward aspect ratio.

Bug 967458
Signed-off-by: Shashank Sharma <shashanks@nvidia.com>

Change-Id: Ife474dbfe4137a000a4a43b0e1ff72847f2a8b0a
Reviewed-on: http://git-master/r/96163
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

8 years agoasoc: tegra: Add TDM mode support
Nitin Pai [Tue, 24 Apr 2012 10:27:51 +0000]
asoc: tegra: Add TDM mode support

Added TDM mode support in I2S driver.
Added support functions in AHUB to pass audio/client bits.
Added support functions in AHUB to pass audio/client channels.
Fixed the stopping of I2S/TDM by clearing the fifo.

Bug 948478

Signed-off-by: Nitin Pai <npai@nvidia.com>
Change-Id: I560f4ab5b71e4833931934275272a094241241fe
Reviewed-on: http://git-master/r/103840
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Ravindra Lokhande <rlokhande@nvidia.com>
Reviewed-by: Scott Peterson <speterson@nvidia.com>

8 years agomedia: video: tegra: Do not use nvmap private header
Terje Bergstrom [Mon, 21 May 2012 18:15:26 +0000]
media: video: tegra: Do not use nvmap private header

Do not include nvmap private header. The needed function is available
in the public header.

Bug 965206

Change-Id: I2ff752c66e66f64e8c518711aecf6f54dc152d41
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/103676
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

8 years agovideo: tegra: host: move function pointers to nvhost_driver
Mayuresh Kulkarni [Wed, 16 May 2012 08:26:28 +0000]
video: tegra: host: move function pointers to nvhost_driver

- currently, function pointers are inside nvhost_device
- these functions abstract the device specific implementation
of a functionality per SoC
- move them to nvhost_driver so that nvhost_device can be
instantiated from arch code using board files/device trees
- add support to use single driver for multiple devices using
concept of id_table. this will be useful in supporting
multiple SoC devices binding single driver
- also add some notes about how device name is expected

Bug 871237

Change-Id: I4c75d7121d26c3bdc50f058e0d144d89ca0edbd9
Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-on: http://git-master/r/100985
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

8 years agovideo: tegra: nvmap: Export nvmap_duplicate_handle_id
Terje Bergstrom [Mon, 21 May 2012 18:14:03 +0000]
video: tegra: nvmap: Export nvmap_duplicate_handle_id

Export nvmap_duplicate_handle_id() for usage by other drivers. It is
already being used in nvavp and tegradc, and nvhost needs it to be
able to move the relocation code to inside nvhost.

Bug 965206

Change-Id: I3f818d1faa967886e834aa457a99dfdb61bc6b85
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/103587
Reviewed-by: Automatic_Commit_Validation_User

8 years agommc: returning correct mmc test case number
Vishal Singh [Fri, 18 May 2012 13:45:56 +0000]
mmc: returning correct mmc test case number

mmc_test currently shows test case number as 0 for all test cases.
Correcting this to depict the correct test case number.

Bug 976137.

Change-Id: Ifa7bdd08d537ef20a3303594938a771e823d4e3b
Signed-off-by: Vishal Singh <vissingh@nvidia.com>
Reviewed-on: http://git-master/r/103368
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Shridhar Rasal <srasal@nvidia.com>
Tested-by: Shridhar Rasal <srasal@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>

8 years agomedia: video: tegra: fix nvc power management
Anton Kondratenko [Thu, 17 May 2012 19:31:09 +0000]
media: video: tegra: fix nvc power management

NVC focuser code was not up to date with the latest changes
related to power management in upper layers. This change is to fix it.

Bug 968003

Change-Id: I362fa062039eaa06c4f67644eac7ee2db0bf7d6b
Signed-off-by: Anton Kondratenko <akondratenko@nvidia.com>
Reviewed-on: http://git-master/r/103188
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

8 years agortc: tps6591x: Limiting years in the 0 - 99 range
Venu Byravarasu [Wed, 16 May 2012 10:15:45 +0000]
rtc: tps6591x: Limiting years in the 0 - 99 range

As RTC can store year in the 0 - 99 range only,
handling it accordingly

bug 985890

Change-Id: Idcfb29028f482283ae2658579a3283c7d4f230f1
Signed-off-by: Venu Byravarasu <vbyravarasu@nvidia.com>
Reviewed-on: http://git-master/r/102798
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>

8 years agovideo: tegra: dc: remove bandwidth efficiency
Venkata (Muni) Anda [Thu, 22 Mar 2012 01:40:45 +0000]
video: tegra: dc: remove bandwidth efficiency

Remove the efficiency factor in the bandwidth calculation.
Clock API will take care off setting the right clock based factoring the
efficiency.

Change-Id: I2b549197778b5afaf1aab3cc87a84debb08172e8
Reviewed-on: http://git-master/r/91659
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/103682
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
GVS: Gerrit_Virtual_Submit

8 years agoarm: tegra: Added support for TDM mode params
Nitin Pai [Mon, 21 May 2012 10:39:43 +0000]
arm: tegra: Added support for TDM mode params

Added TDM mode params to be passed from platform to the machine driver

Bug 948478

Change-Id: I909db0ceebde002fcebcf7635cebe98c6a74142d
Signed-off-by: Nitin Pai <npai@nvidia.com>
Reviewed-on: http://git-master/r/103594
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Scott Peterson <speterson@nvidia.com>

8 years agoARM: tegra: clock: Account for memory BW efficiency
Alex Frid [Sun, 18 Mar 2012 07:01:02 +0000]
ARM: tegra: clock: Account for memory BW efficiency

Account for memory efficiency when processing requests from Tegra3
EMC shared bandwidth users. Do not round requests from these users
until they are aggregated.

The respective debugfs node: /d/tegra_emc/efficiency (in %).

Bug 952739

Signed-off-by: Alex Frid <afrid@nvidia.com>
(cherry picked from commit 86929087f68c4366d6179101eb9a6a6473a4f084)

Change-Id: I4acdd89f44de1401ce5dad8fc4936932df014458
Reviewed-on: http://git-master/r/103499
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Jihoon Bang <jbang@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
GVS: Gerrit_Virtual_Submit

8 years agoARM: tegra: clock: Share Tegra3 camera EMC bandwidth
Alex Frid [Tue, 20 Mar 2012 01:21:51 +0000]
ARM: tegra: clock: Share Tegra3 camera EMC bandwidth

Change Tegra3 camera EMC shared user mode from SHARED_FLOOR to
SHARED_BW and combine requests from ISO clients (camera and display,
which is already in SHARED_BW mode).

Bug 652739

Signed-off-by: Alex Frid <afrid@nvidia.com>
(cherry picked from commit f1107ea4fe229d9807c1fba79a003753d0a8be7f)

Change-Id: If5b7f578060a646df1794dde8c9be2944d88e942
Reviewed-on: http://git-master/r/103498
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
GVS: Gerrit_Virtual_Submit

8 years agovideo: tegra: dc: Enable GCOV for dc/ext code
Chao Xu [Fri, 18 May 2012 17:01:47 +0000]
video: tegra: dc: Enable GCOV for dc/ext code

Change-Id: Ie6d425f06911008d77c2ed87dc7b40611755ee6a
Signed-off-by: Chao Xu <cxu@nvidia.com>
Reviewed-on: http://git-master/r/103396
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mark Stadler <mastadler@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

8 years agoarm: tegra: apbdmaio: Add dma_sync* calls
Pradeep Kumar [Fri, 18 May 2012 10:46:37 +0000]
arm: tegra: apbdmaio: Add dma_sync* calls

Add dma_sync* calls to make memory coherent between
CPU and Device.

Bug 983988

Change-Id: I40c514e01130762a12833c3ab7e0613f984870c6
Signed-off-by: Pradeep Kumar <pgoudagunta@nvidia.com>
Reviewed-on: http://git-master/r/103336
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
GVS: Gerrit_Virtual_Submit

8 years agoARM: tegra: define/enable ARCH_HAS_SUSPEND_PAGETABLE
Chris Johnson [Wed, 15 Feb 2012 01:27:08 +0000]
ARM: tegra: define/enable ARCH_HAS_SUSPEND_PAGETABLE

For Tegra, the CPU suspend code path installs its own 1:1 pagetable
setup once at init time. This pagetable is used by all CPUs doing
suspend/resume.

We want to use the common ARM code for CPU suspend/resume, but don't
want the MMU reenable code to patch the current pagetable as it's
shared (and could cause problems if the pagetable loads/stores were
were interleaved).

The installed pagetable already covers the cpu_resume_turn_mmu_on
VA, so we're able to just use the existing pagetable. This sets up
the CONFIG option to skip this part of the MMU reenable.

Bug 929856

Change-Id: Ibbac258122df6def7f7a2d511778a6f11d474938
Signed-off-by: Chris Johnson <cwj@nvidia.com>
Reviewed-on: http://git-master/r/92350
Reviewed-by: Sang-Hun Lee <sanlee@nvidia.com>
Tested-by: Sang-Hun Lee <sanlee@nvidia.com>
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-by: Ahung Cheng <ahcheng@nvidia.com>
Tested-by: Ahung Cheng <ahcheng@nvidia.com>
Reviewed-on: http://git-master/r/103205
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

8 years agoARM: vfp: ensure preemption is disabled when enabling VFP access
Will Deacon [Tue, 8 May 2012 18:22:35 +0000]
ARM: vfp: ensure preemption is disabled when enabling VFP access

The vfp_enable function enables access to the VFP co-processor register
space (cp10 and cp11) on the current CPU and must be called with
preemption disabled. Unfortunately, the vfp_init late initcall does not
disable preemption and can lead to an oops during boot if thread
migration occurs at the wrong time and we end up attempting to access
the FPSID on a CPU with VFP access disabled.

This patch fixes the initcall to call vfp_enable from a non-preemptible
context on each CPU and adds a BUG_ON(preemptible) to ensure that any
similar problems are easily spotted in the future.

originally from
http://git.kernel.org/?p=linux/kernel/git/will/linux.git;a=commit;h=468c963e0210bf8108b17cf75066f25f39cabb56

Change-Id: I26fff8abe4c18bd3291613f70d0228aa2313811a
Reported-by: Hyungwoo Yang <hwoo.yang@gmail.com>
Signed-off-by: Hyungwoo Yang <hyungwooy@nvidia.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Reviewed-on: http://git-master/r/102315
GVS: Gerrit_Virtual_Submit
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

8 years agoRevert "ARM: vfp: Prevent process migration"
Hyungwoo Yang [Mon, 14 May 2012 22:34:42 +0000]
Revert "ARM: vfp: Prevent process migration"

This reverts commit 68667feb8eae225f1293a7044c989ab0bba8dbd1.

Change-Id: I59023f2d83392465f7a989693b67cef96d565ed9
Signed-off-by: Hyungwoo Yang <hyungwooy@nvidia.com>
Reviewed-on: http://git-master/r/102314
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

8 years agoarm: tegra: governor: change governor using cpufreq interface
Puneet Saxena [Tue, 17 Apr 2012 13:19:17 +0000]
arm: tegra: governor:  change governor using cpufreq interface

Older code sets "conservative" governor in early-suspend
using sysfs entries.This implementation changes governor
in early-suspend using cpufreq interfaces.

bug 871958

Change-Id: I721afb6184982a063dc5f330da31f8fb88481cfd
Signed-off-by: Puneet Saxena <puneets@nvidia.com>
Reviewed-on: http://git-master/r/100849
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

8 years agoARM: tegra: decouple mode from flags
Bo Yan [Thu, 3 May 2012 16:35:07 +0000]
ARM: tegra: decouple mode from flags

When doing LP2 on last standing CPU, we currently pass
"mode | flag" to a few functions as argument, with the
assumption that "mode" will be confined to lower 22 bits
in PMC_CTRL register and "flags" will occupy higher 10
bits. If "flags" grows downward or "mode" grows upward,
without this explicit knowledge, LP2 will break on the
last standing CPU. Therefore we need to decouple them.

Currently only "flags" part is being used when passed to
other subroutines, so use "flags" only.

Change-Id: I299c998145d81c17760bda8a0b56311fed553958
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/100358
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

8 years agoARM: Tegra: P1852: changed nor timing regs and freq
Mohit Kataria [Fri, 18 May 2012 12:11:29 +0000]
ARM: Tegra: P1852: changed nor timing regs  and freq

Nor frequency and timing registers changed as per
values provided by syseng

Bug 978870

Change-Id: I18313c7df6265ddd4140d264ac2751ed8f1982df
Reviewed-on: http://git-master/r/103355
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Mohit Kataria <mkataria@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

8 years agoARM: tegra: cardhu: add A07 memory table
Ray Poudrier [Fri, 18 May 2012 00:48:27 +0000]
ARM: tegra: cardhu: add A07 memory table

Bug 970890

Change-Id: If0ebb1ad76dfe3267bc0acd3feae70a701c1dfdb
Signed-off-by: Ray Poudrier <rapoudrier@nvidia.com>
Reviewed-on: http://git-master/r/103237
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

8 years agopower: smb349: support for self-powered devices
Chandler Zhang [Mon, 14 May 2012 09:56:48 +0000]
power: smb349: support for self-powered devices

Some self-powered devices doesn't strictly follow USB spec that
has 5V Vbus to upstream cannot work with mux on the data lines.

The MAX4983 mux routes the data lines to SMB349 rather than the
Tegra chip when PGOOD polarity is low-active and DCIN is 5V.

Change PGOOD not to invert polarity for the devices that has 5V to
upstream.

Bug 981761

Change-Id: Ic67ec66ce8936d9a9d5d2df7bca2ff7f9c65b147
Signed-off-by: Chandler Zhang <chazhang@nvidia.com>
Reviewed-on: http://git-master/r/103526
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

8 years agovideo: tegra: dc: Change the definitions in display feature table.
Kevin Huang [Thu, 17 May 2012 22:23:51 +0000]
video: tegra: dc: Change the definitions in display feature table.

Change-Id: I13f0f7502aea7f43b2ddff12e9664c22a1d9bd21
Signed-off-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-on: http://git-master/r/103210
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

8 years agoarm: thermal: Removed nonTEGRA_THERMAL_SYSFS logic
Joshua Primero [Thu, 17 May 2012 19:17:15 +0000]
arm: thermal: Removed nonTEGRA_THERMAL_SYSFS logic

All throttling must go through the Linux thermal sysfs
framework now.

Change-Id: Ia871e0b06e548d5d82211a65979bea52a6c28fb0
Signed-off-by: Joshua Primero <jprimero@nvidia.com>
Reviewed-on: http://git-master/r/103183
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

8 years agoarm: tegra: thermal: removed TEGRA_THERMAL_SYSFS
Joshua Primero [Thu, 17 May 2012 19:19:01 +0000]
arm: tegra: thermal: removed TEGRA_THERMAL_SYSFS

Removed the CONFIG_TEGRA_THERMAL_SYSFS option. Any
throttling activities must go through the Linux
thermal sysfs framework now via CONFIG_THERMAL.

Change-Id: Ibe680d82d3225994e6bebcfe75a0f058e567e35c
Signed-off-by: Joshua Primero <jprimero@nvidia.com>
Reviewed-on: http://git-master/r/103182
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

8 years agoarm: tegra: xmm: pm qos for modem enumeration
Vinayak Pane [Thu, 5 Apr 2012 02:25:34 +0000]
arm: tegra: xmm: pm qos for modem enumeration

XMM modem first enumeration has timing requirement, so khubd
should perform enum within 1 second. An issue is seen sometimes
when the hub events are not sent on time (on fully loaded system)
and then khubd timesout. This patch adds PM QOS request to bump up
the cpu frequency for 2 seconds.

Bug 946027

Change-Id: I1a43c043d42cfa442517a2a7ad8d69a934d4ab47
Signed-off-by: Vinayak Pane <vpane@nvidia.com>
Reviewed-on: http://git-master/r/102697
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

8 years agoarm: tegra: xmm: simultaneous L3 to L0 wakeup
Vinayak Pane [Fri, 27 Apr 2012 22:01:05 +0000]
arm: tegra: xmm: simultaneous L3 to L0 wakeup

In AP initiated L3->L0 wakeup xmm power state is set BBXMM_PS_L3TOL0
but if CP is also trying to wakeup then ipc_ap_wake_irq with falling
edge treats it incorrectly as CP wakeup pending - new race condition.

Adding a check to fix this scenario for both L3 and L3TOL0 states.

Bug 966077

Change-Id: I3af3538b48745588f17e4c13a3e23e4033f21821
Signed-off-by: Vinayak Pane <vpane@nvidia.com>
Reviewed-on: http://git-master/r/102698
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Steve Lin <stlin@nvidia.com>

8 years agovideo: tegra: dc: Init hdmi's platform data and fb
Shashank Sharma [Fri, 18 May 2012 14:32:57 +0000]
video: tegra: dc: Init hdmi's platform data and fb

1. Change hdmi platform data structure's xres and yres values.
   These values were made same as LVDS panel (1366x768). LVDS
   runs fix display mode,but HDMI can switch to different modes.
   The new values (640x480) are corresponding to HDMI's fallback
   mode resolution.

2. Map bootloader's framebuffer content to fb1 also, to
   initialize fb1's content, and to avoid black & white
   strips when hdmi gets enabled but has no content in fb.

It sometimes causes inconsistency on fb_console mapped on HDMI.

Bug: 930136
Change-Id: Iecf0d8c1cdd6a1baec2aec9c5dded3d73d1347e1
Signed-off-by: Shashank Sharma <shashanks@nvidia.com>
Reviewed-on: http://git-master/r/103381
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

8 years agoARM: tegra: pcie: Fix for second pcie port detection.
Manoj Chourasia [Fri, 11 May 2012 13:14:42 +0000]
ARM: tegra: pcie: Fix for second pcie port detection.

PCIE card on second port doesn't get detected if the first
port is empty. If the link for first port is reset and the
second port is queried for card, it doesn't get detected.

Fix for the issue is do not reset the link if the port is
not detected in third attempt.

bug 970206

Change-Id: I4e4d32c22697b817381834ac746417437016d7f3
Signed-off-by: Manoj Chourasia <mchourasia@nvidia.com>
Reviewed-on: http://git-master/r/101986
(cherry picked from commit c085f6b1b3a77b7aae3b04e22c7a9bfed8517c1e)
Reviewed-on: http://git-master/r/103077
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

8 years agoARM: tegra: cardhu: add initial A07 support
Ray Poudrier [Thu, 17 May 2012 01:49:20 +0000]
ARM: tegra: cardhu: add initial A07 support

Bug 970890

Change-Id: I24c3b1e2c621afbb90ced552194403f147e20a6c
Signed-off-by: Ray Poudrier <rapoudrier@nvidia.com>
Reviewed-on: http://git-master/r/102984
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

8 years agoarm: tegra: nvmap: remove nvmap.h from mach-tegra/include.
Krishna Reddy [Wed, 16 May 2012 02:54:50 +0000]
arm: tegra: nvmap: remove nvmap.h from mach-tegra/include.

It is moved to kernel/include.
Bug 854182

Change-Id: I3fb729c88e29a9f213656fbf20810c10dfd9d7a6
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/102727
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-by: Bo Yan <byan@nvidia.com>

8 years agospi: tegra: correct directions when syncing buffer for device/dma.
Laxman Dewangan [Thu, 17 May 2012 11:19:57 +0000]
spi: tegra: correct directions when syncing buffer for device/dma.

The Tx buffer to be synced with the direction of DMA_TO_DEVICE and
Rx buffer should be synced with direction of DMA_FROM_DEVICE.

bug 959947

Change-Id: I490a93e05723e3114c8ae3c640bb7eff23bcc75d
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/103095
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

8 years agoi2c: tegra: Fix i2c unknown interrupt issue
Ken Chang [Fri, 11 May 2012 07:40:09 +0000]
i2c: tegra: Fix i2c unknown interrupt issue

writes to modules on APB bus may complete out-of-order. need
to guarantee that the write is completed by reading it back.

read I2C_INT_STATUS back right after writing the current int status
in the isr to make sure the clear operation of I2C_INT_STATUS is
done before the interrupt is re-enabled.
the same also done for DVC_STATUS.

bug 980763

Change-Id: I34f18804d530ccadf561fe1736552b6a4dd6e4ce
Signed-off-by: Ken Chang <kenc@nvidia.com>
Reviewed-on: http://git-master/r/101925
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

8 years agospi: tegra: register interrupt as ONESHOT
Laxman Dewangan [Mon, 14 May 2012 08:28:02 +0000]
spi: tegra: register interrupt as ONESHOT

The Tegra spi's engine is design as it generates interrupt
when any error occurs and it keep transferring data. It does
not stop the engine once error occurred and interrupt generated.
This may cause reentry of ISR as on error case, isr get called
where it clears interrupt and because it is still in progress,
it again interrupts and schedule the thread.
The second time scheduling of the isr/thread can cause the issue
in queue management and sw state.
So Making the interrupt as ONESHOT so that the interrupt will not
get schedule until the engine is reset in error case.

Change-Id: I96daaf50102aede93164c82b7f6da235d0a7fbfc
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/101547
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jui Chang Kuo <jckuo@nvidia.com>
Tested-by: Jui Chang Kuo <jckuo@nvidia.com>

8 years agoARM: tegra: cardhu: add pm267 to kbc int keys
Ray Poudrier [Thu, 8 Mar 2012 03:51:33 +0000]
ARM: tegra: cardhu: add pm267 to kbc int keys

Bug 896071

Change-Id: I1bcd8069bfccdd80a1506e71bb9cc0353b9ea9a6

Conflicts:

arch/arm/mach-tegra/board-cardhu-kbc.c

Change-Id: I29af7c5289ae06757eb9cffce3065db08b3e8d06
Reviewed-on: http://git-master/r/97734
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

8 years agotegra: usb: host: dma buffer sync while mapping
Vinayak Pane [Fri, 23 Mar 2012 23:52:56 +0000]
tegra: usb: host: dma buffer sync while mapping

Implementing dma_sync_* functions for usb transfer buffers
when DMA is being used by ehci-hcd.

Bug 953885

Change-Id: Ia772138752e3fe03bb45ee983dffa1b5d8d620f5
Signed-off-by: Vinayak Pane <vpane@nvidia.com>
Reviewed-on: http://git-master/r/102687
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

8 years agoARM: defconfig: enable background ops
Vishal Singh [Fri, 27 Apr 2012 12:48:47 +0000]
ARM: defconfig: enable background ops

Enable background ops on p852 and p1852.

Bug 847037.

Change-Id: Ib72d361aba5cf08c171976e6f5bf0ffa555e1471
Signed-off-by: Vishal Singh <vissingh@nvidia.com>
Reviewed-on: http://git-master/r/99121
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>

8 years agoARM: tegra: smmu: Use non-secure register for sync-read
Hiro Sugawara [Thu, 10 May 2012 21:57:50 +0000]
ARM: tegra: smmu: Use non-secure register for sync-read

Bug 973463

Change-Id: Ia2e42232e6f10d12387b2bc3bbee1f996e7aea9d
Signed-off-by: Hiro Sugawara <hsugawara@nvidia.com>
Reviewed-on: http://git-master/r/101837
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

8 years agovideo: tegra: dc: add per window global alpha
Jon Mayo [Wed, 31 Aug 2011 20:26:43 +0000]
video: tegra: dc: add per window global alpha

Adds a global alpha parameter to each window. It provides a default
alpha value for pixel formats that do not include alpha.

Change-Id: I5465864877a727b4daed0eb32fb8219e2ccb663e
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/101806
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

8 years agoARM: tegra: smmu: Save & restore correct SMMU registers
Hiro Sugawara [Tue, 8 May 2012 16:35:42 +0000]
ARM: tegra: smmu: Save & restore correct SMMU registers

Bug 981373

Change-Id: I8617ca0ffd7df570b8ee6f3cad524decf6c26437
Signed-off-by: Hiro Sugawara <hsugawara@nvidia.com>
Reviewed-on: http://git-master/r/101285
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

8 years agoarm:tegra:pcie: Resolve section mismatch warning
Jay Agarwal [Thu, 17 May 2012 12:25:29 +0000]
arm:tegra:pcie: Resolve section mismatch warning

Bug 984434

Change-Id: I7184fc77132485ab24357e5f2c965ddf4eca6a07
Signed-off-by: Jay Agarwal <jagarwal@nvidia.com>
Reviewed-on: http://git-master/r/103112
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

8 years agovideo: tegra: Use nvmap.h include file from kernel/include
Krishna Reddy [Wed, 16 May 2012 02:53:41 +0000]
video: tegra:  Use nvmap.h include file from kernel/include

Use nvmap.h include file from kernel/include instead of mach-tegra/include.
Bug 854182

Change-Id: I23eec4df8f69da185d08acd37ae0fba984675e92
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/102726
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

8 years agogpu: ion: tegra: Use nvmap.h include file from kernel/include
Krishna Reddy [Wed, 16 May 2012 02:53:13 +0000]
gpu: ion: tegra:  Use nvmap.h include file from kernel/include

Use nvmap.h include file from kernel/include instead of mach-tegra/include.
Bug 854182

Change-Id: I9b2899c6170f1867043804ec756f37da93161242
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/102725
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

8 years agomedia: video: tegra: Use nvmap.h include file from kernel/include
Krishna Reddy [Wed, 16 May 2012 02:52:40 +0000]
media: video: tegra:  Use nvmap.h include file from kernel/include

Use nvmap.h include file from kernel/include instead of mach-tegra/include.
Bug 854182

Change-Id: I85ee8d8aacf5884d6a1b6bb3fb70e6f6d4110011
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/102724
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

8 years agoarm: tegra: Use nvmap.h include file from kernel/include
Krishna Reddy [Wed, 16 May 2012 02:51:45 +0000]
arm: tegra:  Use nvmap.h include file from kernel/include

Use nvmap.h include file from kernel/include instead of mach-tegra/include.
Bug 854182

Change-Id: Ic82b35d6c2e1c49461575a7bbbfd28ee43921466
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/102723
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

8 years agovideo: tegra: dc: Use nvmap.h include file from kernel/include
Krishna Reddy [Wed, 16 May 2012 02:50:52 +0000]
video: tegra: dc:  Use nvmap.h include file from kernel/include

Use nvmap.h include file from kernel/include instead of mach-tegra/include.
Bug 854182

Change-Id: Ibfa271191bfce371986df29a7971b1da077c3f06
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/102722
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

8 years agovideo: tegra: host: Use nvmap.h include file from kernel/include
Krishna Reddy [Wed, 16 May 2012 02:48:35 +0000]
video: tegra: host: Use nvmap.h include file from kernel/include

Use nvmap.h include file from kernel/include instead of mach-tegra/include.
Bug 854182

Change-Id: I9a44471dc77d1ed7aa3b6e61a5eca4833fe6dc25
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/102721
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

8 years agovideo: tegra: nvmap: Use nvmap.h include file from kernel/include
Krishna Reddy [Wed, 16 May 2012 02:40:35 +0000]
video: tegra: nvmap: Use nvmap.h include file from kernel/include

Use nvmap.h include file from kernel/include instead of mach-tegra/include.
Bug 854182

Change-Id: I385657f45483f2696e99fc2b4ed934fef5decd1e
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/102720
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

8 years agonvmap: Move include file to kernel/include
Krishna Reddy [Wed, 16 May 2012 02:32:00 +0000]
nvmap: Move include file to kernel/include

To prepare for kernel modularization, nvmap include file need to be
moved from mach-tegra/include to kernel/include.

Bug 854182

Change-Id: I9eab484830d114873f15a99fb93355aac3405709
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/102719
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
GVS: Gerrit_Virtual_Submit

8 years agoregulator: tps6238x0: enable output discharge always
Laxman Dewangan [Wed, 16 May 2012 20:19:32 +0000]
regulator: tps6238x0: enable output discharge always

Enable output discharge always to have faster ramp-down
time.

bug 981330

Change-Id: I0a00ab38e9be631a58bc8b11148be5c3c508d119
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/102882
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Pradeep Goudagunta <pgoudagunta@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>

8 years agomedia: video: tegra: add EMC clock rate control
Jihoon Bang [Thu, 3 May 2012 19:20:00 +0000]
media: video: tegra: add EMC clock rate control

Add EMC clock rate control to tegra_camera ioctl.
This change allows user space to change EMC clock requirement
for camera based on use case and resolution.

For example, video recording use case needs more than double
memory bandwidth of preview use case.

Bug 964635

Change-Id: Ibe5a77a810869b53b6e057f2ee62ebb96997c2f4
Signed-off-by: Jihoon Bang <jbang@nvidia.com>
Reviewed-on: http://git-master/r/101274
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>

8 years agoARM: tegra3: defconfig: enable MAX8973
Pradeep Kumar [Thu, 17 May 2012 06:31:38 +0000]
ARM: tegra3: defconfig: enable MAX8973

Enable MAX8973 voltage regulator chip.

bug 981355

Change-Id: Ifdb3dd89b0e36c2a8500f8aa1e49884cbc6761d5
Signed-off-by: Pradeep Kumar <pgoudagunta@nvidia.com>
Reviewed-on: http://git-master/r/102805
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

8 years agoARM: 7376/1: clkdev: Implement managed clk_get()
Mark Brown [Thu, 5 Apr 2012 10:42:09 +0000]
ARM: 7376/1: clkdev: Implement managed clk_get()

Allow clk API users to simplify their cleanup paths by providing a
managed version of clk_get() and clk_put().

Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Cherry-picked from mainline
a8a97db984bdc5e89d42e41891543d2daaf314cb

Change-Id: Ib36c0c82063928937166b6014fca92025bc83878
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/102860
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Stephen Warren <swarren@nvidia.com>

8 years agovideo: tegra: hdmi: set correct VIC for 1080p/30Hz mode
Youngjin Kim [Fri, 4 May 2012 11:59:15 +0000]
video: tegra: hdmi: set correct VIC for 1080p/30Hz mode

Set correct VIC value for 1080p/30Hz mode in AVI infoframe.

Bug 969243

Change-Id: I6da9236124dbad7e4d74f3cf6dad7e273bd7778b
Signed-off-by: Youngjin Kim <nkim@nvidia.com>
Reviewed-on: http://git-master/r/100553
(cherry picked from commit 41858f2fd99face9dc0c47bd2870045291a6c0b6)
Reviewed-on: http://git-master/r/102378
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Donghan Ryu <dryu@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

8 years agovideo: tegra: hdmi: avoid border color impact
Vick Yu [Mon, 23 Apr 2012 09:12:50 +0000]
video: tegra: hdmi: avoid border color impact

To avoid border color making limited range test of MHL
certification failed.

Bug 966615
Bug 969243
Signed-off-by: Vick Yu <vyu@nvidia.com>

Change-Id: I5c9659358a1c8dac9c6a5194bbc6f59b8230f116
Reviewed-on: http://git-master/r/100552
(cherry picked from commit 20774a3db055630ba0e59669e2e7cbd412f03178)
Reviewed-on: http://git-master/r/102377
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Youngjin Kim <nkim@nvidia.com>
Tested-by: Youngjin Kim <nkim@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Donghan Ryu <dryu@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

8 years agodmaengine/dma_slave: fix merge issue
Laxman Dewangan [Tue, 15 May 2012 12:51:38 +0000]
dmaengine/dma_slave: fix merge issue

Merges of  dma changes from mainline reported conflict and
it was not got resolved properly.
Fix the resolution issue.

Change-Id: I7edc5effc0b9a61363e77e6cc39eb62e315396d0
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/102590
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit

8 years agovideo: tegra: host: Yield in case of race of waits
Terje Bergstrom [Tue, 15 May 2012 07:42:18 +0000]
video: tegra: host: Yield in case of race of waits

If two threads need to wait for CDMA to become quiet at the same
time, the second one will cause a BUG(). Replace the BUG() with a
code to yield and try again.

Change-Id: I7925ad0cc0e8292919e54d0fa45f7837f453358d
Reviewed-on: http://git-master/r/102437
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
GVS: Gerrit_Virtual_Submit

8 years agoARM: tegra: emc: add eack_disable functionality
Ray Poudrier [Fri, 2 Mar 2012 00:35:11 +0000]
ARM: tegra: emc: add eack_disable functionality

Bug 946110

Signed-off-by: Ray Poudrier <rapoudrier@nvidia.com>

Change-Id: I0d4c716c4ab7a60011018d6c13be4265cc9f7290
Reviewed-on: http://git-master/r/87061
(cherry picked from commit a7dad880dcea36fcb8223cf0b34cc1091d725a9f)
Reviewed-on: http://git-master/r/102360
Reviewed-by: Raymond Poudrier <rapoudrier@nvidia.com>
Tested-by: Raymond Poudrier <rapoudrier@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

8 years agovideo: tegra: host: Simplify robustness
Terje Bergstrom [Mon, 14 May 2012 11:59:43 +0000]
video: tegra: host: Simplify robustness

nvhost attempts to purge all buffers from timed out contexts. This is
very error prone, and not necessary. Change behavior so that only the
hung job, and the immediately following jobs from same context are
purged. This simplifies code, and corrects bug where the push buffer
modifications caused panics.

Bug 982946

Change-Id: Ifb26484cf02ef40f8d5b20338eebc0a731f453cf
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/102234
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

8 years agoregulator: max8973: implement regulator driver for maxim8973
Laxman Dewangan [Sun, 13 May 2012 10:12:21 +0000]
regulator: max8973: implement regulator driver for maxim8973

This driver supports ivoltage regulator driver for MAX8973
voltage regulator chip. The MAX8973 high-efficiency, three-phase,
DC-DC step-down switching regulator delivers up to 9A of
output current.

bug 981355

Change-Id: I6e4ff62139face4e47e2be269554a64c2654e74b
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/102148
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

8 years agovideo: tegra: host: Do not panic on hardware timeout
Terje Bergstrom [Thu, 12 Apr 2012 11:28:40 +0000]
video: tegra: host: Do not panic on hardware timeout

nvhost panics if hardware does not respond within 30 seconds. Remove
this behavior, as it causes problems in emulation and simulation.
Panic should be used only to prevent corruption.

Submits are now given a default timeout of 30 seconds. The clients
can still override with their own timeout value.

MPE doesn't provide the number of slots for context save/restore.
This information is needed to be able to use the submit timeout for
MPE.

Bug 982946

Change-Id: I0f54d639df0fb726cc3163b317bf9c90bf56798b
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/100246
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

8 years agonet: wireless: sd8797: Integrate M2614311 Release
Mohan T [Mon, 14 May 2012 06:37:54 +0000]
net: wireless: sd8797: Integrate M2614311 Release

Integrate Marvell SD8797 M2614311-GPL driver release
Package Ver: T3T-14.69.11.p122-M2614311_A0B0-MGPL

Bug 954218

Change-Id: Ic4c110cc06f45cf3f612df323e68c75edeb46e11
Signed-off-by: Mohan T <mohant@nvidia.com>
Reviewed-on: http://git-master/r/100052
Reviewed-by: Rakesh Kumar <krakesh@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

8 years agoarm: tegra kai:fix screen flicker when kernel boot up.
Linqiang Pu [Mon, 9 Apr 2012 14:26:11 +0000]
arm: tegra kai:fix screen flicker when kernel boot up.

set vdd_pnl as 'boot_on' to avoid dropping panel VDD.
Bug 965398 959819

Signed-off-by: Linqiang Pu <dpu@nvidia.com>
Reviewed-on: http://git-master/r/95398
(cherry picked from commit 9f423c83e391fa8581de2c088b4dea8248da8ae1)

Change-Id: I513e004f7ec1a46c155825af9e6278c46ca444c5
Reviewed-on: http://git-master/r/96643
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

8 years agoarm: tegra: kai: change SD1 power up period
Jinyoung Park [Wed, 28 Mar 2012 02:21:46 +0000]
arm: tegra: kai: change SD1 power up period

To reduce delay between CORE_PWR_REQ and VDD_CORE, changed SD1 power up
period from 1 to 0.

Bug 930883

Change-Id: I50ea110d0cb72402b5d03c3e260e6ab340d87fbe
Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/92704
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

8 years agovideo: tegra: host: remove nvhost_channel from nvhost_master
Mayuresh Kulkarni [Mon, 14 May 2012 09:08:22 +0000]
video: tegra: host: remove nvhost_channel from nvhost_master

- nvhost_master holds a reference to all the channels for
a chip architecture
- however, nvhost_master is a private data of host1x hardware
device. so it should contain only members needed by host1x
hardware device
- add chip specific apis to allocate and free channels
- this will also help to remove the static binding between
nvhost_device and a channel per SoC in future

Bug 871237

Change-Id: I2148db57b995b4cb60954ebb6e670f588552eca4
Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-on: http://git-master/r/91687
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

8 years agoARM: tegra: Modify tegra_apb functions
Prashant Malani [Wed, 16 May 2012 01:11:39 +0000]
ARM: tegra: Modify tegra_apb functions

Make tegra_apb_readl() , tegra_apb_writel()
T20 only

Bug 950116

Change-Id: I75601bebaee14ed2e217a16c0e46fb2910c421c8
Signed-off-by: Prashant Malani <pmalani@nvidia.com>
Reviewed-on: http://git-master/r/102712
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

8 years agocpufreq: Don't clip PM QoS requests to old policy limits
Alex Frid [Tue, 15 May 2012 04:06:11 +0000]
cpufreq: Don't clip PM QoS requests to old policy limits

Clipping PM QoS requests to combined old policy limits that include
both PM QoS and user policy requests creates a circular dependency.
As a result new PM QoS maximum limit is rejected if it is above
previous PM QoS minimum limit even though the new PM QoS minimum
limit has been already lowered below new PM QoS maximum limit.

Instead clip PM QoS request to the old user policy limits only.

Change-Id: Ice0a53a699e0798f07f0e32d6b8a28586fe5db0c
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/102386
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Donghan Ryu <dryu@nvidia.com>
Reviewed-by: Antti Miettinen <amiettinen@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Tested-by: Vikas Ramesh Kedigehalli <vikasr@nvidia.com>

8 years agoARM: tegra: power: Don't enable auto-hotplug as PM QoS side-effect
Alex Frid [Tue, 27 Mar 2012 19:19:52 +0000]
ARM: tegra: power: Don't enable auto-hotplug as PM QoS side-effect

On Tegra3, if PM QoS hotplug request is received when auto-hotplug
is disabled, do not enable auto-hotplug as side effect of the
request.

Change-Id: I8928d9ecd22e2d2df5fe60274fed30da0c565b47
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/102118
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Donghan Ryu <dryu@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

8 years agovideo: tegra: dc: add list of preferred formats
Jon Mayo [Tue, 15 May 2012 18:23:13 +0000]
video: tegra: dc: add list of preferred formats

Move WinB's format limitations to a list of preferred formats.

Bug 985197

Change-Id: Ife37c79441b2737592ace51e94ab0c80af4af917
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/102629
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Chao Xu <cxu@nvidia.com>
Reviewed-by: Robert Morell <rmorell@nvidia.com>
Reviewed-by: Michael Frydrych <mfrydrych@nvidia.com>
Reviewed-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com>

8 years agoarm: tegra: xmm: baseband modem pm code cleanup
Vinayak Pane [Thu, 3 May 2012 01:22:12 +0000]
arm: tegra: xmm: baseband modem pm code cleanup

- Platform data is treated as const and not modified in driver.
- Driver specific data is stored and used from a new structure.
- Remove support for older firmware version of XMM modem (<1130).
- Shortening of names for compliance and to fit in 80 characters.
- Organize irq function to reduce indentation.

Change-Id: I269401aa0a2efc685d7a630b4952cb31cbca6a4f
Signed-off-by: Vinayak Pane <vpane@nvidia.com>
Reviewed-on: http://git-master/r/101587
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Steve Lin <stlin@nvidia.com>

8 years agoArm: p1852: dvfs: Added ASIC SKUs as per updated POR
Mohit Kataria [Fri, 11 May 2012 05:30:18 +0000]
Arm: p1852: dvfs: Added ASIC SKUs as per updated POR

Automotive platforms are broken down further into 5 Asic skus from
3 ASIC SKUs, updated kernel to reflect these changes.

Bug 983555

Change-Id: I75925c5853d4ec2a5c72e430f4c2380e58aae774
Signed-off-by: Mohit Kataria <mkataria@nvidia.com>
Reviewed-on: http://git-master/r/101903
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

8 years agomedia: video: tegra: add GPL v2 MODULE_LICENSE
Eric Brower [Thu, 3 May 2012 00:07:53 +0000]
media: video: tegra: add GPL v2 MODULE_LICENSE

Add MODULE_LICENSE to modules that do not advertise a license,
and therefore taint the kernel.

Bug 979176

Change-Id: I1abbfa9ca1535b39e70d8bf7aa975e2663a6e45d
Signed-off-by: Eric Brower <ebrower@nvidia.com>
Reviewed-on: http://git-master/r/100214
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

8 years agovideo: tegra: dc: fix build warnings
Jon Mayo [Tue, 15 May 2012 18:50:48 +0000]
video: tegra: dc: fix build warnings

Makes function pointer type for mode_filter match the function in hdmi.c

Change-Id: Id61f319a4ddef003b79782391e9e7f2f8cb32dda
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/102630
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Shashank Sharma <shashanks@nvidia.com>

8 years agovideo: tegra: dc: make functions static in rgb.c
Jon Mayo [Thu, 10 May 2012 22:38:48 +0000]
video: tegra: dc: make functions static in rgb.c

Use static for functions that are not called externally.

Change-Id: Iacccb83e31e860d10f92897041421298231e45b1
Reviewed-on: http://git-master/r/102623
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Tested-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User

8 years agoARM: tegra3: defconfig: enable TPS6238X0
Pradeep Kumar [Tue, 15 May 2012 12:46:34 +0000]
ARM: tegra3: defconfig: enable TPS6238X0

Enable TPS6238X0 voltage regulator chip.

Bug 981330

Change-Id: I0d4207543cd2d2c1b2977536ea7299b5b65fc600
Signed-off-by: Pradeep Kumar <pgoudagunta@nvidia.com>
Reviewed-on: http://git-master/r/102588
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

8 years agoarm: tegra: pm269: update sh532u config
Charlie Huang [Mon, 14 May 2012 21:51:30 +0000]
arm: tegra: pm269: update sh532u config

bug 980184

Change-Id: I376a62ada8f7e825693a4cdd87942edaa92b8fc4
Signed-off-by: Charlie Huang <chahuang@nvidia.com>
Reviewed-on: http://git-master/r/102309
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

8 years agotty: serial: tegra: Fix section mismatch warnings
Pradeep Kumar [Mon, 14 May 2012 12:26:00 +0000]
tty: serial: tegra: Fix section mismatch warnings

Fix section mismatch warnings derived from
tegra_uart_platform_driver.

Bug 984436

Change-Id: Iec737f28b0a7ce3ae521ad788e6ca5a101675c52
Signed-off-by: Pradeep Kumar <pgoudagunta@nvidia.com>
Reviewed-on: http://git-master/r/102237
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

8 years agovideo: tegra: dc: remove obsolete IRQF_DISABLED
Pritesh Raithatha [Wed, 9 May 2012 14:05:01 +0000]
video: tegra: dc: remove obsolete IRQF_DISABLED

Bug 955184

Change-Id: I7ac0a290c2b6acd454de05d094bd676b88f4b476
Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>
Reviewed-on: http://git-master/r/101546
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

8 years agovideo: tegra: dc: correct dc initialisation sequence
Pritesh Raithatha [Wed, 9 May 2012 14:06:46 +0000]
video: tegra: dc: correct dc initialisation sequence

-Move _tegra_dc_enable to before irq_request and remove
 disable_dc_irq.
-It will remove warning of "IRQ when DC not powered!".

Bug 955184

Change-Id: If9b039f3f1635d92f10bfc54af08101972fc3d57
Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>
Reviewed-on: http://git-master/r/101498
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

8 years agoasoc:codecs: tiaic326x: remove mini dsp support
Nikesh Oswal [Tue, 8 May 2012 11:12:49 +0000]
asoc:codecs: tiaic326x: remove mini dsp support

disable the compilation of minidsp specific code,
we are disabling the minidsp in codec because the driver is
not stable and different customers are using different process flows
for mini dsp

Change-Id: I08f8f485f1a379773f2f1f7ae2fd1b3a89c45d07
Signed-off-by: Nikesh Oswal <noswal@nvidia.com>
Reviewed-on: http://git-master/r/101232
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

8 years agoregulator: TPS6238X0: Add tps6238X0 regulator driver
Laxman Dewangan [Fri, 4 May 2012 19:56:56 +0000]
regulator: TPS6238X0: Add tps6238X0 regulator driver

The regulator module consists of 1 DCDC. The output voltage
is configurable and is meant for supply power to the core
voltage of Soc.

Change-Id: Ic62d100a588f7b6f1b30c11fd44a925c97393069
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/100653
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Pradeep Goudagunta <pgoudagunta@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>

8 years agovideo: tegra: dsi: WAR to stop on going host write
Animesh Kishore [Mon, 14 May 2012 07:57:27 +0000]
video: tegra: dsi: WAR to stop on going host write

WAR comprises of soft reset dsi controller followed by
explicitly clearing host trigger.

Bug 982919

Change-Id: Ia8c497dd496435e429cd5b5ee8aaf1b7d78dc797
Signed-off-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-on: http://git-master/r/102204
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

8 years agomisc: bt rfkill: toggle power GPIO based on current power state
Nagarjuna Kristam [Mon, 14 May 2012 06:50:05 +0000]
misc: bt rfkill: toggle power GPIO based on current power state

check if requested state and current BT power state is same,
if yes, do not toggle BT power GPIO's.
if not, set requested power state.

Bug 982600
Bug 928604

Change-Id: I82c65fd6d43940c86cc3de440295ba179a4ade33
Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-on: http://git-master/r/102190
Reviewed-by: Rakesh Kumar <krakesh@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

8 years agoARM: config: tegra: Enable SECTION_MISMATCH warning
Laxman Dewangan [Mon, 14 May 2012 06:00:36 +0000]
ARM: config: tegra: Enable SECTION_MISMATCH warning

Some of our driver generate the section mismatch warning but
details of the error is not displayed.
Enable config variable to display all such warning during
compilation.

Change-Id: Ie0a6dc10cc20304b74a7712717adb44a86474247
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/102183
Reviewed-by: Automatic_Commit_Validation_User

8 years agortc: tps6591x: Enable alarm interrupt for RTC_WKALM_SET ioctl
Preetham Chandru [Tue, 8 May 2012 14:26:27 +0000]
rtc: tps6591x: Enable alarm interrupt for RTC_WKALM_SET ioctl

RTC_WKALM_SET ioctl should do two things:
1. Set alarm value
2. Enable alarm irq
In the current implementation for RTC_WKALM_SET ioctl we are only setting
the alarm value but not enabling the alarm irq and hence the system
is not waking from lp0 state once the set alarm value expiries.
For RTC_WKALM_SET ioctl, alarm->enabled will be set to one from userspace.
So based on this condition we can differentiate between RTC_WKALM_SET &
RTC_ALM_SET and accordingly enable alarm irq.

Bug 978205
Signed-off-by: Preetham Chandru R <pchandru@nvidia.com>
Change-Id: Ia35192e691ca116b13093f52873020f67c5c2f8d
Reviewed-on: http://git-master/r/101447
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>

8 years agommc: enable background ops in driver
Vishal Singh [Fri, 27 Apr 2012 12:40:33 +0000]
mmc: enable background ops in driver

Adding a new config option and enabling background ops in driver.
Correcting the EXT_CSD byte that needs to be written in order to
trigger background ops in the MMC firmware.

Bug 847037.

Change-Id: Ibc517540cab43fa5070b142a416f6b67f2f7e7be
Signed-off-by: Vishal Singh <vissingh@nvidia.com>
Reviewed-on: http://git-master/r/99117
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

8 years agousb: ehci: tegra: Split resume & suspend call appropriately
Preetham Chandru [Thu, 26 Apr 2012 10:24:14 +0000]
usb: ehci: tegra: Split resume & suspend call appropriately

tegra_ehci_suspend_noirq/tegra_ehci_resume_noirq breaks
the modem suspend call as it does a regulator_disable()/regulator_enable
call which in turn requires the irqs to be enabled.

Hence maintain a normal suspend call i.e with irqs enabled but
split the resume to normal resume and noirq resume.
Spliting the resume in this way takes care of the below erros in
lp0/lp1
"tegra-ehci tegra-ehci.2:fatal error"
"tegra-ehci tegra-ehci.2: HC died; cleaning up"

Originally resume_noirq & suspend_noirq were added to avoid the above
errors but since it breaks the modem suspend call splitting the suspend
and resume in this way

Bug 954564
Signed-off-by: Preetham Chandru R <pchandru@nvidia.com>
Change-Id: I630b3dbe2ca66d194857dc71ababa3e5955785b1
Reviewed-on: http://git-master/r/99100
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>

8 years agoasoc: tegra: MAX98088 machine: Add support for setting bias level
Ankit Gupta [Mon, 14 May 2012 13:13:23 +0000]
asoc: tegra: MAX98088 machine: Add support for setting bias level

Allow setting bias level to turn off clock extern1 when codec
is idle for enterprise board. (Maxim 98088 codec)

Bug 984678

Change-Id: Ib01be71362ab0c5525f570693b41db73777875e6
Signed-off-by: Ankit Gupta <ankitgupta@nvidia.com>
Reviewed-on: http://git-master/r/102240
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Manoj Gangwal <mgangwal@nvidia.com>
Reviewed-by: Scott Peterson <speterson@nvidia.com>

8 years agoasoc:tegra: Enable I2S tx in voice call
Nikesh Oswal [Fri, 11 May 2012 14:23:27 +0000]
asoc:tegra: Enable I2S tx in voice call

Associated with I2S there is a playback ref count, when
we open the I2S for plyabck it is incremented and during
voice call we check if its not zero then enable the tX.
This logic fails if the start-trigger is not called for the prior
playback stream. Hence we unconditionally enable the tx,
which is harmless

Bug: 981806

Change-Id: I66aafda596e2b2b03745e93f3e851dedc3b8ef5d
Signed-off-by: Nikesh Oswal <noswal@nvidia.com>
Reviewed-on: http://git-master/r/101996
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Scott Peterson <speterson@nvidia.com>

8 years agoARM: tegra: cardhu: wakeup system from GPIO_PV0 without key detection
Laxman Dewangan [Thu, 10 May 2012 13:52:47 +0000]
ARM: tegra: cardhu: wakeup system from GPIO_PV0 without key detection

To meet the LP0 exit power on sequence, it is require to wake system
for tegra gpio in place of PMIC for E1291-A04.
Also it is observed that if GPIO key is used to wakeup then there is
possibility of loosing the key event and hence adding the gpio
GPIO_PV0 as the key with code of RESERVED so that it can only
wakeup system but will not able to send the key event through
gpio keys.

bug 981320

Change-Id: I8610adca4b5ed8ae79f8fcca9a1d4b5548158c60
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/101784
Tested-by: Sang-Hun Lee <sanlee@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User

8 years agoARM: tegra: pm: suspend trace event
Sivaram Nair [Wed, 9 May 2012 16:51:38 +0000]
ARM: tegra: pm: suspend trace event

A new trace event is added for tracing cpu suspend start and end

Change-Id: I2506e3aed0692c44fb4325e9d381cea53228b0c3
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-on: http://git-master/r/101748
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

8 years agoasoc: codecs: spdif: Add support for setting bias level
Ankit Gupta [Thu, 3 May 2012 09:45:31 +0000]
asoc: codecs: spdif: Add support for setting bias level

Allow setting bias level to turn off clock extern1 on enterprise
when codec is idle. Added a dummy widget to make the
target_bias_level to BIAS_OFF as per required by the new ALSA
kernel.

Bug 984678
Signed-off-by: Ankit Gupta <ankitgupta@nvidia.com>

Change-Id: I29de405c26286eee0a49e655f1d4236f6093ce8a
Reviewed-on: http://git-master/r/100287
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Manoj Gangwal <mgangwal@nvidia.com>
Reviewed-by: Scott Peterson <speterson@nvidia.com>
Tested-by: Ankit Gupta (Engrg-SW) <ankitgupta@nvidia.com>

8 years agoasoc: tegra: pcm: Add support for setting bias level
Ankit Gupta [Thu, 3 May 2012 09:36:27 +0000]
asoc: tegra: pcm: Add support for setting bias level

Allow setting bias level to turn off clock extern1 when codec
is idle for Enterprise (Maxim 98088 codec).

Bug 984678
Signed-off-by: Ankit Gupta <ankitgupta@nvidia.com>

Change-Id: I09538dafe6c6f01547ff989de3c23933c9745db0
Reviewed-on: http://git-master/r/100286
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Scott Peterson <speterson@nvidia.com>
Reviewed-by: Manoj Gangwal <mgangwal@nvidia.com>
Tested-by: Ankit Gupta (Engrg-SW) <ankitgupta@nvidia.com>

8 years agoarm: tegra: p1852: Add Tegra camera driver
Songhee Baek [Wed, 9 May 2012 21:20:22 +0000]
arm: tegra: p1852: Add Tegra camera driver

Add Tegra camera driver to support video
capture through H/W interfaces VIP, CSI.

Bug 978086

Change-Id: I0dc51e47928388ed2073a99f8ca80b5a5a77d166
Signed-off-by: Songhee Baek <sbaek@nvidia.com>
Reviewed-on: http://git-master/r/101590
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

8 years agoARM: tegra: clock: Export clock minimum
Antti P Miettinen [Wed, 9 May 2012 16:57:01 +0000]
ARM: tegra: clock: Export clock minimum

Add clock minimum to debugfs.

Bug 917644

Change-Id: Ie088809829af2bdc81a969a034bf00847459f0ce
Signed-off-by: Antti P Miettinen <amiettinen@nvidia.com>
Reviewed-on: http://git-master/r/101555
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

8 years agoarm: tegra: sdhci: Limit eMMC,SDIO,SD DDR clock
Pavan Kunapuli [Wed, 9 May 2012 13:29:19 +0000]
arm: tegra: sdhci: Limit eMMC,SDIO,SD DDR clock

Limit eMMC, SD and SDIO DDR mode clock to 41MHz.

Bug 967719

Change-Id: Iaccc5b771b81b15226f87684b547ad1fb7dd38d3
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-on: http://git-master/r/101173
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

8 years agoarm: tegra: clock: Add tegra3 sdmmc4 EMC shared user
Pavan Kunapuli [Fri, 4 May 2012 15:27:38 +0000]
arm: tegra: clock: Add tegra3 sdmmc4 EMC shared user

Adding tegra3 sdmmc4 EMC shared user in the tegra3
clock table.

Bug 967719

Change-Id: I934dcaebf664f8b1db9ea07eef07eb6f266822aa
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-on: http://git-master/r/100582
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

8 years agommc: tegra: Set eMMC DDR clock based on emc clock
Pavan Kunapuli [Mon, 7 May 2012 12:13:25 +0000]
mmc: tegra: Set eMMC DDR clock based on emc clock

Set the eMMC ddr mode clock dynamically based on emc
clock rate. If ddr clock limit is specified and the emc
clock is less than max emc freq, then limit emmc ddr
clk. If not, set the max eMMC ddr clock.

Bug 967719

Change-Id: I9f70077c4ac4bb1f3e6d894fcb8420b1aba284dd
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-on: http://git-master/r/100579
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

8 years agoarm: tegra: sdhci: Define ddr50 clock limit
Pavan Kunapuli [Fri, 4 May 2012 13:32:04 +0000]
arm: tegra: sdhci: Define ddr50 clock limit

Added a new variable in sdhci platform data
which will limit the ddr50 mode clock.

Bug 967719

Change-Id: I3f55b55651362447845c2e1d5000939e3e028df6
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-on: http://git-master/r/100569
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>