7 years agovideo: tegra: refactor for multiple chip support
Ken Adams [Sat, 18 Jun 2011 14:14:42 +0000]
video: tegra: refactor for multiple chip support

Original-Change-Id: Ia203886a3b013612b4159393ff43a25a313d1ece
Reviewed-on: http://git-master/r/35911
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: R01b763362c13e09111f60700c3d3a7d2a9a3fc1c

7 years agoarm: tegra: enterprise/ventana: debug console through device
Laxman Dewangan [Sun, 26 Jun 2011 16:22:15 +0000]
arm: tegra: enterprise/ventana: debug console through device

Using the debug port device structure to enabling/configuring the
uart debug console port.

Removing the duplicate local definition of the uart console.

Original-Change-Id: Icbf954e0d02dcc4891169b3c701c72f35f8f29e3
Reviewed-on: http://git-master/r/35711
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: R74bd3a179a7ef7327397805f21389f08ac3bceb1

7 years agovideo: tegra: Aligned the stride of fb to 16-byte boundary.
Kevin Huang [Mon, 6 Jun 2011 21:16:54 +0000]
video: tegra: Aligned the stride of fb to 16-byte boundary.

Aligned memory can improve the performance memory access. Also,
since the bootloader fb is aligned, kernel needs to do it to avoid
skew.

Original-Change-Id: Ia5a122539856da9e9c73580929b8ea9c73e86c9d
Reviewed-on: http://git-master/r/35276
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: Rdc32cc0c095903cb731b47e96b5723b13066b63b

7 years agoARM: tegra: cardhu/enterprise: Binwidth Specific smartdimmer Settings
Matt Wagner [Wed, 22 Jun 2011 18:12:14 +0000]
ARM: tegra: cardhu/enterprise: Binwidth Specific smartdimmer Settings

Added support for Binwidth specific LUT and BLTF

Bug 721258

Original-Change-Id: I1a4eb6a4d32f736101156a7f388ed0699b66c189
Reviewed-on: http://git-master/r/36418
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: R777b4195fda082f61678dabef8ccc1211dad9f31

7 years agovideo: tegra: Changes for smartdimmer
Matt Wagner [Tue, 14 Jun 2011 01:56:54 +0000]
video: tegra: Changes for smartdimmer

Added support for binwidth specific settings
for BLTF and LUT.  sysfs support is included.

Bug 721258

Original-Change-Id: I2b76503a51fcbc9ca5cb4ca69fcf722f93878e6d
Reviewed-on: http://git-master/r/36416
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: Rae8570f5dc97a3798966cf48c402212d1fa8359f

7 years agovideo: tegra: nvmap: fix GART pin lockups
Kirill Artamonov [Wed, 15 Jun 2011 00:40:32 +0000]
video: tegra: nvmap: fix GART pin lockups

Fix GART lockups caused by fragmentation by evicting
mapped areas from iovm space after unsuccessful array
pinning attempt.

Fix double unpin error happening during interrupted
submit.

Fix possible sleep in atomic context in iovmm code
(semaphore inside spinlock) by replacing spinlock
with mutex.

Fix race between handle_unpin and pin_handle.

bug 838579
bug 838073
bug 818058

Original-Change-Id: I420447ffb4e02fb78a7987e22a537eefc16ff524
Reviewed-on: http://git-master/r/36129
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: R893c97003f2ec2f69e224f35d99d3488f673d620

7 years agoARM: tegra: cardhu: Update vid_oc pin for pm269
Ray Poudrier [Wed, 6 Jul 2011 16:22:28 +0000]
ARM: tegra: cardhu: Update vid_oc pin for pm269

Correct pingroup is DAP3_DOUT

Bug 825778

Original-Change-Id: I252398c4f1d653c73c5fd26a7b5c12410a962ade
Reviewed-on: http://git-master/r/39822
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: Rb3bb758d23520c165fa6369bcb16979ec1824b5b

7 years agoarm: tegra: cardhu: add support for TPS61050 flash driver
Danielle Sun [Thu, 26 May 2011 23:52:24 +0000]
arm: tegra: cardhu: add support for TPS61050 flash driver

Bug 794431

Original-Change-Id: I889c224b184d099339ccdb438326a2037f85cdf6
Reviewed-on: http://git-master/r/34214
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: R4427050d243067273f1035b4d7f18db3c8c0ee51

7 years agoarm: tegra: enterprise: VIO and SMPS3 to be always on
Laxman Dewangan [Thu, 30 Jun 2011 05:18:20 +0000]
arm: tegra: enterprise: VIO and SMPS3 to be always on

Making VIO and SMP3 to be always on as these are parent to some
other rails.

This is software workaround avoid recursive locking when doing the
regulator disable/enable in notifier_call_chain of regulator
core driver.

bug 845849

Original-Change-Id: I9e1de53e86a0c8aeafd88b6e10d2245283fb7660
Reviewed-on: http://git-master/r/39130
Reviewed-by: Karan Jhavar <kjhavar@nvidia.com>
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>

Rebase-Id: Rd29727335ccac915bb54a9f20b35a995f3775fba

7 years agoserial: 8250: tegra: disabling MSR interrupts
Pradeep Goudagunta [Wed, 6 Jul 2011 10:48:46 +0000]
serial: 8250: tegra: disabling MSR interrupts

-Disabling modem status interrupts for tegra based UART.
-Removed duplicate declaration of PORT_TEGRA.

Bug 840111

Original-Change-Id: I926c200ce66e926186e5295bc1ead8c6ecf70891
Reviewed-on: http://git-master/r/39788
Tested-by: Pradeep Goudagunta <pgoudagunta@nvidia.com>
Reviewed-by: Jack Zhou <jazhou@nvidia.com>
Tested-by: Jack Zhou <jazhou@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Krishna Monian <kmonian@nvidia.com>

Rebase-Id: Ra34db21ae6dfbffea27b466cb90cfa4eb4717ac2

7 years agoserial: tegra: support auto control of RTS
Pradeep Goudagunta [Fri, 1 Jul 2011 09:06:50 +0000]
serial: tegra: support auto control of RTS

Added support for auto control of RTS.

Bug 825938

Original-Change-Id: Ic5ffde2252ab0f0ffb9001994863f3d4ed5d1173
Reviewed-on: http://git-master/r/39356
Tested-by: Pradeep Goudagunta <pgoudagunta@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

Rebase-Id: Rb21ef7c26a2f8644ab81171b41ba4275e38023b0

7 years agomedia: video: tegra: avp: Retry to connect to the AVP.
Jubeom Kim [Tue, 14 Jun 2011 06:32:15 +0000]
media: video: tegra: avp: Retry to connect to the AVP.

Sometimes avp_node_try_connect is failed.
It is the timing problem between CPU and AVP.

1) Added the retry routine for avp-connection.
2) Increased the time-out value of msg_wait_ack_locked function
   from 200ms to 400ms.

Bug 822104, 797362

Reviewed-on: http://git-master/r/36439
(cherry picked from commit bdc441e9bebeb893b7e9ec383fd77869dbcefc09)

Original-Change-Id: Ie5b31a50fb61691055ad41f0ac3ce627c08e0ebd
Reviewed-on: http://git-master/r/38450
Tested-by: Jubeom Kim <jubeomk@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

Rebase-Id: R54b77903470a07927d37a220c5865b0ba6ff000d

7 years agomedia: video: tegra: TPS61050 flash driver
Danielle Sun [Thu, 26 May 2011 23:17:44 +0000]
media: video: tegra: TPS61050 flash driver

Kernel driver for TPS61050 flash/torch camera device.

Bug 794431

Original-Change-Id: I760bd086c283076dc7136bd8ccd6b75e6e823ea8
Reviewed-on: http://git-master/r/34208
Tested-by: Erik M Lilliebjerg <elilliebjerg@nvidia.com>
Reviewed-by: Michael Stewart <mstewart@nvidia.com>
Reviewed-by: John Sasinowski <jsasinowski@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

Rebase-Id: Radb862760f165e40b764b3bb104787427d024c7e

7 years agoARM: tegra: sysfs write permission for user only
Manoj Gangwal [Fri, 1 Jul 2011 10:09:43 +0000]
ARM: tegra: sysfs write permission for user only

Giving read-write permission for user only for sysfs attributes.
Group and other will have only read permission.
-clock: syncevents

Bug 828100

Original-Change-Id: I14affc209e954a58de055e291093e31dc1dbfe16
Reviewed-on: http://git-master/r/39364
Reviewed-by: Niket Sirsi <nsirsi@nvidia.com>
Tested-by: Niket Sirsi <nsirsi@nvidia.com>

Rebase-Id: R97f4eadb711717e788be7c4e4e8993d048cf1428

7 years agomfd: tps80031: Support second level of charge_control interrupt
Laxman Dewangan [Tue, 28 Jun 2011 15:04:02 +0000]
mfd: tps80031: Support second level of charge_control interrupt

There is multiple independent case for charge control interrupt and
so exposing each of the case as separate interrupt number.

bug 842072

Original-Change-Id: I500d7e921e07b43de4eefdde2590f045022d8169
Reviewed-on: http://git-master/r/38732
Reviewed-by: Niket Sirsi <nsirsi@nvidia.com>
Tested-by: Niket Sirsi <nsirsi@nvidia.com>

Rebase-Id: R2a6a949e0c38731dd28af9c8bc67289f53c0066f

7 years agoARM: tegra: dvfs: Update Tegra3 CPU and core voltage dependencies
Alex Frid [Fri, 24 Jun 2011 00:30:23 +0000]
ARM: tegra: dvfs: Update Tegra3 CPU and core voltage dependencies

Updated implementation of CPU and core voltage dependencies so that
range limits can be changed for different versions of Tegra3 (rather
than use fixed limits across entire Tegra3 architecture). Decoupled
safe VDD step definition from range limit, and changed the step from
300mV to 100mV.

Bug 841286

Original-Change-Id: I63e0bc9751048741a47a40410b54863984f91aca
Reviewed-on: http://git-master/r/38179
Reviewed-by: Niket Sirsi <nsirsi@nvidia.com>
Tested-by: Niket Sirsi <nsirsi@nvidia.com>

Rebase-Id: R665a6f859aa744e1b64a19d9ba5aa2f37581103e

7 years agoARM: tegra: power: Refactored kernel powergate code
Karan Jhavar [Tue, 17 May 2011 00:00:43 +0000]
ARM: tegra: power: Refactored kernel powergate code

This change provides a centralized location for powergating modules.
It would take care of switching on/off clocks while un-powergating/
powergating modules respectively.

Bug: 814267
Original-Change-Id: Ic80dc517f634c29085c8e089bdaa32c6fd742710
Reviewed-on: http://git-master/r/31776
Reviewed-by: Niket Sirsi <nsirsi@nvidia.com>
Tested-by: Niket Sirsi <nsirsi@nvidia.com>

Rebase-Id: Rc0aac0edd4e693c15d22d998c882fceeeb85765d

7 years agotegra: power: correct LP0 sequence
Jay Cheng [Tue, 16 Aug 2011 18:57:59 +0000]
tegra: power: correct LP0 sequence

Change-Id: I5f548f11059039cbd830be483ecfa0c6671002e7
Reviewed-on: http://git-master/r/47365
Tested-by: Cho-Che Cheng <jacheng@nvidia.com>
Reviewed-by: Daniel Willemsen <dwillemsen@nvidia.com>

Rebase-Id: Rd7ef967c8b40295a04a0447eb8bbc8e2d577a48e

7 years agotegra: power: add wakeup_key method
Jay Cheng [Tue, 16 Aug 2011 02:03:23 +0000]
tegra: power: add wakeup_key method

connect wakeup_key method to KEY_POWER (TEGRA_WAKE_GPIO_PV2)

Change-Id: I13b8f503399989bb06e97343711ed9e7348839ac
Reviewed-on: http://git-master/r/47364
Tested-by: Cho-Che Cheng <jacheng@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Chih-Lung Huang <lhuang@nvidia.com>
Reviewed-by: Daniel Willemsen <dwillemsen@nvidia.com>

Rebase-Id: Rffb10919b9cfa49c975f37d12646a34aeee44375

7 years agoARM: tegra: power: setup TTB0 for cacheable memory
Jin Qian [Tue, 16 Aug 2011 02:32:23 +0000]
ARM: tegra: power: setup TTB0 for cacheable memory

Bug 862494

Change-Id: Ib7875ded150b3e9dc288a9ed90f6ded0a37014a3
Reviewed-on: http://git-master/r/47246
Tested-by: Jin Qian <jqian@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Daniel Willemsen <dwillemsen@nvidia.com>

Rebase-Id: R11be58a9cf3a46fadf985e209e26dc00a8d87c58

7 years agoARM: tegra2: power: fix LP2 statistics reporting
Jin Qian [Tue, 16 Aug 2011 01:07:40 +0000]
ARM: tegra2: power: fix LP2 statistics reporting

Bug 863108

Change-Id: I5cc4e3ba58daeaeb527871026c85bdca5f6362f2
Reviewed-on: http://git-master/r/47232
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-by: Peter Boonstoppel <pboonstoppel@nvidia.com>
Tested-by: Jin Qian <jqian@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Daniel Willemsen <dwillemsen@nvidia.com>

Rebase-Id: R843a5cf74874bad3999bc55caa0eb8cad04cc555

7 years agoARM: tegra: Fix build error when CONFIG_SMP is not selected
Scott Williams [Wed, 17 Aug 2011 18:47:58 +0000]
ARM: tegra: Fix build error when CONFIG_SMP is not selected

Change-Id: I2420730290c7ecb407e6f30c8a6159ceadfabbbe
Signed-off-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-on: http://git-master/r/47589
Reviewed-by: Daniel Willemsen <dwillemsen@nvidia.com>

Rebase-Id: Rb177b1e8ed9ce89c732319f49525588c5c0dd9d0

7 years agoARM: tegra: Delete obsolete tegra_audio_device declaration
Scott Williams [Wed, 17 Aug 2011 19:19:09 +0000]
ARM: tegra: Delete obsolete tegra_audio_device declaration

Change-Id: I119fdbbc2440f8a7e64e2f3b5cec2ae4b182ee36
Signed-off-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-on: http://git-master/r/47592
Reviewed-by: Daniel Willemsen <dwillemsen@nvidia.com>

Rebase-Id: R891ed7225b634dc01aaf3f13dbe79fc1eae1c27c

7 years agoARM: tegra: Delete references to obsolete tegra_audio_device
Scott Williams [Wed, 17 Aug 2011 19:18:17 +0000]
ARM: tegra: Delete references to obsolete tegra_audio_device

Change-Id: Id234e2d264d70c2244f4040d74f43b5478043904
Signed-off-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-on: http://git-master/r/47591
Reviewed-by: Daniel Willemsen <dwillemsen@nvidia.com>

Rebase-Id: Re8ab569df562b66ffa14e589775968238fc4c338

7 years agoARM: tegra: Fix build error when CONFIG_PM_SLEEP is not selected
Scott Williams [Wed, 17 Aug 2011 18:49:57 +0000]
ARM: tegra: Fix build error when CONFIG_PM_SLEEP is not selected

Change-Id: I65e18395eef3a36f6dd537d64d98ab970f166460
Signed-off-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-on: http://git-master/r/47590
Reviewed-by: Daniel Willemsen <dwillemsen@nvidia.com>

Rebase-Id: R2643d7665780442e71444999f21d96a508c7a062

7 years agoARM: tegra: workqueue: Unify spelling of 'freeze'+'able' to 'freezable'
Gaurav Sarode [Tue, 16 Aug 2011 09:42:41 +0000]
ARM: tegra: workqueue: Unify spelling of 'freeze'+'able' to 'freezable'

In K39 , 'freezeable' is changed to 'freezable'.
Reference Commit Id 58a69cb47ec6991bf006a3e5d202e8571b0327a4.

Change-Id: Ie3f95db453205c05da4cf4e655ba8b12a126255b
Reviewed-on: http://git-master/r/47487
Tested-by: Gaurav Sarode <gsarode@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Daniel Willemsen <dwillemsen@nvidia.com>

Rebase-Id: R530643b91e8c252eb606ce7e789cfe34101f6edd

7 years agoASoC: Tegra: Tegra3 requires SND_SOC_TEGRA30_AHUB
Sumit Bhattacharya [Fri, 12 Aug 2011 17:04:43 +0000]
ASoC: Tegra: Tegra3 requires SND_SOC_TEGRA30_AHUB

Bug 862023

Change-Id: Ie16d410c7021640898bfbc8fcf451d14e832af6f
Reviewed-on: http://git-master/r/47155
Tested-by: Sumit Bhattacharya <sumitb@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Scott Peterson <speterson@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>

Rebase-Id: Raa466f8f365399c0091a173752dfc9d1c83316f8

7 years agovideo: tegra: Use new Tegra platform types
Yudong Tan [Mon, 27 Jun 2011 21:05:58 +0000]
video: tegra: Use new Tegra platform types

This change is needed to support three platforms, silicon,
fpga and simulation.

Change-Id: I70c6edbab85712b037b1ddf15ce72cf1a2affeba
Reviewed-on: http://git-master/r/36354
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: Rdd2875e5494a504dc4d2df0393bc798765a9b865

7 years agoarm: tegra: Use new platform types
Yudong Tan [Fri, 1 Jul 2011 18:26:17 +0000]
arm: tegra: Use new platform types

This change is needed to support three different platforms, silicon,
 fpga and simulation.

Change-Id: I407853e1d86accbe3686deb4f34571fe6b10bcce
Reviewed-on: http://git-master/r/36351
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: Rc4b424f1a55ffb71245f3a8330559258124e2a19

7 years agoarm: tegra: Add platform types for Tegra
Yudong Tan [Mon, 13 Jun 2011 20:14:01 +0000]
arm: tegra: Add platform types for Tegra

Change-Id: Ib9ef42efcbc24d1424a1b43e7d4ad46b97255aaa
Reviewed-on: http://git-master/r/36350
Reviewed-by: Yudong Tan <ytan@nvidia.com>
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: R99f25c1b92fe4a9322d83e00c9560fc7ada2b641

7 years agousb: tegra: Use new Tegra platform types
Yudong Tan [Mon, 13 Jun 2011 20:14:53 +0000]
usb: tegra: Use new Tegra platform types

This change is needed to support three platforms, silicon,
fpga and simulation.

Change-Id: Ib34cc90ebd5a5c98c00c17d68d384e0b4f94fab8
Reviewed-on: http://git-master/r/36353
Reviewed-by: Mark Stadler <mastadler@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Tested-by: Yudong Tan <ytan@nvidia.com>

Rebase-Id: Rf4b3e027ded924286724f7b1a8643f810b503f69

7 years agortc: tegra: Use new Tegra platform types.
Yudong Tan [Mon, 13 Jun 2011 20:14:34 +0000]
rtc: tegra: Use new Tegra platform types.

This change is needed to support three platforms, silicon,
fpga and simulation.

Change-Id: I1e132fd744e1fe716c3098b117e38e3c77678b49
Reviewed-on: http://git-master/r/36352
Reviewed-by: Mark Stadler <mastadler@nvidia.com>
Tested-by: Yudong Tan <ytan@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>

Rebase-Id: Rb4c122fc6b87240fc5a14f1addb4d22e121a84a7

7 years agoARM: config: tegra3: Enable TPS80031, gpio reg
Dan Willemsen [Mon, 15 Aug 2011 22:03:17 +0000]
ARM: config: tegra3: Enable TPS80031, gpio reg

Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>

Rebase-Id: R0a2fb354b3b79058ef435577d44f11d595fe46c3

7 years agoinput: touch: atmel_mxt_ts: Prevent boot and resume hangs.
Robert Collins [Fri, 8 Jul 2011 22:29:30 +0000]
input: touch: atmel_mxt_ts: Prevent boot and resume hangs.

Prevents touchscreen hangs during initial TS boot, and TS resume.

BUG 847725
BUG 845156
BUG 846711

Original-Change-Id: Ia853574e4b2422eb9368fe37eaf7457bd4022df8
Reviewed-on: http://git-master/r/40261
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: Rc1de4685a4e85d761097142b39f2a672846b8c44

7 years agobacklight: tegra_pwm: Add backlight type
Dan Willemsen [Wed, 10 Aug 2011 04:50:03 +0000]
backlight: tegra_pwm: Add backlight type

Original-Change-Id: I43036163f62c33f29c915fd4fe37ea10f71dfb55
Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>

Rebase-Id: Re7c21b8cced25ed6e4038929a0f80892ec91b9a1

7 years agoregulator: tps80031: Fix build warning
Dan Willemsen [Wed, 10 Aug 2011 04:49:03 +0000]
regulator: tps80031: Fix build warning

Original-Change-Id: I0bcfd38569b9a9a1cc21d0e9d12a0d114d87be9c
Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>

Rebase-Id: Rf1f1609942bd3ca4fae07ab37304cb214ab87774

7 years agomfd: tps80031: Update to new IRQ API
Dan Willemsen [Wed, 10 Aug 2011 04:48:13 +0000]
mfd: tps80031: Update to new IRQ API

Original-Change-Id: Ic68fb22749dae71751c64326e0912d6267f1c886
Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>

Rebase-Id: Rd8742c88232a033d8648443bff0271727e713ff1

7 years agoarm: tegra: cardhu: correct rail_names in ina219_platform_data
Pritesh Raithatha [Mon, 4 Jul 2011 09:00:02 +0000]
arm: tegra: cardhu: correct rail_names in ina219_platform_data

Bug 844743

Original-Change-Id: I7538342b2a267540ee14ddd70e10d0d71618d46e
Reviewed-on: http://git-master/r/39527
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Pritesh Raithatha <praithatha@nvidia.com>
Tested-by: Pritesh Raithatha <praithatha@nvidia.com>
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>

Rebase-Id: Rc4967909a7a47860073144c11f69b73453e1e897

7 years agovideo: tegra: host: No S_IWGRP permission for sysfs attrbs
Manoj Gangwal [Fri, 1 Jul 2011 10:32:11 +0000]
video: tegra: host: No S_IWGRP permission for sysfs attrbs

Removing write permission for Group and others for sysfs:
"null_kickoff_pid" attribute as CTS test "android.permission
.cts.FileSystemPermissionTest#testAllFilesInSysAreNotWritable"
requires it as non-writable.

Bug 828100

Original-Change-Id: Ifa2ee439a63f0503bf10f10f3cf31cd7c91c2842
Reviewed-on: http://git-master/r/39367
Tested-by: Manoj Gangwal <mgangwal@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

Rebase-Id: Rd386df89e37ba55d9157bc71237175d0b6fa6f6b

7 years agoarm: tegra: pm269: Low power mode to unused vddio-gmi pins
Laxman Dewangan [Fri, 1 Jul 2011 15:05:49 +0000]
arm: tegra: pm269: Low power mode to unused vddio-gmi pins

Putting the unused vddio_gmi pins into the low power mode.

bug 833087

Original-Change-Id: I7595d011a61d5993fee167e89ed7eb204d5cb6b6
Reviewed-on: http://git-master/r/37877
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Matthew Longnecker <mlongnecker@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>

Rebase-Id: R3fa74a5ebc7720b95f91f8da7b665e634522f210

7 years agoarm: mfd/regulator: tps80031: Adding force_update for status register
Jin Park [Sat, 25 Jun 2011 08:00:03 +0000]
arm: mfd/regulator: tps80031: Adding force_update for status register

The state register is read and write register, if read, it returned
current state, not current written value in register.
So if it want to write the value into state register, it must unconditional
write the value, don't use update(read and compare and then write).

Bug 838189

Original-Change-Id: I2555875a822f159e664b0834af2d00073c859acd
Signed-off-by: Jin Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/38396
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

Rebase-Id: Ra90d4ccbe0373bbdad44422e8ff6798eea96019a

7 years agomedia: video: update copyright headers
Frank Chen [Thu, 30 Jun 2011 00:28:10 +0000]
media: video: update copyright headers

update headers for camera files

bug 846086

Original-Change-Id: Id53c77ead17b569ad05c0a5b8ec7f2a5d1aef869
Reviewed-on: http://git-master/r/39102
Reviewed-by: Erik M Lilliebjerg <elilliebjerg@nvidia.com>
Reviewed-by: Abhinav Sinha <absinha@nvidia.com>
Reviewed-by: Michael Stewart <mstewart@nvidia.com>
Tested-by: Frank Chen <frankc@nvidia.com>
Reviewed-by: Jonathan Mayo <jmayo@nvidia.com>

Rebase-Id: R4526cd043ef49dfa4a0c48f5942fca57e81eb4f0

7 years agoARM: tegra: clock: Change default sampling period to 12ms
Tom Cherry [Tue, 5 Jul 2011 22:08:53 +0000]
ARM: tegra: clock: Change default sampling period to 12ms

Bug 845349

Original-Change-Id: I0ce1a5da9a80cea6a4e55bc92490e6ae8508e22f
Reviewed-on: http://git-master/r/39704
Tested-by: Thomas Cherry <tcherry@nvidia.com>
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

Rebase-Id: Rfc2bfc89082778e43d15406b0b5e53bdf845f08e

7 years agoARM: tegra: power: Restore cpufreq governor target
Alex Frid [Sat, 25 Jun 2011 04:06:22 +0000]
ARM: tegra: power: Restore cpufreq governor target

Restored cpufreq governor target frequency on exit from suspend.
Otherwise, CPU would stay at frequency set underneath the governor
by tegra driver on suspend entry.

Original-Change-Id: Iad96c7771bf89b78cdeb3e8f4e2c40b36e845b57
Reviewed-on: http://git-master/r/38390
Reviewed-by: Alex Courbot <acourbot@nvidia.com>
Tested-by: Alex Courbot <acourbot@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Narendra Damahe <ndamahe@nvidia.com>
Reviewed-by: Jin Qian <jqian@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

Rebase-Id: R12135cc7f8f940eac1653432786826bf2affec16

7 years agoARM: tegra: cardhu: Add 408MHz node to EMC DFS table
Alex Frid [Thu, 30 Jun 2011 18:40:52 +0000]
ARM: tegra: cardhu: Add 408MHz node to EMC DFS table

Bug 836260

Original-Change-Id: I4fb8e8eb3610676f89cb29ee0d10487c01200f95
Reviewed-on: http://git-master/r/39244
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: R1edb58986433fd6cc95ddecf0ef38e8c41f81fed

7 years agoARM: tegra: clock: Add/convert Tegra3 shared bus users
Alex Frid [Sun, 26 Jun 2011 04:57:58 +0000]
ARM: tegra: clock: Add/convert Tegra3 shared bus users

- Convert display users of emc shared bus from shared floor
users to shared bandwidth users

- Add shared ceiling user to each supported shared bus
(cbus, sbus, emc)

Bug 837005

Original-Change-Id: I526d06a7ddd6072ec8ac750c4ffbfb7aa1890ec8
Reviewed-on: http://git-master/r/39140
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: Raaca80423e60ee4c37e16c993641c2a5062bfd69

7 years agoARM: tegra: clock: Expand Tegra3 shared bus modes
Alex Frid [Fri, 24 Jun 2011 23:22:26 +0000]
ARM: tegra: clock: Expand Tegra3 shared bus modes

Implemented 3 different modes of combining rate requests from shared
bus users :
- SHARED_FLOOR: cumulative floor request is determined by maximum rate
among all users in this mode and minimum bus rate
- SHARED_BW: cumulative bandwidth request is determined by adding rates
of all users in this mode together
- SHRED_CEILING: cumulative ceiling request is determined by minimum
rate among all users in this mode and maximum bus rate

Final shared bus rate is determined as minimum rate between cumulative
ceiling request and maximum of floor or bandwidth cumulative requests.

Up to now shared bus clocks supported only SHARED_FLOOR mode, and this
mode is kept as default mode for all users. Hence, no change in actual
shared bus operations.

Bug 837005

Original-Change-Id: I29f8215ba7bab4998fdd23b74c4f96611f5848fe
Reviewed-on: http://git-master/r/39139
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: Re9f9f87d58419a6756b7985c59743356c6a634bc

7 years agoarm: tegra: usb_phy: pad power off
Suresh Mangipudi [Tue, 28 Jun 2011 10:55:17 +0000]
arm: tegra: usb_phy: pad power off

Turn off the pad power when hotplug support is not supported.

Bug 829628

Original-Change-Id: Iea61ca9ac387f475e177a1c69a97f323ca37659e
Reviewed-on: http://git-master/r/38696
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: Rf30be66234d431139f62480dda128ce6bda88bd9

7 years agoARM: tegra: dvfs: Set Tegra3 EMC max rate at 1.0V to 408MHz
Alex Frid [Thu, 30 Jun 2011 19:20:31 +0000]
ARM: tegra: dvfs: Set Tegra3 EMC max rate at 1.0V to 408MHz

Bug 836260

Original-Change-Id: I381619f6084a558f4c16142f8f0dfa3565ca2e94
Reviewed-on: http://git-master/r/39247
Tested-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Narendra Damahe <ndamahe@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Mandar Potdar <mpotdar@nvidia.com>

Rebase-Id: R0d2d4bd478f526d116a741916de5c2fc2df7a998

7 years agoARM: tegra: enterprise: proper emc table
Sachin Nikam [Thu, 23 Jun 2011 09:28:26 +0000]
ARM: tegra: enterprise: proper emc table

Updated SDRAM emc clock table for below freqs.
25.5 MHz, 51 MHz, 102 MHz, 400 MHz.

Bug 832436

Original-Change-Id: I36e51172e98b20f8f099def3b72b503a68013a63
Signed-off-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-on: http://git-master/r/38056
Tested-by: Thomas Cherry <tcherry@nvidia.com>
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

Rebase-Id: R86b8a379ea13d6d555aff62aafe744248d62094e

7 years agoARM: tegra: power: Update Tegra3 EMC DFS table
Ray Poudrier [Wed, 22 Jun 2011 01:00:19 +0000]
ARM: tegra: power: Update Tegra3 EMC DFS table

Add EMC table for LP-DDR2 Samsung memory

Original-Change-Id: I931bbb0d2283ad94d130803cef7c08b6da5923a1
Reviewed-on: http://git-master/r/37757
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Raymond Poudrier <rapoudrier@nvidia.com>
Tested-by: Raymond Poudrier <rapoudrier@nvidia.com>
Tested-by: Gerrit_Virtual_Submit
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-by: Karan Jhavar <kjhavar@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

Rebase-Id: Racdadadfeb4438faab94ca2bea4d9665da381d18

7 years agomedia: video: tegra: avp: add kfree to error routine.
Jubeom Kim [Wed, 22 Jun 2011 13:03:05 +0000]
media: video: tegra: avp: add kfree to error routine.

Needs kfree function when error occurs.

Reviewed-on: http://git-master/r/37859
(cherry picked from commit 26c98cb216294230f5cc46055c48a0224989df80)

Original-Change-Id: Ic83407628eb6e4c2aad0ba014f5a97b561b3ecf6
Reviewed-on: http://git-master/r/38449
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: R56e7aec023b2482e51fa4d79e7945382e49304b6

7 years agoARM: tegra: mcstats: Enable overall bandwidth measurement.
Heechul Yun [Tue, 21 Jun 2011 18:31:33 +0000]
ARM: tegra: mcstats: Enable overall bandwidth measurement.

Allow users to measure overall bandwidth of the system.

Original-Change-Id: I5bb19609451a464c0a2335f05033cd9c87927a40
Reviewed-on: http://git-master/r/37687
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: R57b747cb81514336fdc45a3eeff17d6d00e154b1

7 years agoarm: tegra: Add sysfs entries for SMMU debugging
Hiro Sugawara [Thu, 16 Jun 2011 23:30:13 +0000]
arm: tegra: Add sysfs entries for SMMU debugging

CONFIG_TEGRA_SMMU_SYSFS enables /sys/devices/smmu/* entries to update
various SMMU register contents from user's land.
Default is "n" to allow only displaying the current values but not
updating except SMMU TLB/PTC statistics enabling and disabling bits.

Original-Change-Id: Icb4574c08d89006cb09da1d8d60c7ab40fefd1b1
Reviewed-on: http://git-master/r/37118
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: R647d1f9a59edbbc8a60b7393cb0572a927bd6d32

7 years agoARM: tegra: dvfs: Update Tegra3 cpufreq table selection
Alex Frid [Sat, 18 Jun 2011 07:35:46 +0000]
ARM: tegra: dvfs: Update Tegra3 cpufreq table selection

- For selection of cpufreq scaling table used top-most rate in G CPU
dvfs table, instead of G CPU max rate. Commonly the above rates are
the same, however, in case when PMU limitations on core voltage
indirectly (VDD_CPU on VDD_CORE dependency) lower cpu max rate, the
top-most dvfs rate should be used for table selection, and the max
rate clipped to table entry.

- Replaced BUGs in table selection implementation with errors. Thus,
when no table is found cpufreq is not installed, but the system boots
with respective error messages.

- Step up suspend frequency index in cpufreq tables to reduce suspend
entry latency (the selected rate is still low enough to work under
Vmin voltage setting).

Original-Change-Id: I45db19dbf5b48cef80db35663db2df3b68473993
Reviewed-on: http://git-master/r/37415
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: R59fb213db14d868bec0ca701e1c73dd9d1918e82

7 years agotegra_mediaserver: fix wrong kzalloc param, uninitialized values
Jubeom Kim [Wed, 22 Jun 2011 13:56:21 +0000]
tegra_mediaserver: fix wrong kzalloc param, uninitialized values

- Changed the kzalloc param from node to block.
- 'CHECK_CONDITION((physical_address < 0), ...' is not valid,
  because the physical_address value is unsigned value.
- Fixed uninitialized values

Reviewed-on: http://git-master/r/37862
(cherry picked from commit 06d905e9ed14d28224d5f59acf75b4de503f8796)

Original-Change-Id: Ifad28f75b159356acbc045e5e985a618aa8df81b
Reviewed-on: http://git-master/r/38448
Tested-by: Jubeom Kim <jubeomk@nvidia.com>
Reviewed-by: Stephen Holmes <sholmes@nvidia.com>

Rebase-Id: R645e915813a90b87563a59d667dcb5a046862e8e

7 years agocrypto: tegra-aes: replace dev_err and add NULL checking
Jubeom Kim [Wed, 22 Jun 2011 12:46:42 +0000]
crypto: tegra-aes: replace dev_err and add NULL checking

Changed dev_err to pr_err because 'dd' can be NULL.
Added NULL checking before clock disable of engine->pclk

Reviewed-on: http://git-master/r/37857
(cherry picked from commit 851ffd0a30cbe67a5033a9792825b319f0bcd7ed)

Original-Change-Id: If5a2bbd550f3dc038b42d8a185647d02df9cb593
Reviewed-on: http://git-master/r/38446
Tested-by: Jubeom Kim <jubeomk@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

Rebase-Id: R57fa4ce4a2e95d80813448ad5234fb9bdf74faf1

7 years agoARM: tegra: Fixed the wrong 'if' statement.
Jubeom Kim [Mon, 20 Jun 2011 11:39:30 +0000]
ARM: tegra: Fixed the wrong 'if' statement.

Removed the semicolon after 'if'.

(cherry picked from commit 9a118fd001bfbe23a7b825aa66cb19ebe7c12c7c)

Original-Change-Id: I058d58f6bad2ec08cf5a509361dbc3fc52801ce1
Reviewed-on: http://git-master/r/38228
Tested-by: Jubeom Kim <jubeomk@nvidia.com>
Reviewed-by: Jonathan Mayo <jmayo@nvidia.com>

Rebase-Id: R1221658aa101f439a88df3cdae8a2d8c9c659cfb

7 years agoarm: tegra3: pinmux: Adding SFIO3 mode for VI_MCLK
Harry Hong [Mon, 20 Jun 2011 04:46:37 +0000]
arm: tegra3: pinmux: Adding SFIO3 mode for VI_MCLK

SFIO3 on VI_MCLK pin is needed to output vi_sensor clk.

bug 839517

Original-Change-Id: Ied7408a8711b0256b8fe98eea67c873a7b168bcb
Reviewed-on: http://git-master/r/37426
Tested-by: Harry Hong <hhong@nvidia.com>
Reviewed-by: Daniel Willemsen <dwillemsen@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Matthew Longnecker <mlongnecker@nvidia.com>

Rebase-Id: Ra0c9550efc2ff7af8075eaf7962be94f2d299c2b

7 years agoarm: tegra: clock: clock fix for lp0
Luke Huang [Sat, 25 Jun 2011 03:13:09 +0000]
arm: tegra: clock: clock fix for lp0

Since clock is required when resetting devices, always enable pllc and plla at
the beginning of clock restore routine. The actual value will be restored back
after reset.

Original-Change-Id: Ic141ddb8cde5958d4e0f8b1154b8204a68c0ca50
Reviewed-on: http://git-master/r/38388
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: R254cf377d4cde1863f560867fafc10b4f37a87c9

7 years agoARM: tegra: clock: Add shared bus users rate printout
Alex Frid [Sun, 26 Jun 2011 02:15:28 +0000]
ARM: tegra: clock: Add shared bus users rate printout

Original-Change-Id: Icb1a5028d575155427f1fd7fa5b3ee2a145934f4
Reviewed-on: http://git-master/r/38421
Tested-by: Aleksandr Frid <afrid@nvidia.com>
Tested-by: Gerrit_Virtual_Submit
Reviewed-by: Wen Yi <wyi@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Narendra Damahe <ndamahe@nvidia.com>

Rebase-Id: Rf473061330e8b6d63948c9a0ed247e37e3534a52

7 years agoARM: tegra: power: trace C states and CPU mode switches
Peter De Schrijver [Wed, 18 May 2011 08:10:08 +0000]
ARM: tegra: power: trace C states and CPU mode switches

Original-Change-Id: I7915d356f18ac830c93b736463406b907d8c1cef
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Reviewed-on: http://git-master/r/31958
Reviewed-by: Niket Sirsi <nsirsi@nvidia.com>
Tested-by: Niket Sirsi <nsirsi@nvidia.com>

Rebase-Id: R341f7619d11f81fd7dfbab2ceb1c6fdaab6ead78

7 years agoARM: tegra: power: Overlap Tegra3 cpu off delay
Alex Frid [Sat, 14 May 2011 07:11:31 +0000]
ARM: tegra: power: Overlap Tegra3 cpu off delay

Overlap cpu off delay during G-to-LP mode switch with LP mode
residency.

Original-Change-Id: I8e93a5af3983e7daad46ae026fc510ce6c2fef99
Reviewed-on: http://git-master/r/31641
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Tested-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Tested-by: Diwakar Tundlam <dtundlam@nvidia.com>

Rebase-Id: R9260cc70b0fd5cf5266c7331a7b37d045f87fbfd

7 years agoARM: tegra: power: Use CPU LP mode for Tegra3 deep sleep
Alex Frid [Fri, 13 May 2011 05:51:34 +0000]
ARM: tegra: power: Use CPU LP mode for Tegra3 deep sleep

Original-Change-Id: If23b48fb414332f5dd25307a098569a5474283c6
Reviewed-on: http://git-master/r/31471
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: R6ba9ce7c7b355da4148ce0ebc9bc357bf5fc0b13

7 years agoARM: tegra: power: Idle Tegra3 auto-hoplug on suspend entry
Alex Frid [Fri, 13 May 2011 04:08:34 +0000]
ARM: tegra: power: Idle Tegra3 auto-hoplug on suspend entry

Original-Change-Id: I7f4fb6447c882a54d95ee3fb4c6149f4e0357d69
Reviewed-on: http://git-master/r/31457
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Tested-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Narendra Damahe <ndamahe@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Tested-by: Diwakar Tundlam <dtundlam@nvidia.com>
Tested-by: Gerrit_Virtual_Submit

Rebase-Id: Rbe2ac5f11065109d34a04793f93c873441e261be

7 years agoarm: tegra: usb_phy: update BIAS and XCVR registers
Rakesh Bodla [Tue, 28 Jun 2011 06:10:48 +0000]
arm: tegra: usb_phy: update BIAS and XCVR registers

Modifing the UTMIP_BIAS_CFG0 and UTMIP_XCVR_CFG0
register settings to pass HS eye-diagram and receiver
sensitivity tests.

Bug 842700

Original-Change-Id: I4660fc3bd4d620408b52ed274232762fe50abee2
Reviewed-on: http://git-master/r/38510
Tested-by: Rakesh Bodla <rbodla@nvidia.com>
Reviewed-by: Suresh Mangipudi <smangipudi@nvidia.com>
Reviewed-by: Hanumanth Venkateswa Moganty <vmoganty@nvidia.com>
Tested-by: Gerrit_Virtual_Submit

Rebase-Id: R3dec3d6e8699a6202482946ea49d0d98fe2cf48c

7 years agovideo: tegra: dc: fix DSI pclk calculation
Xin Xie [Tue, 28 Jun 2011 20:12:48 +0000]
video: tegra: dc: fix DSI pclk calculation

BUG 844499
Original-Change-Id: Ib99a921456f4a6e8e3e2d40907a91d492daf4bc0
Reviewed-on: http://git-master/r/38773
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: R6dccc88053c055d9e4828d6f4d4e18932f0502f2

7 years agoarm:tegra:tsensor: tsensor clock table update
Bitan Biswas [Fri, 10 Jun 2011 13:46:38 +0000]
arm:tegra:tsensor: tsensor clock table update

tegra3 clock table updated with tsensor information

Bug 661228

Original-Change-Id: I7ba9bd8f24f98e8108198e0ad0453d3a22648fe1
Reviewed-on: http://git-master/r/36120
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: R9270c8323a5af2db19ebc400bbf6afb919388ee8

7 years agoregulator: tps80031: Controls regulator output by PREQ
Laxman Dewangan [Thu, 30 Jun 2011 03:38:33 +0000]
regulator: tps80031: Controls regulator output by PREQ

Based on platform, it is require to control the regulator
output through the peripheral power request signal to pmu.
Supporting this type of platform configuration to control
output voltage by sw as well as through PREQ input line.

bug 839809
bug 829405

Original-Change-Id: Ifa19b9062ca2a2c5cae84de1f311a33cec094ad0
Reviewed-on: http://git-master/r/38936
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Tested-by: Bitan Biswas <bbiswas@nvidia.com>

Rebase-Id: R396800524fcea5c74711aec305c29229d32a0908

7 years agoarm: tegra: enterprise: SMPS1 controlled by PREQ2 input
Laxman Dewangan [Thu, 30 Jun 2011 03:45:24 +0000]
arm: tegra: enterprise: SMPS1 controlled by PREQ2 input

Configuring the regulator SMPS1 output such that output of
regulator SMPS1 is controlled by the input peripheral power
request signal PREQ2.

bug 839809
bug 829405

Original-Change-Id: I352feb47444077af4a3da2d0a321feb1f3d8a9a0
Reviewed-on: http://git-master/r/39118
Tested-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>

Rebase-Id: Re0019fef9cc5789b184c2f5704e8a93abc56b5e5

7 years agoarm: tegra: enterprise: Enabling vbus regulator
Kasoju Mallikarjun [Thu, 30 Jun 2011 06:26:00 +0000]
arm: tegra: enterprise: Enabling vbus regulator

Enable vbus regulator for USB1 on Enterprise

Bug 833736

Original-Change-Id: I2c1fdf829b55103b544c7319bac272f5a1912bc9
Reviewed-on: http://git-master/r/39154
Tested-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>

Rebase-Id: R8f67ea6b6a274529d7e0cdb5d56686fbce191081

7 years agomedia: tegra: avp: Clean avp_svc_thread shutdown
Kaz Fukuoka [Mon, 27 Jun 2011 23:57:31 +0000]
media: tegra: avp: Clean avp_svc_thread shutdown

- Avoid exiting from avp_svc_thread in error case.
- Add nicer messages.

bug 840262
bug 836806

Original-Change-Id: I28fe1de9451b10a810f61db94ad3a7770703fd09
Reviewed-on: http://git-master/r/38581
Reviewed-by: Niket Sirsi <nsirsi@nvidia.com>
Tested-by: Niket Sirsi <nsirsi@nvidia.com>

Rebase-Id: R74283b26e4d63ca7d7777844a4ee5703b0473fb1

7 years agoarm: tegra: enterprise: Add VBUS regulator information
Laxman Dewangan [Mon, 27 Jun 2011 10:26:01 +0000]
arm: tegra: enterprise: Add VBUS regulator information

Adding VBUS regulator information to activate the VBUS.

bug 833736

Original-Change-Id: I1cf4c2eb112a6ea26b74c3d1a2754019a47533fd
Reviewed-on: http://git-master/r/38500
Tested-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>
Reviewed-by: Hanumanth Venkateswa Moganty <vmoganty@nvidia.com>

Rebase-Id: R1bf2e329910d76bde5f0897f1f84147d1db1952a

7 years agoregulator: tps80031: Add VBUS as regulator
Laxman Dewangan [Mon, 27 Jun 2011 10:23:12 +0000]
regulator: tps80031: Add VBUS as regulator

Providing the control of VBUS through regulator api.

bug 833736

Original-Change-Id: Id79f64dfb0ab30a5f0663521defb60a76681c767
Reviewed-on: http://git-master/r/38499
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Hanumanth Venkateswa Moganty <vmoganty@nvidia.com>
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>

Rebase-Id: R218327eaf38a09215ca2fe4f6e7e90c8e961d21f

7 years agovideo: dsi: tegra: Improve suspend code
Animesh Kishore [Mon, 27 Jun 2011 06:56:59 +0000]
video: dsi: tegra: Improve suspend code

Add check to prevent control enter into suspend function
once dsi has already been disabled

Bug 841104

Original-Change-Id: I09b5547ea619bfa8fcfecf6ba570c65163d7eca1
Reviewed-on: http://git-master/r/38467
Reviewed-by: Animesh Kishore <ankishore@nvidia.com>
Tested-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>
Reviewed-by: Min-wuk Lee <mlee@nvidia.com>
Tested-by: Min-wuk Lee <mlee@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Narendra Damahe <ndamahe@nvidia.com>

Rebase-Id: R4db2f0f8e1d723d54658f4bfde3701aba25f47f1

7 years agotegra: usb: fix ehci suspend in host mode
Alexandre Courbot [Tue, 7 Jun 2011 06:24:49 +0000]
tegra: usb: fix ehci suspend in host mode

When suspend is called and usb1 is in host mode, tegra_hci_remove is
invoked to remove the device. However, at this time it is likely that
runtime PM will have powered off usb1. This patch ensures usb1 is
powered on if necessary within tegra_hci_remove so that ehci controller
registers can be manipulated.

Bug 835677.

Reviewed-on: http://git-master/r/35592
(cherry picked from commit 88d6c27b5fb6122cfe21aa360c417f675f5f2797)

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Original-Change-Id: Ifc98ba9cf42a6b09671bb722ff4bdf23798cf1f8
Reviewed-on: http://git-master/r/37985
Reviewed-by: Hanumanth Venkateswa Moganty <vmoganty@nvidia.com>

Rebase-Id: R36465ebfda53c2289623259b2202975a2d7522c8

7 years agoarm: tegra: pinmux: Handling unfitted RSVD pinmux option.
Jin Park [Fri, 17 Jun 2011 06:17:19 +0000]
arm: tegra: pinmux: Handling unfitted RSVD pinmux option.

When call tegra_pinmux_set_func with unfitted RSVD pinmux option,
to prevent unexpected potential problem, handle to finding more
preferred value.

Bug 839423

Signed-off-by: Jin Park <jinyoungp@nvidia.com>
Original-Change-Id: Idf8a1ece4317d14e94a69df0d1c8d450d7762c14
Reviewed-on: http://git-master/r/37185
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Mallikarjun Kasoju <mkasoju@nvidia.com>

Rebase-Id: Rfb625aa025048c88c44fd96da1e8b0a3db8d013d

7 years agoARM: tegra: clock: Add Tegra3 AVP activity monitor support
Alex Frid [Thu, 16 Jun 2011 02:03:22 +0000]
ARM: tegra: clock: Add Tegra3 AVP activity monitor support

Added AVP clock control using Tegra3 activity monitoring device.
The target AVP frequency floor is set based on average load and
short term boost. Average AVP load time (time when AVP is not
halted by flow controller) is determined by fixed frequency count
provided by monitoring h/w featuring 1st order IIR activity filter.
The boost frequency is calculated by s/w - exponentially increasing/
decreasing when sampled AVP activity has crossed upper/lower boost
watermarks.

The implementation is interrupt driven - periodic sampling is hidden
by h/w. The tune-able debugfs parameters are:

/sys/kernel/debug/tegra_actmon/avp/boost_step - boost rate increase
step (% of max AVP frequency)
/sys/kernel/debug/tegra_actmon/avp/boost_rate_inc - boost rate
increase factor (%)
/sys/kernel/debug/tegra_actmon/avp/boost_rate_dec - boost rate
decrease factor (%)

/sys/kernel/debug/tegra_actmon/avp/boost_threshold_up - upper
activity watermark for boost increase (AVP active time in %)
/sys/kernel/debug/tegra_actmon/avp/boost_threshold_dn - lower
activity watermark for boost decrease (AVP active time in %)

Original-Change-Id: Ia82247176531f2fb67acfc277e63b9f16916a488
Reviewed-on: http://git-master/r/37175
Reviewed-by: Niket Sirsi <nsirsi@nvidia.com>
Tested-by: Niket Sirsi <nsirsi@nvidia.com>

Rebase-Id: R995949fe30f188c16c3fa39e292a2ca56256f2a3

7 years agoARM: tegra: clock: Add Tegra3 EMC activity monitor support
Alex Frid [Sun, 12 Jun 2011 06:29:55 +0000]
ARM: tegra: clock: Add Tegra3 EMC activity monitor support

Added EMC clock control using Tegra3 activity monitoring device.
The target EMC frequency floor is set based on average activity
and short term boost. Average EMC activity is obtained directly
from monitoring h/w featuring 1st order IIR activity filter. The
boost frequency is calculated by s/w - exponentially increasing/
decreasing when sampled EMC activity has crossed upper/lower boost
watermarks.

The implementation is interrupt driven - periodic sampling is hidden
by h/w. The tune-able debugfs parameters are:

/sys/kernel/debug/tegra_actmon/emc/boost_step - boost rate increase
step (% of max EMC frequency)
/sys/kernel/debug/tegra_actmon/emc/boost_rate_inc - boost rate
increase factor (%)
/sys/kernel/debug/tegra_actmon/emc/boost_rate_dec - boost rate
decrease factor (%)

/sys/kernel/debug/tegra_actmon/emc/boost_threshold_up - upper
activity watermark for boost increase (% of current EMC frequency)
/sys/kernel/debug/tegra_actmon/emc/boost_threshold_dn - lower
activity watermark for boost decrease (% of current EMC frequency)

Original-Change-Id: I385c6e0a75da42dada792db6b4018b68fea8f23b
Reviewed-on: http://git-master/r/36790
Reviewed-by: Niket Sirsi <nsirsi@nvidia.com>
Tested-by: Niket Sirsi <nsirsi@nvidia.com>

Rebase-Id: R0ac50b162b8e86237986885e115996f755b1e00a

7 years agotegra: dc: set EMC clock dynamically
Xin Xie [Sat, 4 Jun 2011 03:47:14 +0000]
tegra: dc: set EMC clock dynamically

If the screen is idle (no POST for some time), reduce the DC EMC clock
according the windows size. If external display connected, the EMC clock
will not be reduced.

BUG 828306

Original-Change-Id: I6fb62ce6baf3380737c76b71f16e38ad6465a667
Reviewed-on: http://git-master/r/37106
Reviewed-by: Niket Sirsi <nsirsi@nvidia.com>
Tested-by: Niket Sirsi <nsirsi@nvidia.com>

Rebase-Id: Re2b2c8b1a57c2a04b61c338b0b50e41d8c11ad65

7 years agoregulator: write permission for only user
Sachin Nikam [Thu, 16 Jun 2011 09:52:26 +0000]
regulator: write permission for only user

Write permission only for User for syncevent_regulators
sysfs attribute.

This is needed so as to pass FileSystemPermission CTS.

Bug 840409

Original-Change-Id: Iad1ac9fc63b9471b2f7c9f2c12524512b3f5941e
Signed-off-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-on: http://git-master/r/36897
Reviewed-by: Niket Sirsi <nsirsi@nvidia.com>
Tested-by: Niket Sirsi <nsirsi@nvidia.com>

Rebase-Id: Rb71c94a12e155ae630d09f30fb42df4d83cc6e7c

7 years agovideo: tegra: dsi: Update DSI pad register.
Kevin Huang [Tue, 21 Jun 2011 22:24:03 +0000]
video: tegra: dsi: Update DSI pad register.

Bug 829327

Original-Change-Id: If17ec2aafccdfad1834f3fc914398cbd3babba01
Reviewed-on: http://git-master/r/36818
Reviewed-by: Niket Sirsi <nsirsi@nvidia.com>
Tested-by: Niket Sirsi <nsirsi@nvidia.com>

Rebase-Id: R32a6361714d6352fe1ae938ac11dc0ea6eca07ce

7 years agotegra: dc: adding max pixclock check for hdmi
Donghan Ryu [Sun, 22 May 2011 09:30:31 +0000]
tegra: dc: adding max pixclock check for hdmi

tegra_dc_hdmi_equal doesn't check pixclock and some devices doesn't
support 148.5Mhz pixclock which is needed for 1080p@60. However,
adding 1080p@30 to the supported hdmi mode array makes
tegra_dc_hdmi_equal to retun 1080p@60. Therefore, this commit adds
max pixclock check to distinguish modes with different pixclock

Bug: 815409

Original-Change-Id: Ifbf07929e3c7a92172856518a55e9d4a04f0b943
Reviewed-on: http://git-master/r/32511
Reviewed-by: Niket Sirsi <nsirsi@nvidia.com>
Tested-by: Niket Sirsi <nsirsi@nvidia.com>

Rebase-Id: R5b3c53a840ea0855d4298d92ec8db696a0c2f40e

7 years agoARM: tegra: generate status events for all clocks
Peter De Schrijver [Mon, 2 May 2011 12:43:06 +0000]
ARM: tegra: generate status events for all clocks

Original-Change-Id: I55f52ab038764079811c68b3bb3738a9de17d7bf
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Reviewed-on: http://git-master/r/31530
Reviewed-by: Niket Sirsi <nsirsi@nvidia.com>
Tested-by: Niket Sirsi <nsirsi@nvidia.com>

Rebase-Id: R25afcccf5ff8d7a88b705ce7f68ab83e818ae1e4

7 years agovideo: tegra: dc: No S_IWGRP permission for sysfs attrbs
Sachin Nikam [Thu, 16 Jun 2011 11:28:18 +0000]
video: tegra: dc: No S_IWGRP permission for sysfs attrbs

Don't give write permission for Group for sysfs:
stats_enable, enable and smart dimmer attributes.

Bug 840409

Original-Change-Id: Ic51e2a831c7bffed055d5120e684022ff64736c8
Signed-off-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-on: http://git-master/r/36994
Reviewed-by: Niket Sirsi <nsirsi@nvidia.com>
Tested-by: Niket Sirsi <nsirsi@nvidia.com>

Rebase-Id: R235fd834aaf57f9205e83335a3aab327d0848587

7 years agoARM: tegra: sysfs write permission for user only
Sachin Nikam [Thu, 16 Jun 2011 07:46:26 +0000]
ARM: tegra: sysfs write permission for user only

Giving read-write permission for user only for sysfs attributes.
Group and other will have only read permission.
- tegra_mc_stats: enable and quantum
- susend: mode
- clock: rate, parent, state

File System Permission CTS expects this to pass.

Bug 840409

Original-Change-Id: I3335b27124be38f0f5ea4cc415fef6532e574680
Signed-off-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-on: http://git-master/r/36867
Reviewed-by: Niket Sirsi <nsirsi@nvidia.com>
Tested-by: Niket Sirsi <nsirsi@nvidia.com>

Rebase-Id: R3360698aa910479a0eccb460656d104912af99bb

7 years agoarm: tegra: cardhu: handle regulator_get error
Prayas Mohanty [Wed, 22 Jun 2011 11:05:43 +0000]
arm: tegra: cardhu: handle regulator_get error

For sh532u, when regulator_get fails, it still returns
unwanted value. Reset regulator variable to NULL and
return error.

bug 841078

Original-Change-Id: I7265b2b5ca40405c92555a242d7d39f5dfe2bb07
Reviewed-on: http://git-master/r/37848
Reviewed-by: Alok Chauhan <alokc@nvidia.com>
Tested-by: Prayas Mohanty <pmohanty@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

Rebase-Id: R74efd1bf6a77b71f19a32058f55ba094e213648d

7 years agoarm: tegra: cardhu: enable PMU features for lp0
Luke Huang [Wed, 25 May 2011 01:00:49 +0000]
arm: tegra: cardhu: enable PMU features for lp0

Enable PMU only features for LP0. System-wise LP0 is not enable by default yet.

1. Allow pmu SLEEP state
2. Keep 32KHz clk out from PMU enabled on LP0
3. Set core_power_req to be high enable
4. Turn off VDD1 (power for Vcore) on LP0

Original-Change-Id: Id6babdfc36de1a597f8df5d2943ef048699013d4
Reviewed-on: http://git-master/r/32853
Reviewed-by: Chih-Lung Huang <lhuang@nvidia.com>
Tested-by: Chih-Lung Huang <lhuang@nvidia.com>
Reviewed-by: Niket Sirsi <nsirsi@nvidia.com>
Tested-by: Niket Sirsi <nsirsi@nvidia.com>

Rebase-Id: R1be5db70870d950a7ffe1361e60aad4156398172

7 years agovideo: tegra: dsi: Set dc and dsi clock for DSI burst mode.
Kevin Huang [Thu, 23 Jun 2011 01:32:23 +0000]
video: tegra: dsi: Set dc and dsi clock for DSI burst mode.

Original-Change-Id: Ia631f7bae013f378c36fe05c665ef178bef12a46
Reviewed-on: http://git-master/r/31904
Reviewed-by: Kevin Huang <kevinh@nvidia.com>
Tested-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-by: Jonathan Mayo <jmayo@nvidia.com>
Reviewed-by: Animesh Kishore <ankishore@nvidia.com>

Rebase-Id: R5b5d821365fce376a19a5527c5a9ecc9d2bfbb14

7 years agovideo: tegra: Do not set HDMI as a wakeup source
Sanjay Singh Rawat [Sun, 12 Jun 2011 12:05:15 +0000]
video: tegra: Do not set HDMI as a wakeup source

HDMI connect/disconnect will not affect the suspended device.

bug 835157

Signed-off-by: Sanjay Singh Rawat <srawat@nvidia.com>
Reviewed-on: http://git-master/r/37174
(cherry picked from commit 31f69bbe2e832a7dfa7678bb965b3461f421e0f5)

Original-Change-Id: Id66cdfcc5435df5abfab54fff823968ae67465a8
Reviewed-on: http://git-master/r/38204
Tested-by: Sanjay Singh Rawat <srawat@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Jonathan Mayo <jmayo@nvidia.com>

Rebase-Id: R58dac5622778d03bee6d6e73ede3913c24569112

7 years agoARM: tegra: clock: Add clock rate change notification
Alex Frid [Sun, 12 Jun 2011 06:23:50 +0000]
ARM: tegra: clock: Add clock rate change notification

Original-Change-Id: I97434334a4214180a365d9709a331405da135669
Reviewed-on: http://git-master/r/36202
Reviewed-by: Narendra Damahe <ndamahe@nvidia.com>
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Tested-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>

Rebase-Id: R7bfea35bf7b2e083e594538e245e3b74e25d090a

7 years agoInput: atmel_mxt_touch: NVIDIA touch customization
Robert Collins [Wed, 15 Jun 2011 21:43:41 +0000]
Input: atmel_mxt_touch: NVIDIA touch customization

* Fix suspend/resume bug to prevent unecessary i2cinterrupts when suspended.
* Change input device name to match NVDA IDC name.
* Add I2C address defines.
* Change "printk" to "dev_info" function calls.

BUG 826854

Original-Change-Id: Ic1b25bc469b86d8a26e876e80973597d9f6fb107
Reviewed-on: http://git-master/r/35285
Reviewed-by: Robert R Collins <rcollins@nvidia.com>
Tested-by: Robert R Collins <rcollins@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Narendra Damahe <ndamahe@nvidia.com>
Reviewed-by: Daniel Willemsen <dwillemsen@nvidia.com>

Rebase-Id: Rcba51c79d3c004372c0be18538f14f56a2249bc0

7 years agoInput: atmel_mxt_ts: Atmel customizations to touch.
Robert Collins [Mon, 6 Jun 2011 21:57:01 +0000]
Input: atmel_mxt_ts: Atmel customizations to touch.

Integrate changes made by Atmel.  These changes are in addition to
mainline driver.

NOTE:  Driver will compile as a stand-alone.

BUG 826854

Original-Change-Id: If13688d90d97b71718576f3fb756496f57a965d7
Reviewed-on: http://git-master/r/35280
Reviewed-by: Robert R Collins <rcollins@nvidia.com>
Tested-by: Robert R Collins <rcollins@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Daniel Willemsen <dwillemsen@nvidia.com>

Rebase-Id: Reb8ae14299d248c0ce69e52b26a8816d1a0ee057

7 years agoarm: tegra: Fix file permissions
Scott Williams [Thu, 23 Jun 2011 00:24:05 +0000]
arm: tegra: Fix file permissions

Remove executable permission from source files.

Original-Change-Id: I174be22b3b753569e33de1dc1fed2e823fda6120
Reviewed-on: http://git-master/r/37956
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Tested-by: Scott Williams <scwilliams@nvidia.com>

Rebase-Id: R904a5f20719575c5921b9bf1e9b54e0db13cefee

7 years agovideo: tegra: nvmap: free vm_struct in nvmap_munmap()
kenjchen [Wed, 8 Jun 2011 07:18:27 +0000]
video: tegra: nvmap: free vm_struct in nvmap_munmap()

In nvmap_munmap(), remove_vm_area just remove the allocated memory
page information. It doesn't de-allocate vm_struct. kfree()
should be used to avoid memory leak in nvmap.

Bug: 833796
Original-Change-Id: Ibd0309c1ff323fb8110870ace27819f5a1e006ba
Reviewed-on: http://git-master/r/35638
Reviewed-by: Niket Sirsi <nsirsi@nvidia.com>
Tested-by: Niket Sirsi <nsirsi@nvidia.com>

Rebase-Id: R417df608c4a24667af81f328bfb65cf3389e19ae

7 years agoarm:tegra:enterprise:board changes for PMU RTC
venu byravarasu [Thu, 16 Jun 2011 11:12:40 +0000]
arm:tegra:enterprise:board changes for PMU RTC

Board changes needed to enable TI PMU 80031 RTC
on enterprise are added.

bug 833336

Original-Change-Id: Ic2d2374ed6bff773964bd7bf6b81c69feda2d9b1
Reviewed-on: http://git-master/r/34457
Reviewed-by: Niket Sirsi <nsirsi@nvidia.com>
Tested-by: Niket Sirsi <nsirsi@nvidia.com>

Rebase-Id: Raa8d932bdbd4586201160e4070077b59ce5f55cc

7 years agoarm: tegra: cardhu: Uart platform data for hsuart driver
Laxman Dewangan [Tue, 21 Jun 2011 10:47:07 +0000]
arm: tegra: cardhu: Uart platform data for hsuart driver

Adding uart platform data for the hsuart driver. Passing the
clock information through the platform data.

bug 837140
bug 836059

Original-Change-Id: I321cd904ea072b0bc931016d46a4fa8462c28c8d
Reviewed-on: http://git-master/r/37636
Reviewed-by: Niket Sirsi <nsirsi@nvidia.com>
Tested-by: Niket Sirsi <nsirsi@nvidia.com>

Rebase-Id: R2012b1e682e406e31818f38eff0e4c9e8e7358eb

7 years agoarm: tegra: enterprise: adding power off support.
venu byravarasu [Wed, 22 Jun 2011 09:16:08 +0000]
arm: tegra: enterprise: adding power off support.

Board related changes, needed to turn off the device,
are being addded.

bug 833661

Original-Change-Id: Ia5f5f69fc19367995e6ad988a185825bd7b4d969
Reviewed-on: http://git-master/r/36670
Reviewed-by: Niket Sirsi <nsirsi@nvidia.com>
Tested-by: Niket Sirsi <nsirsi@nvidia.com>

Rebase-Id: Reaa3eb086baabd1d3b37a86555c7d2cfcb2eea68

7 years agomisc: mpu3050: removed printk
Jon Mayo [Tue, 14 Jun 2011 20:43:53 +0000]
misc: mpu3050: removed printk

unnecessary printk removed

BUG 842174

Original-Change-Id: I4b194a175fa2d040d1512804787f1351dbefc336
Reviewed-on: http://git-master/r/36582
Reviewed-by: Robert R Collins <rcollins@nvidia.com>
Tested-by: Robert R Collins <rcollins@nvidia.com>
Reviewed-by: Jonathan Mayo <jmayo@nvidia.com>

Rebase-Id: R8f555dd608b30531fcde5d7c411c848475418a79

7 years agortc: tps80031: Adding driver for TI PMU RTC 80031
venu byravarasu [Tue, 21 Jun 2011 11:45:03 +0000]
rtc: tps80031: Adding driver for TI PMU RTC 80031

With this change, RTC driver for TI PMU 80031 is being checked in.

bug 833336

Original-Change-Id: If4789a5dd49163d2391ab016845ff5807c061f12
Reviewed-on: http://git-master/r/34453
Tested-by: Venu Byravarasu <vbyravarasu@nvidia.com>
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

Rebase-Id: R98c49f456537e65d02460e738029673e7eea1bc0