6 years agoregmap: add support for non contiguous status to regmap-irq
Graeme Gregory [Mon, 14 May 2012 13:40:43 +0000]
regmap: add support for non contiguous status to regmap-irq

In some chips the IRQ status registers are not contiguous in the register
map but spaced at even spaces. This is an easy case to handle with minor
changes. It is assume for this purpose that the stride for status is
equal to the stride for mask/ack registers as well.

Signed-off-by: Graeme Gregory <gg@slimlogic.co.uk>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit 022f926a2401c80ed36ebb48a1bffbac08f34d98)
Change-Id: I68a59c8fd8a67062dac0eceaefcc85ed597f4a29
Reviewed-on: http://git-master/r/111484
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Pradeep Goudagunta <pgoudagunta@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

6 years agocpuquiet: Updated balanced governor to use the runnable threads patch
Sai Charan Gurrappadi [Tue, 19 Jun 2012 01:22:33 +0000]
cpuquiet: Updated balanced governor to use the runnable threads patch

The balanced governor now looks at the average number of runnable
threads when bringing cores online and offline. The balanced governor
parameters have also been updated to reflect a similar patch for
autohotplug.

Change-Id: I8dac26659ba43d95a68830c6cc268591a7f03f80
Signed-off-by: Sai Charan Gurrappadi <sgurrappadi@nvidia.com>
Reviewed-on: http://git-master/r/111282
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Reviewed-by: Peter Boonstoppel <pboonstoppel@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

6 years agogpu: ion: tegra: treat compilation warning as error
Sanjay Singh Rawat [Mon, 25 Jun 2012 05:51:47 +0000]
gpu: ion: tegra: treat compilation warning as error

- enabling warning as error flag

bug 949219

Change-Id: I5f8acb0f67f42abb7edd62ad21a8a6498681935a
Signed-off-by: Sanjay Singh Rawat <srawat@nvidia.com>
Reviewed-on: http://git-master/r/110769
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agovideo: backlight: use gpio request and free apis for backlight pin
Sanjay Singh Rawat [Tue, 26 Jun 2012 10:46:56 +0000]
video: backlight: use gpio request and free apis for backlight pin

- Gpio freeing function does disabling job.
- If backlight pin is an sfio, we have to claim the gpio. So that we can use
the gpio api's to configure it as sfio.

bug 984440
bug 858120

Change-Id: I583bf4a486d2d9a6d9b78ee459b1962379eafd3b
Signed-off-by: Sanjay Singh Rawat <srawat@nvidia.com>
Reviewed-on: http://git-master/r/109564
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agodrivers: skin: Skin prediction algorithm
Joshua Primero [Fri, 25 May 2012 22:54:13 +0000]
drivers: skin: Skin prediction algorithm

Added skin prediction algorithm.

bug 1007726

Change-Id: Ia76f73cb818aa02e608e1fc69ab4d8277a5825eb
Signed-off-by: Joshua Primero <jprimero@nvidia.com>
Reviewed-on: http://git-master/r/104814
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

6 years agospi: tegra: macro for enable/disable runtime pm inside driver
Laxman Dewangan [Fri, 29 Jun 2012 11:50:59 +0000]
spi: tegra: macro for enable/disable runtime pm inside driver

Add macro in the spi tegra driver for enabling/disabling
runtime PM specific to this driver.
Setting macro SPI_PM_RUNTIME_ENABLE to 1 will enable the
runtime pm and resetting to 0 make runtime pm disable.

The dynamic clock management i.e. enabling the clock before
transfer and disabling after transfer complete is done in
both the cases.
When runtime pm is enabled then clock control is done through
runtime pm callbacks otherwise it will be directly call the
clock control apis.

bug 1003103

Change-Id: I2544e8f3b3e5605e0247791653a5a0ed6c36e9b6
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/112142
Reviewed-by: Automatic_Commit_Validation_User

6 years agovideo: tegra: dc: split dc.c into smaller files
Jon Mayo [Tue, 26 Jun 2012 20:53:55 +0000]
video: tegra: dc: split dc.c into smaller files

Moved mode setting code into mode.c
Move window code info window.c
Moved clock related code into clock.c
Moved LUT and gamma related code into lut.c
Moved csc(color space conversion) into csc.c
Removed unnecessary static function prototypes from header.
Moved many short inline functions to dc_priv.h
Cleaned up copyright headings.
Cleaned up formatting and indent in all files.
Fixed build warnings.

Bug 870907

Change-Id: I6ccc37150191765394f0b5629423eafd4e5e5792
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/111371
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

6 years agoregulator: tps80031: support for min voltage tolerance
Laxman Dewangan [Fri, 22 Jun 2012 06:42:38 +0000]
regulator: tps80031: support for min voltage tolerance

Sometimes the system allow to run in less than requested
minimum voltage and if this tolerance allow the regulator
to set voltage in lower side range than this saves the power.
For the example, if client request vmin = 975mV for regulator
voltage then it sets the voltage to 987.5mv as the nearest to this
desired value. The next lower side for the voltage is 974.8mv.
So if system runs on tolerance of 1mv and if it request for
975mv then driver can look for minimum voltage as 975 - tolerance(1)
= 974mv and possible configure 974.8mv rather than 987.5mV and so
it can save the power equivalent to 12.5mV higher voltage.

Support the configuration of tolerance value.

Change-Id: Ic8312bb397c2615a3ee0f84072ec394e513525ea
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/110523
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

6 years agoARM: config: Added tegra skin throttling option
Joshua Primero [Fri, 1 Jun 2012 19:49:35 +0000]
ARM: config: Added tegra skin throttling option

Added Kconfig option to enable skin thermal throttling.

bug 1007726

Change-Id: I8f92172ffd44802f1662c327c02c8a61c523c408
Signed-off-by: Joshua Primero <jprimero@nvidia.com>
Reviewed-on: http://git-master/r/105989
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

6 years agoARM: tegra: Object based balanced throttling
Joshua Primero [Thu, 9 Feb 2012 20:03:00 +0000]
ARM: tegra: Object based balanced throttling

Implemented an object based balanced throttling in preparation
for multiple balanced throttling objects.

bug 1007726

Change-Id: Ib58fafaf696af0ae58e78bd9fd417d3a822d0571
Signed-off-by: Joshua Primero <jprimero@nvidia.com>
Reviewed-on: http://git-master/r/105238
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

6 years agoarm: tegra: modify hotplug balance threshold
Xiao Bo Zhao [Fri, 8 Jun 2012 00:11:14 +0000]
arm: tegra: modify hotplug balance threshold

Tuned the sensitivity level of the hot-plug governor's balancing algorithm to 60% from 75%

Bug 958978

Change-Id: I972ed908995e348e8b3b0afb8108c44b66c80eae
Signed-off-by: Wen Yi <wyi@nvidia.com>
(cherry picked from commit 07a69db5af4c971b2c2d161ee149580ab5b40633)
Reviewed-on: http://git-master/r/111641
Reviewed-by: Sai Gurrappadi <sgurrappadi@nvidia.com>
Tested-by: Sai Gurrappadi <sgurrappadi@nvidia.com>
Reviewed-by: Peter Boonstoppel <pboonstoppel@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

6 years agoarm: tegra: hotplug: modify down_delay
Xiao Bo Zhao [Thu, 24 May 2012 23:33:42 +0000]
arm: tegra: hotplug: modify down_delay

Modified the hot-plug governor down_delay to be 500ms instead of 2s

Bug 958978

Change-Id: I55b5a4994f8e4564879cfd206fc683ff6f32d9ac
Signed-off-by: Wen Yi <wyi@nvidia.com>
(cherry picked from commit dd477396f2762f871255fb9d0800431d7534754d)
Reviewed-on: http://git-master/r/111640
Reviewed-by: Sai Gurrappadi <sgurrappadi@nvidia.com>
Tested-by: Sai Gurrappadi <sgurrappadi@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Peter Boonstoppel <pboonstoppel@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

6 years agoarm: tegra: hotplug: tune runnable thread params.
Xiao Bo Zhao [Fri, 8 Jun 2012 00:20:18 +0000]
arm: tegra: hotplug: tune runnable thread params.

Tuned the runnable threads threshold from 5/9/13 to 5/9/10 in order to improve performance

Bug 958978

Change-Id: I77abcd0077845517f2b5f7487c547f8a5157c2c7
Signed-off-by: Wen Yi <wyi@nvidia.com>
(cherry picked from commit 25a97f57661353fbb5ee40faed296befbf635178)
Reviewed-on: http://git-master/r/111639
Reviewed-by: Sai Gurrappadi <sgurrappadi@nvidia.com>
Tested-by: Sai Gurrappadi <sgurrappadi@nvidia.com>
Reviewed-by: Peter Boonstoppel <pboonstoppel@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

6 years agoARM: tegra: power: Use runnable threads average for hotplug
Wen Yi [Tue, 12 Jun 2012 19:01:11 +0000]
ARM: tegra: power: Use runnable threads average for hotplug

Sample scheduler runnable threads average in auto-hotplug work
function and use it to determine the auto-hotplug target for number
of on-line cores. Use cpu up delay as sampling period, and enforce
down delay by checking last cpu configuration change time stamp.

Bug 958978

Change-Id: I4280a11d39914687e6ffaa6f38df594d10aedaa9
Signed-off-by: Alex Frid <afrid@nvidia.com>
(cherry picked from commit 507e2ef5e4f09b23de2e924003dba259d3c8bc3c)
Reviewed-on: http://git-master/r/111638
Reviewed-by: Sai Gurrappadi <sgurrappadi@nvidia.com>
Tested-by: Sai Gurrappadi <sgurrappadi@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Peter Boonstoppel <pboonstoppel@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

6 years agoscheduler: Re-compute time-average nr_running on read
Varun Wadekar [Wed, 11 Jul 2012 08:58:06 +0000]
scheduler: Re-compute time-average nr_running on read

Port commit 1802afb2a (http://git-master/r/111637) from v3.1

Re-compute time-average nr_running when it is read. This would
prevent reading stalled average value if there were no run-queue
changes for a long time. New average value is returned to the reader,
but not stored to avoid concurrent writes. Light-weight sequential
counter synchronization is used to assure data consistency for
re-computing average.

Original author: Alex Frid <afrid@nvidia.com>

Signed-off-by: Alex Frid <afrid@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

Change-Id: Ic486006d62436fb61cda4ab6897e933f5c102b52

6 years agoproc: enhance time-average nr_running stats
Alex Frid [Wed, 16 May 2012 21:27:13 +0000]
proc: enhance time-average nr_running stats

Add time-average nr_running to loadavg printout

Bug 958978

Change-Id: I5c6904efb52a86f4964eb66c1576fc91f60f5b1d
Signed-off-by: Alex Frid <afrid@nvidia.com>
(cherry picked from commit 86f3642cc44a69d1e4798719bd9182cd6923f526)
Reviewed-on: http://git-master/r/111636
Reviewed-by: Sai Gurrappadi <sgurrappadi@nvidia.com>
Tested-by: Sai Gurrappadi <sgurrappadi@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Peter Boonstoppel <pboonstoppel@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

6 years agoscheduler: compute time-average nr_running per run-queue
Varun Wadekar [Mon, 7 May 2012 22:12:25 +0000]
scheduler: compute time-average nr_running per run-queue

Port commit 0b5a8a6f3 (http://git-master/r/111635) from v3.1

Compute the time-average number of running tasks per run-queue for a
trailing window of a fixed time period. The delta add/sub to the
average value is weighted by the amount of time per nr_running value
relative to the total measurement period.

Original author: Diwakar Tundlam <dtundlam@nvidia.com>

Change-Id: I076e24ff4ed65bed3b8dd8d2b279a503318071ff
Signed-off-by: Diwakar Tundlam <dtundlam@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

6 years agosched: delete sched.c
Varun Wadekar [Wed, 11 Jul 2012 07:12:10 +0000]
sched: delete sched.c

Commit 391e43da797a96aeb65410281891f6d0b0e9611c (sched: Move all scheduler
bits into kernel/sched/) removed this file, but somehow it still exists.

Change-Id: I31b385694c251bb0471d64dbec4607e0ff701841
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

6 years agoARM: tegra: cardhu: power management fix for E1506 panel
Rakesh Iyer [Wed, 20 Jun 2012 00:52:52 +0000]
ARM: tegra: cardhu: power management fix for E1506 panel

Fix for power up/down sequencing for 720p DSI panel on the E1506.

Bug 997484.

Change-Id: Ia65e20b96da3bad0703136839eaf0394f9c7b364
Signed-off-by: Rakesh Iyer <riyer@nvidia.com>
Reviewed-on: http://git-master/r/109918
(cherry picked from commit c6f7033ddbc18a4b780620d1e7d65fe2ce5e4108)
Reviewed-on: http://git-master/r/111945
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
GVS: Gerrit_Virtual_Submit

6 years agovideo: tegra: dsi: 720p panel power fix
Rakesh Iyer [Wed, 20 Jun 2012 00:46:00 +0000]
video: tegra: dsi: 720p panel power fix

Send specified DC frames to 720p panel during power up/down sequencing.

Bug 997484.

Change-Id: I3927e98322ec93f68cabf635c71485b64750d7f9
Signed-off-by: Rakesh Iyer <riyer@nvidia.com>
Reviewed-on: http://git-master/r/109917
(cherry picked from commit e1d10bc056031fbc2f68101978d76317c44fc7af)
Reviewed-on: http://git-master/r/111944
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
GVS: Gerrit_Virtual_Submit

6 years agovideo: tegra: host: Serialize 2D jobs
Terje Bergstrom [Wed, 27 Jun 2012 06:37:05 +0000]
video: tegra: host: Serialize 2D jobs

Force serialization of 2D jobs by inserting a host wait for previous
maximum at the beginning of the job.

Bug 1002293

Change-Id: I667ad4565cc32186ea7ccf16845c68d1b1bbdf78
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/111475
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Donghan Ryu <dryu@nvidia.com>
Reviewed-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-by: Daniel Parker <dparker@nvidia.com>
Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Francis Hart <fhart@nvidia.com>

6 years agonet: wireless: bcmdhd: move barrier to after setting the suspended flag.
Sang-Hun Lee [Sat, 16 Jun 2012 00:15:46 +0000]
net: wireless: bcmdhd: move barrier to after setting the suspended flag.

Reviewed-on: http://mcrd1-5.corpnet.asus/code-review/master/47846
Tested-by: Kirt Hsieh <Kirt_Hsieh@asus.com>
Reviewed-by: Kirt Hsieh <Kirt_Hsieh@asus.com>
Reviewed-by: Vincent Yue <Vincent_Yue@asus.com>

Bug 984811

Signed-off-by: Roger Hsieh <rhsieh@nvidia.com>
Change-Id: I708dadddf3f3eac9f8bacc72e3aef94247a87e70
Reviewed-on: http://git-master/r/106352
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sang-Hun Lee <sanlee@nvidia.com>
Tested-by: Sang-Hun Lee <sanlee@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>

6 years agoARM: tegra: emc: add reference counting to early ack disablement
Sang-Hun Lee [Wed, 20 Jun 2012 23:16:57 +0000]
ARM: tegra: emc: add reference counting to early ack disablement

Bug 995950

Signed-off-by: Sang-Hun Lee <sanlee@nvidia.com>
Reviewed-on: http://git-master/r/110190
(cherry picked from commit cbfc31fb126cd651157125d1785135eced6587dd)

Change-Id: I44eb889235db82b0efda238b87be5612425afb9d
Reviewed-on: http://git-master/r/110978
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agomedia: video: tegra: tegra_camera: disable eack
Sang-Hun Lee [Thu, 21 Jun 2012 01:33:59 +0000]
media: video: tegra: tegra_camera: disable eack

 - Disable eack when a camera is in use

Bug 995950

Signed-off-by: Sang-Hun Lee <sanlee@nvidia.com>
Reviewed-on: http://git-master/r/110224
(cherry picked from commit f336812516efac8c6445def282340333094973c9)

Change-Id: I9a5ee84dc48bacf88261b0bf3180fe69fea3712f
Reviewed-on: http://git-master/r/110979
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Tested-by: Sang-Hun Lee <sanlee@nvidia.com>
Reviewed-by: Sang-Hun Lee <sanlee@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agoarm: tegra: enterprise: Firmware update support for pn544
Rakesh Goyal [Fri, 22 Jun 2012 12:21:11 +0000]
arm: tegra: enterprise: Firmware update support for pn544

Enable firmware GPIO for board E1205 with fab A03 or A04.
Resubmitting the changes as required for firmware download.

Bug 959290

Signed-off-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-on: http://git-master/r/110558
(cherry picked from commit c715bf0aafb5449a5a0c190b1e4f89dd3778eba2)

Change-Id: I38629a5e33afa03473cdf375982d97beabe302e6
Reviewed-on: http://git-master/r/111413
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agoarm: config: tegra3: disable tibluesleep driver
Nagarjuna Kristam [Mon, 25 Jun 2012 11:35:13 +0000]
arm: config: tegra3: disable tibluesleep driver

bug 1006864

Change-Id: Ic5c4dde1e8422b7182487560a102d4ac83ae58a9
Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-on: http://git-master/r/110857
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Rakesh Kumar <krakesh@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agoarm: tegra: kai: use bluesleep driver for TI wl12xx bt chip
Nagarjuna Kristam [Mon, 25 Jun 2012 11:30:35 +0000]
arm: tegra: kai: use bluesleep driver for TI wl12xx bt chip

For TI WL12xx BT chip, register bluesleep driver to enable
"wake on bluetooth" feature

bug 1006864

Change-Id: I294afd2dad1974c57e0fe5d3c000d44433da6c05
Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-on: http://git-master/r/110855
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agovideo: tegra: nvmap: resolve compilation time warning
Sanjay Singh Rawat [Mon, 18 Jun 2012 17:51:41 +0000]
video: tegra: nvmap: resolve compilation time warning

- Grouping variables around bitwise operators for safe operation.

bug 949219

Change-Id: I8edf7fb241eb79ac07b63ab856d206fc453308f1
Signed-off-by: Sanjay Singh Rawat <srawat@nvidia.com>
Reviewed-on: http://git-master/r/109577
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agobluetooth: enable sleep only if chip supports
Nagarjuna Kristam [Mon, 25 Jun 2012 11:16:14 +0000]
bluetooth: enable sleep only if chip supports

Some bt chips e.g TI wl12xx, do not support external wake using GPIO.
If bluesleep platform data does not contain external wake GPIO information,
bluesleep driver assumes, bt chip does not support external wake and disables
bluetooth chip power management.

Bluesleep driver is also modified to start and stop on HCI_DEV_UP and
HCI_DEV_DOWN events respectively.

bug 1006864

Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Change-Id: I64c34f5816bd824da1c720175f9e93c16847299b
Reviewed-on: http://git-master/r/108498
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User

6 years agovideo: tegra: host: T30 uses two GPUs always
Arto Merilainen [Fri, 15 Jun 2012 13:16:32 +0000]
video: tegra: host: T30 uses two GPUs always

This patch removes the possibility to disable the second GPU of T30
using a fuse.

Change-Id: I73cd4b7bd52035322e5fc1b040ffeda6d600a90e
Reviewed-on: http://git-master/r/109434
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agoARM: tegra: pcie: Enable ASPM l1 state support
Vidya Sagar [Tue, 26 Jun 2012 16:34:03 +0000]
ARM: tegra: pcie: Enable ASPM l1 state support

Currently, only L0s state of ASPM is supported by default.
This change enables the l1 state support for Root Ports.

Bug 815499

Change-Id: Iec5e5f2edbf4ccfa35cb74432e18b29f18ec7771
Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
Reviewed-on: http://git-master/r/110062
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jay Agarwal <jagarwal@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-by: Krishna Thota <kthota@nvidia.com>

6 years agodrivers: misc: Thermal estimator driver
Joshua Primero [Fri, 1 Jun 2012 01:11:23 +0000]
drivers: misc: Thermal estimator driver

Added driver which estimates temperature based on
a linear formula from other temperature sensors.

bug 1007726

Change-Id: Ic0d3ba7f0d369d4321f55b03e6326ff4efbb512e
Signed-off-by: Joshua Primero <jprimero@nvidia.com>
Reviewed-on: http://git-master/r/105988
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

6 years agodrivers: nct: exposed nct internal/external temps
Joshua Primero [Wed, 9 May 2012 00:25:31 +0000]
drivers: nct: exposed nct internal/external temps

Added function that exposes nct1008's internal and external
temperature measurements.

bug 1007726

Change-Id: Iffaca95f5e4267e09a0c3ebb2fbfb909a3bed89d
Signed-off-by: Joshua Primero <jprimero@nvidia.com>
Reviewed-on: http://git-master/r/101377
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

6 years agovideo: tegra: dc: Fix the check of dirty window.
Kevin Huang [Tue, 26 Jun 2012 08:27:58 +0000]
video: tegra: dc: Fix the check of dirty window.

Change-Id: I6584c856356d6be123a66731bde414e4925ffe07
Reviewed-on: http://git-master/r/111184
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

6 years agoarm: tegra: enterprise: Add support to externel pwm.
Kevin Huang [Wed, 20 Jun 2012 17:34:29 +0000]
arm: tegra: enterprise: Add support to externel pwm.

Bug 995402

Change-Id: I53e9f1801d3b37626abb89c67b4e63662dab8c65
Reviewed-on: http://git-master/r/111306
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agovideo: tegra: dc: Deactivate DSI runtime when DC is idle.
Kevin Huang [Fri, 15 Jun 2012 18:09:12 +0000]
video: tegra: dc: Deactivate DSI runtime when DC is idle.

We support 3 different aggressiveness levels of disabling DSI runtime.
The larger the aggressive level is, the higher DSI power we can save.

Bug 936337

Change-Id: Idadcb49b364e29ddd0a05dde1c6d3dfda6cd493e
Signed-off-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-on: http://git-master/r/106361
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agoarm: tegra: baseband: boost CPU frequency when modem BT3 boots
Steve Lin [Fri, 15 Jun 2012 21:54:31 +0000]
arm: tegra: baseband: boost CPU frequency when modem BT3 boots

Boost CPU frequency to ensure the modem core dump can be transfered
before the BT3 watchdog timeout.

Bug 975990

Signed-off-by: Steve Lin <stlin@nvidia.com>
Reviewed-on: http://git-master/r/109325
(cherry picked from commit 028155da1b31742b0133dbad62fe5a6a66f2bf1e)

Change-Id: I9e7960c11521f011bcbd5566bb40fa780723b49f
Reviewed-on: http://git-master/r/104038
Reviewed-by: Uday Raval <uraval@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Steve Lin <stlin@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Steve Lin <stlin@nvidia.com>

6 years agoarm: tegra: baseband: add sysfs file for modem boot, etc.
Steve Lin [Fri, 15 Jun 2012 01:12:46 +0000]
arm: tegra: baseband: add sysfs file for modem boot, etc.

1. Add sysfs file so the fild can load/unload host controller before
modem power cycle.
2. Move modem boot irq to modem PM driver.
3. Add short autosuspend to optimize power consumption if the wake
source of system resume is not modem.
4. Avoid LP0 abort if remote wakeup happens during L0/L2 -> L3
transition.
5. Fix deadlock in pm_notifier function.

Bug 975990

Signed-off-by: Steve Lin <stlin@nvidia.com>
Reviewed-on: http://git-master/r/109079
(cherry picked from commit 0b60aade303a022ff3335b4a238ba2dbae4da4b5)

Change-Id: I9bcac40e2f93f95c702b42a2eb5e4e9aa7a9d721
Reviewed-on: http://git-master/r/103981
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Uday Raval <uraval@nvidia.com>
Tested-by: Steve Lin <stlin@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Steve Lin <stlin@nvidia.com>

6 years agoARM: tegra: usb_phy: Fix for glitch on STROBE line
Vinod Atyam [Wed, 20 Jun 2012 17:36:37 +0000]
ARM: tegra: usb_phy: Fix for glitch on STROBE line

Observed glitch on STROBE line during HSIC resume.
This is because after removing the TX circuit power down,
HSIC controller is keeping in reset to program
phy parameters. TX circuit is driving low on STROBE line until
controller removed out of reset.
Now corrected the code to remove power down after setting phy
parameters and removed the reset on HSIC controller.

Bug 991709

Change-Id: I4966ea92752d2e5c6ea7042a6c5fb8707cf6bb35
Signed-off-by: Vinod Atyam <vatyam@nvidia.com>
Reviewed-on: http://git-master/r/110112
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agoregulator: tps80031: Allow to configure in OFF mode in sleep state
Laxman Dewangan [Mon, 25 Jun 2012 13:29:27 +0000]
regulator: tps80031: Allow to configure in OFF mode in sleep state

Allow to configure the rail into sleep-off mode even if
the external req is not supported for a regulator.

bug 979143

Change-Id: I3c1bd789410b557a2ffc3133ca15ec3753ed2004
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/110881
Reviewed-by: Automatic_Commit_Validation_User

6 years agortc: max77663: avoid powering on system by RTC alarm.
Jinyoung Park [Tue, 15 May 2012 08:42:32 +0000]
rtc: max77663: avoid powering on system by RTC alarm.

Clean RTC alarm and don't set new alarm during shutdown process.
After powering off, we do not want Maxim PMIC automaticly boots caused
by RTC alarm.

Bug 985193

Signed-off-by: Haley Teng <hteng@nvidia.com>
Reviewed-on: http://git-master/r/104773
(cherry picked from commit 0bd7f3163f73ba3cf87dadd6bc6fa35a538ac153)

Change-Id: I7209407503b9f51dfb5b8f59d05c6fa8f04c6069
Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/110858
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agoARM: tegra: clock: Add fence read in emc clock change
Alex Frid [Thu, 7 Jun 2012 06:51:28 +0000]
ARM: tegra: clock: Add fence read in emc clock change

Added fence read in Tegra3 emc clock change procedure.

Change-Id: I2162affb4dddcacf38057e07ff6fbd5964643188
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/106956
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

6 years agousb: serial: baseband: Add another XMM modem USB VID/PID.
Michael Hsu [Wed, 9 May 2012 23:30:34 +0000]
usb: serial: baseband: Add another XMM modem USB VID/PID.

Add support for another XMM modem.

Bug 996038

Change-Id: I392a18284b372fbc80c581b31b21af3c072bf4d3
Signed-off-by: Michael Hsu <mhsu@nvidia.com>
Reviewed-on: http://git-master/r/110193
(cherry picked from commit bdad2e9c1b195c8f7fcc3216f2bf27ea99dfd597)
Reviewed-on: http://git-master/r/110941
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Vinayak Pane <vpane@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Steve Lin <stlin@nvidia.com>

6 years agousb: cdc_ether: Add rmnet device info to PH450 and Tango
Mohan T [Mon, 25 Jun 2012 05:36:17 +0000]
usb: cdc_ether: Add rmnet device info to PH450 and Tango

Modified device info element for PH450 and Tango to
sync with framework.

Change-Id: I325571358f8c1875484254a9f497c606adb03180
Signed-off-by: Mohan T <mohant@nvidia.com>
Reviewed-on: http://git-master/r/110765
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Matthieu Vincenot <mvincenot@nvidia.com>
Reviewed-by: Steve Lin <stlin@nvidia.com>

6 years agoARM: tegra: Change pm269 board structure configs
Sudhir Vyas [Mon, 18 Jun 2012 11:24:49 +0000]
ARM: tegra: Change pm269 board structure configs

* NVC config change added to make code inline with
generic NVC framework, but it is introducing camera
crash after reboot issue on pm269.

* Make code identical to what was there earlier to fix
above regression.

Bug 998465

Change-Id: I8510ef3427b218481c5e36c952056dda799080f6
Signed-off-by: Sudhir vyas <svyas@nvidia.com>
Reviewed-on: http://git-master/r/109523
(cherry picked from commit 7e642946895848829bb6405bc675062c86907eb4)
Reviewed-on: http://git-master/r/110087
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agoFix gcov for GCC 4.6.
Tuomas Tynkkynen [Wed, 20 Jun 2012 11:47:25 +0000]
Fix gcov for GCC 4.6.

Gcov's internal data structures, on which the kernel depends on, have
changed in GCC 4.6. This patch adds support for GCC 4.6 and should still
work on GCC 4.4 too.

For reference, look at 'struct gcov_fn_info' in GCC's 'gcc/gcov-io.h',
near line 698:
https://android.googlesource.com/toolchain/gcc/+/master/gcc-4.4.3/
https://android.googlesource.com/toolchain/gcc/+/master/gcc-4.6/

Bug 1003822

Change-Id: I527736f944c80b8b345d1685669c0b99eb38fb66
Signed-off-by: Tuomas Tynkkynen <ttynkkynen@nvidia.com>
Reviewed-on: http://git-master/r/110073
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
Tested-by: Juha Tukkinen <jtukkinen@nvidia.com>

6 years agovideo: host: Add host to EXTRA_CFLAGS
Rhyland Klein [Fri, 22 Jun 2012 18:07:29 +0000]
video: host: Add host to EXTRA_CFLAGS

It seems with building with different tool chains, when compiling
nvhost_acm it doesn't end up with drivers/video/tegra/host in its
include path and therefore it fails to find some header files.

Signed-off-by: Rhyland Klein <rklein@nvidia.com>
Change-Id: Ic3d72c863d4b5e501222d21077ba9735315ec65c
Reviewed-on: http://git-master/r/110592
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Allen Martin <amartin@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

6 years agovideo: tegra: use public APIs exposed by host1x driver
Mayuresh Kulkarni [Mon, 18 Jun 2012 07:05:40 +0000]
video: tegra: use public APIs exposed by host1x driver

Bug 961009

Change-Id: Ifdcc7bc8a40d270e70a63329f46caff541bf01e2
Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-on: http://git-master/r/109461
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

6 years agoarm: tegra: kai: Fix panel power on/off sequence
Ken Chang [Tue, 15 May 2012 10:02:04 +0000]
arm: tegra: kai: Fix panel power on/off sequence

Panel power on/off sequence should meet the panel spec as below.

power on:
1. EN_VDD_PNL
2. PCLK
3. LVDS_EN
4. LCD_BL_PWN

power off:
1. LCD_BL_PWN
2. LVDS_EN
3. PCLK
4. EN_VDD_PNL

Pixel clock on/off is controlled by dc driver, we need to separate the
setting of panel enable/disable into two parts. The first, i.e., before
pclk on/off, is done in kai_panel_enable()/kai_panel_prepoweroff().
And the second part, i.e., after pclk on/off, is done in
kai_panel_postpoweron()/kai_panel_disable().

bug 976081

Signed-off-by: Ken Chang <kenc@nvidia.com>
Reviewed-on: http://git-master/r/102555
Reviewed-by: Artiste Hsu <chhsu@nvidia.com>
Reviewed-by: Prajakta Gudadhe <pgudadhe@nvidia.com>
(cherry picked from commit 8149532e20729c359eb1680297f19a8f46343054)

Change-Id: Ifc0d60c2caabf60f4186179e64756a4caabf9af6
Reviewed-on: http://git-master/r/110297
Tested-by: Ken Chang <kenc@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Artiste Hsu <chhsu@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

6 years agovideo: tegra: dc: Support for pre power-off actions
Ken Chang [Tue, 15 May 2012 03:20:52 +0000]
video: tegra: dc: Support for pre power-off actions

Part of panel settings need to be done before/after pixel clock
is disabled. Add support for these actions to meet panel
spec.

bug 976081

Signed-off-by: Ken Chang <kenc@nvidia.com>
Reviewed-on: http://git-master/r/102542
Reviewed-by: Lokesh Pathak <lpathak@nvidia.com>
Tested-by: Lokesh Pathak <lpathak@nvidia.com>
(cherry picked from commit dcecdc64d4d0fd4d9f69df52c9d200dfbf1dd7fc)

Change-Id: Ibfede68d67a4815156f73c2d1cdca90f3f771755
Reviewed-on: http://git-master/r/110296
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agoarm: tegra: pcie: Fix USB3 after LP0
Jay Agarwal [Fri, 22 Jun 2012 12:03:51 +0000]
arm: tegra: pcie: Fix USB3 after LP0

Stop and add pcie devices to probe the devices
again in order to have correct value of irq which
was not, at first probe while resume.

Bug 956573

Change-Id: I8d497116350ad263c4ae3053cd429393a0f0bc99
Signed-off-by: Jay Agarwal <jagarwal@nvidia.com>
Reviewed-on: http://git-master/r/110556
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agoARM: Tegra: p1852: UARTE pinmux correction
sreenivasulu velpula [Tue, 19 Jun 2012 11:56:40 +0000]
ARM: Tegra: p1852: UARTE pinmux correction

UARTE pin directions were set as per the old pinmux sheet.
Updated the pinmux as per the sheet revision #18
//syseng/Projects/P1852/PinMux/T30_PinMux_for_P1852.xls

Bug 991591

Change-Id: I50cf05659e4970882dffc1cd268718e64c886a23
Signed-off-by: sreenivasulu velpula <svelpula@nvidia.com>
Reviewed-on: http://git-master/r/109762
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mohit Kataria <mkataria@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sandeep Trasi <strasi@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>

6 years agoarm: tegra: pcie: Fix suspend/resume code
Jay Agarwal [Wed, 20 Jun 2012 08:00:39 +0000]
arm: tegra: pcie: Fix suspend/resume code

1. Do add port and rescan in resume
2. Assert pcie xclk on power on
3. Remove all bus and devices in suspend
4. Enable msi once after resume also
5. Remove Most of hacks for save and restore
   config spaces

Bug 959642
Bug 956573

Change-Id: Ibfa6902ad1aa2ed0d97f7fe1e305287e38ea0be1
Signed-off-by: Jay Agarwal <jagarwal@nvidia.com>
Reviewed-on: http://git-master/r/109700
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agovideo: tegra: host: add public APIs for power & syncpoint management
Mayuresh Kulkarni [Mon, 18 Jun 2012 07:05:01 +0000]
video: tegra: host: add public APIs for power & syncpoint management

- add public APIs for power & sync-point management
- all these APIs end with string _ext
- all these APIs can be found in linux/nvhost.h
- all these APIs take nvhost_device as first argument
- all these APIs are based on the fact that host1x hardware
driver is parent of all the host1x client driver
- this allows clients of host1x which are outside host1x
driver code to just include nvhost.h & use host1x driver
interfaces
- this also hides the implementation details of power &
sync-point inside host1x driver code
- move sync point ids for dc and nvavp to nvhost.h

Bug 961009

Change-Id: I1a9ca074df87656c4d4bd246853e039a7850d56a
Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-on: http://git-master/r/109219
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
GVS: Gerrit_Virtual_Submit

6 years agomedia: video: tegra: Fix LP0 error while playing WV
Hyungwoo Yang [Sat, 16 Jun 2012 03:55:36 +0000]
media: video: tegra: Fix LP0 error while playing WV

Original change(commit dfa3daebbc8dbe3ccc8e72400359dfce29053222) to fix
LP0 error is already merged but the error is still there
due to porting issue to main branch.

This change fixes LP0 problem caused by porting to main.

Change-Id: I925407dc6c7fe0caca5ea33e3830a857b26e151c
Signed-off-by: Hyungwoo Yang <hyungwooy@nvidia.com>
Reviewed-on: http://git-master/r/109376
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>

6 years agoarm: tegra: enterprise: Set pwr_i2c speed to 400khz
Chaitanya Bandi [Wed, 20 Jun 2012 04:58:47 +0000]
arm: tegra: enterprise: Set pwr_i2c speed to 400khz

PWR_I2C (i2c5) clock rate is set to 400khz.

Bug 1001924

Change-Id: I7b5593742a0b208aea2ad0d83ecac2078f458534
Signed-off-by: Chaitanya Bandi <bandik@nvidia.com>
Reviewed-on: http://git-master/r/109954
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agovideo: tegra: dc: Skip the vblank_int work if DC is disabled.
Kevin Huang [Wed, 20 Jun 2012 20:17:00 +0000]
video: tegra: dc: Skip the vblank_int work if DC is disabled.

Bug 1000789
Bug 1003730

Change-Id: I7fbd703dde2044f2790e6a9b356ef8dca89ad8f3
Signed-off-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-on: http://git-master/r/110146
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

6 years agoarm: tegra: usb: restore the AP/modem handshaking
Steve Lin [Wed, 20 Jun 2012 19:59:43 +0000]
arm: tegra: usb: restore the AP/modem handshaking

Restore the AP/modem handshaking functions and clean up the null
phy driver.

Bug 996035

Signed-off-by: Steve Lin <stlin@nvidia.com>
Reviewed-on: http://git-master/r/109044
(cherry picked from commit ff27e8a48a53fe70949d95915f62dd2e03c73df7)

Change-Id: I12a2401a7fcc540a657ab15378d440ef85561001
Reviewed-on: http://git-master/r/110145
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Steve Lin <stlin@nvidia.com>
Reviewed-by: Steve Lin <stlin@nvidia.com>

6 years agovideo: tegra: dc: force the use of new bandwidth
Jon Mayo [Wed, 20 Jun 2012 20:48:53 +0000]
video: tegra: dc: force the use of new bandwidth

During programming of a frame or at frame end, force the use of the new EMC
bandwidth instead of the previous frame's bandwidth.
Moved copy of new_bandwidth out of tegra_dc_set_latency_allowance() to match
the semantics of the rest of tegra_dc_program_bandwidth().

bug 949015

Change-Id: I881f3a2c75f3438e3bbb3208b518f15a4574bc91
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/110149
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Daniel Solomon <daniels@nvidia.com>
Reviewed-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com>

6 years agoarm: configs: tegra: Enable ISL29028 sensor in L4T
Konsta Holtta [Wed, 20 Jun 2012 11:50:41 +0000]
arm: configs: tegra: Enable ISL29028 sensor in L4T

Enabling ALS and Proximity sensor ISL29028 for Tegra3 boards in L4T
defconfig. Also, Disabling the ISL sensors which are not present on
Tegra3 boards.

Bug 876339

Change-Id: I22c318a43b0c5fe667e89c9dd9f99c84a368c8f9
Reviewed-on: http://git-master/r/110065
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

6 years agoARM: config: tegra3: enable PCIEASPM
Vidya Sagar [Tue, 19 Jun 2012 09:51:37 +0000]
ARM: config: tegra3: enable PCIEASPM

Enables the Active State Power Management (ASPM) support
in the PCIe framework

Bug 815499

Change-Id: I76f9fc6a5b6feed8e47e5a4a3825b71c487b79ed
Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
Reviewed-on: http://git-master/r/109747
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

6 years agovideo: tegra: host: Exclude suspend/resume if disabled
Terje Bergstrom [Fri, 15 Jun 2012 11:48:47 +0000]
video: tegra: host: Exclude suspend/resume if disabled

Compile power management suspend and resume functions only when
CONFIG_PM is enabled.

Change-Id: If349984d62ed002594ba60ac25cd4dddd956aa6c
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/109425
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agovideo: tegra: nvmap: Use trace points in NvMap.
Krishna Reddy [Tue, 5 Jun 2012 17:18:13 +0000]
video: tegra: nvmap: Use trace points in NvMap.

Change-Id: I2a5f0c9305bd53c42df181556d97efa5d6792ad7
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/106500
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bo Yan <byan@nvidia.com>

6 years agonvmap: Add trace points for nvmap.
Krishna Reddy [Mon, 4 Jun 2012 18:19:09 +0000]
nvmap: Add trace points for nvmap.

Change-Id: I86e68c57846fe14de7620edf4c241ad7d9e46df2
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/106491
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Satya Popuri <spopuri@nvidia.com>

6 years agoPCI: pcie: Add support for setting default ASPM policy
Matthew Garrett [Tue, 19 Jun 2012 08:48:58 +0000]
PCI: pcie: Add support for setting default ASPM policy

Distributions may wish to provide different defaults for PCIE ASPM
depending on their target audience. Provide a configuration option for
choosing the default policy.

Bug 815499

(cherry picked from commit ad71c96213a68dfe6d761e3ff7ac7ac267fd612a
http://git.kernel.org/?p=linux/kernel/git/torvalds/linux-2.6.git;
a=commitdiff;h=ad71c96213a68dfe6d761e3ff7ac7ac267fd612a)

Change-Id: I36bd72517af0cf8d637552e66b18afe576e72c20
Signed-off-by: Matthew Garrett <mjg@redhat.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
Reviewed-on: http://git-master/r/109739
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agoarm: tegra: use rfkill-gpio driver to register bluetooth rfkill
Nagarjuna Kristam [Mon, 4 Jun 2012 04:30:53 +0000]
arm: tegra: use rfkill-gpio driver to register bluetooth rfkill

rfkill-gpio driver is available in linux delivery as a generic rfkill driver.
use rfkill-gpio driver to perform bluetooth RFKILL gpio activities, instead of
bcm4329 rfkill driver.

Bug 993990
Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>

Change-Id: I654b93f099431029177913605d15ad921df07833
Reviewed-on: http://git-master/r/108499
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agoARM: config for PCIe framework
Vidya Sagar [Tue, 19 Jun 2012 09:34:16 +0000]
ARM: config for PCIe framework

Bug 815499

Change-Id: I6ce9a2bb4afbfd797fc5a0bf0d1027bdc0c1459d
Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
Reviewed-on: http://git-master/r/109745
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agospi: tegra: dump registers when error occurs
Ashwini Ghuge [Wed, 20 Jun 2012 08:22:45 +0000]
spi: tegra: dump registers when error occurs

When any error occurs in spi communication,
dump the spi registers for debug purpose

Change-Id: I5cf226d4b504c95a6abb8dcf5b8c0ba1ef44271c
Signed-off-by: Ashwini Ghuge <aghuge@nvidia.com>
Reviewed-on: http://git-master/r/109466
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agospi: tegra: Max tx words limited to max buff size
Ashwini Ghuge [Wed, 20 Jun 2012 08:44:28 +0000]
spi: tegra: Max tx words limited to max buff size

When computing required words for a transfer,
limit this to max possible size on given
sub transfer

Change-Id: Ia1a9290ae389e36ecb5a8d03be2982885a544a33
Signed-off-by: Ashwini Ghuge <aghuge@nvidia.com>
Reviewed-on: http://git-master/r/109462
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agospi: tegra: do not start transfer if runtime pm fails to resume
Johnny Qiu [Mon, 18 Jun 2012 07:11:23 +0000]
spi: tegra: do not start transfer if runtime pm fails to resume

Bug 995706

During device shutdown/rebooting, runtime PM is disabled. SPI bus
driver will fail to call tegra_spi_runtime_resume() to resume the
clock needed by tranferring. In this case, do not start transferring.

Change-Id: I42cc0763f55b6c90df00fbad68794939e903199a
Signed-off-by: Johnny Qiu <joqiu@nvidia.com>
Reviewed-on: http://git-master/r/109458
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

6 years agovideo: tegra: dc: fix MC_DECERR display0_win errors on shutdown
Adam Cheney [Sat, 16 Jun 2012 02:22:35 +0000]
video: tegra: dc: fix MC_DECERR display0_win errors on shutdown

When a DC window is being released, a NULL flip is used to indicate
that the window should be disabled.  To disable a window, 0 is
written to WIN_OPTIONS.

The MC_DECERR on window shutdown is a symptom of forgetting step 2)
below when disabling windows, leaving no indication that there is
anything to wait for.  This causes DC to erroneously unpin the
scanout buffer while the buffer is still actively being used.

Summary of flip (window update) synchronization in DC:
1) program some window registers
2) set win->dirty=1
3) schedule the activation of the registers
4) request VBLANK or HBLANK interrupts
5) wait for win->dirty==0

In the trigger_windows ISR (every VBLANK or HBLANK):
1) if there is no window update pending in HW, clear dirty flag to
   indicate that ACTIVE registers are up-to-date.

bug 991572
bug 995614
bug 989119
bug 983251
bug 960424
bug 866711

Change-Id: I8b710aac874b202838c3989608b7e0bd15425382
Signed-off-by: Adam Cheney <acheney@nvidia.com>
Reviewed-on: http://git-master/r/109370
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Robert Morell <rmorell@nvidia.com>
Reviewed-by: Nirav Patel <nipatel@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

6 years agomedia: tegra: avp: Remove compiler warning
Juha Tukkinen [Mon, 18 Jun 2012 13:11:43 +0000]
media: tegra: avp: Remove compiler warning

Get rid of maybe-uninitialized warning when using 4.6 toolchain.

Bug 999222

Change-Id: Ic8e944eaba281cdea45950b61f93093ff0e59f20
Signed-off-by: Juha Tukkinen <jtukkinen@nvidia.com>
Reviewed-on: http://git-master/r/109553
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Stefan Becker <stefanb@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

6 years agoarm: tegra: emc: Fix compiler warning
Juha Tukkinen [Mon, 18 Jun 2012 11:29:01 +0000]
arm: tegra: emc: Fix compiler warning

Initialize a variable to avoid a compiler warning and a potential bug.

Bug 999222

Change-Id: I77724b21d20049340943856c8d00af5e067c206a
Signed-off-by: Juha Tukkinen <jtukkinen@nvidia.com>
Reviewed-on: http://git-master/r/109552
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Stefan Becker <stefanb@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

6 years agoarm: Tegra: Harmony: highspeed uart enable
Ramalingam C [Thu, 7 Jun 2012 09:42:24 +0000]
arm: Tegra: Harmony: highspeed uart enable

Based on the kernel command line argument, this change will register the
UARTD for the tegra_uart driver, instead of the serial8250. Hence we can
put the harmony for the UART automation test.

Bug 991545

Change-Id: I5e637c73f4ce352fb615453121d14e2874e51a53
Signed-off-by: Ramalingam C <ramalingamc@nvidia.com>
Reviewed-on: http://git-master/r/106755
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mursalin Akon <makon@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

6 years agoarm: tegra: Fix cpu governor change issue
Puneet Saxena [Wed, 30 May 2012 10:58:31 +0000]
arm: tegra: Fix cpu governor change issue

It fixes the issue where cpu governor change
was inconsistent across platforms.

In T2x, AUTO HOTPLUG is disabled therefore we need
to store/restore gov for all online cpus across
LP0 cycle.

In T3x, AUTO HOTPLUG is enabled therefore storing/restoring
gov for Cpu0 across LP0 cycle. Cpu0 remains online in suspend
and resume.

bug 991081

Change-Id: I167654aa21e4832b3fdc40e3d388a4d3f984632b
Signed-off-by: Puneet Saxena <puneets@nvidia.com>
Reviewed-on: http://git-master/r/105404
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agommc: core: adding new sysfs entry for prod_rev
Vishal Singh [Fri, 18 May 2012 13:33:11 +0000]
mmc: core: adding new sysfs entry for prod_rev

Adding new sysfs entry for product revision which is needed by
mNAND health and status user space tool.

Bug 974823.

Change-Id: I4a07a5e6c1c81e2b7a4c1ed024e987e06f9f87c8
Signed-off-by: Vishal Singh <vissingh@nvidia.com>
Reviewed-on: http://git-master/r/103366
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sandeep Trasi <strasi@nvidia.com>
Reviewed-by: Luis Dib <ldib@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com>

6 years agoARM: tegra: dvfs: Fix error checking of voltage
Juha Tukkinen [Thu, 14 Jun 2012 14:44:34 +0000]
ARM: tegra: dvfs: Fix error checking of voltage

Fix error checking of predicted voltage. Also get rid of
maybe-uninitialized warning when using 4.6 toolchain.

Bug 949219
Bug 999222

Change-Id: I47553aba5a93c91bdd93cbf75081d69f92aec4dd
Signed-off-by: Juha Tukkinen <jtukkinen@nvidia.com>
Reviewed-on: http://git-master/r/108899
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agoiio: light: fix error handling for LTR558
Shridhar Rasal [Fri, 15 Jun 2012 09:13:33 +0000]
iio: light: fix error handling for LTR558

Change-Id: I34748241728bb0bab1861f8abacffdfe2939740f
Signed-off-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-on: http://git-master/r/109158
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User

6 years agosound: soc: tegra: fix compilation errors
Rhyland Klein [Wed, 30 May 2012 18:34:47 +0000]
sound: soc: tegra: fix compilation errors

Several compilation errors popped up when building the 3.1 kernel for
chrome. Warnings included callback structure changing and not being
updated in the max98095 codec driver and unused labels.

With these change I am able to compile in the max98095 codec support
and wm8903 without build errors.

Bug 986933

Change-Id: Ia8b2511f54b031eadcad8c74efa88be9288f25fb
Signed-off-by: Rhyland Klein <rklein@nvidia.com>
Reviewed-on: http://git-master/r/105464
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Scott Peterson <speterson@nvidia.com>

6 years agoarm: tegra: configs: enable CONFIG_TUN
Om Prakash Singh [Thu, 14 Jun 2012 06:09:23 +0000]
arm: tegra: configs: enable CONFIG_TUN

Bug 997101
Signed-off-by: Om Prakash Singh <omp@nvidia.com>

Change-Id: I5da0bfe342193d93e021eb9a24aacb09bf38e6a0
Reviewed-on: http://git-master/r/108780
Reviewed-by: Om Prakash Singh <omp@nvidia.com>
Tested-by: Om Prakash Singh <omp@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Rakesh Kumar <krakesh@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agousb: serial: baseband_usb_chr kernel panic
pyu [Thu, 7 Jun 2012 14:55:39 +0000]
usb: serial: baseband_usb_chr kernel panic

Two threads race for two resources when baseband_usb_close()
get called from a user process

Bug 988188

Change-Id: Ic962640b6414e576d34b7ff6870b21b644837434
Signed-off-by: pyu <pyu@nvidia.com>
Reviewed-on: http://git-master/r/107088
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vinayak Pane <vpane@nvidia.com>
Reviewed-by: Steve Lin <stlin@nvidia.com>

6 years agoARM: Tegra: fix compilation warnings
Varun Wadekar [Tue, 10 Jul 2012 10:26:10 +0000]
ARM: Tegra: fix compilation warnings

Change-Id: I00c67d6ec68c7566c2764aa8d135c101bacc17d7
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

6 years agoARM: Tegra: Enable 900MHz at 1V on restricted pll_m
Graziano Misuraca [Fri, 18 May 2012 23:32:34 +0000]
ARM: Tegra: Enable 900MHz at 1V on restricted pll_m

Allow pll_m to reach 900MHz at 1V on T30, T33, T37
rev A02+ SKUs.

Bug 891320

Change-Id: Idbfb10014ae2a1d06abc3bc1d0bed59c583fac98
Signed-off-by: Graziano Misuraca <gmisuraca@nvidia.com>
Reviewed-on: http://git-master/r/103453
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agoARM: Tegra: cardhu: Let emc to 450MHz on T33+ at 1V
Graziano Misuraca [Fri, 11 May 2012 00:35:33 +0000]
ARM: Tegra: cardhu: Let emc to 450MHz on T33+ at 1V

Change dvfs table to allow emc to hit 450MHz at 1V VDD_CORE.
Line in emc table is also used for T30/T30s but because
those can't reach 1350mV they should never use a 450MHz
bct and therefore jump from 400@1V to 800@1.2V as before.

Bug 973238

Change-Id: I4f1f96c959658e6f9aeca8841c2bfa86fe20cfb8
Signed-off-by: Graziano Misuraca <gmisuraca@nvidia.com>
Reviewed-on: http://git-master/r/101868
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agodrivers: cpuquiet: fix error message
Peter De Schrijver [Mon, 11 Jun 2012 15:41:27 +0000]
drivers: cpuquiet: fix error message

Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>

Change-Id: If04c699e002542bd8ce4b37b2367d7ec496c284e
Reviewed-on: http://git-master/r/107959
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sai Gurrappadi <sgurrappadi@nvidia.com>
Tested-by: Sai Gurrappadi <sgurrappadi@nvidia.com>
Reviewed-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Tested-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Reviewed-by: Matthew Longnecker <mlongnecker@nvidia.com>
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

6 years agoARM: tegra: dvfs: Update Tegra3 I/O dvfs tables
Alex Frid [Sat, 9 Jun 2012 00:38:40 +0000]
ARM: tegra: dvfs: Update Tegra3 I/O dvfs tables

Updated 0.95V entries in Tegra3 dvfs tables for nand, nor, spi, and
pwm clocks with recent characterization results. Removed usb, pcie,
and spdif dvfs since characterization allows running these interfaces
in the entire supported voltage range.

Bug 817679
Bug 841336

Change-Id: Iaaa2a3ff8b3c07915f1cb05e7b14da545428888e
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/107779
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Wen Yi <wyi@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

6 years agoARM: tegra: dvfs: Update Tegra3 display subsystem dvfs tables
Alex Frid [Fri, 8 Jun 2012 20:30:09 +0000]
ARM: tegra: dvfs: Update Tegra3 display subsystem dvfs tables

Updated 0.95V entries in Tegra3 dvfs tables for display and dsi
with recent characterization results. Removed hdmi and crt dvfs
since characterization allows running these modules at max rate
in the entire supported voltage range.

Bug 817679
Bug 841336

Change-Id: I28651a692e30a20536613460ea0e45155a530af7
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/107778
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Wen Yi <wyi@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

6 years agoARM: tegra: dvfs: Update Tegra3 sclk and cbus dvfs tables
Alex Frid [Fri, 8 Jun 2012 20:03:58 +0000]
ARM: tegra: dvfs: Update Tegra3 sclk and cbus dvfs tables

Updated 0.95V entries in Tegra3 dvfs tables for sclk and cbus clocks
with recent characterization results.

Bug 817679
Bug 841336

Change-Id: I892690aea4c584b34be5dbfcbcd8b35abd86a997
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/107777
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Wen Yi <wyi@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

6 years agomedia: video: tegra: ar0832: Make focuser range, slew rate tunable
Naren Bhat [Thu, 17 May 2012 01:49:21 +0000]
media: video: tegra: ar0832: Make focuser range, slew rate tunable

The range parameters & slew rate from the blocks-camera are being passed
down to ODM and then to kernel. Generic structure added for sharing
the data between ODM and kernel instead of specific structure.

Bug 954874

Change-Id: I84656e36a5a2721c007de78aa5c20f5dfeb00361
Signed-off-by: Naren Bhat <nbhat@nvidia.com>
Reviewed-on: http://git-master/r/102077
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

6 years agovideo: tegra: dc: fix bug causing drawing before flipping
I-Gene Leong [Fri, 18 Nov 2011 02:49:15 +0000]
video: tegra: dc: fix bug causing drawing before flipping

The tegra_dc_trigger_windows function was improperly using the
WIN_x_UPDATE bits to determine when a flip has occurred instead of the
WIN_x_ACT_REQ bits. Without this change, it's possible for the postflip
syncpoint for a buffer to get incremented before it actually flips.
Still need to figure out why that's even possible...

Fixes bug 902955

Change-Id: I67ba093a0114646977cc8cb95a040ec4178cebfc
Reviewed-on: http://git-master/r/65389
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-by: Nate Huang <nhuang@nvidia.com>
Tested-by: Nate Huang <nhuang@nvidia.com>
Reviewed-on: http://git-master/r/98024
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

6 years agoARM: tegra: resolve compilation time warnings
Sanjay Singh Rawat [Tue, 12 Jun 2012 16:53:56 +0000]
ARM: tegra: resolve compilation time warnings

- Adding flag to treat warning as error.
- Handling warnings of unused variable, structures and functions,
wrong return type, wrong type comparision.

Bug 949219

Change-Id: I9d02387ce1073c4e46f69d01669285aa3754f1d9
Signed-off-by: Sanjay Singh Rawat <srawat@nvidia.com>
Reviewed-on: http://git-master/r/104968
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agosmsc95xx: Add module params to read MAC address
Manoj Chourasia [Sun, 12 Feb 2012 14:18:06 +0000]
smsc95xx: Add module params to read MAC address

This patch adds support for mac_addr module param

mac_addr : MAC address which will be assigned to the
above device. example
mac_addr=0x0,0x2,0x2,0x3,0x3,0x4

If EEPROM read fails for MAC address for a smsc
interface and if the mac_addr module param is set
then driver will set that device MAC address provided
in mac_addr. This can be set for only one device

bug 719410, bug 921146

Change-Id: I6eb0363951d91fad857b76af8a4a097cd0fb7623
Signed-off-by: Manoj Chourasia <mchourasia@nvidia.com>
Reviewed-on: http://git-master/r/108237
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>

6 years agomedia: video: tegra: ov5650: enable DPC feature
Charlie Huang [Fri, 25 May 2012 18:35:42 +0000]
media: video: tegra: ov5650: enable DPC feature

enable Defective Pixel Correction block on sensor SOC.

bug 976218

Change-Id: I754200b7f625509950b061173c7e5de2a831d607
Signed-off-by: Charlie Huang <chahuang@nvidia.com>
Reviewed-on: http://git-master/r/104776
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bhushan Rayrikar <brayrikar@nvidia.com>
Reviewed-by: Krupal Divvela <kdivvela@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Amy Deng <amyd@nvidia.com>
Reviewed-by: Frank Chen <frankc@nvidia.com>
Reviewed-by: Wei Chen <wechen@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agovideo: tegra: dc: Use ref-count to mask vblank interrupt.
Kevin Huang [Fri, 8 Jun 2012 23:15:55 +0000]
video: tegra: dc: Use ref-count to mask vblank interrupt.

Bug 990586

Change-Id: I63da2bd0aaae86070718e0d769b8c9555db18547
Signed-off-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-on: http://git-master/r/107714
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

6 years agovideo: tegra: dc: Fix backlight on/off sequence
Mark Zhang [Thu, 31 May 2012 08:01:31 +0000]
video: tegra: dc: Fix backlight on/off sequence

Register backlight device after tegradc.0 and tegradc.1. This makes
sure turning on/off backlight in correct sequence and eliminates the
flicker during suspending and resuming.

Bug 964626

Change-Id: I16a545b0148faa341b2443c76d9ca4c7eb7f636c
Signed-off-by: Mark Zhang <markz@nvidia.com>
Reviewed-on: http://git-master/r/105611
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Peer Chen <pchen@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Shashank Sharma <shashanks@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

6 years agoAvoid aliasing mappings in DMA coherent allocator
Manoj Chourasia [Mon, 4 Jun 2012 11:55:43 +0000]
Avoid aliasing mappings in DMA coherent allocator

Avoid multiple mappings with DMA coherent/writecombine allocator by pre-
allocating the mappings, and removing that memory from the system memory
mapping.  (See previous discussions on linux-arm-kernel as to why this
is bad.)

NB1: By default, we preallocate 2MB for DMA coherent, and 2MB for write
combine memory, rather than 1MB for each in case 1MB is not sufficient
for existing platform usage.  Platforms have the option of shrinking
this down to 1MB DMA / 1MB WC (or even 2MB DMA / 0MB WC) if they so wish.
The DMA memory must be a multiple of 1MB, the write combine memory must
also be a multiple of 1MB, and the two together must be a multiple of
2MB.

NB2: On ARMv6/7 where we use 'normal uncacheable' memory for both DMA
and WC, the two pools are combined into one, as was the case with the
previous implementation.

The down side to this change is that the memory is permanently set aside
for DMA purposes, but I believe that to be unavoidable if we are to
avoid the possibility of the cache getting in the way on VIPT CPUs.

This removes the last known offender (at this time) from the kernel.

Given that DMA memory is fully coherent by this patch, cache
invalidation/clean is not required and so, we skip cache related
activities for the memory managed by the DMA layer. The bus
address -> virtual address conversion normally used in the calling
path and the fact that we remove kernel static mapping corresponding
to the DMA buffers leads to exceptions otherwise.

bug 876019
bug 965047
bug 987589

Change-Id: I72beb386605aafe1a301494a95a67d094ea6b2e4
Signed-off-by: Russell King <rmk@arm.linux.org.uk>
Signed-off-by: Manoj Chourasia <mchourasia@nvidia.com>
Reviewed-on: http://git-master/r/106212
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

6 years agopower: smb349: fix I2C error when unplug ext power
Syed Rafiuddin [Thu, 7 Jun 2012 06:12:28 +0000]
power: smb349: fix I2C error when unplug ext power

When unplug the external power, SMB349 will reload the OTP setting.
It sometimes caused I2c errors. See bug 996103 and 991401.

Add a 50ms delay when hotplugging the external power to fix the
issue.

SMB349 might mistakenly detect dedicated USB charger as standard
USB device if plug in the USB at low speed. See Bug 996108.

Add a 500ms delay to fix the issue.

Bug 996103
Bug 996108
Bug 991401

Change-Id: I008a45fa221e9a566af64afb1988bbbd7a9f5c79
Signed-off-by: Chandler Zhang <chazhang@nvidia.com>
Signed-off-by: Syed Rafiuddin <srafiuddin@nvidia.com>
Reviewed-on: http://git-master/r/106684
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

6 years agoarm: tegra: p1852: drive touch panel with resolution 1366x768
Dongfang Shi [Tue, 8 May 2012 22:24:25 +0000]
arm: tegra: p1852: drive touch panel with resolution 1366x768

Enable WXGA display and touch input for p1852 touch panel.

board-p1852-panel.c:
added WXGA timing for atmel touch panel.

board-p1852.c:
initialize touch panel if touch input is defined.

board-p1852.h:
added p1852 touch panel GPIO and bus.

tegra_p1852_gnu_linux_defconfig:
added touch panel flags, not defined by default.

bug 936232

Change-Id: Ia50b991f6aa5ed0ece458ad3871a68684a9234a6
Signed-off-by: Dongfang Shi <dshi@nvidia.com>
Reviewed-on: http://git-master/r/101348
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agoARM: Tegra: Kai: Move Raydium init declaration
Graziano Misuraca [Wed, 11 Apr 2012 19:03:47 +0000]
ARM: Tegra: Kai: Move Raydium init declaration

Move Raydium touch init declaration from board-specific
board-kai.h to generic board-touch.h

Signed-off-by: Graziano Misuraca <gmisuraca@nvidia.com>
Change-Id: If82572a296ad6e5a3b1733827289e9b71a624176
Reviewed-on: http://git-master/r/95919
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agoemc: tegra3: Change debug eack_state permissions
Hao Tang [Tue, 5 Jun 2012 11:24:37 +0000]
emc: tegra3: Change debug eack_state permissions

Remove write permission of eack_state for cts verification. The init script
will make it acessible on engineering builds

Bug 906796

Change-Id: I1b5d77f4ee3d0e39106840eca0c53e6347c34ea1
Signed-off-by: Hao Tang <htang@nvidia.com>
Reviewed-on: http://git-master/r/106668
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Raymond Poudrier <rapoudrier@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>