10 years agoMIPS: Alchemy: Repair db1500/bosporus builds
Manuel Lauss [Fri, 26 Feb 2010 16:22:01 +0000]
MIPS: Alchemy: Repair db1500/bosporus builds

A few hunks somehow ended up outside their #ifdef/endif blocks,
leading to -Werror-induces build failures.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/1003/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

10 years agoMIPS: ARC: Cleanup unused definitions from sgialib.h
Yoichi Yuasa [Sat, 20 Feb 2010 12:20:34 +0000]
MIPS: ARC: Cleanup unused definitions from sgialib.h

Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org>
Cc: linux-mips <linux-mips@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/979/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

10 years agoMIPS: Cobalt: convert legacy port addresses to GT-64111 bus addresses
Bjorn Helgaas [Wed, 24 Feb 2010 20:53:27 +0000]
MIPS: Cobalt: convert legacy port addresses to GT-64111 bus addresses

The GT-64111 PCI host bridge has no address translation mechanism, so
it can't generate legacy port accesses.  This quirk fixes legacy device
port resources to contain the bus addresses actually generated by the
GT-64111.

I think this is the approach Ben Herrenschmidt suggested long ago:
    http://marc.info/?l=linux-kernel&m=119733290624544&w=2

This allows us to remove the IORESOURCE_PCI_FIXED hack from
pcibios_fixup_device_resources(), which converts bus addresses to CPU
addresses.  IORESOURCE_PCI_FIXED denotes resources that can't be moved;
it has nothing to do with converting bus to CPU addresses.

Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com>
Cc: Yoichi Yuasa <yuasa@linux-mips.org>
Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: linux-mips@linux-mips.org
Tested-by: Yoichi Yuasa <yuasa@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/998/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

10 years agoMIPS: Alchemy: use 36bit addresses for PCMCIA resources.
Manuel Lauss [Wed, 24 Feb 2010 16:40:21 +0000]
MIPS: Alchemy: use 36bit addresses for PCMCIA resources.

On Alchemy the PCMCIA area lies at the end of the chips 36bit system bus
area.  Currently, addresses at the far end of the 32bit area are assumed
to belong to the PCMCIA area and fixed up to the real 36bit address before
being passed to ioremap().

A previous commit enabled 64 bit physical size for the resource datatype on
Alchemy and this allows to use the correct 36bit addresses when registering
the PCMCIA sockets.

This patch removes the 32-to-36bit address fixup and registers the Alchemy
demo board pcmcia socket with the correct 36bit physical addresses.

Tested on DB1200, with a CF card (ide-cs driver) and a 3c589 PCMCIA ethernet
card.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Cc: Manuel Lauss <manuel.lauss@gmail.com>
Patchwork: http://patchwork.linux-mips.org/patch/994/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

10 years agoMIPS: Cobalt: Fix theoretical port aliasing issue
Ralf Baechle [Wed, 24 Feb 2010 16:41:00 +0000]
MIPS: Cobalt: Fix theoretical port aliasing issue

Because the VIA SuperIO chip only decodes 24 bits of address space but port
address space currently being configured as 32MB there is the theoretical
possibility of aliases within the I/O port address range.

The complicated solution is to reserve all address range that potencially
could cause such aliases.  But with the PCI spec limiting port allocations
for devices to a maximum of 256 bytes 16MB of port address space already is
way more than one would ever expect to be used so we just reduce the port
space to 16MB.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
To: Yoichi Yuasa <yuasa@linux-mips.org>
Cc: Bjorn Helgaas <bjorn.helgaas@hp.com>
Cc: linux-mips@linux-mips.org
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Patchwork: http://patchwork.linux-mips.org/patch/995/

10 years agoMIPS: Use ALIGN(x, bytes) instead of __ALIGN_MASK(x, bytes - 1)
Matt Turner [Thu, 25 Feb 2010 04:30:14 +0000]
MIPS: Use ALIGN(x, bytes) instead of __ALIGN_MASK(x, bytes - 1)

ALIGN(x, bytes) expands to __ALIGN_MASK(x, bytes - 1), so use the one
that is most clear.

Signed-off-by: Matt Turner <mattst88@gmail.com>
To: linux-mips@linux-mips.org
Cc: David Daney <ddaney@caviumnetworks.com>
Patchwork: http://patchwork.linux-mips.org/patch/999/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

10 years agoMIPS: Crazy spinlock speed test.
David Daney [Tue, 16 Feb 2010 23:26:35 +0000]
MIPS: Crazy spinlock speed test.

This is just a test program for raw_spinlocks.  The main reason I
wrote it is to validate my spinlock changes that I sent in a previous
patch.

To use it enable CONFIG_DEBUG_FS and CONFIG_SPINLOCK_TEST then at run
time do:

# mount -t debugfs none /sys/kernel/debug/
# cat /sys/kernel/debug/mips/spin_single
# cat /sys/kernel/debug/mips/spin_multi

On my 600MHz octeon cn5860 (16 CPUs) I get

spin_single spin_multi
base 106885 247941
spinlock_patch 75194 219465

This shows that for uncontended locks the spinlock patch gives 41%
improvement and for contended locks 12% improvement (1/time).

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/969/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

10 years agoMIPS: Optimize spinlocks.
David Daney [Thu, 4 Feb 2010 19:31:49 +0000]
MIPS: Optimize spinlocks.

The current locking mechanism uses a ll/sc sequence to release a
spinlock.  This is slower than a wmb() followed by a store to unlock.

The branching forward to .subsection 2 on sc failure slows down the
contended case.  So we get rid of that part too.

Since we are now working on naturally aligned u16 values, we can get
rid of a masking operation as the LHU already does the right thing.
The ANDI are reversed for better scheduling on multi-issue CPUs

On a 12 CPU 750MHz Octeon cn5750 this patch improves ipv4 UDP packet
forwarding rates from 3.58*10^6 PPS to 3.99*10^6 PPS, or about 11%.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/937/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

10 years agoMIPS: Alchemy: devboard PM needs to save CPLD registers.
Manuel Lauss [Tue, 23 Feb 2010 17:57:43 +0000]
MIPS: Alchemy: devboard PM needs to save CPLD registers.

Save/restore CPLD registers when doing suspend-to-ram; this fixes issues
with harddisk and ethernet not working correctly when resuming on DB1200.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/986/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

10 years agoMIPS: PowerTV: Eliminate duplicate opcode definition macros
David VomLehn [Tue, 23 Feb 2010 00:31:13 +0000]
MIPS: PowerTV: Eliminate duplicate opcode definition macros

Change to different macros for assembler macros since the old names in
powertv_setup.c were co-opted for use in asm/asm.h. This broken the
build for the powertv platform. This patch introduces new macros based on
the new macros in asm.h to take the place of the old macro values.

Signed-off-by: David VomLehn <dvomlehn@cisco.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/985/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

10 years agoMIPS: Lemote 2F: Move printks out of port_access_lock.
Ralf Baechle [Sat, 27 Feb 2010 11:53:41 +0000]
MIPS: Lemote 2F: Move printks out of port_access_lock.

No point in protecting them and printks are sloow.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

10 years agoMIPS: PNX833x: Convert IRQ controller locks to raw spinlocks.
Ralf Baechle [Sat, 27 Feb 2010 11:53:41 +0000]
MIPS: PNX833x: Convert IRQ controller locks to raw spinlocks.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

10 years agoMIPS: Octeon: Replace spinlock with raw_spinlocks in dma-octeon.c.
David Daney [Thu, 18 Feb 2010 19:48:20 +0000]
MIPS: Octeon: Replace spinlock with raw_spinlocks in dma-octeon.c.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/973/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

10 years agoMIPS: Octeon: Replace rwlocks in irq_chip handlers with raw_spinlocks.
David Daney [Thu, 18 Feb 2010 19:47:40 +0000]
MIPS: Octeon: Replace rwlocks in irq_chip handlers with raw_spinlocks.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/972/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

10 years agoMIPS: Octeon: Convert octeon_irq_msi_lock to raw spinlock.
Ralf Baechle [Sat, 27 Feb 2010 11:53:40 +0000]
MIPS: Octeon: Convert octeon_irq_msi_lock to raw spinlock.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

10 years agoMIPS: Loongson: Remove pointless sample_lock from oprofile code.
Ralf Baechle [Sat, 27 Feb 2010 11:53:39 +0000]
MIPS: Loongson: Remove pointless sample_lock from oprofile code.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

10 years agoMIPS: SNI: Convert sni_rm200_i8259A_lock to raw spinlock.
Ralf Baechle [Sat, 27 Feb 2010 11:53:39 +0000]
MIPS: SNI: Convert sni_rm200_i8259A_lock to raw spinlock.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

10 years agoMIPS: i8259: Convert IRQ controller lock to raw spinlock.
Ralf Baechle [Sat, 27 Feb 2010 11:53:38 +0000]
MIPS: i8259: Convert IRQ controller lock to raw spinlock.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

10 years agoMIPS: IP27: Convert nmi_lock lock to arch spinlock;
Ralf Baechle [Sat, 27 Feb 2010 11:53:38 +0000]
MIPS: IP27: Convert nmi_lock lock to arch spinlock;

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

10 years agoMIPS: IP27: Remove code obfuscation by enter_panic_mode().
Ralf Baechle [Sat, 27 Feb 2010 11:53:38 +0000]
MIPS: IP27: Remove code obfuscation by enter_panic_mode().

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

10 years agoMIPS: GT641xx: Convert timer lock to raw spinlock.
Ralf Baechle [Sat, 27 Feb 2010 11:53:37 +0000]
MIPS: GT641xx: Convert timer lock to raw spinlock.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

10 years agoMIPS: Alchemy: Simplify DMA channel allocation code.
Ralf Baechle [Sat, 27 Feb 2010 11:53:37 +0000]
MIPS: Alchemy: Simplify DMA channel allocation code.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Cc: Manuel Lauss <manuel.lauss@googlemail.com>

10 years agoMIPS: Yosemite: Convert SMP startup lock to arch spinlock.
Ralf Baechle [Sat, 27 Feb 2010 11:53:37 +0000]
MIPS: Yosemite: Convert SMP startup lock to arch spinlock.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

10 years agoMIPS: Alchemy: Remove time_lock.
Ralf Baechle [Sat, 27 Feb 2010 11:53:36 +0000]
MIPS: Alchemy: Remove time_lock.

The sole user is au1xxx_calc_clock() which is only used in early bootup
where the is no paralellism thus no race condition to protect against.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Cc: Manuel Lauss <manuel.lauss@googlemail.com>

10 years agoMIPS: DEC: Convert KN01 lock to raw spinlock.
Ralf Baechle [Sat, 27 Feb 2010 11:53:36 +0000]
MIPS: DEC: Convert KN01 lock to raw spinlock.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

10 years agoMIPS: BCM63xx: Convert timer locks to raw spinlocks.
Ralf Baechle [Sat, 27 Feb 2010 11:53:35 +0000]
MIPS: BCM63xx: Convert timer locks to raw spinlocks.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

10 years agoMIPS: PowerTV: Convert IRQ controller lock to raw spinlock.
Ralf Baechle [Sat, 27 Feb 2010 11:53:34 +0000]
MIPS: PowerTV: Convert IRQ controller lock to raw spinlock.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Cc: David VomLehn <dvomlehn@cisco.com>

10 years agoMIPS: Malta: Convert IRQ controller lock to raw spinlock.
Ralf Baechle [Sat, 27 Feb 2010 11:53:32 +0000]
MIPS: Malta: Convert IRQ controller lock to raw spinlock.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

10 years agoMIPS: SB1480: Convert IRQ controller lock to raw spinlock.
Ralf Baechle [Sat, 27 Feb 2010 11:53:32 +0000]
MIPS: SB1480: Convert IRQ controller lock to raw spinlock.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

10 years agoMIPS: SB1250: Convert IRQ controller lock to raw spinlock.
Ralf Baechle [Sat, 27 Feb 2010 11:53:32 +0000]
MIPS: SB1250: Convert IRQ controller lock to raw spinlock.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

10 years agoMIPS: GT641xx: Convert IRQ controller lock to raw spinlock.
Ralf Baechle [Sat, 27 Feb 2010 11:53:31 +0000]
MIPS: GT641xx: Convert IRQ controller lock to raw spinlock.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

10 years agoMIPS: Jazz: Convert irq controller lock to raw spinlock.
Ralf Baechle [Sat, 27 Feb 2010 11:53:31 +0000]
MIPS: Jazz: Convert irq controller lock to raw spinlock.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

10 years agoMIPS: Make various locks static.
Ralf Baechle [Sat, 27 Feb 2010 11:53:30 +0000]
MIPS: Make various locks static.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

10 years agoStaging: Octeon: Remove /proc/octeon_ethernet_stats
David Daney [Wed, 17 Feb 2010 01:25:33 +0000]
Staging: Octeon: Remove /proc/octeon_ethernet_stats

This file shouldn't be in /proc, so we remove it.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
To: netdev@vger.kernel.org
To: gregkh@suse.de
Patchwork: http://patchwork.linux-mips.org/patch/970/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

10 years agoStaging: Octeon: Reformat a bunch of comments.
David Daney [Wed, 17 Feb 2010 01:25:32 +0000]
Staging: Octeon: Reformat a bunch of comments.

Many of the comments didn't follow kerneldoc guidlines.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
To: netdev@vger.kernel.org
To: gregkh@suse.de
Patchwork: http://patchwork.linux-mips.org/patch/971/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

10 years agoStaging: Octeon: Free transmit SKBs in a timely manner
David Daney [Mon, 15 Feb 2010 23:06:47 +0000]
Staging: Octeon:  Free transmit SKBs in a timely manner

If we wait for the once-per-second cleanup to free transmit SKBs,
sockets with small transmit buffer sizes might spend most of their
time blocked waiting for the cleanup.

Normally we do a cleanup for each transmitted packet.  We add a
watchdog type timer so that we also schedule a timeout for 150uS after
a packet is transmitted.  The watchdog is reset for each transmitted
packet, so for high packet rates, it never expires.  At these high
rates, the cleanups are done for each packet so the extra watchdog
initiated cleanups are neither needed nor triggered.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
To: netdev@vger.kernel.org
To: gregkh@suse.de
Cc: Eric Dumazet <eric.dumazet@gmail.com>
Patchwork: http://patchwork.linux-mips.org/patch/968/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

This version has spelling and comment changes based on feedback from
Eric Dumazet.

10 years agoMIPS: Octeon: Do proper acknowledgment of CIU timer interrupts.
David Daney [Mon, 15 Feb 2010 20:13:18 +0000]
MIPS: Octeon: Do proper acknowledgment of CIU timer interrupts.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
To: netdev@vger.kernel.org
To: gregkh@suse.de
Patchwork: http://patchwork.linux-mips.org/patch/967/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

10 years agoStaging: Octeon: Run phy bus accesses on a workqueue.
David Daney [Mon, 15 Feb 2010 20:13:17 +0000]
Staging: Octeon:  Run phy bus accesses on a workqueue.

When directly accessing a phy, we must acquire the mdio bus lock.  To
do that we cannot be in interrupt context, so we need to move these
operations to a workqueue.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
To: netdev@vger.kernel.org
To: gregkh@suse.de
Patchwork: http://patchwork.linux-mips.org/patch/965/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

10 years agoStaging: octeon: remove unneeded includes
David Daney [Mon, 15 Feb 2010 20:13:16 +0000]
Staging: octeon: remove unneeded includes

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
To: netdev@vger.kernel.org
To: gregkh@suse.de
Patchwork: http://patchwork.linux-mips.org/patch/964/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

10 years agoMIPS: Use generic ucontext.h
Yoichi Yuasa [Fri, 12 Feb 2010 12:35:04 +0000]
MIPS: Use generic ucontext.h

Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org>
Cc: linux-mips <linux-mips@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/959/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

10 years agoMIPS: Use generic serial.h
Yoichi Yuasa [Fri, 12 Feb 2010 12:33:56 +0000]
MIPS: Use generic serial.h

Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org>
Cc: linux-mips <linux-mips@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/960/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

10 years agoMIPS: Use generic parport.h
Yoichi Yuasa [Fri, 12 Feb 2010 12:29:14 +0000]
MIPS: Use generic parport.h

Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org>
Cc: linux-mips <linux-mips@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/958/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

10 years agoMIPS: Use generic current.h
Yoichi Yuasa [Fri, 12 Feb 2010 12:27:59 +0000]
MIPS: Use generic current.h

Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org>
Cc: linux-mips <linux-mips@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/957/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

10 years agoMIPS: Enable Read Inhibit/eXecute Inhibit for Octeon+ CPUs
David Daney [Wed, 10 Feb 2010 23:12:49 +0000]
MIPS: Enable Read Inhibit/eXecute Inhibit for Octeon+ CPUs

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/955/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

10 years agoMIPS: Give Octeon+ CPUs their own cputype.
David Daney [Wed, 10 Feb 2010 23:12:48 +0000]
MIPS: Give Octeon+ CPUs their own cputype.

This allows us to treat them differently at runtime.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/951/
Patchwork: http://patchwork.linux-mips.org/patch/987/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

10 years agoMIPS: Implement Read Inhibit/eXecute Inhibit
David Daney [Wed, 10 Feb 2010 23:12:47 +0000]
MIPS: Implement Read Inhibit/eXecute Inhibit

The SmartMIPS ASE specifies how Read Inhibit (RI) and eXecute Inhibit
(XI) bits in the page tables work.  The upper two bits of EntryLo{0,1}
are RI and XI when the feature is enabled in the PageGrain register.
SmartMIPS only covers 32-bit systems.  Cavium Octeon+ extends this to
64-bit systems by continuing to place the RI and XI bits in the top of
EntryLo even when EntryLo is 64-bits wide.

Because we need to carry the RI and XI bits in the PTE, the layout of
the PTE is changed.  There is a two instruction overhead in the TLB
refill hot path to get the EntryLo bits into the proper position.
Also the TLB load exception has to probe the TLB to check if RI or XI
caused the exception.

Also of note is that the layout of the PTE bits is done at compile and
runtime rather than statically.  In the 32-bit case this allows for
the same number of PFN bits as before the patch as the _PAGE_HUGE is
not supported in 32-bit kernels (we have _PAGE_NO_EXEC and
_PAGE_NO_READ instead of _PAGE_READ and _PAGE_HUGE).

The patch is tested on Cavium Octeon+, but should also work on 32-bit
systems with the Smart-MIPS ASE.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/952/
Patchwork: http://patchwork.linux-mips.org/patch/956/
Patchwork: http://patchwork.linux-mips.org/patch/962/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

10 years agoMIPS: Add TLBR and ROTR to uasm.
David Daney [Wed, 10 Feb 2010 23:12:46 +0000]
MIPS: Add TLBR and ROTR to uasm.

The soon to follow Read Inhibit/eXecute Inhibit patch needs TLBR and
ROTR support in uasm.  We also add a UASM_i_ROTR macro.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/953/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

10 years agoMIPS: Add accessor functions and bit definitions for c0_PageGrain
David Daney [Wed, 10 Feb 2010 23:12:45 +0000]
MIPS: Add accessor functions and bit definitions for c0_PageGrain

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/950/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

10 years agoMIPS: Use 64-bit stores to c0_entrylo on 64-bit kernels.
David Daney [Wed, 10 Feb 2010 23:12:44 +0000]
MIPS: Use 64-bit stores to c0_entrylo on 64-bit kernels.

64-bit CPUs have 64-bit c0_entrylo{0,1} registers.  We should use the
64-bit dmtc0 instruction to set them.  This becomes important if we
want to set the RI and XI bits present in some processors.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/954/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

10 years agoMIPS: Remove trailing space in messages
Frans Pop [Sat, 6 Feb 2010 17:47:13 +0000]
MIPS: Remove trailing space in messages

Signed-off-by: Frans Pop <elendil@planet.nl>
To: linux-kernel@vger.kernel.org
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/946/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

10 years agoMIPS: Make the debugging of compressed kernel configurable
Wu Zhangjin [Sun, 31 Jan 2010 12:39:40 +0000]
MIPS: Make the debugging of compressed kernel configurable

This patch adds a new DEBUG_ZBOOT option to allow the users to enable it
to debug the compressed kernel support for a new board and this optoin
should be disabled to reduce the kernel image size and speed up the
kernel booting procedure when the compressed kernel support is stable.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
To: Ralf Baechle <ralf@linux-mips.org>
Cc: Manuel Lauss <manuel.lauss@googlemail.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/918/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

10 years agoMIPS: Remove #if 0 r4k_update_mmu_cache_hwbug
David Daney [Wed, 3 Feb 2010 01:19:38 +0000]
MIPS: Remove #if 0 r4k_update_mmu_cache_hwbug

The function is #if 0ed out.  There are no other occurrences of its
name in the tree.  It is safe to remove.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/936/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

10 years agoMIPS: TXx9: Remove forced serial console setting
Yoichi Yuasa [Tue, 2 Feb 2010 09:40:04 +0000]
MIPS: TXx9: Remove forced serial console setting

It is not always used, even if it is available.

Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org>
Cc: linux-mips <linux-mips@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/933/
Acked-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

10 years agoMIPS: AR7: Make ar7_register_devices much more durable
Alexander Clouter [Sun, 31 Jan 2010 19:39:57 +0000]
MIPS: AR7: Make ar7_register_devices much more durable

[Ralf: Fixed up the rejects and changed all the new printk(KERN_...); to
pr_xxx() as suggested by Wu.]

Signed-off-by: Alexander Clouter <alex@digriz.org.uk>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/920/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

10 years agoMIPS: AR7: Fix USB slave mem range typo
Alexander Clouter [Sun, 31 Jan 2010 19:38:52 +0000]
MIPS: AR7: Fix USB slave mem range typo

Signed-off-by: Alexander Clouter <alex@digriz.org.uk>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/919/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

10 years agoMIPS: AR7: Whitespace hacking
Alexander Clouter [Sun, 31 Jan 2010 19:38:19 +0000]
MIPS: AR7: Whitespace hacking

[Ralf: Fixed up reject and Wu's complaints about comment style.]

Signed-off-by: Alexander Clouter <alex@digriz.org.uk>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/921/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

10 years agoMIPS: Alchemy: Use strlcat() for the command line arguments
Yoichi Yuasa [Mon, 1 Feb 2010 13:06:56 +0000]
MIPS: Alchemy: Use strlcat() for the command line arguments

Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org>
Cc: linux-mips <linux-mips@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/928/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

10 years agoMIPS: Alchemy: Remove prom_getcmdline()
Yoichi Yuasa [Mon, 1 Feb 2010 13:05:57 +0000]
MIPS: Alchemy: Remove prom_getcmdline()

Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org>
Cc: linux-mips <linux-mips@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/927/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

10 years agoMIPS: Alchemy: Remove forced command line setting
Yoichi Yuasa [Fri, 29 Jan 2010 08:49:52 +0000]
MIPS: Alchemy: Remove forced command line setting

It is not always used, even if it is available.

Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org>
Cc: linux-mips <linux-mips@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/893/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

10 years agoMIPS: Set __elf_platform for Octeon.
David Daney [Fri, 29 Jan 2010 00:52:13 +0000]
MIPS: Set __elf_platform for Octeon.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/892/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

10 years agoMIPS: Allow the auxv's elf_platform entry to be set.
David Daney [Fri, 29 Jan 2010 00:52:12 +0000]
MIPS: Allow the auxv's elf_platform entry to be set.

The userspace runtime linker uses the elf_platform to find the libraries
optimized for the current CPU archecture variant.  First we need to allow it
to be set to something other than NULL.  Follow-on patches will set some
values for specific CPUs.

GLIBC already does the right thing.  The kernel just needs to supply good
data.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/891/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

10 years agoMMC: AU1xMMC: Allow platforms to disable host capabilities
Manuel Lauss [Wed, 14 Oct 2009 07:38:06 +0000]
MMC: AU1xMMC: Allow platforms to disable host capabilities

Although the hardware supports a 4/8bit SD interface and the driver
unconditionally advertises all hardware caps to the MMC core, not all
datalines may actually be wired up.  This patch introduces another
field to au1xmmc platform data allowing platforms to disable certain
advanced host controller features.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
To: linux-mmc@vger.kernel.org
CC: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/460/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

10 years agoMIPS: Deal with larger physical offsets
Florian Fainelli [Thu, 28 Jan 2010 14:22:37 +0000]
MIPS: Deal with larger physical offsets

AR7 has a larger physical offset than other MIPS based systems and therefore
needs to setup its handlers beyond the usual KSEG0 range. When running the
kernel in mapped mode this modification is also required. Remove function
comment which is now incorrect.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Signed-off-by: Eugene Konev <ejka@imfi.kspu.ru>
Signed-off-by: Florian Fainelli <florian@openwrt.org>
To: linux-mips@linux-mips.org
To: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/889/
Patchwork: http://patchwork.linux-mips.org/patch/932/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

10 years agoMIPS: Annotate set_except_vector with __init
Florian Fainelli [Thu, 28 Jan 2010 14:21:42 +0000]
MIPS: Annotate set_except_vector with __init

All call sites of set_except_vector are already annotated with __init, so
annotate that one too.

Signed-off-by: Regards, Florian Fainelli <florian@openwrt.org>
To: linux-mips@linux-mips.org
To: David Daney <ddaney@caviumnetworks.com>
Patchwork: http://patchwork.linux-mips.org/patch/888/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

10 years agoMIPS: Move arch/mips/mm/uasm.h to arch/mips/include/asm/uasm.h
Florian Fainelli [Thu, 28 Jan 2010 14:21:24 +0000]
MIPS: Move arch/mips/mm/uasm.h to arch/mips/include/asm/uasm.h

Signed-off-by: Florian Fainelli <florian@openwrt.org>
To: linux-mips@linux-mips.org
To: David Daney <ddaney@caviumnetworks.com>
Patchwork: http://patchwork.linux-mips.org/patch/887/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

10 years agoMIPS: PNX8550: Remove unnecessary export prom_getcmdline()
Yoichi Yuasa [Thu, 28 Jan 2010 13:52:50 +0000]
MIPS: PNX8550: Remove unnecessary export prom_getcmdline()

Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org>
Cc: linux-mips <linux-mips@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/886/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

10 years agoMIPS: PNX833x: Remove unused prom_getcmdline()
Yoichi Yuasa [Thu, 28 Jan 2010 13:51:50 +0000]
MIPS: PNX833x: Remove unused prom_getcmdline()

Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org>
Cc: linux-mips <linux-mips@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/885/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

10 years agoMIPS: Support 36-bit iomem on 32-bit Au1x00
pascal@pabr.org [Sun, 3 Jan 2010 12:39:12 +0000]
MIPS: Support 36-bit iomem on 32-bit Au1x00

I believe these changes are needed on Alchemy SoCs in order to
use iomem above 4G with the usual platform_device machinery:

- Set CONFIG_ARCH_PHYS_ADDR_T_64BIT to make resource_size_t 64-bit.
- Increase IOMEM_RESOURCE_END so that platforms can register resources.

To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/814/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

10 years agoMIPS: Loongson: Cleanup the halt and poweroff action
Wu Zhangjin [Wed, 27 Jan 2010 14:39:46 +0000]
MIPS: Loongson: Cleanup the halt and poweroff action

In the old source code, I have let halt and poweroff do the same action,
but in reality, they have different meanings.

As the manpage of shutdown shows:

-r     Reboot after shutdown.
-H     Halt action is to halt or drop into boot monitor on systems that support it.
-P     Halt action is to turn off the power.

and in the real world, some machines(e.g. NAS) did not provide a power
button and the shutdown works as reset, so, we need to provide a
mechanism to let the users turn off the power safely without breaking
the system, such a mechanism is "halt", which only put the system into a
dead loop or a power-save mode and print some information to the screen
to tell the users to turn off the power safely.

$ shutdown -hH now /* loongson_halt, not turn off the power */
$ shutdown -hP now /* loongson_poweroff, work as poweroff */

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Tested-by: Liu Shiwei <liushiwei@gmail.com>
Cc: Liu Shiwei <liushiwei@gmail.com>
Cc: linux-mips <linux-mips@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/883/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

10 years agoMIPS: Simplify the weak annotation with __weak
Wu Zhangjin [Tue, 26 Jan 2010 15:02:34 +0000]
MIPS: Simplify the weak annotation with __weak

Found by

$ find arch/mips/ -name "*.c" | xargs -i grep -H weak {} | grep -v __weak

[Ralf: Made this bulletproof by including <linux/compiler.h>]

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/874/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

10 years agoMIPS: Alchemy: debug output for compressed kernels
Manuel Lauss [Wed, 13 Jan 2010 17:46:58 +0000]
MIPS: Alchemy: debug output for compressed kernels

Hook up the compressed debug output for all Alchemy systems supported
by current kernel codebase.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Cc: Wu Zhangjin <wuzhangjin@gmail.com>
Patchwork: http://patchwork.linux-mips.org/patch/879/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

10 years agoMIPS: AR7: Implement clock API
Florian Fainelli [Wed, 27 Jan 2010 08:10:06 +0000]
MIPS: AR7: Implement clock API

This patch makes the ar7 clock code implement the Linux clk API. Drivers
using the various clocks available in the SoC are updated accordingly.

Signed-off-by: Florian Fainelli <florian@openwrt.org>
Acked-by: Wim Van Sebroeck <wim@iguana.be>
To: linux-mips@linux-mips.org
Cc: Wim Van Sebroeck <wim@iguana.be>
Cc: netdev@vger.kernel.org
Cc: David Miller <davem@davemloft.net>
Patchwork: http://patchwork.linux-mips.org/patch/881/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

10 years agoMIPS: AR7: Implement gpiolib
Florian Fainelli [Sun, 3 Jan 2010 20:16:51 +0000]
MIPS: AR7: Implement gpiolib

This patch implements gpiolib for the AR7 SoC.

Signed-off-by: Florian Fainelli <florian@openwrt.org>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/816/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

10 years agoMIPS: msp71xx: remove unused prom_getcmdline()
Yoichi Yuasa [Tue, 26 Jan 2010 09:02:58 +0000]
MIPS: msp71xx: remove unused prom_getcmdline()

Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org>
Cc: linux-mips <linux-mips@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/868/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

10 years agoMIPS: Cleanup the Makefile of compressed kernel support
Wu Zhangjin [Tue, 26 Jan 2010 09:04:02 +0000]
MIPS: Cleanup the Makefile of compressed kernel support

This patch removes a useless "\" (line break) and tunes the format of a
long line.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/869/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

10 years agoMIPS: AR7: replace prom_getcmdline() to arcs_cmdline[]
Yoichi Yuasa [Tue, 26 Jan 2010 09:08:34 +0000]
MIPS: AR7: replace prom_getcmdline() to arcs_cmdline[]

Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org>
Cc: linux-mips <linux-mips@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/872/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

10 years agoMIPS: AR7: use strlcat() for the command line arguments
Yoichi Yuasa [Tue, 26 Jan 2010 09:07:02 +0000]
MIPS: AR7: use strlcat() for the command line arguments

Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org>
Cc: linux-mips <linux-mips@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/871/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

10 years agoMIPS: Nuke trailing blank lines
Ralf Baechle [Sat, 27 Feb 2010 11:53:14 +0000]
MIPS: Nuke trailing blank lines

Recent git versions now warn about those and they've always been a bit of
an annoyance.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

10 years agoMIPS: Cleanup switches with cases that can be merged
Roel Kluin [Tue, 19 Jan 2010 23:59:27 +0000]
MIPS: Cleanup switches with cases that can be merged

Signed-off-by: Roel Kluin <roel.kluin@gmail.com>
To: linux-mips@linux-mips.org
To: Andrew Morton <akpm@linux-foundation.org>
To: LKML <linux-kernel@vger.kernel.org>
Patchwork: http://patchwork.linux-mips.org/patch/860/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

10 years agoMIPS: Decode c0_config4 for large TLBs.
David Daney [Fri, 22 Jan 2010 22:41:15 +0000]
MIPS: Decode c0_config4 for large TLBs.

For processors that have more than 64 TLBs, we need to decode both
config1 and config4 to determine the total number TLBs.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/866/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

10 years agoMIPS: Remove probe_tlb().
David Daney [Fri, 22 Jan 2010 22:41:14 +0000]
MIPS: Remove probe_tlb().

The function probe_tlb() only does anything for processors that are
not PRID_COMP_LEGACY.  This is precisely the set of processors for
which decode_configs() is called to do identical tlbsize probing
calculations.  Therefore probe_tlb() is completely redundant and may
be removed.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/865/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

10 years agoMIPS: add readl/write_be accessors
Florian Fainelli [Wed, 16 Dec 2009 10:29:06 +0000]
MIPS: add readl/write_be accessors

MIPS currently lacks the readl_be and writel_be accessors
which are required by BCM63xx for OHCI and EHCI support.
Let's define them globally for MIPS. This also fixes the
compilation of the bcm63xx defconfig against USB.

Signed-off-by: Florian Fainelli <ffainelli@freebox.fr>
Cc: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Cc: linux-mips@linux-mips.org
Cc: Maxime Bizon <mbizon@freebox.fr>
Patchwork: http://patchwork.linux-mips.org/patch/793/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

10 years agoMIPS: Loongson: Lemote-2F: update defconfig
Wu Zhangjin [Mon, 4 Jan 2010 09:16:52 +0000]
MIPS: Loongson: Lemote-2F: update defconfig

Changes:

  o Serial port related configuration
    Disable EARLY_PRINTK, CONFIG_SYS_SUPPORTS_ZBOOT_UART16550
    Enable the serial port support as module.
  o PM related support
    Enable CPUFreq as module, use the external timer(MFGPT) instead of
    r4k timer.
    Enable Suspend support
    Enable Run Time PM support
  o Enable SM7XX Video Driver
    Disable the buggy 2d acceleration
  o Enable CONFIG_OPROFILE as module
  o Use GZIP instead of LZMA, which need less decompression time
  o Enable more USB devices support
  o Enable initrd support(needed by gNewsense)
  o Enable more crypto support

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: yanh@lemote.com
Cc: huhb@lemote.com
Cc: zhangfx@lemote.com
Patchwork: http://patchwork.linux-mips.org/patch/830/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

10 years agoMIPS: Loongson: Change the Email address of Wu Zhangjin
Wu Zhangjin [Mon, 4 Jan 2010 09:16:51 +0000]
MIPS: Loongson: Change the Email address of Wu Zhangjin

Currently wuzj@lemote.com is not usable; change it to wuzhangjin@gmail.com.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: yanh@lemote.com
Cc: huhb@lemote.com
Cc: zhangfx@lemote.com
Patchwork: http://patchwork.linux-mips.org/patch/829/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

10 years agoMIPS: Loongson: Fixup mem.c indentation
Wu Zhangjin [Mon, 4 Jan 2010 09:16:50 +0000]
MIPS: Loongson: Fixup mem.c indentation

Replace whitespace by tabs.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: yanh@lemote.com
Cc: huhb@lemote.com
Cc: zhangfx@lemote.com
Patchwork: http://patchwork.linux-mips.org/patch/828/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

10 years agoMIPS: Loongson: arch/mips/Makefile: Add missing whitespace
Wu Zhangjin [Mon, 4 Jan 2010 09:16:49 +0000]
MIPS: Loongson: arch/mips/Makefile: Add missing whitespace

This patch add missing whitespace after every "+=" in the loongson
related part of arch/mips/Makefile.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: yanh@lemote.com
Cc: huhb@lemote.com
Cc: zhangfx@lemote.com
Patchwork: http://patchwork.linux-mips.org/patch/827/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

10 years agoMIPS: Loongson: Cleanup of the environment variables
Wu Zhangjin [Mon, 4 Jan 2010 09:16:48 +0000]
MIPS: Loongson: Cleanup of the environment variables

Changes:

o Move bus_clock into prom_init_env()
o Initialize the cpu_clock_freq to the default values for the
correspoding processor revisions if no such environment variable
passed by BIOS/Bootloader.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: yanh@lemote.com
Cc: huhb@lemote.com
Cc: zhangfx@lemote.com
Patchwork: http://patchwork.linux-mips.org/patch/826/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

10 years agoMIPS: Loongson: Move prom_argc and prom_argv into prom_init_cmdline()
Wu Zhangjin [Mon, 4 Jan 2010 09:16:47 +0000]
MIPS: Loongson: Move prom_argc and prom_argv into prom_init_cmdline()

prom_argc and prom_argv are only used by prom_init_cmdline(), move them
into the function.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: yanh@lemote.com
Cc: huhb@lemote.com
Cc: zhangfx@lemote.com
Patchwork: http://patchwork.linux-mips.org/patch/825/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

10 years agoMIPS: Loongson: Remove the serial port output of compressed kernel support
Wu Zhangjin [Mon, 4 Jan 2010 09:16:46 +0000]
MIPS: Loongson: Remove the serial port output of compressed kernel support

The compressed kernel support on loongson family machines is stable now,
so, remove the debug information via using SYS_SUPPORTS_ZBOOT instead of
SYS_SUPPORTS_ZBOOT_UART16550. This may reduce the image size and speedup
the booting.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: yanh@lemote.com
Cc: huhb@lemote.com
Cc: zhangfx@lemote.com
Patchwork: http://patchwork.linux-mips.org/patch/824/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

10 years agoMIPS: Loongson: Convert loongson_halt() to use unreachable()
Wu Zhangjin [Mon, 4 Jan 2010 09:16:45 +0000]
MIPS: Loongson: Convert loongson_halt() to use unreachable()

Use the new unreachable() macro instead of while(1);

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: yanh@lemote.com
Cc: huhb@lemote.com
Cc: zhangfx@lemote.com
Patchwork: http://patchwork.linux-mips.org/patch/823/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

10 years agoMIPS: Loongson: Lemote-2F: USB: Not Emulate Non-Posted Writes
Wu Zhangjin [Mon, 4 Jan 2010 09:16:44 +0000]
MIPS: Loongson: Lemote-2F: USB: Not Emulate Non-Posted Writes

Without this patch, when copying large amounts of data between the USB
storage devices and the hard disk, the USB device will disconnect
regularly.

Signed-off-by: Hu Hongbing <huhb@lemote.com>
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: yanh@lemote.com
Cc: huhb@lemote.com
Cc: zhangfx@lemote.com
Patchwork: http://patchwork.linux-mips.org/patch/822/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

10 years agoMIPS: Loongson: Lemote-2F: Get the machine type from PMON_VER
Wu Zhangjin [Mon, 4 Jan 2010 09:16:43 +0000]
MIPS: Loongson: Lemote-2F: Get the machine type from PMON_VER

Lemote have used the PMON_VER strings to indicate the loongson-2f
machine series:

  PMON_VER=LM8089 Lemote 8.9'' netbook
           LM8101 Lemote 10.1'' netbook
  (The above two netbooks have the same kernel support)
         LM6XXX Lemote FuLoong(2F) box series
         LM9XXX Lemote LynLoong PC series

Before the machtype is supported by the PMON, we can get the machine
type from the PMON_VER for these machines, this will help the users a
lot.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: yanh@lemote.com
Cc: huhb@lemote.com
Cc: zhangfx@lemote.com
Cc: Wu Zhangjin <wuzhangjin@gmail.com>
Patchwork: http://patchwork.linux-mips.org/patch/821/
Patchwork: http://patchwork.linux-mips.org/patch/908/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

10 years agoStaging: Octeon Ethernet: Use constants from in.h
David Daney [Thu, 7 Jan 2010 19:05:06 +0000]
Staging: Octeon Ethernet: Use constants from in.h

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
To: gregkh@suse.de
Patchwork: http://patchwork.linux-mips.org/patch/837/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

10 years agoStaging: Octeon Ethernet: Enable scatter-gather.
David Daney [Thu, 7 Jan 2010 19:05:05 +0000]
Staging: Octeon Ethernet: Enable scatter-gather.

Octeon ethernet hardware can handle NETIF_F_SG, so we enable it.

A gather list of up to six fragments will fit in the SKB's CB
structure, so no extra memory is required.  If a SKB has more than six
fragments, we must linearize it.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
To: gregkh@suse.de
Patchwork: http://patchwork.linux-mips.org/patch/838/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

10 years agoStaging: Octeon Ethernet: Convert to NAPI.
David Daney [Thu, 7 Jan 2010 19:05:04 +0000]
Staging: Octeon Ethernet: Convert to NAPI.

Convert the driver to be a reasonably well behaved NAPI citizen.

There is one NAPI instance per CPU shared between all input ports.  As
receive backlog increases, NAPI is scheduled on additional CPUs.

Receive buffer refill code factored out so it can also be called from
the periodic timer.  This is needed to recover from temporary buffer
starvation conditions.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
To: gregkh@suse.de
Patchwork: http://patchwork.linux-mips.org/patch/839/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

10 years agoStaging: Octeon Ethernet: Rewrite transmit code.
David Daney [Thu, 7 Jan 2010 19:05:03 +0000]
Staging: Octeon Ethernet: Rewrite transmit code.

Stop the queue if too many packets are queued.  Restart it from a high
resolution timer.

Rearrange and simplify locking and SKB freeing code

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
To: gregkh@suse.de
Patchwork: http://patchwork.linux-mips.org/patch/843/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

10 years agoStaging: Octeon Ethernet: Fix memory allocation.
David Daney [Wed, 27 Jan 2010 21:22:53 +0000]
Staging: Octeon Ethernet: Fix memory allocation.

After aligning the blocks returned by kmalloc, we need to save the original
pointer so they can be correctly freed.

There are no guarantees about the alignment of SKB data, so we need to
handle worst case alignment.

Since right shifts over subtraction have no distributive property, we need
to fix the back pointer calculation.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/884/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

10 years agoStaging: Octeon Ethernet: Remove unused code.
David Daney [Thu, 7 Jan 2010 19:05:01 +0000]
Staging: Octeon Ethernet: Remove unused code.

Remove unused code, reindent, and join some spilt strings.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
To: gregkh@suse.de
Patchwork: http://patchwork.linux-mips.org/patch/842/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

10 years agoMIPS: Octeon: Fix EOI handling.
David Daney [Thu, 7 Jan 2010 19:05:00 +0000]
MIPS: Octeon: Fix EOI handling.

If an interrupt handler disables interrupts, the EOI function will
just reenable them.  This will put us in an endless loop when the
upcoming Ethernet driver patches are applied.

Only reenable the interrupt on EOI if it is not IRQ_DISABLED.  This
requires that the EOI function be separate from the ENABLE function.
We also rename the ACK functions to correspond with their function.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
To: gregkh@suse.de
Patchwork: http://patchwork.linux-mips.org/patch/840/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

10 years agoMIPS: Octeon: Use optimized memory barrier primitives.
David Daney [Sat, 9 Jan 2010 01:17:44 +0000]
MIPS: Octeon: Use optimized memory barrier primitives.

In order to achieve correct synchronization semantics, the Octeon port
had defined CONFIG_WEAK_REORDERING_BEYOND_LLSC.  This resulted in code
that looks like:

   sync
   ll ...
   .
   .
   .
   sc ...
   .
   .
   sync

The second SYNC was redundant, but harmless.

Octeon has a SYNCW instruction that acts as a write-memory-barrier
(due to an erratum in some parts two SYNCW are used).  It is much
faster than SYNC because it imposes ordering on the writes, but
doesn't otherwise stall the execution pipeline.  On Octeon, SYNC
stalls execution until all preceeding writes are committed to the
coherent memory system.

Using:

    syncw;syncw
    ll
    .
    .
    .
    sc
    .
    .

Has identical semantics to the first sequence, but is much faster.
The SYNCW orders the writes, and the SC will not complete successfully
until the write is committed to the coherent memory system.  So at the
end all preceeding writes have been committed.  Since Octeon does not
do speculative reads, this functions as a full barrier.

The patch removes CONFIG_WEAK_REORDERING_BEYOND_LLSC, and substitutes
SYNCW for SYNC in write-memory-barriers.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/850/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>