6 years agoARM: defconfigs: Enable Tegra profiler
Igor Nabirushkin [Tue, 16 Jul 2013 14:45:34 +0000]
ARM: defconfigs: Enable Tegra profiler

Enable Tegra profiler for Tegra platforms

Bug 1312406

Change-Id: I8e617a3f87b62d41800a059e6031533f12c342f4
Signed-off-by: Igor Nabirushkin <inabirushkin@nvidia.com>
Reviewed-on: http://git-master/r/249722
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Andrey Trachenko <atrachenko@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: Andrey Trachenko <atrachenko@nvidia.com>
Reviewed-by: Bo Yan <byan@nvidia.com>

6 years agoARM: tegra11: clock: Move auto-refresh control to CCFIFO
Alex Frid [Sun, 19 May 2013 06:23:27 +0000]
ARM: tegra11: clock: Move auto-refresh control to CCFIFO

Disabled/Enabled auto-refresh during EMC clock change using CCFIFO
mechanism.

Bug 1339693

Change-Id: I00fc1cc4fe4668ed84c1e7a4e105ebbb684b0ca5
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/230986
GVS: Gerrit_Virtual_Submit
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

6 years agommc: host: simplify boost mode interface
Philip Rakity [Mon, 5 Aug 2013 21:05:26 +0000]
mmc: host: simplify boost mode interface

echo 1 > cmd_state # to set normal voltage
echo 2 > cmd_state # to set high voltage

   1 to set normal voltage
    echo 1 > /sys/devices/platform/sdhci-tegra.0/cmd_state
    echo 1 > /sys/devices/platform/sdhci-tegra.2/cmd_state
    echo 1 > /sys/devices/platform/sdhci-tegra.3/cmd_state

    2 to set high voltage
    echo 2 > /sys/devices/platform/sdhci-tegra.0/cmd_state
    echo 2 > /sys/devices/platform/sdhci-tegra.2/cmd_state
    echo 2 > /sys/devices/platform/sdhci-tegra.3/cmd_state

echo 0 command is no longer used
echo 3 command is no longer used

Bug 1329643

Change-Id: I21c0b5ae82e0ff0d940cbe2182c5f2bae6af304f
Signed-off-by: Philip Rakity <prakity@nvidia.com>
Reviewed-on: http://git-master/r/258314
Reviewed-by: Andy Carman <acarman@nvidia.com>
Tested-by: Andy Carman <acarman@nvidia.com>
Reviewed-by: Venkata (Muni) Anda <vanda@nvidia.com>
Reviewed-by: Rick Song <ricks@nvidia.com>
GVS: Gerrit_Virtual_Submit

6 years agommc: host: High Voltage Support
Philip Rakity [Wed, 24 Jul 2013 16:12:06 +0000]
mmc: host: High Voltage Support

Implement high voltage support using sysfs

3 stage commit
a) suspend controller
b) set voltage
c) resume controller

echo 0 > cmd_state
This will put controller in a suspended state

set voltage (echo 1 > cmd_state or echo 2 > cmd_state)

once this is done then
echo 3 > cmd_state
to start controller.

Note: The controller needs to be suspended because switching
the voltage when i/o is active may result in CRC or other errors

The following example refer to the interfaces on pluto

0 to suspend controller
echo 0 > /sys/devices/platform/sdhci-tegra.0/cmd_state
echo 0 > /sys/devices/platform/sdhci-tegra.2/cmd_state
echo 0 > /sys/devices/platform/sdhci-tegra.3/cmd_state

1 to set normal voltage
echo 1 > /sys/devices/platform/sdhci-tegra.0/cmd_state
echo 1 > /sys/devices/platform/sdhci-tegra.2/cmd_state
echo 1 > /sys/devices/platform/sdhci-tegra.3/cmd_state

2 to set high voltage
echo 2 > /sys/devices/platform/sdhci-tegra.0/cmd_state
echo 2 > /sys/devices/platform/sdhci-tegra.2/cmd_state
echo 2 > /sys/devices/platform/sdhci-tegra.3/cmd_state

3 to resume the controller after the voltage change
echo 3 > /sys/devices/platform/sdhci-tegra.0/cmd_state
echo 3 > /sys/devices/platform/sdhci-tegra.2/cmd_state
echo 3 > /sys/devices/platform/sdhci-tegra.3/cmd_state

based on
http://git-master/r/#change,251897
http://git-master/r/#change,250897
http://git-master/r/#change,252471

Includes code review changes suggested by Pavan

Bug 1329643

Change-Id: If38615b09704e73fc65e2dd0e6bc51c726d1fbc9
Signed-off-by: Philip Rakity <prakity@nvidia.com>
Signed-off-by: Andy Carman <acarman@nvidia.com>
Reviewed-on: http://git-master/r/252960
Reviewed-by: Venkata (Muni) Anda <vanda@nvidia.com>
Reviewed-by: Rick Song <ricks@nvidia.com>
GVS: Gerrit_Virtual_Submit

6 years agoregulator: palmas: add turn ON time for LDOs
Laxman Dewangan [Tue, 4 Jun 2013 14:53:48 +0000]
regulator: palmas: add turn ON time for LDOs

Palmas' LDO take 100 to 500us for turning it ON.
Add the enable time for LDOs.

bug 1289898

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/235483
(cherry picked from commit 62402fff39ee70744b06062324722564895caf59)

bug 1317941

Change-Id: I8a8aeee04d2a53443e7281f3e066cf51cd5c17b2
Signed-off-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-on: http://git-master/r/258712
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

6 years agomedia:video:tegra: Add Fuse ID read for IMX132.
Amey Asgaonkar [Fri, 26 Jul 2013 23:08:14 +0000]
media:video:tegra: Add Fuse ID read for IMX132.

Adds support for reading fuse ids for IMX132 sensor.

Bug 1307361

Change-Id: I7b750a91d3ead5fac383e85df013b78d7fe4c6a2
Signed-off-by: Amey Asgaonkar <aasgaonkar@nvidia.com>
Reviewed-on: http://git-master/r/254573
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Frank Chen <frankc@nvidia.com>
Reviewed-by: Philip Breczinski <pbreczinski@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agoarm: tegra: soctherm: enable throttling and shutdown on GPU zone
Diwakar Tundlam [Sun, 17 Feb 2013 08:20:25 +0000]
arm: tegra: soctherm: enable throttling and shutdown on GPU zone

Enabled throttling and shutdown on GPU zone for TegraTab platform.

Bug 1169070
Bug 1200077

Change-Id: I072af5aae0d23af93e3f8dcffdc25b476a723f1f
Reviewed-on: http://git-master/r/255341
(cherry picked from commit 4cddb9c4646fb17a3ccbd968aef8b53974f589c4)
Signed-off-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-on: http://git-master/r/257695

6 years agopower: sbs-battery: Update battery properties only on change
Darbha Sriharsha [Fri, 2 Aug 2013 15:22:41 +0000]
power: sbs-battery: Update battery properties only on change

Call the power_supply_changed work only if battery SOC
reading or power supply status has changed

Bug 1223793

Change-Id: I929df2787fe33e526499e3a762e9adbfea4da8d1
Signed-off-by: Darbha Sriharsha <dsriharsha@nvidia.com>
Reviewed-on: http://git-master/r/257587
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

6 years agoCamera: driver: Added getting exposure time API into ov7695 yuv sensor driver
Alvin Park [Thu, 25 Jul 2013 06:42:08 +0000]
Camera: driver: Added getting exposure time API into ov7695 yuv sensor driver

Added getting exposure time API into ov7695 yuv sensor driver

Bug 1330342

(cherry picked from commit 56640855c05e3cee0ecaacfe2b789cb5df87bffc)
Change-Id: I745f893bfde153bc02479154072a8d66c84705e2

Signed-off-by: Alvin Park <apark@nvidia.com>
Change-Id: I4ef4d2a0987e727853132b70b245fedd6d5aca31
Reviewed-on: http://git-master/r/255529
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: David Schalig <dschalig@nvidia.com>
Reviewed-by: Peter Kim <pekim@nvidia.com>
Reviewed-by: Sean Pieper <spieper@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

6 years agommc: tegra: cardhu: set correct parent
Bibek Basu [Fri, 5 Jul 2013 05:27:33 +0000]
mmc: tegra: cardhu: set correct parent

sdhci can have parent as pll_p only as pll_c is
scalable and not available in T30 for sdhci

Bug 1306032

Change-Id: I3c5dfbfd554ca54a2dd48997828378e9f8a107b9
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/245261
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Kiran Adduri <kadduri@nvidia.com>
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>

6 years agoARM: tegra: pluto: adjust core voltage
Andy Carman [Fri, 2 Aug 2013 01:02:50 +0000]
ARM: tegra: pluto: adjust core voltage

use tegra_dvfs_rail_get_boot_level

bug 1329659

Signed-off-by: Andy Carman <acarman@nvidia.com>
Change-Id: I9c24b25fcb7216575a710d5fb775de6c96182e3b
Reviewed-on: http://git-master/r/257193
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Venkata (Muni) Anda <vanda@nvidia.com>
Reviewed-by: Venkata (Muni) Anda <vanda@nvidia.com>
Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com>

6 years agomfd: tps65090: do not provide num_reg_defaults_raw for regmap init
Laxman Dewangan [Thu, 1 Aug 2013 13:32:38 +0000]
mfd: tps65090: do not provide num_reg_defaults_raw for regmap init

There is no default data for tps65090 which is provided during
regmap init and hence it is not require to provide the information
about .num_reg_defaults_raw for caching. Cachign of register will
be done during access of registers.

This will avoid the warning
tps65090 4-0048: No cache defaults, reading back from HW

bug 1249589

Change-Id: Ida19a1fe8bdb9958db993f5506d92fb1655a03fb
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/256858
GVS: Gerrit_Virtual_Submit

6 years agoarm: pluto: power: AP40X add sysedp corecap table
Rick Song [Wed, 31 Jul 2013 18:02:10 +0000]
arm: pluto: power: AP40X add sysedp corecap table

For AP40x, use alternate corecap table for
gpu favor mode

Bug 1339878
Bug 1329643

Change-Id: Iceca82b36a4d17dc00d8e63c45591f0020f385ab
Signed-off-by: Rick Song <ricks@nvidia.com>
Reviewed-on: http://git-master/r/256432
Reviewed-by: Andy Carman <acarman@nvidia.com>
Tested-by: Andy Carman <acarman@nvidia.com>
Reviewed-by: Venkata (Muni) Anda <vanda@nvidia.com>
Tested-by: Venkata (Muni) Anda <vanda@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Vandana Bansal <vandanab@nvidia.com>

6 years agoEDP: tegra: AP40X add option for core cap table
Rick Song [Wed, 31 Jul 2013 05:54:19 +0000]
EDP: tegra: AP40X add option for core cap table

ap40x, add option to select different sysedp core cap table

SYS_EDP_PROFILE_NORMAL: sysedp core cap table
SYS_EDP_PROFILE_FAVOR_GPU: sysedp core cap alternate

Bug 1329643
Bug 1339878

Change-Id: I3226205f0ad5a53d7985d351fbb8e5b26272bad9
Signed-off-by: Rick Song <ricks@nvidia.com>
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-on: http://git-master/r/256138
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Andy Carman <acarman@nvidia.com>
Tested-by: Andy Carman <acarman@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-by: Vandana Bansal <vandanab@nvidia.com>

6 years agoinput: misc: Fix self-test
Erik Lilliebjerg [Mon, 29 Jul 2013 18:42:18 +0000]
input: misc: Fix self-test

- Fix self-test HW restore after test.
- Fix register write failures due to PM cycle mode.

Bug 1327608
Bug 1313284
Bug 1311053
Bug 1315609

Change-Id: I9b9fb1afc8b9a10309e0224e56813bc9e400598c
Signed-off-by: Erik Lilliebjerg <elilliebjerg@nvidia.com>
Reviewed-on: http://git-master/r/255171
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Xiaohui Tao <xtao@nvidia.com>
Tested-by: Xiaohui Tao <xtao@nvidia.com>
Reviewed-by: Robert Collins <rcollins@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

6 years agoarm: pluto: power: update sysedp core cap table to support ap40x
Rick Song [Wed, 31 Jul 2013 18:00:00 +0000]
arm: pluto: power: update sysedp core cap table to support ap40x

Update sysedp core cap table for ap40x.

Bug 1339878

Change-Id: I165d76afdedd7c20f753e6a9ab814f4dbe5323d4
Signed-off-by: Rick Song <ricks@nvidia.com>
Reviewed-on: http://git-master/r/256429
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venkata (Muni) Anda <vanda@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sivaram Nair <sivaramn@nvidia.com>

6 years agovideo: tegra: nvmap: enable iwb page pool if outer cache is present
Krishna Reddy [Wed, 20 Mar 2013 23:03:06 +0000]
video: tegra: nvmap: enable iwb page pool if outer cache is present

If outer cache is not present, wb and iwb refer to same memory type
and page pool is not necessary.

Bug 1328248

Change-Id: I86713ccb4eb8d41b8129dd241dc72218039bbd26
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/256270
Reviewed-by: Ahung Cheng <ahcheng@nvidia.com>
Tested-by: Ahung Cheng <ahcheng@nvidia.com>
Reviewed-by: Kirill Artamonov <kartamonov@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit

6 years agoARM: tegra: pluto: e1823 camera board support
Charlie Huang [Tue, 30 Jul 2013 17:46:19 +0000]
ARM: tegra: pluto: e1823 camera board support

add imx135 detection method, also enable dw9718 once detected.

bug 1307389

Change-Id: If38a478a5dd68fcc7453cb03917221a38d30a800
Signed-off-by: Charlie Huang <chahuang@nvidia.com>
Reviewed-on: http://git-master/r/255673
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Frank Chen <frankc@nvidia.com>
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>

6 years agoASoC: Tegra: Use modem clock to driver codec
Lei Fan [Wed, 31 Jul 2013 09:01:52 +0000]
ASoC: Tegra: Use modem clock to driver codec

If modem is working as master device for T114, we need to use modem clock
to drive codec, otherwise vioce will be discontinuous. And The flow control
should be enabled to avoid losting voice in UL.

Bug 1299544

Change-Id: I7b60258e14bc0fae4d9d4fc9ca248cd6f6378faa
Signed-off-by: Lei Fan <leif@nvidia.com>
Reviewed-on: http://git-master/r/249603
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Scott Peterson <speterson@nvidia.com>

6 years agoARM: tegra: Assert reset when power ungating
Terje Bergstrom [Wed, 31 Jul 2013 05:34:10 +0000]
ARM: tegra: Assert reset when power ungating

Ensure unit is in reset when powering it back on.

Bug 1329416
Bug 1331777
Bug 1322046

Change-Id: I8ef6646a8fe2ae85fdb836f3222678e5f77a784c
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/256139
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

6 years agoARM: tegra: macallan: update sys EDP data
Sivaram Nair [Thu, 25 Jul 2013 06:27:37 +0000]
ARM: tegra: macallan: update sys EDP data

(1) Changed system cap to 22W to address stability issues at lower
battery levels (<25%)
(2) Limited battery depletion states to 9W for performance fixes
(3) Added a OCV lut for emulating battery depletion when AC adaptor is
used (for performance measurements)

Bug 1331521
Bug 1306298

Change-Id: I0ae07c217b2e3c43dd786bfb93a5503a5c644ee2
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-on: http://git-master/r/254902
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
Reviewed-by: Vandana Bansal <vandanab@nvidia.com>

6 years agousb: host: tegra: reduce delay in driver remove
Rohith Seelaboyina [Thu, 25 Jul 2013 11:51:56 +0000]
usb: host: tegra: reduce delay in driver remove

Following are taken care:
1. Add check conditions before updating the pm_qos nodes
2. Reduce delay in driver remove path to sync
ehci_bus_resume, ehci_bus_suspend, ehci_remove

Bug 1316354
Bug 1331078

Change-Id: I51e251474a9def65286e7a6f8099ad9cdc40d0ea
Signed-off-by: Rohith Seelaboyina <rseelaboyina@nvidia.com>
Reviewed-on: http://git-master/r/253427
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

6 years agovideo: tegra: dsi: Fix mipi_cal sequence
Ken Chang [Tue, 30 Jul 2013 09:14:27 +0000]
video: tegra: dsi: Fix mipi_cal sequence

remove the code specific to DSI_VS_0 from DSI auto cal sequence.

Bug 1329416

Change-Id: Ib0380b1f44ec7ed3c601b55833fc8a3e2e2d5648
Signed-off-by: Ken Chang <kenc@nvidia.com>
Reviewed-on: http://git-master/r/255544
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Animesh Kishore <ankishore@nvidia.com>

6 years agoMedia: video: tegra: Fix Error message
Jeetesh Burman [Tue, 21 May 2013 08:46:18 +0000]
Media: video: tegra: Fix Error message

CAM_RSTN gpio line is acquired by ov9772 prior to imx091, hence while
kernel booting imx091 throws error EBUSY, since CAM_RSTN gpio line
is shared between ov9772 and imx091, therefore message appearing in
the log is not error, hence changing dev_err to dev_info.

Bug 1199045

Change-Id: I8353e56d8a16e8843d399b1cdd9a385806f8408d
Signed-off-by: Jeetesh Burman <jburman@nvidia.com>
Reviewed-on: http://git-master/r/231069
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

6 years agomedia: video: tegra: replace 12.6MP with 13MP mode
David Wang [Thu, 25 Jul 2013 21:03:37 +0000]
media: video: tegra: replace 12.6MP with 13MP mode

Update imx091 full resolution from 12.6MP to true
4:3 13MP (4208x3120) mode.

Bug 1182690

Change-Id: Ieaf67efe59f6bb02401affedbd2fcb1c7d6181b3
Signed-off-by: David Wang <davidw@nvidia.com>
Reviewed-on: http://git-master/r/253873
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Frank Chen <frankc@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bhushan Rayrikar <brayrikar@nvidia.com>
Reviewed-by: David Schalig <dschalig@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agoarm: edp_core: fix sysfs node profile can't write
Rick Song [Sat, 27 Jul 2013 00:31:04 +0000]
arm: edp_core: fix sysfs node profile can't write

Need approve the sysfs node to be written, if the size
of string from user space is the same as profile items
in the kernel.

Bug 1326355

Change-Id: I8375e32267ff5ae371d8ce469ae87abac49e02ff
Signed-off-by: Rick Song <ricks@nvidia.com>
Reviewed-on: http://git-master/r/254619
Reviewed-by: Andy Carman <acarman@nvidia.com>
Tested-by: Andy Carman <acarman@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venkata (Muni) Anda <vanda@nvidia.com>

6 years agoARM: tegra: tegratab: Register proper thermal devices per board revision
Jinyoung Park [Fri, 21 Jun 2013 08:01:42 +0000]
ARM: tegra: tegratab: Register proper thermal devices per board revision

Register proper thermal devices per board revision.

Bug 1319315

Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/244967
(cherry picked from commit 2372472528eb456515f145b14f457e6c6ef3ecc3)

Change-Id: If78fe3d9853520c9aa50b631abb4645d67b419b9
Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/252887
Reviewed-by: Harshada Kale <hkale@nvidia.com>
Tested-by: Harshada Kale <hkale@nvidia.com>

6 years agoARM: tegra: tegratab: Update NTC thermistor table for ADC to temp conversion
Jinyoung Park [Mon, 24 Jun 2013 08:57:23 +0000]
ARM: tegra: tegratab: Update NTC thermistor table for ADC to temp conversion

Updated NTC thermistor table for ADC to temp conversion.

Bug 1287901

Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/241385
(cherry picked from commit 435d705ae2e8fbf37b00f9c21aa11a13a67fb8d5)

Change-Id: I9f580e3dba1848aea61bef93d6f94e3d4d96e906
Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/252885
Reviewed-by: Harshada Kale <hkale@nvidia.com>
Tested-by: Harshada Kale <hkale@nvidia.com>

6 years agostaging: iio: adc: palmas: Change precision multiplier for calibration
Jinyoung Park [Thu, 20 Jun 2013 05:53:10 +0000]
staging: iio: adc: palmas: Change precision multiplier for calibration

Changed precision multiplier from 1000 to 1000000 for improving
the accuracy of calibration.

Bug 1287901

Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/241372
(cherry picked from commit 430337add6aaf1687d70c8753a09d37ec28819d5)

Change-Id: Ife182b8e4f5e46a2365d1c89bc275495c45ee92e
Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/252882
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

6 years agostaging: iio: adc: palmas: Support extended delay mode
Jinyoung Park [Wed, 19 Jun 2013 08:24:00 +0000]
staging: iio: adc: palmas: Support extended delay mode

The extended delay mode is added 400us delay to help system settles
to loaded situation.

Bug 1287901

Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/241371
(cherry picked from commit 3f7b31446dd2b9a8b626989bfc6032cffbafcafb)

Change-Id: I7965c89be6f5249110eae4c646c84f44e36257c8
Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/252881
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

6 years agosecurity: tf_driver: update with latest TL drop
Hyung Taek Ryoo [Thu, 25 Jul 2013 17:09:01 +0000]
security: tf_driver: update with latest TL drop

This change fixes abnormal signal handling in tf driver.
Tf_daemon(user thread) is waiting for the signal when coming out of LP0,
but tf_daemon never gets the signal because tf driver can't handle the
signal properly. If there's a pending signal when coming out of LP0,
this fix clears the pending signal.

Bug 1244750
Bug 1309812

Change-Id: I7849866c7993af8716c17f6b7a06692271334664
Signed-off-by: Hyung Taek Ryoo <hryoo@nvidia.com>
Reviewed-on: http://git-master/r/253548
GVS: Gerrit_Virtual_Submit
Reviewed-by: Karthik Iyer <karthiki@nvidia.com>
Reviewed-by: Prashant Malani <pmalani@nvidia.com>
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agovideo: tegra: host: change msenc init strategy
Mayuresh Kulkarni [Mon, 24 Jun 2013 13:45:55 +0000]
video: tegra: host: change msenc init strategy

- this commit always calls msenc_boot from nvhost_msenc_init.
- this is to ensure that we load a new instance of firmware in it.
- if suppose before call to nvhost_msenc_deinit, it gets power-gated then
runtime pm call-back will restore it
- if user space closes the channel before it is power-gated,
it gets ready for next channel open

bug 1289131

Change-Id: Ic60c34c67a21af3b1e902ba7512521592126dd9b
Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-on: http://git-master/r/238046
Reviewed-by: Senthilkumar Loganath <sloganath@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Shashank Garg <sgarg@nvidia.com>

6 years agomedia: video: fix deadlock in edp client driver
David Pu [Wed, 17 Jul 2013 02:03:07 +0000]
media: video: fix deadlock in edp client driver

don't call edp api in throttle callback or deadlock will happen since
the edp lock is held from caller.

Bug 1327193

Change-Id: I6b90630d0a37d53521c1db4e95f5945f184a70f5
Signed-off-by: David Pu <dpu@nvidia.com>
Reviewed-on: http://git-master/r/247173
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Rick Song <ricks@nvidia.com>
Reviewed-by: Charlie Huang <chahuang@nvidia.com>
Reviewed-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

6 years agotegra: media: video: imx135 add 1920x1080 HDR mode
Bhushan Rayrikar [Tue, 2 Jul 2013 22:14:47 +0000]
tegra: media: video: imx135 add 1920x1080 HDR mode

Add a 1920X1080p HDR mode derived from the 2104X1560
binning + skipping mode.

Bug 1279098

Change-Id: If88731d5d249d3e1fc71f496483d23bde802b951
Signed-off-by: Bhushan Rayrikar <brayrikar@nvidia.com>
Reviewed-on: http://git-master/r/244518
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Shiva Dubey <sdubey@nvidia.com>
Reviewed-by: Zhaoyi Wei <zwei@nvidia.com>
Reviewed-by: Frank Chen <frankc@nvidia.com>
Reviewed-by: David Wang (SW-TEGRA) <davidw@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

6 years agoarm: pluto: memory: add AP40X SKU support in memory DVFS table
Rick Song [Sun, 28 Jul 2013 00:08:02 +0000]
arm: pluto: memory: add AP40X SKU support in memory DVFS table

On pluto reference, memory DVFS table need support AP40X, add
AP40X SKU in memory DVFS table.

Bug 1329643

Change-Id: Id323e4cca66140ae420c40c4c6923a1c8c2322c5
Signed-off-by: Rick Song <ricks@nvidia.com>
Reviewed-on: http://git-master/r/254739
Reviewed-by: Andy Carman <acarman@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venkata (Muni) Anda <vanda@nvidia.com>

6 years agoarm: tegra: dalmore: add default hdmi panel mode
Jong Kim [Thu, 25 Jul 2013 22:07:47 +0000]
arm: tegra: dalmore: add default hdmi panel mode

Add default 640x480 hdmi panel mode. This HDMI mode is just a dummy
for device probe to pass and finish dc/fb/fbcon registration. The
actual mode will be detected by detect worker and programmed to the
hw a little later during boot process.

bug 1264520
bug 1320357
bug 1324935

Change-Id: Ib785d4b777434e2c479ea537dffba1dba6c6e399
Signed-off-by: Jong Kim <jongk@nvidia.com>
Reviewed-on: http://git-master/r/253708
GVS: Gerrit_Virtual_Submit
Reviewed-by: Allen Martin <amartin@nvidia.com>

6 years agoARM: tegra11: dvfs: Add AP40X sku support
Alex Frid [Wed, 24 Jul 2013 02:58:41 +0000]
ARM: tegra11: dvfs: Add AP40X sku support

Bug 1326355

Change-Id: Id604580d02d820db5fcf40f77fd3afd8b9c79f35
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/253188
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

6 years agoARM: tegra11: power: Add AP40X cpu EDP table
Alex Frid [Thu, 25 Jul 2013 03:46:56 +0000]
ARM: tegra11: power: Add AP40X cpu EDP table

Bug 1326355

Change-Id: I19b0a6dea4712b718477ca76f479fab0ff8b14b5
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/253187
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Andy Carman <acarman@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Reviewed-by: Rick Song <ricks@nvidia.com>

6 years agoARM: tegra11: power: Add AP40X core EDP tables
Alex Frid [Wed, 24 Jul 2013 20:51:38 +0000]
ARM: tegra11: power: Add AP40X core EDP tables

Bug 1326355

Change-Id: Ic6932da6da1aa83ce8582d68167ff50f8ea4663a
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/253186
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Andy Carman <acarman@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Reviewed-by: Rick Song <ricks@nvidia.com>

6 years agoCpufreq: interactive: Check actual freq before setting new freq
Puneet Saxena [Mon, 15 Jul 2013 09:27:12 +0000]
Cpufreq: interactive: Check actual freq before setting new freq

In case Actual freq is not updated till next timer interrupt
and new target freq comes same as actual freq.
Don't go for setting same frequency again.

Bug 1316765

Change-Id: If81786911fd85adb8469b49c59f2ab70ae12f96a
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Signed-off-by: Puneet Saxena <puneets@nvidia.com>
Reviewed-on: http://git-master/r/251585
Reviewed-by: Elaine Tam <etam@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jay Cheng <jacheng@nvidia.com>
Reviewed-by: Venkata (Muni) Anda <vanda@nvidia.com>
Tested-by: Elaine Tam <etam@nvidia.com>

6 years agocpufreq: interactive: resched timer if max freq raised
Lianwei Wang [Fri, 26 Apr 2013 05:30:51 +0000]
cpufreq: interactive: resched timer if max freq raised

When the policy max freq is raised, and before the timer is
rescheduled in idle callback, the cpu freq may stuck at a
lower freq.

The target_freq shall be updated too, else on a high load
situation, the new_freq is always equal to target_freq and
which will cause freq stuck at a lower freq too.

Reschedule the timer on gov limits callback.

Bug 1316765

Change-Id: I6c187001ab43e859731429b64f75a74eebc37a24
Signed-off-by: Lianwei Wang <a22439@motorola.com>
(cherry picked from commit 0edc2b4c9c30a695d9500d3204acdf5f3ddfa027)
Signed-off-by: Puneet Saxena <puneets@nvidia.com>
Reviewed-on: http://git-master/r/251584
Reviewed-by: Elaine Tam <etam@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jay Cheng <jacheng@nvidia.com>
Reviewed-by: Venkata (Muni) Anda <vanda@nvidia.com>
Tested-by: Elaine Tam <etam@nvidia.com>

6 years agocpufreq: interactive: fix race on cpufreq TRANSITION notifier
Lianwei Wang [Thu, 16 May 2013 04:07:23 +0000]
cpufreq: interactive: fix race on cpufreq TRANSITION notifier

The cpufreq TRANSTION notifier callback does not check the
governor_enabled state on affected CPUS, which will case
kernel panic in update_load because the policy object maybe
NULL or invalid when governor_enabled is false.

Bug 1316765

Change-Id: Ie0f1718124f61e2f9b5da57abc6981ada5b83908
Signed-off-by: Lianwei Wang <a22439@motorola.com>
(cherry picked from commit 44011f4524e86ca5a5e90bb941499cbe37a21987)
Signed-off-by: Puneet Saxena <puneets@nvidia.com>
Reviewed-on: http://git-master/r/251583
Reviewed-by: Elaine Tam <etam@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jay Cheng <jacheng@nvidia.com>
Reviewed-by: Venkata (Muni) Anda <vanda@nvidia.com>
Tested-by: Elaine Tam <etam@nvidia.com>

6 years agocpufreq: interactive: avoid underflow on active time calculation
Minsung Kim [Tue, 23 Apr 2013 13:32:01 +0000]
cpufreq: interactive: avoid underflow on active time calculation

Check for idle time delta less than elapsed time delta, avoid
underflow computing active time.

Bug 1316765

Change-Id: I3e4c6ef1ad794eec49ed379c0c50fa727fd6ad28
Signed-off-by: Minsung Kim <ms925.kim@samsung.com>
(cherry picked from commit 3022f93a1aff25b3c9174ac659d7e4a143892267)
Signed-off-by: Puneet Saxena <puneets@nvidia.com>
Reviewed-on: http://git-master/r/251582
Reviewed-by: Elaine Tam <etam@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jay Cheng <jacheng@nvidia.com>
Reviewed-by: Venkata (Muni) Anda <vanda@nvidia.com>
Tested-by: Elaine Tam <etam@nvidia.com>

6 years agocpufreq: interactive: reduce chance of zero time delta on load eval
Todd Poynor [Fri, 5 Apr 2013 20:25:21 +0000]
cpufreq: interactive: reduce chance of zero time delta on load eval

Reschedule load sampling timer after timestamp of sample start taken,
hold spinlock across entire sequence to avoid preemption.  Avoid the
WARN for zero time delta in the load sampling timer function.

Bug 1316765

Change-Id: Idc10a756f09141decb6df92669521a1ebf0dbc10
Signed-off-by: Todd Poynor <toddpoynor@google.com>
(cherry picked from commit 20075d8e9d42aac6e248c7cbe6a2f8a0a00d4ba4)
Signed-off-by: Puneet Saxena <puneets@nvidia.com>
Reviewed-on: http://git-master/r/251581
Reviewed-by: Elaine Tam <etam@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jay Cheng <jacheng@nvidia.com>
Reviewed-by: Venkata (Muni) Anda <vanda@nvidia.com>
Tested-by: Elaine Tam <etam@nvidia.com>

6 years agocpufreq: interactive: handle errors from cpufreq_frequency_table_target
Todd Poynor [Mon, 22 Apr 2013 23:44:58 +0000]
cpufreq: interactive: handle errors from cpufreq_frequency_table_target

Add checks for error return from cpufreq_frequency_table_target, and be
less noisy on the existing call with an error check.  CPU hotplug and
system shutdown may cause this call to return -EINVAL.

Bug 1316765

Change-Id: Id78d8829920462c0db1c7e14e717d91740d6cb44
Signed-off-by: Todd Poynor <toddpoynor@google.com>
(cherry picked from commit 952c6d49444061849e2e254b0d701ebb1664f4b3)
Signed-off-by: Puneet Saxena <puneets@nvidia.com>
Reviewed-on: http://git-master/r/251580
Reviewed-by: Elaine Tam <etam@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jay Cheng <jacheng@nvidia.com>
Reviewed-by: Venkata (Muni) Anda <vanda@nvidia.com>
Tested-by: Elaine Tam <etam@nvidia.com>

6 years agoCpufreq: interactive: Add fresh google interactive gov, etc.
Elaine K. Tam [Thu, 4 Jul 2013 00:18:15 +0000]
Cpufreq: interactive: Add fresh google interactive gov, etc.

PART 1:

Author: Puneet Saxena <puneets@nvidia.com>
Date:   Mon May 13 19:41:00 2013 +0530

    Cpufreq: interactive: change min_sample_time

    Reduce min_sample_time so that frequency can be
    ramped down quickly.

    Bug 1281679

    Change-Id: I1585c30a6bb4c2cb6e5567c8e472e03af3596971
Signed-off-by: Puneet Saxena <puneets@nvidia.com>
    Reviewed-on: http://git-master/r/227977
    Reviewed-by: Automatic_Commit_Validation_User
    Reviewed-by: Sachin Nikam <snikam@nvidia.com>
    Reviewed-by: Peter Boonstoppel <pboonstoppel@nvidia.com>

PART 2:

Merge: 92354f2 857c6ca
Author: Puneet Saxena <puneets@nvidia.com>
Date:   Fri May 31 12:37:53 2013 +0530

    Cpufreq: interactive: Add fresh google interactive gov

    Existing interactive gov code diverged significantly from
    the version maintained by Google.

    The change ports current version of Google interactive governor
    code maintained in "android-3.4" branch.

    Merge branch 'android-3.4' into android-tegra-nv-3.4

    Conflicts:
    drivers/cpufreq/cpufreq_interactive.c
    include/trace/events/cpufreq_interactive.h

    Bug 1281679

Signed-off-by: Puneet Saxena <puneets@nvidia.com>

Change-Id: I10883f2c0ec29c4f06d70c3637b5fcbb9d8aa8bd
Signed-off-by: Elaine K. Tam <etam@nvidia.com>
Reviewed-on: http://git-master/r/251579
Reviewed-by: Jay Cheng <jacheng@nvidia.com>
Reviewed-by: Venkata (Muni) Anda <vanda@nvidia.com>

6 years agoARM: tegra: as3648 flash setting update
Charlie Huang [Mon, 22 Jul 2013 22:29:08 +0000]
ARM: tegra: as3648 flash setting update

due to the change in the header file, board files should be
synchronized as well.

bug 1328867

Change-Id: I7bfdccfb6e313cb3b1e823bc2bde5ed5bc5f51e9
Signed-off-by: Charlie Huang <chahuang@nvidia.com>
Reviewed-on: http://git-master/r/252118
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Anton Poon <antonp@nvidia.com>
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>

6 years agomedia: video: tegra: as364x: support new framework
Charlie Huang [Mon, 22 Jul 2013 22:23:20 +0000]
media: video: tegra: as364x: support new framework

support new flash led framework V1 which enables individual led
controls.

bug 1328867

Change-Id: I190b6b444d5d4c1d163365546997efa7a0a932cb
Signed-off-by: Charlie Huang <chahuang@nvidia.com>
Reviewed-on: http://git-master/r/252108
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Anton Poon <antonp@nvidia.com>
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>

6 years agoARM: tegra: clock: Re-factor core bus limit structures
Alex Frid [Sun, 21 Jul 2013 07:06:21 +0000]
ARM: tegra: clock: Re-factor core bus limit structures

Combined core_bus_cap_table and core_bus_floor_table structures into
one core_bus_limit_table structure.

Change-Id: I9531d7c765597d79e73aa1d9391972b9f436e26b
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/251671
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

6 years agoARM: tegra11: clock: Set wait count after EMC clock change
Alex Frid [Sat, 22 Jun 2013 07:29:23 +0000]
ARM: tegra11: clock: Set wait count after EMC clock change

Unconditionally update EMC_ZCAL_WAIT_CNT after EMC clock change.

Bug 1312928

Change-Id: I35a24757ed8f2cbca73393fb0d95533491524b3f
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/241212
Reviewed-by: Harshada Kale <hkale@nvidia.com>
Tested-by: Harshada Kale <hkale@nvidia.com>

6 years agomisc: nct: remove delay in resume
Bitan Biswas [Thu, 11 Jul 2013 11:58:37 +0000]
misc: nct: remove delay in resume

bug 1317941

Change-Id: I947d43fb8ac574787bba4c9109e0a22f52b2dc97
Signed-off-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-on: http://git-master/r/247838
(cherry picked from commit 210050261eb4e8c58e1ce0de8665833abf84a296)
Reviewed-on: http://git-master/r/253263
Reviewed-by: Automatic_Commit_Validation_User

6 years agoxhci: tegra: fix a compilation warning in fw_log_wait_empty_timeout
JC Kuo [Thu, 25 Jul 2013 04:21:12 +0000]
xhci: tegra: fix a compilation warning in fw_log_wait_empty_timeout

Input parameter to time_is_after_jiffies() has to be in "unsigned long"
type.

bug 1320242

Change-Id: I67f7a2cf5806a0ae7561cd02d77ebd723b85da1f
Signed-off-by: JC Kuo <jckuo@nvidia.com>
Reviewed-on: http://git-master/r/253185
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agostaging: iio: cm3217: Add regulator logic
Sri Krishna chowdary [Fri, 12 Jul 2013 13:16:15 +0000]
staging: iio: cm3217: Add regulator logic

Cm3217 assumes regulator is always on and hence
did not earlier have any regulator on/off logic. This
caused issues when regulator is turned off without
driver's knowledge. Hence, add regulator enable/disable
logic.

Bug 1324000

Change-Id: Iec6fb73e81eab088daf0e153ec2bc94a9c53511d
Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/248357
(cherry picked from commit b35f33c482cbe34afa7071f2fecc0fad11ff1c27)
Reviewed-on: http://git-master/r/251759
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

6 years agoARM: tegra: tegratab: Add regulator for Cm3217 ALS
Sri Krishna chowdary [Fri, 12 Jul 2013 13:14:17 +0000]
ARM: tegra: tegratab: Add regulator for Cm3217 ALS

Bug 1324000

Change-Id: Id940c5c2d8fbe8d5a810254a66098c84560f6c3c
Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/248356
(cherry picked from commit 81bc8a66d33d21abd3b02df516656de4363a4ff9)
Reviewed-on: http://git-master/r/251758
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

6 years agoRevert "arm: tegra: dalmore: add default hdmi panel mode"
Kapil Joshi [Wed, 24 Jul 2013 12:55:55 +0000]
Revert "arm: tegra: dalmore: add default hdmi panel mode"

This reverts commit 784632afcc85007049f5f09a30d552db99a32df6 because
it creates a regression on audio routing to HDMI on Android.

Bug 1324935

Change-Id: Ia52426dad4d128fc2bb6956d5a5bcba6c97e7636
Signed-off-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-on: http://git-master/r/252909
Reviewed-by: Automatic_Commit_Validation_User

6 years agovideo: tegra: host: remove epp clock from isp
Daehyoung Ko [Wed, 24 Jul 2013 23:34:46 +0000]
video: tegra: host: remove epp clock from isp

to remove epp from the isp channel's clock list
in order to get rid of conflict for epp clock
between 2d and isp

bug 1331777
bug 1322046

Change-Id: I5625aae7b693b00668d97839c0ae5cf21bf8f460
Signed-off-by: Daehyoung Ko <dko@nvidia.com>
Reviewed-on: http://git-master/r/253117
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>

6 years agovideo: tegra: host: increase gather queue size
Bhushan Rayrikar [Wed, 12 Jun 2013 18:55:55 +0000]
video: tegra: host: increase gather queue size

Increase gather queue size to 1024

Bug 1290316

Change-Id: Ic979e0d29050426748ded1c22db20174b5c98d1e
Signed-off-by: Bhushan Rayrikar <brayrikar@nvidia.com>
Reviewed-on: http://git-master/r/238095
Reviewed-by: Peter Mikolajczyk <pmikolajczyk@nvidia.com>
Tested-by: Peter Mikolajczyk <pmikolajczyk@nvidia.com>
Reviewed-by: Yin-Chia Yeh <yyeh@nvidia.com>
Reviewed-by: Shiva Dubey <sdubey@nvidia.com>
Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-by: Zhaoyi Wei <zwei@nvidia.com>
Reviewed-by: David Schalig <dschalig@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

6 years agoARM: tegra: powermon: Fix copyrights from GPLv3 to GPLv2
Bharat Nihalani [Tue, 23 Jul 2013 12:40:27 +0000]
ARM: tegra: powermon: Fix copyrights from GPLv3 to GPLv2

This change is done for all boards.

Change-Id: I4db494717a62fd9df366088a04245f007d4cf5b2
Signed-off-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-on: http://git-master/r/252403
Reviewed-by: Automatic_Commit_Validation_User

6 years agoARM: tegra: pluto: add OCV lut
Sivaram Nair [Tue, 23 Jul 2013 10:24:12 +0000]
ARM: tegra: pluto: add OCV lut

In order to emulate psy depletion behavior when AC adaptor is used, we
need to specify a OCV lut for the Yoku 2000 mAh battery.

Bug 1293353

Change-Id: I05bbc8cca1ac6b8176bb6b58819427e725719c7c
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-on: http://git-master/r/252368
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

6 years agoEDP: tegra: add psy emulator mode
Sivaram Nair [Tue, 23 Jul 2013 10:19:14 +0000]
EDP: tegra: add psy emulator mode

Add an emulator mode to the psy depletion client so that we can emulate
different depletion states. This mode requires the board to specify a
valid { capacity, OCV } lut.

Bug 1293353

Change-Id: Ie4f83ee70cec3575ee42a8edea4524d0a33da0fb
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-on: http://git-master/r/252367
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

6 years agoEDP: calculating OCV from SOC lut
Sivaram Nair [Wed, 22 May 2013 11:00:34 +0000]
EDP: calculating OCV from SOC lut

Not all fuel gauges provide OCV reading. This patch adds a lookup-table
based OCV calculation (choosen only if the board data provides a SOC vs
OCV lut).

Bug 1274401

Change-Id: I423b02a52464546f325a4828057aeb18aa50ae53
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-on: http://git-master/r/231561
(cherry picked from commit 0cf6e6f7baab7e76aa0f4d298345a9e2a22981d3)
Reviewed-on: http://git-master/r/243435
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

6 years agoASoC: Tegra: Enable ahub clock during dumping DAM REGs
Lei Fan [Mon, 22 Jul 2013 09:18:08 +0000]
ASoC: Tegra: Enable ahub clock during dumping DAM REGs

The Ahub clock should be enabled during dumping DAM REGs as like as
dumping I2S REGs, otherwise the system will be blocked if there is no
playback, capture or voice calling.

Bug 1300176

change-Id: I062ad70842094ef6cc28164d84b4205ea0107bf6
Signed-off-by: Lei Fan <leif@nvidia.com>
Reviewed-on: http://git-master/r/251874
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sumit Bhattacharya <sumitb@nvidia.com>

6 years agostaging: iio: adc: palmas: Force enable GPADC before start conversion
Jinyoung Park [Wed, 19 Jun 2013 10:34:25 +0000]
staging: iio: adc: palmas: Force enable GPADC before start conversion

To minimize conversion latency, force enable GPADC before start conversion.
If GPADC is not enabled, GPADC will be enabled by conversion request and
required about 800us delay time to turn-on GPADC.

Bug 1287901

Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/241370
(cherry picked from commit a367bf0f8a17709cfe0bb5450715977831ce5c2e)

Change-Id: I467af0e26ae10e31e8f8a8c50ff3d30edacba9dc
Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/252878
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
GVS: Gerrit_Virtual_Submit

6 years agoarm: tegra: macallan: memory: correct MC_GRANT_DECREMENT value
Hayden Du [Mon, 22 Jul 2013 22:36:38 +0000]
arm: tegra: macallan: memory: correct MC_GRANT_DECREMENT value

This is due to an incorrect value for GRANT DECREMENT in the DVFS table for
frequencies less than 400 MHz (EMC clock). On T114, we are always using
MC:EMC freq of 1:2. However, the code for calculating GRANT DECREMENT in the
DVFS table logic assumes MC:EMC freq of 1:1 at EMC freq < 400. Therefore,
the value in the DVFS table at EMC < 400 is double what it should be.

bug 1321312

Change-Id: I2b1eb7824077e621d8fdf9dd299a7a6013974b2a
Signed-off-by: Hayden Du <haydend@nvidia.com>
Reviewed-on: http://git-master/r/252125
GVS: Gerrit_Virtual_Submit
Reviewed-by: Daniel Fu <danifu@nvidia.com>
Tested-by: Daniel Fu <danifu@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

6 years agomedia: video: tegra: IMX135: Fix capture corruption issue
Frank Chen [Wed, 24 Jul 2013 00:25:13 +0000]
media: video: tegra: IMX135: Fix capture corruption issue

IMX135 full res (4208x3120) has the wrong HDR
settings. It should be set to manual HDR mode
instead of auto HDR mode.

Bug 1306959

Change-Id: I524fd413f837565f0e51b17b23d26a7919e3d5c3
Signed-off-by: Frank Chen <frankc@nvidia.com>
Reviewed-on: http://git-master/r/252655
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Sean Pieper <spieper@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agousb: gadget: tegra: add error check conditions
Rohith Seelaboyina [Wed, 10 Jul 2013 06:49:33 +0000]
usb: gadget: tegra: add error check conditions

Add error check conditions for dma_map_single_attrs
we cannot assume they are successfull everytime.

Bug 1320592

Change-Id: I48aeb9d753f8d9a4a11028e3304a72651535dcfe
Signed-off-by: Rohith Seelaboyina <rseelaboyina@nvidia.com>
Reviewed-on: http://git-master/r/247021
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

6 years agoi2c: tegra: enable I2C_INT_ALL_PACKETS_XFER_COMPLETE interrupt.
Nitin Sehgal [Mon, 1 Jul 2013 11:54:20 +0000]
i2c: tegra: enable I2C_INT_ALL_PACKETS_XFER_COMPLETE interrupt.

- fix i2c timeout issue as I2C_INT_ALL_PACKETS_XFER_COMPLETE is disabled.

bug 1313673
bug 1278481

Change-Id: I2a2c39c64298ed6e087abbe047ba01113db80f3e
Signed-off-by: Nitin Sehgal <nsehgal@nvidia.com>
Signed-off-by: Naveen Kumar S <nkumars@nvidia.com>
Reviewed-on: http://git-master/r/243891
(cherry picked from commit ca3063b3717b6cb4777d4ea2882636e98f9ccd5a)
Reviewed-on: http://git-master/r/250743
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

6 years agoARM: tegra: Add Tegra Profiler
Igor Nabirushkin [Tue, 16 Jul 2013 14:08:21 +0000]
ARM: tegra: Add Tegra Profiler

Add Tegra Profiler kernel misc driver

Bug 1312406

Change-Id: Ic549250d8b35696456bbcdffd15c99b393edb15b
Signed-off-by: Igor Nabirushkin <inabirushkin@nvidia.com>
Reviewed-on: http://git-master/r/249713
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Andrey Trachenko <atrachenko@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: Andrey Trachenko <atrachenko@nvidia.com>
Reviewed-by: Bo Yan <byan@nvidia.com>

6 years agoARM: tegra: pluto: memory: add table for 2GB memory
Deepak Nibade [Tue, 23 Jul 2013 13:50:32 +0000]
ARM: tegra: pluto: memory: add table for 2GB memory

- Use API memblock_phys_mem_size() to get memory size
- Based on memory size, select tables at runtime
  for 1GB or 2GB memory for board AP40

Bug 1327872

Change-Id: I89d5ac405e0c4b96d1dedca0740ad429a7551ff6
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/252421
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venkata (Muni) Anda <vanda@nvidia.com>
Tested-by: Venkata (Muni) Anda <vanda@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>

6 years agoARM: tegra11: clock: Add gpu sysfs floor
Alex Frid [Thu, 18 Jul 2013 06:45:45 +0000]
ARM: tegra11: clock: Add gpu sysfs floor

Change-Id: Id1df835e0b60da703b67fc289b2ed21087f2c0c3
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/250928
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

6 years agoARM: tegra11: dvfs: Update T40T frequency limits
Alex Frid [Thu, 18 Jul 2013 19:18:21 +0000]
ARM: tegra11: dvfs: Update T40T frequency limits

Change-Id: I25851ce78f034ac592a0bd39ded1444f0a7e230d
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/250901
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

6 years agoARM: tegra11: clock: Add emc and host1x sysfs floors
Alex Frid [Wed, 17 Jul 2013 21:23:25 +0000]
ARM: tegra11: clock: Add emc and host1x sysfs floors

Change-Id: Ib00775ecbded79cb865cdeaed8e05ba2e06e486a
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/250417
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

6 years agoARM: tegra: clock: Add sysfs interface for bus floors
Alex Frid [Wed, 17 Jul 2013 05:47:55 +0000]
ARM: tegra: clock: Add sysfs interface for bus floors

Added mechanism to install sysfs objects for tegra shared bus floors.
Currently no floor objects are installed.

Change-Id: I4940b096fe7013f09213813b18b1cfe71fce9336
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/250416
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

6 years agoRevert "vide: tegra: dc: Update latency allowance for disabled windows"
Shu Zhang [Mon, 22 Jul 2013 05:39:50 +0000]
Revert "vide: tegra: dc: Update latency allowance for disabled windows"

Updated latency caused flicker line while pressing wifi button.

bug 1323142

Change-Id: Ib5b202b14b32981bdc5588670b6a142436a48d60
Signed-off-by: Shu Zhang <chazhang@nvidia.com>
Reviewed-on: http://git-master/r/251766
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agousb: gadget: tegra: fix schedule work for non-std charger
Rohith Seelaboyina [Fri, 19 Jul 2013 10:43:29 +0000]
usb: gadget: tegra: fix schedule work for non-std charger

Work is scheduled to detect non-standard charger
whenever can_pullup is successful.

Bug 1316950

Change-Id: I8c8b7eb381d311273a77f039964601d5b2535bb2
Signed-off-by: Rohith Seelaboyina <rseelaboyina@nvidia.com>
Reviewed-on: http://git-master/r/251164
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Rakesh Bodla <rbodla@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>

6 years agoasoc: codecs: patch from Realtek to detect headphone
Simon Je [Mon, 15 Jul 2013 10:18:33 +0000]
asoc: codecs: patch from Realtek to detect headphone

Bug 1324680

Change-Id: Ia33d76a3a10bb12872e6c5bfae254f50538ee930
Signed-off-by: Simon Je <sje@nvidia.com>
(cherry picked from commit 896d664b4c3c7dbbcd8dd5875c73f80e49a21c01)
Reviewed-on: http://git-master/r/250757
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sumit Bhattacharya <sumitb@nvidia.com>

6 years agosoc: tegra: rt5640: support speaker volume edp table
Simon Je [Thu, 18 Jul 2013 12:05:35 +0000]
soc: tegra: rt5640: support speaker volume edp table

To support different gains of volume edp for each platform
in single machine driver, add edp_vol table to tegra_asoc_platform_data,
and add edp_vol values to tegratab and macallan board file.

Bug 1321224

Change-Id: Ia74c17dcc3eabe27d3d6356d6d0e51b2623976b1
Signed-off-by: Simon Je <sje@nvidia.com>
Reviewed-on: http://git-master/r/250746
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

6 years agosecurity: tf_driver: update with latest TL drop
Hyung Taek Ryoo [Thu, 18 Jul 2013 02:02:10 +0000]
security: tf_driver: update with latest TL drop

K3.4 does not need this code maintain to PF_KTHREAD

Bug 1244750

Change-Id: Iec2fdf2cf4646ea3415f370a45376b1757498854
Signed-off-by: Hyung Taek Ryoo <hryoo@nvidia.com>
Reviewed-on: http://git-master/r/250493
Reviewed-by: Karthik Iyer <karthiki@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agoinput: touch: maxim: Add shutdown for power-down control.
Jinyoung Park [Tue, 18 Jun 2013 11:50:12 +0000]
input: touch: maxim: Add shutdown for power-down control.

Added shutdown for power-down control.

Bug 1304090

Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/239783
(cherry picked from commit a422e1d54d2426e3c4503471c5bbf4ee527b0208)

Change-Id: I95376df5fbac1589079b4e1fed8a7fb1fa93c7cb
Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/239732
Reviewed-by: Harshada Kale <hkale@nvidia.com>
Tested-by: Harshada Kale <hkale@nvidia.com>

6 years agoxhci: tegra: fix race between remote and host wake for usb2 devices
Henry Lin [Fri, 12 Jul 2013 03:36:55 +0000]
xhci: tegra: fix race between remote and host wake for usb2 devices

For usb2 devices, a race condition between remote and host wake was
observed during remote wake from LP0. If usb2 remote wake's port status
change event interrupt happens while the hub driver is resuming the same
usb2 port for host wake, the hub driver may disconnect the usb2 port
and cause the resuming_ports flag for usb2 remote wake not cleared properly.
Then, the system cannot go to LP0 with "xhci_bus_suspend failed -16"
error message.

This patch fix the race by letting remote wake being completed
before hub driver performs host resume for usb2 port.

Bug 1318548

Change-Id: I59c032527f9adf02a6e4f589f022033940b1d494
Signed-off-by: Henry Lin <henryl@nvidia.com>
Reviewed-on: http://git-master/r/248179
Reviewed-by: Harshada Kale <hkale@nvidia.com>
Tested-by: Harshada Kale <hkale@nvidia.com>

6 years agoARM: tegra: clock: Update emc monitor preset mechanism
Alex Frid [Tue, 9 Apr 2013 05:07:24 +0000]
ARM: tegra: clock: Update emc monitor preset mechanism

- Allowed per-SoC code to select emc monitor preset rate.
For now, rounded down boot rate is used as monitor preset rate
(round down to not over-clock on boot).

- Skipped emc clock update when monitor preset rate is set, but not
yet enabled (to avoid temporary dip in EMC rate). EMC rate is updated
only when monitor preset is enabled.

- Preset EMC monitor rate after iso usage table is initialized.

Change-Id: I3a1407b8523596a7823a7c5398f5c1a03b4c3206
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/219504
(cherry picked from commit 9279fd450cba7c8012a405755d483dfc9b502941)
Reviewed-on: http://git-master/r/241242
Reviewed-by: Harshada Kale <hkale@nvidia.com>
Tested-by: Harshada Kale <hkale@nvidia.com>

6 years agoARM: tegra11: pluto: Fix gpio error for AD5823
Frank Chen [Fri, 19 Jul 2013 20:33:26 +0000]
ARM: tegra11: pluto: Fix gpio error for AD5823

Remove gpio_request and gpio_free calls from
AD5823 power functions. Gpio request/free are
already controlled in the main board file.

Bug 1329704

Change-Id: Id889ad48224b11718b9f13fa1b580edd70d9a2b6
Signed-off-by: Frank Chen <frankc@nvidia.com>
Reviewed-on: http://git-master/r/251459
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sean Pieper <spieper@nvidia.com>
Reviewed-by: Robert Lin <robertl@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bo Yan <byan@nvidia.com>

6 years agoARM: tegra: tegratab: Update Tskin coefficients
Jinyoung Park [Thu, 4 Jul 2013 12:30:43 +0000]
ARM: tegra: tegratab: Update Tskin coefficients

Updated Tskin coefficients for P1640 A00 hard tooled unit.

Bug 1236444
Bug 1291251

Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/245135
(cherry picked from commit 2c5dfbd1f1a4c2da10627ae631458f24c7dd7cb7)

Change-Id: Iaf0406f44d39439e40cf3cf7b03612aba9a7eba8
Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/251220
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Scott Peterson <speterson@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

6 years agovideo: tegra: avoid double free in modedb
Jon Mayo [Fri, 19 Jul 2013 00:37:19 +0000]
video: tegra: avoid double free in modedb

modedb can double free in some cases, or worse point to free'd memory that
later gets allocated.

Bug 1328121
Bug 1264520

Change-Id: Icc4bba24017a782501f27c4787a63a2e2680e4a7
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/251070
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jong Kim <jongk@nvidia.com>

6 years agoARM: tegra11: clock: Add cbus fine granularity region
Alex Frid [Tue, 16 Jul 2013 19:43:15 +0000]
ARM: tegra11: clock: Add cbus fine granularity region

Added fine granularity region to cbus possible rates. In this region
requested cbus rate is not clipped to dvfs steps, but rounded to fine
granularity resolution. The latter is set as 12MHz, and the region is
defined as 5 resolution steps below the top dvfs rate, assuming this
top rate is reachable on the particular chip bin/sku.

Change-Id: Id111b074c39a0a314d57da8ce628f3dbbf385b73
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/249902
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

6 years agoARM: tegra11: dvfs: Update T40T tables and limits
Alex Frid [Fri, 12 Jul 2013 02:50:22 +0000]
ARM: tegra11: dvfs: Update T40T tables and limits

Updated dvfs and edp tables, clock and voltage limits for T40T part.

Change-Id: I99649b1ac7347424d668e9a7cb3862bb32f55c6b
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/248952
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

6 years agoARM: tegra11: power: Add T40T core edp tables
Alex Frid [Sat, 13 Jul 2013 05:22:28 +0000]
ARM: tegra11: power: Add T40T core edp tables

Change-Id: I7cabf0fdd0c031a01a0db730508d258679052a96
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/248951
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

6 years agoARM: tegra11: dvfs: Don't throttle T40T nominal voltage
Alex Frid [Sat, 13 Jul 2013 03:36:22 +0000]
ARM: tegra11: dvfs: Don't throttle T40T nominal voltage

On T40T parts removed throttling of nominal voltage by boot core edp.
Used the latter to specify detached mode (boot, disable, suspend)
limits.

Change-Id: If6ab57785c22ffb9622998aaf9d06bfe36496949
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/248950
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

6 years agoARM: tegra: dvfs: Decouple nominal and detached voltages
Alex Frid [Sat, 13 Jul 2013 02:58:41 +0000]
ARM: tegra: dvfs: Decouple nominal and detached voltages

DVFS rail nominal voltage is minimum voltage required to run all
associated clocks at maximum allowed rates. DVFS rail can be detached
from clocks during initial boot, on suspend entry/exit, or when
voltage scaling is disabled. So far, rail voltage in any detached mode
was set to nominal level. This commit introduced separate voltages for
each detached mode. If any of these levels is not specified, backward
compatible nominal voltage is used.

Since, suspend voltage may now be different from nominal (below), it
is important for dvfs to suspend after suspend edp rate caps are set,
and resume before edp. Hence, priorities of dvfs suspend notifiers
were adjusted accordingly.

Change-Id: I17bf2d5ee30a8278b7c838280e730761608db249
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/248949
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

6 years agoarm: tegra: loose cpu edp power table calculation.
Roger Hsieh [Tue, 16 Jul 2013 05:56:25 +0000]
arm: tegra: loose cpu edp power table calculation.

T40X will be limited to 1.8Ghz if cpu edp power table is applied.
Set the temp limit to 50 to restore the limit to 1.9G for T40X.

Bug 1310571

Change-Id: I6588e193820c34e1c4a8f6d2c82ceedc797a941c
Signed-off-by: Roger Hsieh <rhsieh@nvidia.com>
Reviewed-on: http://git-master/r/249522
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishnan Geeyarpuram <kgeeyarpuram@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

6 years agoinput: touch: maxim: Move power-up and reset-high after start touch_fusion
Jinyoung Park [Fri, 28 Jun 2013 15:06:19 +0000]
input: touch: maxim: Move power-up and reset-high after start touch_fusion

Move power-up and reset-high after start touch_fusion daemon.

Bug 1304090
Bug 1315583

Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/243901
(cherry picked from commit 05ba9be0181c2a4dae11670a4887f0c8fb50f085)

Change-Id: Ibddd226767fbf152d64becfd3d4209c08ff637bf
Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/249053
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Robert Collins <rcollins@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agoxhci: tegra: rewind firmware log buffer across ELPG
JC Kuo [Fri, 5 Jul 2013 11:38:35 +0000]
xhci: tegra: rewind firmware log buffer across ELPG

In ELPG, firmware log context is gone. Firmware doesn't save and
restore log enqueue pointer, dequeue pointer, and sequence number at
CSS/CRS.
In order to minimize complexity of firmware design, driver has to
  1) make sure all firmware log is processed after enters ELPG,
  2) rewind firmware log buffer before exit ELPG,
so that firmware will not have a chance to corrupt log buffer.

This commit also wakes firmware log thread in xhci isr. Idea is that
when driver gets interrupted, there must be some firmware logs unread.
xhci isr is a perfect timing to wake log thread up.

bug 1320242

Change-Id: I4e57e0359055dfbc9a9750658bf7eabb284c804c
Signed-off-by: JC Kuo <jckuo@nvidia.com>
Reviewed-on: http://git-master/r/245366
Reviewed-by: Harshada Kale <hkale@nvidia.com>
Tested-by: Harshada Kale <hkale@nvidia.com>

6 years agoxhci: tegra: support loading xusb firmware from file
JC Kuo [Mon, 24 Jun 2013 12:19:31 +0000]
xhci: tegra: support loading xusb firmware from file

This commit add the capability of loading Tegra xusb firmware from
a firmware file in file system.

Two kernel module parameters provides the firmware loading flexibility.
1. "use_bootloader_firmware=Y" driver loads firmware from the
   bootloader carveout region.
2. "use_bootloader_firmware=N" driver loads firmware from the file
   specified by "firmware_file" parameter.

This example shows how to load firmware from /etc/firmware/xusb_sil_prod_fw

   insmod /system/lib/modules/xhci-hcd.ko use_bootloader_firmware=N firmware_file=xusb_sil_prod_fw

bug 1301430

Change-Id: I7ff4a86ab56b2724d3a4d17f28fe048e6303b067
Signed-off-by: JC Kuo <jckuo@nvidia.com>
Reviewed-on: http://git-master/r/241457
Reviewed-by: Harshada Kale <hkale@nvidia.com>
Tested-by: Harshada Kale <hkale@nvidia.com>

6 years agoARM: tegra: tegratab: Change default state of maxim touch reset
Jinyoung Park [Tue, 2 Jul 2013 02:19:54 +0000]
ARM: tegra: tegratab: Change default state of maxim touch reset

Changed default state of maxim touch reset from 1 to 0 in order to
pull reset to low until power rails are stable for proper initialization.

Bug 1304090
Bug 1315583

Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/244101
(cherry picked from commit 003d40dcebd4ce4c33fbd3377e4074030083cddb)

Change-Id: Ic25ee4d8bf6d6b4468b78640bfe4443fa42b1d1f
Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/249055
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Robert Collins <rcollins@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agomisc: nct1008: Refactor sensor configuration
Jinyoung Park [Fri, 7 Jun 2013 09:00:43 +0000]
misc: nct1008: Refactor sensor configuration

Refactor sensor configuration.
- Fixed wrong min/max temperature settings.
- Removed unnecessary register readings.

Bug 1325770

Change-Id: I33f195df7673ad35d037fa4bf2cf987b6eba5bb1
Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/237219
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>

6 years agomisc: nct1008: Refactor power rail control
Jinyoung Park [Tue, 4 Jun 2013 13:31:05 +0000]
misc: nct1008: Refactor power rail control

Refactor power rail control
- Use devm_regulator_get() instead of regulator_get/put().
- Fix repeated regulator_get calling issue when the regulator is not
available on the system.
- Add return value checking in suspend and resume.

Bug 1325770

Change-Id: I77b457e7b6aa3e9d5ed389cabb9cd0260503eae6
Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/235477
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>

6 years agodrivers: misc: therm_est: Fixed factory reset issue
Hyungwoo Yang [Wed, 10 Jul 2013 02:14:04 +0000]
drivers: misc: therm_est: Fixed factory reset issue

Thermal Estimator tries to access device no more usable during factory reset.

Bug 1320678

Change-Id: Ic56f550c029ad5b9d9a117ad79ccf5bd03292f86
Signed-off-by: Hyungwoo Yang <hyungwooy@nvidia.com>
Reviewed-on: http://git-master/r/246962
(cherry picked from commit e06ae462d514f61f28d5fd7f82d927bbeb0c8607)
Reviewed-on: http://git-master/r/248508
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

6 years agomedia: tegra: ov7695: apply 070213 tuning values
Jake Park [Wed, 3 Jul 2013 21:45:02 +0000]
media: tegra: ov7695: apply 070213 tuning values

Apply ov7695 quality tune register changes from OV,
'OV7695 reference setting_MIPI_24MCLK_o70213_nVidia.txt'.

Bug 1278482

Change-Id: If40629b7a4fe7c4c8bd731693f5b8e2cc66bb674
Signed-off-by: Jake Park <jakep@nvidia.com>
Reviewed-on: http://git-master/r/244866
(cherry picked from commit 9d08009023cacaef14137d3dab46b496dfcb4e39)
Reviewed-on: http://git-master/r/247286
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Philip Breczinski <pbreczinski@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

6 years agomedia: ov7695: WAR for initial greenish preview
Jake Park [Wed, 3 Jul 2013 00:11:12 +0000]
media: ov7695: WAR for initial greenish preview

To reduce initial greenish preivew time,
1. start from manual white balance with pre-defined values
2. discard 3 frame
3. move to auto white balance

Bug 1304101

Change-Id: Iba4520b94614ccaca8d2d0c037928c70e736ecb8
Signed-off-by: Jake Park <jakep@nvidia.com>
Reviewed-on: http://git-master/r/244570
(cherry picked from commit b4dd59c448e9b89a05d7ffa9654aa9bb51239855)
Reviewed-on: http://git-master/r/247285
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Philip Breczinski <pbreczinski@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

6 years agoarm: tegra3: change max current to 10000mA for T33
Naveen Kumar S [Thu, 2 May 2013 10:44:47 +0000]
arm: tegra3: change max current to 10000mA for T33

6000mA is the max current for regular T30 SOCs. Conditionally changing
it to 10000mA for T33 SOCs to avoid passing the command line parameter
max_cpu_cur_ma=10000 explicitly.

Bug 1166110

Change-Id: I453c8e128a6cf32f10e0f6e4a577b857d38d8e4d
Signed-off-by: Naveen Kumar S <nkumars@nvidia.com>
Reviewed-on: http://git-master/r/245335
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bryan Wu <pengw@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>