arm: tegra: dvfs: use 1.1 v for usb

Set the working voltage for USB to 1.1 v.
Bug 796594

Reviewed-on: http://git-master/r/30219
(cherry picked from commit af08f51a8c51b7b8d3f25ee7a2372f9d423b78e7)

Original-Change-Id: I71332eaa238c1116bcb2c2555654ea65a648c702
Reviewed-on: http://git-master/r/40305
Reviewed-by: Xin Xie <xxie@nvidia.com>
Tested-by: Xin Xie <xxie@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

Rebase-Id: R17971c5c60e28d8816955cf6d834df4c7d3c272b

ARM: tegra: kbc: Update key-matrix

The key-matrix is updated for the case scroll-wheel is not enabled.

Bug 847651

Original-Change-Id: I12e1ac66b7692733e8947aa2a57eaa2fa5b8a66f
Signed-off-by: Puneet Saxena <puneets@nvidia.com>
Reviewed-on: http://git-master/r/39553
(cherry picked from commit 25b2522711cd1e0186ff6bc46a0bb91b2abe5226)
Reviewed-on: http://git-master/r/39945
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>

Rebase-Id: Refd0a693749b6091b184aca891233ae91eafd5cb

fixup 3c32c5e4 arm: tegra: cardhu: Uart platform data for hsuart driver

Original-Change-Id: I2954eba175980585482772f2e2484550737f177e

Rebase-Id: R1cb65c62bf9b245cfe97de15a256613c32740cc2

regulator: tps80031: Correcting voltage range for LDOs.

The LDOs are supporting 1.0V to 3.3V on TPS80031, but current
driver was implemented 1.1V to 3.3V. So corrected this.

And adding bit mask in ldo_get_voltage to prevent wrong voltage calculation.

Signed-off-by: Jin Park <jinyoungp@nvidia.com>
Original-Change-Id: Ic3779730fd8ad1dec6cf156b4582b0099734e7e6
Reviewed-on: http://git-master/r/39515
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: Rffc735384a266c5d8cde7697e25d9d3f3081597c

arm: tegra: fuse: support to burn fuses on the field

- follow the new sequence shared by the hardware team
- merge Tegra2 and Tegra3.0 odm fuse burning into a single file

Bug 796825

Original-Change-Id: Ia06d589eba95254a410016dce244375f27e22be0
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/38404
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: R740d7bd47eaa6231954ae98686272a755a4bce14

arm: tegra: enterprise: enabling active lowpower for bt

Configuring correct pinmux. platform_device_add for bluesleep.
this feature will be enabled with CONFIG_BT_BLUESLEEP.

bug 841489

Original-Change-Id: Ib2e86b4090e0e0b1b8256a32b049f6741d8d2648
Reviewed-on: http://git-master/r/38015
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: Rb8ccadc62fbba8e27c9c1a121a3f1d95220b9c7a

arm: tegra: remove unnecessary arm_pm_restart = tegra_pm_restart

this is because, tegra_pm_restart internally calls arm_machine_restart().
however, arm_pm_restart is already set to arm_machine_restart()
in arch/arm/kernel/process.c. the above was needed when the console
flush code did not used kernel's reboot notifier mechanism. now it does
use that mechanism, making the assignment arm_pm_restart = tegra_pm_restart
redundent.

Original-Change-Id: I4f2ef51740d7934f3dfe5e6ce749ee6f135f8106
Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-on: http://git-master/r/37331
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: Rda63b4e0e0138ccfe2196cb4820315f6b543f4f5

arm: tegra: pm269: remove power on/off delays

The problem with slow PMU was fixed with a hardware
change to reduce capacitance on the power rail, so
delays are no longer needed

Original-Change-Id: Ib66378ca6bf18c112e90d44d3213dd5f6c870c92
Reviewed-on: http://git-master/r/37127
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: R41f0ab153ba153f896390874b41893ee6e11dce5

video: tegra: remove 1080p@30HZ define from kernel

CONFIG_TEGRA_ENABLE_SUPPORT_FOR_1080p_30HZ define is not needed
anymore since this can be filtered from user space driver

Bug: 815409

(cherry picked from commit 14e0e21a7357722b8be6bba191665e3ead17dd11)

Original-Change-Id: I914d2811d757228864d0ae13950d0fc5cce7f972
Reviewed-on: http://git-master/r/37026
Reviewed-by: Donghan Ryu <dryu@nvidia.com>
Reviewed-by: Jonathan Mayo <jmayo@nvidia.com>
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: R74b621cfd8928797b348ee20bcbcf27492085959

arm: tegra: cardhu: rename vpp_fuse_pg to vdd_fuse

Bug 796825

Original-Change-Id: I91be0bca739a2daf32807306a611671f387a8988
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/36096
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: R5d303050d04b8e2ec2d9724a60bec9b0cbef6f02

ARM: tegra: clock: Use bus lock to protect shared bus update

Protected shared bus update with bus lock - common for all shared bus
users (update procedure was already covered by individual shared users
locks, but it did not prevent concurrent access to shared rates list).

Original-Change-Id: Ia0e6886265aff1f624802e0415fe8cecb887b507
Reviewed-on: http://git-master/r/39918
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: R0e0ee997ce9347470e207910f7b4f6c42143717f

media: tegra: avp: Fix avp_svc_thread shutdown

Fix the race condition between kthread_stop() and wait.
Without this fix, the following message was printed.
"avp_svc_thread: timed out while waiting for kthread_stop"

bug 840262
bug 836806

Original-Change-Id: I5acf75859e6512923506a3c508f62e7d7ef9a1dc
Reviewed-on: http://git-master/r/39736
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: Rf58fd998c20b6ba03077e0a06cb1ac3d89826f77

arm: tegra: dvfs: add fuse_burn to the dvfs table

Bug 796825

Original-Change-Id: I8835427940905d90ca04955b5efe1605761c5554
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/38403
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: R3dc69edfa374a47bcdd35e7acfd85d98ca7d66dc

arm: tegra: clocks: add fuse and fuse_burn clocks

keep fuse clock always enabled to allow fuse
read writes from multiple clients

Bug 796825

Original-Change-Id: Icb2693d791d08ca7083f9a61ab833425d2ab83b4
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/36504
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: Re192b5ff54aea3ce762bd103b1a9a62ef718b81c

ARM: tegra: power: Powergate PCIE and SATA partitions on tegra 3

By defalut PCIE and SATA partitions are powergated. If needed,
respective drivers should un-powergate these partitions. Also
3D,3D1 and MPE are not powergated at startup.

Original-Change-Id: Ibc74868eb59af7c0e8b5a1ecd78e6f993dd5d3a6
Reviewed-on: http://git-master/r/35955
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: Ra55d87d7d816d7cf0bea0d28e7865fa7760f869f

arm: tegra: adding max_pixclock to board-xxx-panel.c

setting max_pixclock for cardhu, enterprise, ventana and enterprise
to 148.5Mhz

Original-Change-Id: Ia734bdb9817913183bbf721bf3c14573c9a75888
Reviewed-on: http://git-master/r/35254
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: Rad2bb72f869ade2720ed313599fb882c571e80da

media: video: tegra: avp: get module clock freq

AVP wants to know the clock freq of the modules like
VDE and AVP itself.
Added interface to handle the get clock message from AVP.

Bug 843882

Original-Change-Id: I3c07814fdb9d3b0c4aae11a431d0737a1c6d6014
Signed-off-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-on: http://git-master/r/38506
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: R4355b6e3e721900a100ba2ab56c5b5c5cf4e7055

ARM: tegra: enterprise: Add rear camera

Add and enable rear camera sensor.
Support only one sensor for now.

Original-Change-Id: I97a1067ab7d40ef434409b5a4175681248f85d90
Reviewed-on: http://git-master/r/36778
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: Rc9829ef590136f09c942d76bf48d6b76993c8be7

media: video: tegra: enable ar0832 sensor

Support only one sensor for now.

Original-Change-Id: I1d0b804077e271052a6d6f4554865675fa70d612
Reviewed-on: http://git-master/r/36779
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: R88b01bf956bdfabd8f13d883ea93a7d8e542d248

ARM: tegra: clock: Save/restore Tegra3 audio sync clocks

Save/restore Tegra3 audio sync clocks on entry/exit to/from deep sleep.

Original-Change-Id: I3a6ddd3d7291760e6b36731d1ec7e401b8081690
Reviewed-on: http://git-master/r/40125
Reviewed-by: Chih-Lung Huang <lhuang@nvidia.com>
Tested-by: Chih-Lung Huang <lhuang@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>

Rebase-Id: Rb26a85d1d08725e6b357a50b53ef1f61d3f52ce4

usb: ehci: tegra: fix hotplug issue on usb2

usb hotplug is supported only for UTMI phy. usb_phy_type should be
carefully checked in ehci irq.

bug 845612

(Cherry picked from commit 894ef272deec269ccbf1caf2b9a5e4ce3bbf7a0f)
(Reviewed on http://git-master/r/39338)

Original-Change-Id: I19e0de3353f17a7d46d097b90009e5182a6c20ba
Reviewed-on: http://git-master/r/40010
Tested-by: Ken Chang <kenc@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: ChihJen Hsu <chhsu@nvidia.com>

Rebase-Id: Rdf9eaa0c1db04beac15686c969fd497a59b2acdd

arm: tegra: cardhu: Add full constraints of regulator

Adding complete constraints of the regulators.

bug 843566

Original-Change-Id: Ifd07d15d257ff8c89c4a3cc31c9e72d886e6b431
Reviewed-on: http://git-master/r/39633
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>

Rebase-Id: Rf443864c31cc255e428d6f0de51add028d85db78

ARM: tegra: clock: Save/restore Tegra3 PLLD and PLLD2

Save/restore Tegra3 PLLD and PLLD2 on entry/exit to/from deep sleep.

Bug 846707

Original-Change-Id: Ie3e558157fd4bcbe1b1e7f7c75ec1086a6742b79
Reviewed-on: http://git-master/r/40123
Reviewed-by: Chih-Lung Huang <lhuang@nvidia.com>
Tested-by: Chih-Lung Huang <lhuang@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>

Rebase-Id: Raddaa7cd52cae2dc75ea72e02bf7e15fad263d67

ARM: tegra: power: Restore Tegra3 EMC power setting after deep sleep

Bug 836334

Original-Change-Id: I19587e97af0addc62217466ee977c5afc33a6028
Reviewed-on: http://git-master/r/39854
Tested-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Chih-Lung Huang <lhuang@nvidia.com>
Tested-by: Chih-Lung Huang <lhuang@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>

Rebase-Id: R2748dbb3f7308ae491e137062e2b0f940fb8185e

arm: tegra: devices: Set emc rate for avp

Set emc clock rate for avp client as required by the platform.

Original-Change-Id: I10374e1967cda6a9f497ba0a95bd62c3b58ecc40
Reviewed-on: http://git-master/r/40167
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: R54697789f03d9465339029b49cba336cb9592c88

video: tegra: dc: print bandwidth warning once

In some stress tests, calculated EMC bandwidth is more than allowed EMC
bandwidth and print out too many warning. Change to print the warning only
once.

BUG 847731

Original-Change-Id: Ia369d4295231e1db39532b0fc6ae8a29f9dbea65
Reviewed-on: http://git-master/r/39740
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: Re9f0b2b50f5bd2afc25564ad97396453e68f9e55

media: video: tegra: avp: set sclk to min

Initialize avp.sclk to minimum. Activity monitor adjusts
avp.sclk dynamically depending on load.

Reviewed-on: http://git-master/r/36064
(cherry picked from commit 1d18930770b99fa7a8169ba8300723bf3b5551e0)

Original-Change-Id: Ifb8704169afd7e4436bfba17e3a6c08e8d39aed4
Reviewed-on: http://git-master/r/38909
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: Ra52c5b5085cfc3e6d21e00969cc83d3f322c4621

tegra: avp: Add platform data for avp

If emc clock is clocked at maximum rate it increases power
consumption. emc clock rate requirement is different for
different platforms.

Original-Change-Id: I21e9afed402d08558c6913b5f194b1a4699ebcb2
Reviewed-on: http://git-master/r/40166
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: R0b4df2cdbdafeb45f050800f29c05ff4b929c6d4

ARM: tegra: la: Add support for latency allowance.

Original-Change-Id: Ia6593fd6720e38f9bb0635fabe236675764cee91
Reviewed-on: http://git-master/r/36570
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: R338465e38b998b4c6a8bfa4efc89003eac90d8b9

misc: nct1008: Power control for nct1008

Adding the power control support for device nct1008
to make sure that power is enable on device before
accessing the device.

bug 849307

Original-Change-Id: I84d7abc142814014bfc568b3a4b0ae0d5329f41e
Reviewed-on: http://git-master/r/40160
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Tested-by: Bitan Biswas <bbiswas@nvidia.com>

Rebase-Id: R49d4709c030086c9596e3a81664b46967de8f029

mfd: tps80031: Support for 80032 chip

Creating framework so that tps80031 driver can be instantiated with the
name of tps80032 also and it can provide the device/chip info to its
client.

bug 820885

Original-Change-Id: I1c40b7c6bec1f4abbc670aaa4317fad49e5d308a
Reviewed-on: http://git-master/r/38859
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>

Rebase-Id: R4953c404fb2af827b53a0173ac6a06806d2f2112

arm: tegra: gpio_get_value can read output gpio

gpio_get_value only supports input pin.
extend the usage for output pin.

Bug 839772

Original-Change-Id: I5a8f5572148afde23e082af18f2e37377ae50bd1
Reviewed-on: http://git-master/r/36758
Tested-by: Seongho Joo <sjoo@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

Rebase-Id: R021e8ff272e4cecd855a574b008dbf8663378970

arm: tegra: panel: Fix build warnings for Cardhu

Fixes "warning: '<variable>' defined but not used" and "warning:
label '<label>' defined but not used" messages.

Original-Change-Id: I6172b3648f824bb315d4a296b034f419d81bc786
Reviewed-on: http://git-master/r/36583
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: Rfc29454b8f9441237109e5b90a427f0eb8a3be71

media: tegra: video: Fix build warnings

Fixes "warning: '<variable>' defined but not used" messages.

Original-Change-Id: Ia4980d0262174cb8f39f9c0f67a9d94ff4be8b97
Reviewed-on: http://git-master/r/36561
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: Ra110459be280f20e326c28abedc9a8ea2c6c8fff

arm: tegra: Fix build warnings

Fixes "warning: passing argument 1 of 'param_get_uint' discards
qualifiers from pointer target type" and "note: expected 'char *'
but argument is of type 'const char *'" messages.

Original-Change-Id: I7610dc0bde0cf3b9a7597f3892b09f7c31a156d1
Reviewed-on: http://git-master/r/36560
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: R87f617932a52d873aa237072e14339627300cf5d

tegra: clocks: Fix in clock settings

clk_disable_locked should not be called when
clk_enable_locked is failed.

Original-Change-Id: I2524ec0198f62de2487723676ca7657d15757eda
Reviewed-on: http://git-master/r/38273
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: R1598bf84619449922c599d611a84dec791047837

tegra: ulpi: Fix for externally driven ULPI

ULPI can be driven by external clock. It might be
the config data may not register clock for ULPI.

This patch put a check for phy->clk before acutally
doing any clock operations on it.

Original-Change-Id: Icb4626c0d5f63a6db098a81e9d590ef38f0ba8f6
Reviewed-on: http://git-master/r/38274
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: R504792e9bc2a44c98db94ccfd7f6a7457e726cf7

tegra: dc: set HDMI clock to 0 if HDMI unplugged

HDMI clock is not auto dvfs, so we need set the clock rate to 0 if HDMI
is disabled. Otherwise the Vdd core voltage will be always 1.2v even
after HDMI cable unplugged.

BUG: 828306
Reviewed-on: http://git-master/r/34379
(cherry picked from commit 58ddd144a6c2dd9bbc9d2f3c8b1e025364d88c22)

Original-Change-Id: I8b26702bc11321649f44b92d0968b3672d902304
Reviewed-on: http://git-master/r/37105
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: Rb92197b1de5edca5c9df314804d5b1eef0bbcc2a

arm: tegra: cardhu: Fix the issue of boot screen corruption.

- The issue is due to the corruption of bootloader fb during kernel
initialization. This change reserves the bootloader fb and then
frees it until bootloader fb is copied to fb for Cardhu, Ventana,
Whistler, Enterprise and Aruba.
- Change color depth of Cardhu and Harmony to 32-bit.

Bug 828271
Bug 832016

Original-Change-Id: I05ef5930ee68dcbd672a5cb59b4568a2c88a2e55
Reviewed-on: http://git-master/r/34966
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: Rb3c9280ea4643ccee661d37d24fb540319470bf7

ARM: tegra: cardhu: Fix clock-related issues on display.

- Set parent clock for lvds and HDMI to avoid clock source conflict.
- Fixed short lvds shutdown during booting.

Bug 847219

Original-Change-Id: Ib32f2047c69c64516d639de247258df001ecd180
Reviewed-on: http://git-master/r/39271
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: Rba7d9c9d88f95482e0bb3579af1e80b5e2ff65ed

video: tegra: dc: Update the tegra_dc_setup_clk() for HDMI and DSI.

Fix the conflict of clock sources for HDMI & DSI.

Original-Change-Id: I730a39fbfd5fe56eea10c0f2147ceee7c3f03921
Reviewed-on: http://git-master/r/39081
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: Rb7201a0b141f699841f2eeb73faddea3f7983759

media: video: tegra: set_clk_rate for avp

set_clk_rate for sclk which is parent of avp clock.

Bug 843725

Original-Change-Id: I51810235a8f820a14afdd8dcf370b55e4d603a68
Signed-off-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-on: http://git-master/r/39772
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: R61690be56d36c81fa0e283fab760b1d31021110c

arm: tegra: tsensor: driver instantiation

Tegra internal tsensor driver supported for fuse revision 0.8
and above.

Bug 661228

Original-Change-Id: I820f6b5f20c20bb2d1ba04266148f5969ab84444
Reviewed-on: http://git-master/r/36054
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: R4725524b5e3f83b4cd3dd7d0020ef2d6e09a87d0

arm:tegra:tsensor: device definitions

Tegra internal temperature sensor addresses defined

Bug 661228

Original-Change-Id: I061ac9e7da3115d1e832e645582353f93378d291
Reviewed-on: http://git-master/r/36119
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Tested-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-by: Narendra Damahe <ndamahe@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

Rebase-Id: R62de8521a55164f582eb2b0f8ad5a83bbc02876c

hwmon:tegra:tsensor driver added

Tegra integrated temperature sensor(tsensor) driver added
 - TH3 counter < current counter causes hardware reset
 - TH2 counter < current counter causes CPU clock to be halved
 - sysfs interface provided for select operations
 - interrupts TH1 TH2 and TH3 working
 - used recommended N,M and clk source settings
 - tsensor counter to temperature conversion added
   tsensor1 counter being used for temperature computations.

Bug 661228

Original-Change-Id: I0fa405c0f542d1b215162291bd913a9ccd55a0f5
Reviewed-on: http://git-master/r/36083
Tested-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>

Rebase-Id: R3c910b4fdc630ffee2135d3d649e25015d2b7206

arm: tegra: cardhu: Fix warnings when USB_SUPPORT is disabled

Original-Change-Id: Id798fd4c2d3a0484933bd2d1778fe9abb106a20e
Reviewed-on: http://git-master/r/38121
Tested-by: Krishna Monian <kmonian@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Reviewed-by: Vivek Aseeja <vaseeja@nvidia.com>

Rebase-Id: R1c20a6e7f1f1a29e673839fc8a60860b93adcc35

Revert "arm: tegra: disable HDA clocks while not in use"

This reverts commit d63d310e78aeb9f5a8dd0b6dc2de7f3f0fa65628.

Bug 820213
Bug 839572

Reviewed-on: http://git-master/r/40031

Rebase-Id: R23c81ec6be844a946ce997387754bdcdf4f94ebb

media: tegra: avp: respond to unsupported service ids

AVP service driver responds error to AVP for invalid or unsupported
service IDs.

Bug 843473

Original-Change-Id: Ic747c7cf0b34b6b30abdb64c4ff005d298fa1530
Signed-off-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-on: http://git-master/r/39225
Reviewed-by: Andy Ritger <aritger@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

Rebase-Id: Rc2cf57d3643343c6cb59cd5da8c5c8351dd2e95e

Revert "i2c: tegra: Remove the synchronization between isr and caller"

This reverts commit 738c1a66079ee7db8e4365aa85819ccdef2592a8.
This fixed the video recording system hang bug

Bug 842901

Reviewed-on: http://git-master/r/39912

Rebase-Id: R183a5a9202ec65099503ddad913a25b139bd6d91

video: tegra: refactor for multiple chip support

Original-Change-Id: Ia203886a3b013612b4159393ff43a25a313d1ece
Reviewed-on: http://git-master/r/35911
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: R01b763362c13e09111f60700c3d3a7d2a9a3fc1c

arm: tegra: enterprise/ventana: debug console through device

Using the debug port device structure to enabling/configuring the
uart debug console port.

Removing the duplicate local definition of the uart console.

Original-Change-Id: Icbf954e0d02dcc4891169b3c701c72f35f8f29e3
Reviewed-on: http://git-master/r/35711
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: R74bd3a179a7ef7327397805f21389f08ac3bceb1

video: tegra: Aligned the stride of fb to 16-byte boundary.

Aligned memory can improve the performance memory access. Also,
since the bootloader fb is aligned, kernel needs to do it to avoid
skew.

Original-Change-Id: Ia5a122539856da9e9c73580929b8ea9c73e86c9d
Reviewed-on: http://git-master/r/35276
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: Rdc32cc0c095903cb731b47e96b5723b13066b63b

ARM: tegra: cardhu/enterprise: Binwidth Specific smartdimmer Settings

Added support for Binwidth specific LUT and BLTF

Bug 721258

Original-Change-Id: I1a4eb6a4d32f736101156a7f388ed0699b66c189
Reviewed-on: http://git-master/r/36418
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: R777b4195fda082f61678dabef8ccc1211dad9f31

video: tegra: Changes for smartdimmer

Added support for binwidth specific settings
for BLTF and LUT.  sysfs support is included.

Bug 721258

Original-Change-Id: I2b76503a51fcbc9ca5cb4ca69fcf722f93878e6d
Reviewed-on: http://git-master/r/36416
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: Rae8570f5dc97a3798966cf48c402212d1fa8359f

video: tegra: nvmap: fix GART pin lockups

Fix GART lockups caused by fragmentation by evicting
mapped areas from iovm space after unsuccessful array
pinning attempt.

Fix double unpin error happening during interrupted
submit.

Fix possible sleep in atomic context in iovmm code
(semaphore inside spinlock) by replacing spinlock
with mutex.

Fix race between handle_unpin and pin_handle.

bug 838579
bug 838073
bug 818058

Original-Change-Id: I420447ffb4e02fb78a7987e22a537eefc16ff524
Reviewed-on: http://git-master/r/36129
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: R893c97003f2ec2f69e224f35d99d3488f673d620

ARM: tegra: cardhu: Update vid_oc pin for pm269

Correct pingroup is DAP3_DOUT

Bug 825778

Original-Change-Id: I252398c4f1d653c73c5fd26a7b5c12410a962ade
Reviewed-on: http://git-master/r/39822
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: Rb3bb758d23520c165fa6369bcb16979ec1824b5b

arm: tegra: cardhu: add support for TPS61050 flash driver

Bug 794431

Original-Change-Id: I889c224b184d099339ccdb438326a2037f85cdf6
Reviewed-on: http://git-master/r/34214
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: R4427050d243067273f1035b4d7f18db3c8c0ee51

arm: tegra: enterprise: VIO and SMPS3 to be always on

Making VIO and SMP3 to be always on as these are parent to some
other rails.

This is software workaround avoid recursive locking when doing the
regulator disable/enable in notifier_call_chain of regulator
core driver.

bug 845849

Original-Change-Id: I9e1de53e86a0c8aeafd88b6e10d2245283fb7660
Reviewed-on: http://git-master/r/39130
Reviewed-by: Karan Jhavar <kjhavar@nvidia.com>
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>

Rebase-Id: Rd29727335ccac915bb54a9f20b35a995f3775fba

serial: 8250: tegra: disabling MSR interrupts

-Disabling modem status interrupts for tegra based UART.
-Removed duplicate declaration of PORT_TEGRA.

Bug 840111

Original-Change-Id: I926c200ce66e926186e5295bc1ead8c6ecf70891
Reviewed-on: http://git-master/r/39788
Tested-by: Pradeep Goudagunta <pgoudagunta@nvidia.com>
Reviewed-by: Jack Zhou <jazhou@nvidia.com>
Tested-by: Jack Zhou <jazhou@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Krishna Monian <kmonian@nvidia.com>

Rebase-Id: Ra34db21ae6dfbffea27b466cb90cfa4eb4717ac2

serial: tegra: support auto control of RTS

Added support for auto control of RTS.

Bug 825938

Original-Change-Id: Ic5ffde2252ab0f0ffb9001994863f3d4ed5d1173
Reviewed-on: http://git-master/r/39356
Tested-by: Pradeep Goudagunta <pgoudagunta@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

Rebase-Id: Rb21ef7c26a2f8644ab81171b41ba4275e38023b0

media: video: tegra: avp: Retry to connect to the AVP.

Sometimes avp_node_try_connect is failed.
It is the timing problem between CPU and AVP.

1) Added the retry routine for avp-connection.
2) Increased the time-out value of msg_wait_ack_locked function
   from 200ms to 400ms.

Bug 822104, 797362

Reviewed-on: http://git-master/r/36439
(cherry picked from commit bdc441e9bebeb893b7e9ec383fd77869dbcefc09)

Original-Change-Id: Ie5b31a50fb61691055ad41f0ac3ce627c08e0ebd
Reviewed-on: http://git-master/r/38450
Tested-by: Jubeom Kim <jubeomk@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

Rebase-Id: R54b77903470a07927d37a220c5865b0ba6ff000d

media: video: tegra: TPS61050 flash driver

Kernel driver for TPS61050 flash/torch camera device.

Bug 794431

Original-Change-Id: I760bd086c283076dc7136bd8ccd6b75e6e823ea8
Reviewed-on: http://git-master/r/34208
Tested-by: Erik M Lilliebjerg <elilliebjerg@nvidia.com>
Reviewed-by: Michael Stewart <mstewart@nvidia.com>
Reviewed-by: John Sasinowski <jsasinowski@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

Rebase-Id: Radb862760f165e40b764b3bb104787427d024c7e

ARM: tegra: sysfs write permission for user only

Giving read-write permission for user only for sysfs attributes.
Group and other will have only read permission.
-clock: syncevents

Bug 828100

Original-Change-Id: I14affc209e954a58de055e291093e31dc1dbfe16
Reviewed-on: http://git-master/r/39364
Reviewed-by: Niket Sirsi <nsirsi@nvidia.com>
Tested-by: Niket Sirsi <nsirsi@nvidia.com>

Rebase-Id: R97f4eadb711717e788be7c4e4e8993d048cf1428

mfd: tps80031: Support second level of charge_control interrupt

There is multiple independent case for charge control interrupt and
so exposing each of the case as separate interrupt number.

bug 842072

Original-Change-Id: I500d7e921e07b43de4eefdde2590f045022d8169
Reviewed-on: http://git-master/r/38732
Reviewed-by: Niket Sirsi <nsirsi@nvidia.com>
Tested-by: Niket Sirsi <nsirsi@nvidia.com>

Rebase-Id: R2a6a949e0c38731dd28af9c8bc67289f53c0066f

ARM: tegra: dvfs: Update Tegra3 CPU and core voltage dependencies

Updated implementation of CPU and core voltage dependencies so that
range limits can be changed for different versions of Tegra3 (rather
than use fixed limits across entire Tegra3 architecture). Decoupled
safe VDD step definition from range limit, and changed the step from
300mV to 100mV.

Bug 841286

Original-Change-Id: I63e0bc9751048741a47a40410b54863984f91aca
Reviewed-on: http://git-master/r/38179
Reviewed-by: Niket Sirsi <nsirsi@nvidia.com>
Tested-by: Niket Sirsi <nsirsi@nvidia.com>

Rebase-Id: R665a6f859aa744e1b64a19d9ba5aa2f37581103e

ARM: tegra: power: Refactored kernel powergate code

This change provides a centralized location for powergating modules.
It would take care of switching on/off clocks while un-powergating/
powergating modules respectively.

Bug: 814267
Original-Change-Id: Ic80dc517f634c29085c8e089bdaa32c6fd742710
Reviewed-on: http://git-master/r/31776
Reviewed-by: Niket Sirsi <nsirsi@nvidia.com>
Tested-by: Niket Sirsi <nsirsi@nvidia.com>

Rebase-Id: Rc0aac0edd4e693c15d22d998c882fceeeb85765d

tegra: power: correct LP0 sequence

Change-Id: I5f548f11059039cbd830be483ecfa0c6671002e7
Reviewed-on: http://git-master/r/47365
Tested-by: Cho-Che Cheng <jacheng@nvidia.com>
Reviewed-by: Daniel Willemsen <dwillemsen@nvidia.com>

Rebase-Id: Rd7ef967c8b40295a04a0447eb8bbc8e2d577a48e

tegra: power: add wakeup_key method

connect wakeup_key method to KEY_POWER (TEGRA_WAKE_GPIO_PV2)

Change-Id: I13b8f503399989bb06e97343711ed9e7348839ac
Reviewed-on: http://git-master/r/47364
Tested-by: Cho-Che Cheng <jacheng@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Chih-Lung Huang <lhuang@nvidia.com>
Reviewed-by: Daniel Willemsen <dwillemsen@nvidia.com>

Rebase-Id: Rffb10919b9cfa49c975f37d12646a34aeee44375

ARM: tegra: power: setup TTB0 for cacheable memory

Bug 862494

Change-Id: Ib7875ded150b3e9dc288a9ed90f6ded0a37014a3
Reviewed-on: http://git-master/r/47246
Tested-by: Jin Qian <jqian@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Daniel Willemsen <dwillemsen@nvidia.com>

Rebase-Id: R11be58a9cf3a46fadf985e209e26dc00a8d87c58

ARM: tegra2: power: fix LP2 statistics reporting

Bug 863108

Change-Id: I5cc4e3ba58daeaeb527871026c85bdca5f6362f2
Reviewed-on: http://git-master/r/47232
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-by: Peter Boonstoppel <pboonstoppel@nvidia.com>
Tested-by: Jin Qian <jqian@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Daniel Willemsen <dwillemsen@nvidia.com>

Rebase-Id: R843a5cf74874bad3999bc55caa0eb8cad04cc555

ARM: tegra: Fix build error when CONFIG_SMP is not selected

Change-Id: I2420730290c7ecb407e6f30c8a6159ceadfabbbe
Signed-off-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-on: http://git-master/r/47589
Reviewed-by: Daniel Willemsen <dwillemsen@nvidia.com>

Rebase-Id: Rb177b1e8ed9ce89c732319f49525588c5c0dd9d0

ARM: tegra: Delete obsolete tegra_audio_device declaration

Change-Id: I119fdbbc2440f8a7e64e2f3b5cec2ae4b182ee36
Signed-off-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-on: http://git-master/r/47592
Reviewed-by: Daniel Willemsen <dwillemsen@nvidia.com>

Rebase-Id: R891ed7225b634dc01aaf3f13dbe79fc1eae1c27c

ARM: tegra: Delete references to obsolete tegra_audio_device

Change-Id: Id234e2d264d70c2244f4040d74f43b5478043904
Signed-off-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-on: http://git-master/r/47591
Reviewed-by: Daniel Willemsen <dwillemsen@nvidia.com>

Rebase-Id: Re8ab569df562b66ffa14e589775968238fc4c338

ARM: tegra: Fix build error when CONFIG_PM_SLEEP is not selected

Change-Id: I65e18395eef3a36f6dd537d64d98ab970f166460
Signed-off-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-on: http://git-master/r/47590
Reviewed-by: Daniel Willemsen <dwillemsen@nvidia.com>

Rebase-Id: R2643d7665780442e71444999f21d96a508c7a062

ARM: tegra: workqueue: Unify spelling of 'freeze'+'able' to 'freezable'

In K39 , 'freezeable' is changed to 'freezable'.
Reference Commit Id 58a69cb47ec6991bf006a3e5d202e8571b0327a4.

Change-Id: Ie3f95db453205c05da4cf4e655ba8b12a126255b
Reviewed-on: http://git-master/r/47487
Tested-by: Gaurav Sarode <gsarode@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Daniel Willemsen <dwillemsen@nvidia.com>

Rebase-Id: R530643b91e8c252eb606ce7e789cfe34101f6edd

ASoC: Tegra: Tegra3 requires SND_SOC_TEGRA30_AHUB

Bug 862023

Change-Id: Ie16d410c7021640898bfbc8fcf451d14e832af6f
Reviewed-on: http://git-master/r/47155
Tested-by: Sumit Bhattacharya <sumitb@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Scott Peterson <speterson@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>

Rebase-Id: Raa466f8f365399c0091a173752dfc9d1c83316f8

video: tegra: Use new Tegra platform types

This change is needed to support three platforms, silicon,
fpga and simulation.

Change-Id: I70c6edbab85712b037b1ddf15ce72cf1a2affeba
Reviewed-on: http://git-master/r/36354
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: Rdd2875e5494a504dc4d2df0393bc798765a9b865

arm: tegra: Use new platform types

This change is needed to support three different platforms, silicon,
 fpga and simulation.

Change-Id: I407853e1d86accbe3686deb4f34571fe6b10bcce
Reviewed-on: http://git-master/r/36351
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: Rc4b424f1a55ffb71245f3a8330559258124e2a19

arm: tegra: Add platform types for Tegra

Change-Id: Ib9ef42efcbc24d1424a1b43e7d4ad46b97255aaa
Reviewed-on: http://git-master/r/36350
Reviewed-by: Yudong Tan <ytan@nvidia.com>
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: R99f25c1b92fe4a9322d83e00c9560fc7ada2b641

usb: tegra: Use new Tegra platform types

This change is needed to support three platforms, silicon,
fpga and simulation.

Change-Id: Ib34cc90ebd5a5c98c00c17d68d384e0b4f94fab8
Reviewed-on: http://git-master/r/36353
Reviewed-by: Mark Stadler <mastadler@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Tested-by: Yudong Tan <ytan@nvidia.com>

Rebase-Id: Rf4b3e027ded924286724f7b1a8643f810b503f69

rtc: tegra: Use new Tegra platform types.

This change is needed to support three platforms, silicon,
fpga and simulation.

Change-Id: I1e132fd744e1fe716c3098b117e38e3c77678b49
Reviewed-on: http://git-master/r/36352
Reviewed-by: Mark Stadler <mastadler@nvidia.com>
Tested-by: Yudong Tan <ytan@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>

Rebase-Id: Rb4c122fc6b87240fc5a14f1addb4d22e121a84a7

ARM: config: tegra3: Enable TPS80031, gpio reg

Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>

Rebase-Id: R0a2fb354b3b79058ef435577d44f11d595fe46c3

input: touch: atmel_mxt_ts: Prevent boot and resume hangs.

Prevents touchscreen hangs during initial TS boot, and TS resume.

BUG 847725
BUG 845156
BUG 846711

Original-Change-Id: Ia853574e4b2422eb9368fe37eaf7457bd4022df8
Reviewed-on: http://git-master/r/40261
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: Rc1de4685a4e85d761097142b39f2a672846b8c44

backlight: tegra_pwm: Add backlight type

Original-Change-Id: I43036163f62c33f29c915fd4fe37ea10f71dfb55
Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>

Rebase-Id: Re7c21b8cced25ed6e4038929a0f80892ec91b9a1

regulator: tps80031: Fix build warning

Original-Change-Id: I0bcfd38569b9a9a1cc21d0e9d12a0d114d87be9c
Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>

Rebase-Id: Rf1f1609942bd3ca4fae07ab37304cb214ab87774

mfd: tps80031: Update to new IRQ API

Original-Change-Id: Ic68fb22749dae71751c64326e0912d6267f1c886
Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>

Rebase-Id: Rd8742c88232a033d8648443bff0271727e713ff1

arm: tegra: cardhu: correct rail_names in ina219_platform_data

Bug 844743

Original-Change-Id: I7538342b2a267540ee14ddd70e10d0d71618d46e
Reviewed-on: http://git-master/r/39527
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Pritesh Raithatha <praithatha@nvidia.com>
Tested-by: Pritesh Raithatha <praithatha@nvidia.com>
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>

Rebase-Id: Rc4967909a7a47860073144c11f69b73453e1e897

video: tegra: host: No S_IWGRP permission for sysfs attrbs

Removing write permission for Group and others for sysfs:
"null_kickoff_pid" attribute as CTS test "android.permission
.cts.FileSystemPermissionTest#testAllFilesInSysAreNotWritable"
requires it as non-writable.

Bug 828100

Original-Change-Id: Ifa2ee439a63f0503bf10f10f3cf31cd7c91c2842
Reviewed-on: http://git-master/r/39367
Tested-by: Manoj Gangwal <mgangwal@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

Rebase-Id: Rd386df89e37ba55d9157bc71237175d0b6fa6f6b

arm: tegra: pm269: Low power mode to unused vddio-gmi pins

Putting the unused vddio_gmi pins into the low power mode.

bug 833087

Original-Change-Id: I7595d011a61d5993fee167e89ed7eb204d5cb6b6
Reviewed-on: http://git-master/r/37877
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Matthew Longnecker <mlongnecker@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>

Rebase-Id: R3fa74a5ebc7720b95f91f8da7b665e634522f210

arm: mfd/regulator: tps80031: Adding force_update for status register

The state register is read and write register, if read, it returned
current state, not current written value in register.
So if it want to write the value into state register, it must unconditional
write the value, don't use update(read and compare and then write).

Bug 838189

Original-Change-Id: I2555875a822f159e664b0834af2d00073c859acd
Signed-off-by: Jin Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/38396
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

Rebase-Id: Ra90d4ccbe0373bbdad44422e8ff6798eea96019a

media: video: update copyright headers

update headers for camera files

bug 846086

Original-Change-Id: Id53c77ead17b569ad05c0a5b8ec7f2a5d1aef869
Reviewed-on: http://git-master/r/39102
Reviewed-by: Erik M Lilliebjerg <elilliebjerg@nvidia.com>
Reviewed-by: Abhinav Sinha <absinha@nvidia.com>
Reviewed-by: Michael Stewart <mstewart@nvidia.com>
Tested-by: Frank Chen <frankc@nvidia.com>
Reviewed-by: Jonathan Mayo <jmayo@nvidia.com>

Rebase-Id: R4526cd043ef49dfa4a0c48f5942fca57e81eb4f0

ARM: tegra: clock: Change default sampling period to 12ms

Bug 845349

Original-Change-Id: I0ce1a5da9a80cea6a4e55bc92490e6ae8508e22f
Reviewed-on: http://git-master/r/39704
Tested-by: Thomas Cherry <tcherry@nvidia.com>
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

Rebase-Id: Rfc2bfc89082778e43d15406b0b5e53bdf845f08e

ARM: tegra: power: Restore cpufreq governor target

Restored cpufreq governor target frequency on exit from suspend.
Otherwise, CPU would stay at frequency set underneath the governor
by tegra driver on suspend entry.

Original-Change-Id: Iad96c7771bf89b78cdeb3e8f4e2c40b36e845b57
Reviewed-on: http://git-master/r/38390
Reviewed-by: Alex Courbot <acourbot@nvidia.com>
Tested-by: Alex Courbot <acourbot@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Narendra Damahe <ndamahe@nvidia.com>
Reviewed-by: Jin Qian <jqian@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

Rebase-Id: R12135cc7f8f940eac1653432786826bf2affec16

ARM: tegra: cardhu: Add 408MHz node to EMC DFS table

Bug 836260

Original-Change-Id: I4fb8e8eb3610676f89cb29ee0d10487c01200f95
Reviewed-on: http://git-master/r/39244
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: R1edb58986433fd6cc95ddecf0ef38e8c41f81fed

ARM: tegra: clock: Add/convert Tegra3 shared bus users

- Convert display users of emc shared bus from shared floor
users to shared bandwidth users

- Add shared ceiling user to each supported shared bus
(cbus, sbus, emc)

Bug 837005

Original-Change-Id: I526d06a7ddd6072ec8ac750c4ffbfb7aa1890ec8
Reviewed-on: http://git-master/r/39140
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: Raaca80423e60ee4c37e16c993641c2a5062bfd69

ARM: tegra: clock: Expand Tegra3 shared bus modes

Implemented 3 different modes of combining rate requests from shared
bus users :
- SHARED_FLOOR: cumulative floor request is determined by maximum rate
among all users in this mode and minimum bus rate
- SHARED_BW: cumulative bandwidth request is determined by adding rates
of all users in this mode together
- SHRED_CEILING: cumulative ceiling request is determined by minimum
rate among all users in this mode and maximum bus rate

Final shared bus rate is determined as minimum rate between cumulative
ceiling request and maximum of floor or bandwidth cumulative requests.

Up to now shared bus clocks supported only SHARED_FLOOR mode, and this
mode is kept as default mode for all users. Hence, no change in actual
shared bus operations.

Bug 837005

Original-Change-Id: I29f8215ba7bab4998fdd23b74c4f96611f5848fe
Reviewed-on: http://git-master/r/39139
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: Re9f9f87d58419a6756b7985c59743356c6a634bc

arm: tegra: usb_phy: pad power off

Turn off the pad power when hotplug support is not supported.

Bug 829628

Original-Change-Id: Iea61ca9ac387f475e177a1c69a97f323ca37659e
Reviewed-on: http://git-master/r/38696
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: Rf30be66234d431139f62480dda128ce6bda88bd9

ARM: tegra: dvfs: Set Tegra3 EMC max rate at 1.0V to 408MHz

Bug 836260

Original-Change-Id: I381619f6084a558f4c16142f8f0dfa3565ca2e94
Reviewed-on: http://git-master/r/39247
Tested-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Narendra Damahe <ndamahe@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Mandar Potdar <mpotdar@nvidia.com>

Rebase-Id: R0d2d4bd478f526d116a741916de5c2fc2df7a998

ARM: tegra: enterprise: proper emc table

Updated SDRAM emc clock table for below freqs.
25.5 MHz, 51 MHz, 102 MHz, 400 MHz.

Bug 832436

Original-Change-Id: I36e51172e98b20f8f099def3b72b503a68013a63
Signed-off-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-on: http://git-master/r/38056
Tested-by: Thomas Cherry <tcherry@nvidia.com>
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

Rebase-Id: R86b8a379ea13d6d555aff62aafe744248d62094e

ARM: tegra: power: Update Tegra3 EMC DFS table

Add EMC table for LP-DDR2 Samsung memory

Original-Change-Id: I931bbb0d2283ad94d130803cef7c08b6da5923a1
Reviewed-on: http://git-master/r/37757
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Raymond Poudrier <rapoudrier@nvidia.com>
Tested-by: Raymond Poudrier <rapoudrier@nvidia.com>
Tested-by: Gerrit_Virtual_Submit
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-by: Karan Jhavar <kjhavar@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

Rebase-Id: Racdadadfeb4438faab94ca2bea4d9665da381d18