6 years agoARM: tegra: use 150 milli ohms for RBAT
Sivaram Nair [Fri, 29 Mar 2013 18:37:54 +0000]
ARM: tegra: use 150 milli ohms for RBAT

Lookup table based RBAT is underperforming, so use 150 milli ohms as the
RBAT always for calculating the battery depletion.

Bug 1261008

Change-Id: Ief7c1bb751faf91f18947f45e521e06fa34d68b2
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-on: http://git-master/r/214616
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

6 years agoarm: tegra: soctherm: Rearrange code to prepare for OC alarms
Diwakar Tundlam [Thu, 28 Mar 2013 01:19:04 +0000]
arm: tegra: soctherm: Rearrange code to prepare for OC alarms

Change-Id: I0e0abd992930104060a99d38c171f11ee6f74ff5
Signed-off-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-on: http://git-master/r/213795
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Jinyoung Park <jinyoungp@nvidia.com>

6 years agoARM: tegra11: emc: adjust iso efficiency during camera
Jihoon Bang [Wed, 27 Mar 2013 01:51:33 +0000]
ARM: tegra11: emc: adjust iso efficiency during camera

If vi is on, then apply 45% of iso efficiency.
It will help avoid power regression by not asking too
high emc frequency.

Bug 1246180

Change-Id: I0eb74b29f81a99ccdfceb08d56f1b7f231b26d13
Signed-off-by: Jihoon Bang <jbang@nvidia.com>
Reviewed-on: http://git-master/r/213380
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User

6 years agoARM: tegra11: clock: Re-factor EMC bw requirement calculation
Alex Frid [Tue, 26 Mar 2013 02:58:22 +0000]
ARM: tegra11: clock: Re-factor EMC bw requirement calculation

- Separated iso EMC shared users (display and camera) from other
bandwidth shared users
- Added shared user id flags to EMC shared users that may affect
maximum iso share allocation
- Determined EMC bw requirement as maximum of total bw requested
by all bw users, and iso bw scaled up to guarantee allocated share

Bug 1253271

Change-Id: If4ab7931c668e063cf607fc43b34e1e09574d0bd
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/212913
Reviewed-by: Daniel Solomon <daniels@nvidia.com>
Tested-by: Daniel Solomon <daniels@nvidia.com>
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

6 years agoARM: tegra11: clock: Add emc use case table
Alex Frid [Tue, 26 Mar 2013 06:31:10 +0000]
ARM: tegra11: clock: Add emc use case table

Added initial table to specify iso bandwidth share dependency on emc
use cases. Just two use cases: display only and display + camera are
identified for now.

Bug 1253271

Change-Id: I499c45914d0296f2106511c8ddecbcdb0a818d7f
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/212912
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Daniel Solomon <daniels@nvidia.com>
Tested-by: Daniel Solomon <daniels@nvidia.com>
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

6 years agoARM: tegra: clock: Support variable iso share with emc usage
Alex Frid [Tue, 26 Mar 2013 05:30:32 +0000]
ARM: tegra: clock: Support variable iso share with emc usage

Added mechanism to determine maximum allowed iso bandwidth share
depending on emc usage. Each use case is identified by a combination
of shared emc user clocks turned on. The list of use cases and the
respective iso share percentage is to be provided by chip specific
tables.

This commit only added variable iso share APIs and emc shared users
enumeration. No platform specific tables are specified, and APIs are
not used.

Bug 1253271

Change-Id: If08ce2c0e180de600ccb28b91381066543659180
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/212911
Reviewed-by: Daniel Solomon <daniels@nvidia.com>
Tested-by: Daniel Solomon <daniels@nvidia.com>
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

6 years agotty: serial: tegra: wait for tasklets during shutdown
Sang-Hun Lee [Thu, 21 Mar 2013 23:44:37 +0000]
tty: serial: tegra: wait for tasklets during shutdown

Problem description:
 - Race between tegra_uart_tasklet_action and tegra_shutdown
 - When uart_close calls tegra_shutdown, it removes tty_struct
   from tty_port

Fix description:
 - Wait for tasklets to complete within tegra_shutdown before
   returning to the caller

Bug 1246098

Change-Id: Ic211d6c8b9a5e0e6a7dc75e9dffcf6315b776cd7
Signed-off-by: Sang-Hun Lee <sanlee@nvidia.com>
Reviewed-on: http://git-master/r/211843
(cherry picked from commit cc22b4724cac21b9bf24f66560c1b4df7e7c9712)
Reviewed-on: http://git-master/r/211845
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Pradeep Goudagunta <pgoudagunta@nvidia.com>
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>

6 years agousb: gadget: tegra: add extcon device notification
Xin Xie [Tue, 26 Feb 2013 02:53:34 +0000]
usb: gadget: tegra: add extcon device notification

Add extcon device notification in usb gadget driver
to notify different types of usb cable connections.

Bug 1261946

Change-Id: I7c9a6035ba4f2414dc38910d4f700bc49a91be0f
Signed-off-by: Xin Xie <xxie@nvidia.com>
Reviewed-on: http://git-master/r/207219
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Rakesh Bodla <rbodla@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

6 years agoarm: tegra: macallan: set vdd_rtc to 950mV during lp0
Kerwin Wan [Thu, 28 Mar 2013 10:17:16 +0000]
arm: tegra: macallan: set vdd_rtc to 950mV during lp0

When vdd_rtc is set to 900mv, cpu will meet hard hang after
wake up from lp0. Hardware team should do WAT to get the proper margin
for vdd_rtc. Set vdd_rtc to 950mV to avoid this issue now.

Bug 1262674

Change-Id: Ic3ddfeb586a78e6731178bb6bd672dda0ae49566
Signed-off-by: Kerwin Wan <kerwinw@nvidia.com>
Reviewed-on: http://git-master/r/213967
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

6 years agoARM: tegra114: config: enable kernel memcpy optimization
Chandler Zhang [Tue, 19 Mar 2013 08:07:41 +0000]
ARM: tegra114: config: enable kernel memcpy optimization

Turn on USE_LDRDSTRD_OVER_STMLDM to optimize throughput.
Set ARM_PLD_SIZE to 64.
The optimization is for Cortex A15 only.

Bug 1185248

Change-Id: I96fb7f3adb0f2aa004e1373d6a2cd4e985b62c4e
Signed-off-by: Chandler Zhang <chazhang@nvidia.com>
Reviewed-on: http://git-master/r/212964
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

6 years agomedia: video: edp states not available info
Bibek Basu [Mon, 25 Mar 2013 04:12:02 +0000]
media: video: edp states not available info

This patch changes the EDP states not available from
platform data, warning message into a info message
in kernel log.

Bug 1249598

Change-Id: I957f26d93967cc3f74ee206b2e29783b0e07fc97
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/212450
Reviewed-by: Kiran Adduri <kadduri@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Charlie Huang <chahuang@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agousb: xhci: tegra: enable fw messaging
Ajay Gupta [Thu, 28 Mar 2013 16:14:36 +0000]
usb: xhci: tegra: enable fw messaging

This is needed to enabled fw messageing

Bug 1237223

Change-Id: I55c2b129b4e60a6263ff0e179bcf46803afef452
Signed-off-by: Ajay Gupta <ajayg@nvidia.com>
Reviewed-on: http://git-master/r/214197
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

6 years agoARM: tegra: Change NCT72 conversion rate for Dalmore
Daniel Solomon [Thu, 28 Mar 2013 18:21:16 +0000]
ARM: tegra: Change NCT72 conversion rate for Dalmore

Reduce conversion rate to 4Hz on Dalmore. It was confirmed that
this is a sufficiently fast to detect crossing of key temperature
points during worst case temperature change rates.

Bug 1261703

Change-Id: I2078937e1eb3b8fc72bf5e404da7f964d45fe91e
Signed-off-by: Daniel Solomon <daniels@nvidia.com>
Reviewed-on: http://git-master/r/214086
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

6 years agoARM: tegra: Change NCT72 conversion rate for Pluto
Daniel Solomon [Thu, 28 Mar 2013 18:21:16 +0000]
ARM: tegra: Change NCT72 conversion rate for Pluto

Reduce conversion rate to 4Hz on Pluto. It was confirmed that
this is a sufficiently fast to detect crossing of key temperature
points during worst case temperature change rates.

Bug 1261703

Change-Id: I701cb1a93b513c7a26292f3f5df20a182ae00130
Signed-off-by: Daniel Solomon <daniels@nvidia.com>
Reviewed-on: http://git-master/r/214084
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

6 years agovide: tegra: dc: remove iso efficiency
Jihoon Bang [Tue, 26 Mar 2013 21:25:26 +0000]
vide: tegra: dc: remove iso efficiency

Since clock framework take care of iso efficiency, DC
doesn't have to consider it.

Bug 1246180

Change-Id: Iaab67018f81450bcb84fd6fbc67d56c375b55f99
Signed-off-by: Jihoon Bang <jbang@nvidia.com>
Reviewed-on: http://git-master/r/213205
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User

6 years agovideo: tegra: camera: remove iso efficiency
Jihoon Bang [Tue, 26 Mar 2013 21:23:33 +0000]
video: tegra: camera: remove iso efficiency

Remove iso efficiency since it will be taken care
of in clock framework.

Bug 1246180

Change-Id: I666bebd4646d9483fd09c9000b231e7d17079d29
Signed-off-by: Jihoon Bang <jbang@nvidia.com>
Reviewed-on: http://git-master/r/213204
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User

6 years agoxhci: tegra: fix race between remote wake and host wake
joyw [Tue, 19 Mar 2013 10:20:03 +0000]
xhci: tegra: fix race between remote wake and host wake

A race condition has been discovered during stress testing remote wake
from LP0. Occasionally, remote wake doesn't get served soon enough and
later hub driver tries to do host initiate resume for the port. That
causes the port staying PLS=RESUME with PLC cleared.

This patch fix the race by letting remote wake being completed before
hub driver can resume port.

Bug 1235232

Change-Id: I0595cfca6bb97df96e8b8554ece18041787cb6b9
Signed-off-by: joyw <joyw@nvidia.com>
Signed-off-by: JC Kuo <jckuo@nvidia.com>
Reviewed-on: http://git-master/r/210752
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Ashutosh Jha <ajha@nvidia.com>
Reviewed-by: Henry Lin <henryl@nvidia.com>

6 years agopower: max17042: use RBAT lut for depletion calc
Sivaram Nair [Thu, 28 Mar 2013 12:49:50 +0000]
power: max17042: use RBAT lut for depletion calc

Patch to calculate RBAT from remaining battery capacity using the RBAT
lookup table.

Change-Id: I59aa9b9a4d34cc96094f51137afdbef53b1be4fd
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-on: http://git-master/r/213981
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

6 years agoARM: tegra: add RBAT mapping data for pluto
Sivaram Nair [Thu, 28 Mar 2013 12:15:18 +0000]
ARM: tegra: add RBAT mapping data for pluto

RBAT mapping table added for the pluto fuel gauge platform data.

Bug 1261008

Change-Id: I8090bbdf7306ccce4119b9ccddcd5b029716e4e8
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-on: http://git-master/r/213980
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

6 years agopower: max17042: add rbat mapping
Sivaram Nair [Thu, 28 Mar 2013 11:28:37 +0000]
power: max17042: add rbat mapping

Added a new struct to the platform data for mapping RBAT to battery
level capacity.

Bug 1261008

Change-Id: I37b75b4f7a5db4a2c08a4ff17839af71640e62ea
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-on: http://git-master/r/213979
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

6 years agopower: max17042: remove temperature from calc
Sivaram Nair [Thu, 28 Mar 2013 11:09:45 +0000]
power: max17042: remove temperature from calc

Fuel gauge temperature readings are not working correctly - so remove
this variable from battery depletion calculations and assume room
temperature values.

Change-Id: I37d5ab043caa4e5f737c87e1fa917bd4e989d62f
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-on: http://git-master/r/213978
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

6 years agocpufreq: interactive: Fix race when canceling timer at min freq
Peter Boonstoppel [Wed, 27 Mar 2013 17:29:34 +0000]
cpufreq: interactive: Fix race when canceling timer at min freq

When target_freq reaches policy->min the governor calls del_timer()
upon entry to idle. However, it is possible for the timer handler to
still be running at this time, in which case it could rearm itself
such that the timer stays pending.

If we exit from idle before the next timer fires, the timer handler
will find idle_exit_time == 0 and will exit without rearming, from
this point on frequency will be stuck at the current level until we
enter idle again. This sometimes causes frequency to get stuck at
minimum, with cpu load at 100%, causing serious performance problems.

This patch replaces the del_timer() with del_timer_sync().

Bug: 1173466

(Issue no longer exists in upstream interactive governor)

Change-Id: Ic61194f2afb4ac041e18c7556e6ed4aee9c90303
Signed-off-by: Peter Boonstoppel <pboonstoppel@nvidia.com>
Reviewed-on: http://git-master/r/213638
Reviewed-by: Sang-Hun Lee <sanlee@nvidia.com>
Reviewed-by: Yong Goo Yi <yyi@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

6 years agoasoc: tegra: Add rt5640 pll configuration for hifi i2s slave
Rahul Mittal [Thu, 28 Mar 2013 18:46:17 +0000]
asoc: tegra: Add rt5640 pll configuration for hifi i2s slave

- Configure codec PLL to generate 512*fs mhz clock from 12mhz clk_m input
- Correct bclk_ms bit in codec which should be 1 for frame_size = 32 bits

Bug 1256349

Change-Id: I94238622a43aff9efdefbf8aaf68e655fa6662cd
Signed-off-by: Rahul Mittal <rmittal@nvidia.com>
Reviewed-on: http://git-master/r/211493
Reviewed-by: Scott Peterson <speterson@nvidia.com>
GVS: Gerrit_Virtual_Submit

6 years agoarm: tegra3: config: Add INV_MPU and INV_AK8975
Arun Mohare [Mon, 18 Mar 2013 20:58:00 +0000]
arm: tegra3: config: Add INV_MPU and INV_AK8975

Modify tegra3_defconfig to enable
Accelerometer, gyro and compass on cardhu.

Bug 1255587

Change-Id: I8b01668bbfe5152ed1d02033121df3772043bd86
Signed-off-by: Arun Mohare <arg@nvidia.com>
Reviewed-on: http://git-master/r/210485
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

6 years agotty: serial: 8250: tegra fix spurious interrupts
Pradeep Goudagunta [Tue, 19 Feb 2013 11:22:14 +0000]
tty: serial: 8250: tegra fix spurious interrupts

This is the WAR for spurious interrupts for PORT_TEGRA.

Bug 1229695

Change-Id: Ia4c92577399334a50faacabd38ae3fac4f71a9d3
Signed-off-by: Pradeep Goudagunta <pgoudagunta@nvidia.com>
Reviewed-on: http://git-master/r/205164
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
GVS: Gerrit_Virtual_Submit

6 years agoARM: tegra: Correct fuse bits check for RAM repair
Seshendra Gadagottu [Fri, 22 Mar 2013 18:41:08 +0000]
ARM: tegra: Correct fuse bits check for RAM repair

If any one of spare_10 or spare_11 bits are set then
trigger RAM repair

Bug 1211371

Change-Id: I55f7b2a5d03f2d61cd7c840392241b1b92dafb37
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/212183
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

6 years agopower: max77665: add watchdog timer for charging
Rakesh Bodla [Thu, 28 Mar 2013 07:12:21 +0000]
power: max77665: add watchdog timer for charging

Bug 1242272

Change-Id: Ie09fccea64c0953be0120b505557bc791ed150ca
Signed-off-by: Xin Xie <xxie@nvidia.com>
Signed-off-by: Rakesh Bodla <rbodla@nvidia.com>
Reviewed-on: http://git-master/r/207405
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

6 years agopower: max77665: refactor err code handling
Rakesh Bodla [Thu, 28 Mar 2013 06:38:48 +0000]
power: max77665: refactor err code handling

Bug 1242272

Change-Id: I9dc9d0578557f2de5f3e11c3779f5f3a89bf364b
Signed-off-by: Xin Xie <xxie@nvidia.com>
Signed-off-by: Rakesh Bodla <rbodla@nvidia.com>
Reviewed-on: http://git-master/r/207404
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit

6 years agoARM: tegra: roth: Check if board is Roth
Shobek Sam Attupurath [Fri, 15 Feb 2013 07:17:11 +0000]
ARM: tegra: roth: Check if board is Roth

Check whether board is roth before wifi power on

Bug 1236452

Change-Id: Iaedeb2a956f20795fd3d0514c4021ec2003b1bd7
Signed-off-by: Shobek Sam Attupurath <sattupurath@nvidia.com>
Reviewed-on: http://git-master/r/201045
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

6 years agoextcon: palmas: make vbus/ID cable detection to platform choice
Laxman Dewangan [Mon, 25 Mar 2013 16:12:42 +0000]
extcon: palmas: make vbus/ID cable detection to platform choice

Enable vbus/id pin detection only if it is enabled through
platform data. Also provide the connection name through platform
data.

bug 1242273

Change-Id: I6a95552c46e3c850549da656c6947f9bdcd7423f
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Sumit Sharma <sumsharma@nvidia.com>
Reviewed-on: http://git-master/r/212609
Tested-by: Yunfan Zhang <yunfanz@nvidia.com>
Reviewed-by: Yunfan Zhang <yunfanz@nvidia.com>
GVS: Gerrit_Virtual_Submit

6 years agoARM: tegra: thermal: Update due to struct_est_data modification
Jinyoung Park [Thu, 21 Mar 2013 08:48:08 +0000]
ARM: tegra: thermal: Update due to struct_est_data modification

Updated initialization of skin_data because struct therm_est_data in
include/linux/therm_est.h is modified; adding multiple trip points,
removing get_temp callback in struct therm_est_subdevice, and changing
type of devs from flexible array to pointer.

Bug 1233363
Bug 1236444

Change-Id: Id170d06ddcffbe546b01003e49fe327f361df4b3
Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/211124
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

6 years agoRevert "USB: Handle warm reset failure on empty port."
Ajay Gupta [Wed, 27 Mar 2013 18:18:51 +0000]
Revert "USB: Handle warm reset failure on empty port."

This reverts commit 9dbcaec830cd97f44a0b91b315844e0d7144746b.

Bug 1261759

Change-Id: I12b512e3a8c54b8066166f1203c4bd7d5b924602
Signed-off-by: Ajay Gupta <ajayg@nvidia.com>
Reviewed-on: http://git-master/r/213735
Reviewed-by: Ashutosh Jha <ajha@nvidia.com>
GVS: Gerrit_Virtual_Submit

6 years agomisc: tegra-throughput: fix fps reading
Ilan Aelion [Tue, 26 Mar 2013 00:31:16 +0000]
misc: tegra-throughput: fix fps reading

fixed a bug in values written to /d/fps

Bug 1171636

Change-Id: Idb6036c5658c1a5c8df79a4bda982655a63ad053
Signed-off-by: Ilan Aelion <iaelion@nvidia.com>
Reviewed-on: http://git-master/r/212823
Reviewed-by: Simo Melenius <smelenius@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

6 years agodrivers: misc: therm_est: Change flexible array to pointer
Jinyoung Park [Thu, 21 Mar 2013 10:58:42 +0000]
drivers: misc: therm_est: Change flexible array to pointer

Changed type of devs from flexible array to pointer in struct therm_est_data.

Bug 1233363
Bug 1236444

Change-Id: Ic2c9591314aca8e3bea28b85bf53327c5c73039f
Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/211612
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

6 years agodrivers: misc: therm_est: Add therm_est_subdev_get_temp function
Jinyoung Park [Thu, 21 Mar 2013 07:59:54 +0000]
drivers: misc: therm_est: Add therm_est_subdev_get_temp function

Added therm_est_subdev_get_temp function instead of get_temp callback in
struct therm_est_subdevice in order to remove redeundancy code.

Bug 1233363
Bug 1236444

Change-Id: If1126f9227b6821a79ed1d9718ed4cd7cea3c540
Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/211539
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

6 years agodrivers: misc: therm_est: Add multiple trip points support
Jinyoung Park [Thu, 21 Mar 2013 07:44:38 +0000]
drivers: misc: therm_est: Add multiple trip points support

Replaced cdev_typa and trip_temp to struct thermal_trip_info to support
multiple trip points on therm_est.
And the struct thermal_trip_info has hysteresis for trip temp. So applied
hysteresis to trip temp.

Bug 1233363
Bug 1236444

Change-Id: I6ce2806a323c25ec298291d1e4ee067c3adaebfa
Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/211123
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Hyungwoo Yang <hyungwooy@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

6 years agousb: otg: tegra: handle resume for all id det types
Rakesh Bodla [Tue, 26 Mar 2013 08:18:06 +0000]
usb: otg: tegra: handle resume for all id det types

Adding the support in suspend/resume for all
id detection types.

Bug 1228619

Change-Id: I10686d4e848eb97de6457b1a104afb74015584a7
Signed-off-by: Rakesh Bodla <rbodla@nvidia.com>
Reviewed-on: http://git-master/r/212968
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

6 years agomfd: palmas: fix irq missing issue
Yunfan Zhang [Tue, 26 Mar 2013 07:52:30 +0000]
mfd: palmas: fix irq missing issue

Should NOT disable irq during suspend, or there might be pending
interrupt to abort suspend flow and make the secondary irq not be
processing that will cause PMIC can't detect coming interrupts any more

Bug 1253337

Change-Id: If7d99647b049446fe4ae7dfdc4c95a8c6577af78
Signed-off-by: Yunfan Zhang <yunfanz@nvidia.com>
Reviewed-on: http://git-master/r/212934
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
GVS: Gerrit_Virtual_Submit

6 years agovideo: tegra: dc: calculate LA based on real bw
Jihoon Bang [Mon, 25 Mar 2013 22:21:49 +0000]
video: tegra: dc: calculate LA based on real bw

LA value was calculated with iso memory BW not with
real memory BW. It caused LA to be zero.

Bug 1246180

Change-Id: I31120608f1d99ec1d046cfb219eeb2babd198c6b
Signed-off-by: Jihoon Bang <jbang@nvidia.com>
Reviewed-on: http://git-master/r/212797
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

6 years agoARM errata: A memory read can stall indefinitely in the L2 cache
Bo Yan [Mon, 25 Mar 2013 21:21:30 +0000]
ARM errata: A memory read can stall indefinitely in the L2 cache

Define a configuration option for platform to implement

Change-Id: I352c644a33ebbf809e450004a01394f07f2903b7
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/212781

6 years agoarm: tega: pluto: Fix pinmux for tearing signal
Animesh Kishore [Wed, 27 Mar 2013 05:31:10 +0000]
arm: tega: pluto: Fix pinmux for tearing signal

pin kb_row6 must be muxed to displaya_alt.

Bug 1259733

Change-Id: I962cb796f573585a95864a8b97964ccafb1f74db
Signed-off-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-on: http://git-master/r/212606
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

6 years agoarm: tegra: fuse: Fix sysfs R/W functions
Sumit Sharma [Wed, 20 Mar 2013 10:04:31 +0000]
arm: tegra: fuse: Fix sysfs R/W functions

Modified store & show functions for fuse sysfs R/W

Bug 1255974

Change-Id: Ifb4b02b2f0d051b4936e65871afe2ac376e553cc
Signed-off-by: Sumit Sharma <sumsharma@nvidia.com>
Reviewed-on: http://git-master/r/211443
(cherry picked from commit cdef8a802a905af0dce1eb3173e59d06fd4cc09c)
Reviewed-on: http://git-master/r/212491
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>

6 years agoarm: tegra: fuse: Fix size of fuse array
Sumit Sharma [Mon, 18 Mar 2013 06:16:23 +0000]
arm: tegra: fuse: Fix size of fuse array

Fixed size of fuse array in order to cover PKC_DISABLE fuse
during read/write operations

Bug 1249668

Change-Id: I7f4325b740b420b9ca3ac0dcce6111d180f26cf3
Signed-off-by: Sumit Sharma <sumsharma@nvidia.com>
Reviewed-on: http://git-master/r/211442
(cherry picked from commit a310acc3fa4e135e989aee8c09156f4a73eb9634)
Reviewed-on: http://git-master/r/212490
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>

6 years agoARM: tegra11: clock: Add EMC DPD control to EMC DFS
Alex Frid [Sun, 24 Mar 2013 05:44:14 +0000]
ARM: tegra11: clock: Add EMC DPD control to EMC DFS

Added EMC_SEL_DPD_CTRL register to the list of burst registers updated
during EMC clock rate change. Increased EMC DFS table revision to 4.2.

Bug 1259481

Change-Id: I5b46fefdadfd8f4cbe0f56de0a9e0eaeecf6a1c5
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/212385
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

6 years agoThermal: pid_thermal_gov: Separate compensation into up and down compensations
Jinyoung Park [Fri, 22 Mar 2013 11:49:33 +0000]
Thermal: pid_thermal_gov: Separate compensation into up and down compensations

Separated compensation into up and down compensations in order to apply
different compensation rate to each cases.

Bug 1200111

Change-Id: I236750009d5d64ea09508cd1864efb7bfb99ee58
Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/212090
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

6 years agoThermal: pid_thermal_gov: Apply compenstaion even if sum_err is 0 or max
Jinyoung Park [Fri, 22 Mar 2013 04:41:05 +0000]
Thermal: pid_thermal_gov: Apply compenstaion even if sum_err is 0 or max

Applied compensation even if sum_err is 0 or max to prevent determining
target state to 0 in short time.

Bug 1200111

Change-Id: I52a8bbeb4ae8553f14401cd0eaa4508337111955
Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/211960
GVS: Gerrit_Virtual_Submit
Reviewed-by: Edward Riegelsberger <eriegels@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Tested-by: Diwakar Tundlam <dtundlam@nvidia.com>

6 years agousb: xhci: tegra: clock code cleanups
Ajay Gupta [Wed, 20 Mar 2013 23:10:59 +0000]
usb: xhci: tegra: clock code cleanups

Changes:
- no need to enable ss_src clock
- clean uneeded clk uses such as pllu_clk, utmip_clk, plle_re_vco_clk
- killed clk wash .probe()
- don't enable dev clocks
- change ss_clk to ss_src_clk
- change ss/host_partition_clk to ss/host_clk

Bug 1249124

Change-Id: I5509063339e03268c1e371d3e2a15ca0739a02af
Signed-off-by: Ajay Gupta <ajayg@nvidia.com>
Reviewed-on: http://git-master/r/211865
Reviewed-by: Ashutosh Jha <ajha@nvidia.com>

6 years agoARM: tegra: mipi-cal aperture
Charlie Huang [Sat, 2 Mar 2013 03:20:09 +0000]
ARM: tegra: mipi-cal aperture

add mipi-cal register mapping feature, so user space can access.

bug 1168468

Change-Id: I71faf09e7b41be4e6eb5a25c2e2d17e24545d719
Signed-off-by: Charlie Huang <chahuang@nvidia.com>
Reviewed-on: http://git-master/r/205741
(cherry picked from commit ae6e2b831e0fea0f9b7db718886182ea7cb2b3e9)
Reviewed-on: http://git-master/r/211740
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

6 years agoARM: tegra114: Change of_platform_populate call order for DT
Jinyoung Park [Fri, 15 Mar 2013 08:19:44 +0000]
ARM: tegra114: Change of_platform_populate call order for DT

The of_platform_populate function should be called before
platform_driver_register function call to create a platform_device
for the provided device nodes.

Bug 1243373

Change-Id: I9cedc3ebc89178b8eceb4e9ff257a160c8f6d0ce
Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/209936
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

6 years agoARM: tegra: Atomics support
Bo Yan [Wed, 13 Mar 2013 20:55:05 +0000]
ARM: tegra: Atomics support

This can be used if spin lock type of synchronization is needed
between two different processors. The two different processors
can be ARM7 and Cortex-A9/A15, or any two cores in CPU complex.

If cache and MMU are disabled, the APIs provided by this change
can't be used directly since they require virtual addresses. So
user has to access atomics hardware differently.

Change-Id: I6498415ab206d6032d54125fe680c614c7360dc1
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/209009
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

6 years agoARM: tegra: new EDP power cap levels
Sivaram Nair [Fri, 22 Mar 2013 09:25:58 +0000]
ARM: tegra: new EDP power cap levels

Adjusting the power cap levels to have closer match with the AP+DRAM CPU
power budget

Bug 1252116

Change-Id: I5431b323c6d193154f515405a947a6e85fc6d4b4
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-on: http://git-master/r/212142
GVS: Gerrit_Virtual_Submit
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

6 years agoasoc: tegra: aic326x: Use avdd_audio regulator
Vijay Mali [Thu, 21 Mar 2013 15:09:05 +0000]
asoc: tegra: aic326x: Use avdd_audio regulator

- Enable avdd_audio regulator during playback on Headphone and Speaker.
- This prevent leakage current in codec.
- Improve codec power numbers.

Bug 1238662

Change-Id: Ie9fa31b6291c06ad4f83138c4e595fb4da29a7f9
Signed-off-by: Vijay Mali <vmali@nvidia.com>
Reviewed-on: http://git-master/r/211670
Reviewed-by: Ravindra Lokhande <rlokhande@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Niranjan Wartikar <nwartikar@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agoARM errata: Writing ACTLR.SMP when the L2 cache has been idle for an extended period...
Bo Yan [Mon, 25 Mar 2013 20:27:41 +0000]
ARM errata: Writing ACTLR.SMP when the L2 cache has been idle for an extended period may not work correctly

This workaround is for ARM errata 799270 which is applicable to
Cortex-A15 up to revision R2P4. The workaround is to read from
a device register and create a data dependency between this read
and the modification of ACTLR.

Change-Id: I26813f17a8a9c6a90446ddeb943ef318e3c69770
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/212770
Reviewed-by: Bobby Meeker <bmeeker@nvidia.com>

6 years agoARM: tegra114: Enable ARM errata 799270
Bo Yan [Mon, 25 Mar 2013 20:20:55 +0000]
ARM: tegra114: Enable ARM errata 799270

bug 1195192

Change-Id: Ib5b0c73f42f73610ec78464dcf789e38d8cab927
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/212769
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bobby Meeker <bmeeker@nvidia.com>

6 years agoARM: tegra114: Implement ARM errata 799270 properly
Bo Yan [Thu, 21 Mar 2013 22:15:32 +0000]
ARM: tegra114: Implement ARM errata 799270 properly

The ARM errata 799270 requires a data dependency between the returning
device load data and MCR instruction that sets ACTLR.SMP bit. Fix the
current workaround so it confirms to errata document.

bug 1195192

Change-Id: Ideeb3dd3d865323d59ae4bc7a2d40889acfe379d
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/211812
Reviewed-by: Bobby Meeker <bmeeker@nvidia.com>

6 years agoARM: tegra11: clock: Disable secondary dividers
Alex Frid [Sat, 23 Mar 2013 06:45:02 +0000]
ARM: tegra11: clock: Disable secondary dividers

During clock initialization disabled secondary dividers of disabled
PLLs (just in case if such divider is left enabled by boot-loader).

Change-Id: I69d510213b82c8860f040a786386489ac4dcf720
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/212384
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bo Yan <byan@nvidia.com>
Reviewed-by: Kaz Fukuoka <kfukuoka@nvidia.com>

6 years agoARM: tegra: clock: Change clock table initialization order
Alex Frid [Sun, 24 Mar 2013 04:18:46 +0000]
ARM: tegra: clock: Change clock table initialization order

When initializing clocks from table, enable the clock (if requested)
before changing clock parent and/or setting the rate. The latter two
operations would do balanced enable/disable of the target clock anyway.
So, if the clock is to be enabled eventually, better to do it first,
and avoid further unnecessary switching.

Change-Id: I70912f2d318ea5926e94c494726cff3bc16787d4
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/212383
Reviewed-by: Kaz Fukuoka <kfukuoka@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

6 years agoARM: tegra: dvfs: Always apply dvfs rail thermal floors
Alex Frid [Fri, 22 Mar 2013 04:32:10 +0000]
ARM: tegra: dvfs: Always apply dvfs rail thermal floors

Re-factored dvfs rail thermal control so that thermal floors are
applied even when cooling devices are not present or not supported.
Maximum (cold) floor will be set in such case to be safe at any
temperature. Added warnings on different thermal floors and cooling
devices configuration missmatches.

Bug 1248374

Change-Id: I7e0917d15c44587d32d4fad446dcb2dae12c6fb7
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/212323
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

6 years agoARM: tegra: dvfs: Don't duplicate cpu rail trip-points
Alex Frid [Sat, 23 Mar 2013 01:30:24 +0000]
ARM: tegra: dvfs: Don't duplicate cpu rail trip-points

Enforced common set of cpu rail trip-points in dfll and pll modes by
pointing to the same cooling device structure (instead of allocating
two identical structures).

Skipped registration of cpu rail dfll mode trip-points, when they are
the same as in pll mode

Bug 1248374

Change-Id: I94df1ca80ac5aeb672c15ff185f7c2c30f1c66ba
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/212322
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

6 years agonohz: stat: Fix CPU idle time accounting
Bo Yan [Fri, 22 Mar 2013 21:03:26 +0000]
nohz: stat: Fix CPU idle time accounting

Since cpustat[CPUTIME_IDLE] is never connected to ts->idle_sleeptime,
never read from cpustat[CPUTIME_IDLE] when reporting stats in
/proc/stat.

Note this was rejected by Michal Hocko when it was initially proposed
by Martin Schwidefsky in LKML, so if you want to upstream it, better
find an alternative (either completely disable cpustat[CPUTIME_IDLE]
for CONFIG_NO_HZ or somehow connect them to keep them in sync.)

bug 1190321

Change-Id: Idc92488910b826aff850a010016d8326c7ab9e6c
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/212224
Reviewed-by: Liang Cheng (SW) <licheng@nvidia.com>
Tested-by: Liang Cheng (SW) <licheng@nvidia.com>
Reviewed-by: Peter Boonstoppel <pboonstoppel@nvidia.com>

6 years agovideo: tegra: camera: hold disa when ve is powered.
Kevin Huang [Fri, 22 Mar 2013 01:44:53 +0000]
video: tegra: camera: hold disa when ve is powered.

Bug 1256678

Change-Id: I44d153eb2ccc6dbd761dc16e8647455c639a6dae
Signed-off-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-on: http://git-master/r/211922
GVS: Gerrit_Virtual_Submit
Reviewed-by: Kerwin Wan <kerwinw@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

6 years agoARM: tegra: clock: Verify initial cbus pll descendants
Alex Frid [Sun, 17 Mar 2013 06:45:19 +0000]
ARM: tegra: clock: Verify initial cbus pll descendants

During clock initialization verified that children of cbus plls are
either disabled or known cbus clients (the latter will be backed up
on different pll while cbus pll is re-locked).

Change-Id: Ic03caf204e6d96b2ece0dbb8d80c44836c42590b
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/210236
GVS: Gerrit_Virtual_Submit
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Reviewed-by: Kaz Fukuoka <kfukuoka@nvidia.com>
Reviewed-by: Prashant Malani <pmalani@nvidia.com>

6 years agoARM: tegra: pluto: set sleep-time pinmux settings for VDDIO_GMI_AP
Eric Miao [Fri, 15 Mar 2013 08:11:17 +0000]
ARM: tegra: pluto: set sleep-time pinmux settings for VDDIO_GMI_AP

Reconfigure GMI pins to save additional power on rail VDDIO_GMI_AP
during sleep time.

Bug 1247754

Change-Id: I79559c75b800d3b208a4677b83974fb71d615ce2
Signed-off-by: Eric Miao <emiao@nvidia.com>
Reviewed-on: http://git-master/r/212014
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

6 years agoRevert "ARM: tegra: pluto: reduce power on VDDIO_GMI_AP"
Eric Miao [Fri, 15 Mar 2013 08:04:37 +0000]
Revert "ARM: tegra: pluto: reduce power on VDDIO_GMI_AP"

To save power on rail VDDIO_GMI_AP, the pinmux settings for the
relevant pins have been modified, yet this makes touch unstable.
Revert this patch firstly, and we will add support for sleep-time
pinmux settings.

Bug 1247754

This reverts commit ccaffae0763f6575421b91ab4c20d4344d48a53b.

Change-Id: I164be76924740141c13c3c8ebc987382cd1eff1b
Signed-off-by: Eric Miao <emiao@nvidia.com>
Reviewed-on: http://git-master/r/212012
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

6 years agoarm: tegra: pinmux: t114: correct pingroup func
Sachin Nikam [Thu, 21 Mar 2013 12:03:48 +0000]
arm: tegra: pinmux: t114: correct pingroup func

Correcting pingroup func for GPIO_PU4, GPIO_PU5,
GPIO_PU6 and KBC_ROW6.

This fixes warning in pinmux.c tegra_pinmux_set_func()

Bug 1256153

Change-Id: I9293ff515b532c75bc7ca70eeb29de3004491fa9
Signed-off-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-on: http://git-master/r/211617
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

6 years agoarm: tegra: macallan: set LDO8's voltage to 0.9V in LP0
Hunk Lin [Wed, 20 Mar 2013 06:32:21 +0000]
arm: tegra: macallan: set LDO8's voltage to 0.9V in LP0

LDO8 is used for VD_AP_RTC. It is tracking to VDD_CORE in non-LP0 case.
In LP0 case, set it to 0.9V as other T114 platforms to save power.

Bug 1254970

Change-Id: I370c94cb87d0e4ca16cc67e79973b54f74cd1084
Signed-off-by: Hunk Lin <hulin@nvidia.com>
Reviewed-on: http://git-master/r/211060
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

6 years agousb: gadget: tegra: fix NV-charger detection
Xin Xie [Tue, 26 Feb 2013 01:35:22 +0000]
usb: gadget: tegra: fix NV-charger detection

NV charger is using resistor network to set 2.8v/2.0v for D+/D-. Doing
so, we cannot detect SDP and NV-charger reliably. Instead we need:
 * Implement Data Contact Detection mechanism, so SDP and NV-charger can
   be detected reliably.
 * We also need make difference between NV-charger and non-standard
   charger based on D+/D- line status (non-standard charger D+/D- lines
   can be pulled high or low individually, NV-charger D+/D- line is
   always high)

bug 1236790
bug 1234552

Change-Id: I69789f4f66a16bb82dacb428914ecad37942314a
Signed-off-by: Xin Xie <xxie@nvidia.com>
Reviewed-on: http://git-master/r/207217
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

6 years agoARM: tegra: new edp tables for pluto
Sivaram Nair [Fri, 22 Mar 2013 09:25:33 +0000]
ARM: tegra: new edp tables for pluto

Updating the AP+DRAM EDP tables for pluto

Bug 1252116

Change-Id: I8efe8cd0061e935c455282fbbaf4916bc18d675c
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-on: http://git-master/r/212141
GVS: Gerrit_Virtual_Submit
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

6 years agopower: max17042: fix fluctuating rbat
Sivaram Nair [Mon, 18 Mar 2013 18:56:38 +0000]
power: max17042: fix fluctuating rbat

RBAT is calculated based on average current. If there is sudden change
in the average current value, it reflects in the calculated RBAT causing
the ibat_possible to jump up/down, leading to a sudden change in battery
depletion value.

Fixed by using moving average of last 5 rbat values to reduce this
fluctuation.

Bug 1252120

Change-Id: Id1bb99993c1077097474dbeebf6529ee9a679ae1
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-on: http://git-master/r/212140
GVS: Gerrit_Virtual_Submit
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

6 years agoARM: tegra: add null pointer check
Sivaram Nair [Thu, 21 Mar 2013 10:53:20 +0000]
ARM: tegra: add null pointer check

Added null pointer check before calling regulator_disable

Change-Id: I9090aadb32ac86544821e5715aefd3d5b6ac88b8
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-on: http://git-master/r/212139
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

6 years agoARM: tegra11: pinmux: add tegra11x_set_sleep_pinmux()
Eric Miao [Fri, 15 Mar 2013 08:07:16 +0000]
ARM: tegra11: pinmux: add tegra11x_set_sleep_pinmux()

To save power during sleep mode, we may need pinmux settings other
than run-time's. Introduce an function for tegra11x at this moment
to solve this problem.

Bug 1247754

Change-Id: I2348518df51e9b7e4c7d056a34637dda4688bccb
Signed-off-by: Eric Miao <emiao@nvidia.com>
Reviewed-on: http://git-master/r/212013
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agovideo: tegra: dc: Update flags of the window being operated
Raghavendra VK [Wed, 20 Mar 2013 02:53:45 +0000]
video: tegra: dc: Update flags of the window being operated

bug 1233914

Change-Id: If4414708f046217f8e7959e6b21c868ce951fd39
Signed-off-by: Raghavendra VK <rvk@nvidia.com>
Reviewed-on: http://git-master/r/211022
(cherry picked from commit e38dcd5efba397347b70708c0b0386533f639f94)
Reviewed-on: http://git-master/r/211969
GVS: Gerrit_Virtual_Submit
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Tested-by: Nikhil Parab <nparab@nvidia.com>

6 years agousb: xhci: tegra: don't disable clks in .remove() if in elpg
Ajay Gupta [Thu, 21 Mar 2013 00:07:44 +0000]
usb: xhci: tegra: don't disable clks in .remove() if in elpg

This is needed for xusb modular support.

Bug 1173778

Change-Id: I87433f9345f703b84da899e082d672a77881c46f
Signed-off-by: Ajay Gupta <ajayg@nvidia.com>
Reviewed-on: http://git-master/r/211836
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

6 years agoARM: config: tegra3/tegra11: disable NFC
Preetham Chandru R [Thu, 21 Mar 2013 14:21:21 +0000]
ARM: config: tegra3/tegra11: disable NFC

Disable NFC as there is no user space libraries in L4T

Bug 1238477

Change-Id: I3e3251da2ed57080b2c2ea4e518df10f11092219
Signed-off-by: Preetham Chandru R <pchandru@nvidia.com>
Reviewed-on: http://git-master/r/211659
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

6 years agonvavp: Set sclk to SCLK_BOOST_RATE if boost is enabled
Mandar Potdar [Thu, 21 Mar 2013 11:58:33 +0000]
nvavp: Set sclk to SCLK_BOOST_RATE if boost is enabled

When disabling all other clocks, do not set sclk to 0
if boost is enabled.

bug 1258031

Change-Id: I021648464e4693e1bc2fb31d5e3e6a53af6e6c37
Signed-off-by: Mandar Potdar <mpotdar@nvidia.com>
Reviewed-on: http://git-master/r/211627
Reviewed-by: Shridhar Rasal <srasal@nvidia.com>
Tested-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agoarm: tegra: fix missing new table for pluto
Hyungwoo Yang [Wed, 20 Mar 2013 21:26:22 +0000]
arm: tegra: fix missing new table for pluto

New table for pluto is missing. This change apples new table for pluto.

Change-Id: I083a52ad9af88049d61249c090a145024fcbb306
Signed-off-by: Hyungwoo Yang <hyungwooy@nvidia.com>
Reviewed-on: http://git-master/r/211352
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

6 years agoARM: tegra: usb: disable USB_WAKE_ON_CNNT_EN_DEV bit
Petlozu Pravareshwar [Wed, 20 Mar 2013 14:39:27 +0000]
ARM: tegra: usb: disable USB_WAKE_ON_CNNT_EN_DEV bit

Disable USB_WAKE_ON_CNNT_EN_DEV bit during phy_power_off.

Bug 1251685
Bug 1223856

Change-Id: I6c2fa9fce74c4ad9ad6c42afbb7d268f09f77577
Signed-off-by: Petlozu Pravareshwar <petlozup@nvidia.com>
Reviewed-on: http://git-master/r/211244
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

6 years agoARM: tegra: Set trim value of 10 for all eMMC modes
Naveen Kumar Arepalli [Wed, 20 Mar 2013 11:04:01 +0000]
ARM: tegra: Set trim value of 10 for all eMMC modes

With current trim of 3, CRC errors are seen from eMMC
Set trim value of 10 for all eMMC modes on t114

Bug 1054859
Bug 1254246

Change-Id: Ife0e09f4aded43ce00a08b92b873c4c130629465
Signed-off-by: Naveen Kumar Arepalli <naveenk@nvidia.com>
Reviewed-on: http://git-master/r/211170
GVS: Gerrit_Virtual_Submit
Tested-by: Ajay Gupta <ajayg@nvidia.com>
Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

6 years agousb: xhci: tegra: do elpg_exit before xhci_shutdown()
Ajay Gupta [Tue, 19 Mar 2013 21:39:51 +0000]
usb: xhci: tegra: do elpg_exit before xhci_shutdown()

Also fixed below compile warning on rel17 branch
"warning: label 'error_iounmap' defined but not used"

Bug 1254337

Change-Id: I8ea409b0450aa5b0ba47fb31a746561ee74327a6
Signed-off-by: Ajay Gupta <ajayg@nvidia.com>
Reviewed-on: http://git-master/r/210909
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

6 years agousb: xhci: tegra: set port ownership to snps during elpg
Ajay Gupta [Tue, 19 Mar 2013 17:33:19 +0000]
usb: xhci: tegra: set port ownership to snps during elpg

Also fixed a bug by clearing all bits D[0:3] of USB2_PAD_MUX_0
register.

Bug 1255052

Change-Id: I63d12c7aedacada06ecbb0e50fd94afff0415681
Signed-off-by: Ajay Gupta <ajayg@nvidia.com>
Reviewed-on: http://git-master/r/210867
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

6 years agousb: xhci: tegra: update low speed rise and fall slew rate
Ajay Gupta [Tue, 19 Mar 2013 16:31:54 +0000]
usb: xhci: tegra: update low speed rise and fall slew rate

Bug 1256238

Change-Id: I81dc9baad99728ca52608a41578b094c8e07fe28
Signed-off-by: Ajay Gupta <ajayg@nvidia.com>
Reviewed-on: http://git-master/r/210852
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

6 years agoARM: tegra: beaver: updated DVFS table
Bibek Basu [Tue, 19 Mar 2013 08:43:34 +0000]
ARM: tegra: beaver: updated DVFS table

DVFS entry is fixed for Hynix_2GB_H5TC4G83MFR-PBA
to support all emc frequencies.

Bug 1218885

Change-Id: Id9d578499e495f43db1a072cbcee25a353fa78f5
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/210653
GVS: Gerrit_Virtual_Submit
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Raymond Poudrier <rapoudrier@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agopower: bq2419x: disable charging function if charger fails to probe
Kerwin Wan [Tue, 19 Mar 2013 08:27:29 +0000]
power: bq2419x: disable charging function if charger fails to probe

Bug 1238542

Change-Id: I24d5e1407049af508799fac504b74681b73a2069
Signed-off-by: Kerwin Wan <kerwinw@nvidia.com>
Reviewed-on: http://git-master/r/210648
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
GVS: Gerrit_Virtual_Submit

6 years agoARM: tegra: pluto: Use PULL_UP for GMI_CS1_N
Chaitanya Bandi [Mon, 18 Mar 2013 11:52:17 +0000]
ARM: tegra: pluto: Use PULL_UP for GMI_CS1_N

Bug 1238671

Change-Id: I7862aa355c0bd03453703d39a5425e1fdcc6bafa
Signed-off-by: Chaitanya Bandi <bandik@nvidia.com>
Reviewed-on: http://git-master/r/210378
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Eric Miao <emiao@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

6 years agoinput: touch: raydium: Add missing compile time NV_ENABLE_CPU_BOOST define
Vikas Jain [Fri, 15 Mar 2013 13:36:31 +0000]
input: touch: raydium: Add missing compile time NV_ENABLE_CPU_BOOST define

Reporting input capability for MSC_ACTIVITY should be covered under
NV_ENABLE_CPU_BOOST.

Bug 1229219

Change-Id: Id8ac0ea04cb33016680386d40f38745f685f08d3
Signed-off-by: Vikas Jain <vjain@nvidia.com>
Reviewed-on: http://git-master/r/210021
Reviewed-by: Robert Collins <rcollins@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agoinput: touch: synaptic: report MSC_ACTIVITY event in IRQ
Vikas Jain [Fri, 15 Mar 2013 06:08:23 +0000]
input: touch: synaptic: report MSC_ACTIVITY event in IRQ

Report MSC_ACTIVITY event while entering IRQ handler so that
CPU frequency governor can act.
This improves direct touch processing latencies.

Bug 1254080

Change-Id: Ic8c622045185977d88423d94b2604ec6648798ba
Signed-off-by: Vikas Jain <vjain@nvidia.com>
Reviewed-on: http://git-master/r/209873
Reviewed-by: Xiaohui Tao <xtao@nvidia.com>
Reviewed-by: Robert Collins <rcollins@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agommc: tegra: Fix SDR50 mode clk rate
rrajk [Thu, 14 Mar 2013 12:17:04 +0000]
mmc: tegra: Fix SDR50 mode clk rate

In SDR50 mode, it is not required to set the
controller clk to double the requested clk for the platforms
other than T30.
Bug 1249696

Change-Id: I8fc8ec31c3bf99ff604cbcc4eb24f14525c9f6b0
Signed-off-by: rrajk <rrajk@nvidia.com>
Reviewed-on: http://git-master/r/209578
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

6 years agommc: host: tegra: Set clk rate to default clk
rrajk [Mon, 11 Mar 2013 12:36:53 +0000]
mmc: host: tegra: Set clk rate to default clk

Set clk rate to default clk rate before selecting pll_c
as a clk parent in order to avoid the dvfs failures triggered
during the set parent process.

Change-Id: I9e2af72820689b9e0ea64a612f287ac67f3e5a73
Signed-off-by: rrajk <rrajk@nvidia.com>
Reviewed-on: http://git-master/r/208067
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

6 years agoARM: tegra: updating pluto battery depl EDP client
Sivaram Nair [Wed, 20 Mar 2013 13:41:45 +0000]
ARM: tegra: updating pluto battery depl EDP client

Adding negative E-states to battery depletion client.

Change-Id: Ia917bf0628e13ebefbbe9f6e87738d8b9b03db62
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-on: http://git-master/r/211237
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

6 years agopower: max17042: adding EDP throttle callback
Sivaram Nair [Wed, 20 Mar 2013 13:39:50 +0000]
power: max17042: adding EDP throttle callback

Preparing the battery depletion client for supporting negative
E-states.

Change-Id: Ib023a36cf059b4a490e76c11c47ee70776b4f307
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-on: http://git-master/r/211236
GVS: Gerrit_Virtual_Submit
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

6 years agopower: max17042: fix depletion timer interval
Sivaram Nair [Mon, 18 Mar 2013 17:08:21 +0000]
power: max17042: fix depletion timer interval

Added missing timer conversion

Change-Id: I8ff7a8f4e2f103ec775c371b566e95ab62826f21
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-on: http://git-master/r/211235
GVS: Gerrit_Virtual_Submit
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

6 years agoEDP: fixing return value
Sivaram Nair [Tue, 19 Mar 2013 07:10:27 +0000]
EDP: fixing return value

sysfs store functions should return the number of byte count on success.

Change-Id: I24ede6c4d03ed9066ece0e214ba8a68370e285af
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-on: http://git-master/r/211234
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

6 years agoEDP: add notify sysfs
Sivaram Nair [Tue, 12 Mar 2013 01:20:54 +0000]
EDP: add notify sysfs

A new sysfs attribute is added to specify whether the throttling and
promotion of an EDP client should be notified to the user level. The
field can be set/modified either by the client driver or an init script.

Bug 1244972

Change-Id: I91b71125647353932b8ef01883dbfee86f4b8587
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-on: http://git-master/r/208242
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

6 years agoEDP: add sysfs_notify on throttles and promotions
Sivaram Nair [Wed, 6 Mar 2013 23:47:22 +0000]
EDP: add sysfs_notify on throttles and promotions

sysfs_notify is issued on a newly added <manager>/denied attribute
whenever one or more client is throttled or promoted.  This is needed so
that any user level process can wait on such events via poll/select.

Bug 1244972

Change-Id: Ie4b963c46a2de0e1e34c46bed8bfc2ba60e019a7
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-on: http://git-master/r/206856
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

6 years agobacklight: max8831: lowering E0 state
Sivaram Nair [Tue, 19 Mar 2013 06:55:57 +0000]
backlight: max8831: lowering E0 state

Backlight EDP client's E0 state is lowered in order to make room for
other higher priority clients.

Bug 1252116

Change-Id: I96da6ed1d41d2ed6084f32c4265ac1a9b30e9c6b
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-on: http://git-master/r/211233
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

6 years agobacklight: max8831: adding error return
Sivaram Nair [Tue, 19 Mar 2013 06:54:15 +0000]
backlight: max8831: adding error return

The driver does not return error when its E-state request is not
successful - fixing this.

Change-Id: I28c31e6b250cd123b02379f769532021b6812e2a
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-on: http://git-master/r/211232
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

6 years agobacklight: max8831: fixing types
Sivaram Nair [Tue, 19 Mar 2013 06:51:28 +0000]
backlight: max8831: fixing types

Using correct types for variables

Change-Id: Icc13649bd5ca44c4c2e33e2c051883248cef9503
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-on: http://git-master/r/211231
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

6 years agoARM: tegra: pluto: fixing camera E0 state
Sivaram Nair [Tue, 19 Mar 2013 06:45:29 +0000]
ARM: tegra: pluto: fixing camera E0 state

Camera EDP client has set its E0 incorrectly high - fixing it.

Bug 1252177

Change-Id: I50c5306550b80024a9c4e0284df262c3947f6b11
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-on: http://git-master/r/211230
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

6 years agomedia: video: tegra: adding EDP throttle callback
Sivaram Nair [Tue, 19 Mar 2013 06:40:15 +0000]
media: video: tegra: adding EDP throttle callback

Camera driver needs to support EDP throttle callback since it should
support negative E-states

Bug 1252177

Change-Id: I954e3c95cb7ceb6a10afeab2ee8b1f7a8e3d07bf
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-on: http://git-master/r/211229
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Charlie Huang <chahuang@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

6 years agoARM: tegra: pluto: fixing flash EDP states
Sivaram Nair [Tue, 19 Mar 2013 06:29:34 +0000]
ARM: tegra: pluto: fixing flash EDP states

Flash driver is setting its E0 state incorrectly too high - fixing this.

Bug 1252180

Change-Id: Ibd5fbba7349d13c32b7f71f66084ec27ede9cc57
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-on: http://git-master/r/211228
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>