7 years agoasoc: aic326x machine: change M/S configurations
Nikesh Oswal [Tue, 6 Mar 2012 10:36:46 +0000]
asoc: aic326x machine: change M/S configurations

change M/S configurations as modem has been made master
on whistler

Change-Id: Iae0cf3f85c43116b13ceb1ff5dfa4a9b121a5d62
Reviewed-on: http://git-master/r/88014
Tested-by: Nikesh Oswal <noswal@nvidia.com>
Reviewed-by: Scott Peterson <speterson@nvidia.com>

7 years agoasoc: ap20: change i2s bitclk for dsp mode
Nikesh Oswal [Tue, 6 Mar 2012 10:34:24 +0000]
asoc: ap20: change i2s bitclk for dsp mode

i2s bitclk for dsp mode was kept 4 times the minimum requirement
for bcm4330 bt chip on whistler we require only 2 times the minimum
requirement because modem is also configured similarly and for bt call
both the bit clocks should match

Change-Id: I6a84b22c9fbd66b4e60832933b508fe8cf21f387
Reviewed-on: http://git-master/r/88013
Tested-by: Nikesh Oswal <noswal@nvidia.com>
Reviewed-by: Scott Peterson <speterson@nvidia.com>

7 years agoARM: tegra: dma: Check request size before enqueuing requests
Laxman Dewangan [Tue, 6 Mar 2012 08:52:14 +0000]
ARM: tegra: dma: Check request size before enqueuing requests

The request size should be multiple of 4 bytes in ONE_SHOT and
CONTINUOUS_SINGLE mode and multiple of 8 bytes in case of
CONTINUOUS_DOUBLE mode.

Change-Id: Iedb7a75eedda58f4f9b5c6d072ef2edb7ee657d4
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/87994
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>

7 years agoARM: tegra: dma: Coding style and general cleanups
Laxman Dewangan [Tue, 6 Mar 2012 08:25:35 +0000]
ARM: tegra: dma: Coding style and general cleanups

Some cleanups:
- Copyright year change
- Properly aligned macro.
- Defined function as static if used only in file.
- Move the macro from header to file if it is only used in driver.
- Returning proper status on callbacks.
- Adding some more comments in code.
- Rewritten some piece of code for better readability.

Change-Id: I778752668a67b849859fd7e0c11f2b7a3f3b1edc
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/87993
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>

7 years agoARM: tegra: dma: Fix multiple time request deletion
Laxman Dewangan [Tue, 6 Mar 2012 08:13:32 +0000]
ARM: tegra: dma: Fix multiple time request deletion

When doing the cleanups in isr, the request was deleted
two times after full buffer completion on double buffering
of dma mode.
Removing extra request deletion.

Change-Id: I6ef30b67d5d73bbc1d7a479d75b8e6ccba6a6f0a
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/87992
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>

7 years agoARM: tegra: dma: Implement clock gating on suspend/resume
Laxman Dewangan [Tue, 6 Mar 2012 08:01:12 +0000]
ARM: tegra: dma: Implement clock gating on suspend/resume

Disabling clock of apb dma in suspend and enabling back on
resume.

Change-Id: I6320072ea25565bcab4833c9b10dcb6a9d526ac6
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/87991
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>

7 years agoARM: tegra: dma: Use correct clock device for resetting dma.
Laxman Dewangan [Tue, 6 Mar 2012 07:55:36 +0000]
ARM: tegra: dma: Use correct clock device for resetting dma.

The clock name is "tegra_dma" for getting proper clock structure
and using this for resetting dma.

Change-Id: I44819ccc25d42f15b14a42d6616c776fa1ad95ec
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/87990
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>

7 years agoARM: tegra: power: Don't enter LP2 if not in NOHZ mode
Alex Frid [Sat, 3 Mar 2012 01:49:18 +0000]
ARM: tegra: power: Don't enter LP2 if not in NOHZ mode

Prevent Tegra3 secondary CPU entry to LP2 state when scheduler tick
is not switched to NOHZ mode, yet.

Bug 945658

Change-Id: I654f7aac0e545ecb557005cc4efad4317689e091
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/87937
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>
Tested-by: Thomas Cherry <tcherry@nvidia.com>
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoarm: tegra: enterprise: Keep PHY powered on bus suspend for M7400.
Raj Jayaraman [Wed, 8 Feb 2012 18:50:39 +0000]
arm: tegra: enterprise: Keep PHY powered on bus suspend for M7400.

Bug 886459

Signed-off-by: Raj Jayaraman <rjayaraman@nvidia.com>
(cherry picked from commit d6fe28ccbda0ae7c615e94f0a8896215780d31c6)

Change-Id: Idb2782812712329adbd45bd58407665e2bbfb7aa
Reviewed-on: http://git-master/r/87808
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoarm: tegra: kai: Fix codec name for kai A00.
Manoj Gangwal [Mon, 5 Mar 2012 14:09:24 +0000]
arm: tegra: kai: Fix codec name for kai A00.

Fix the codec name for Kai A00 board.

Change-Id: I3f88a484ac01f8b1374889574b431cfb53901ed6
Signed-off-by: Manoj Gangwal <mgangwal@nvidia.com>
Reviewed-on: http://git-master/r/87772
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agommc: tegra: Enable SDHCI_QUIRK_BROKEN_CARD_DETECTION
Pavan Kunapuli [Mon, 5 Mar 2012 13:49:16 +0000]
mmc: tegra: Enable SDHCI_QUIRK_BROKEN_CARD_DETECTION

Enable quirk SDHCI_QUIRK_BROKEN_CARD_DETECTION.
Also, implemented tegra_sdhci_get_cd() to return
the card presence status.

Bug 948943

Change-Id: I42eed23f951304e331a235f5a9199b70ba5e96b5
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-on: http://git-master/r/87766
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agommc: sdhci: Add get_cd callback in host ops
Pavan Kunapuli [Mon, 5 Mar 2012 13:40:39 +0000]
mmc: sdhci: Add get_cd callback in host ops

Add get_cd callback in the host ops to get the
card presence status incase SDHCI_QUIRK_BROKEN_
CARD_DETECTION is enabled.

Bug 948943

Change-Id: I788d9e907920a0aeb79784751ec0df25bc2a72d6
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-on: http://git-master/r/87765
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agovideo: tegra: host: register nvhost master device in board-xxx-panel.c
Mayuresh Kulkarni [Mon, 5 Mar 2012 13:06:47 +0000]
video: tegra: host: register nvhost master device in board-xxx-panel.c

- the suspend order of devices is governed by the order
in which devices are registered
- this commit ensures that nvhost master is registered before
any of the graphics devices
- previously this was done in rootfs_init call which is
later than arch_init calls of board-xxx-panel.c
- this caused tegra-dc device to be registered *before* nvhost
master device. as a result it was suspended *later* than nvhost
master device. this is a clear violation of dependency rule
for nvhost. this caused suspend-resume to fail for L4T
- this worked on android as it has CONFIG early suspend enabled
while it failed for L4T which doesn't have CONFIG early suspend
enabled

Bug 947617

Change-Id: I6cd405f3ba23d004e7659140019f5130e6c25159
Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-on: http://git-master/r/87756
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

7 years agosdhci: Don't set highspeed mode
Harry Hong [Wed, 8 Feb 2012 05:44:21 +0000]
sdhci: Don't set highspeed mode

if SDHCI_QUIRK_NO_HISPD_BIT is set in host->quirks,
don't set SDHCI_CTRL_HISPD in sdhci_host_control register.

bug 929985

Signed-off-by: Harry Hong <hhong@nvidia.com>
Reviewed-on: http://git-master/r/79933
(cherry picked from commit 194670660af90b2bb7bc0efea920332459296141)

Change-Id: I7b5f58f5078886309610e9e4cc2bad83f0788168
Reviewed-on: http://git-master/r/87704
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agodrivers: wireless: bcm4329: set MMC_PM_KEEP_POWER on suspend
Rakesh Kumar [Mon, 5 Mar 2012 09:18:07 +0000]
drivers: wireless: bcm4329: set MMC_PM_KEEP_POWER on suspend

MMC_PM_KEEP_POWER should be set before each suspend/resume cycle as
mmc drivers clears MMC_PM_KEEP_POWER from pm_flags on resume.

Bug 942826

Change-Id: Ie11c661bdc3450cc4e75fa7700b96aedc69d628a
Signed-off-by: Rakesh Kumar <krakesh@nvidia.com>
Reviewed-on: http://git-master/r/87703
Reviewed-by: Rakesh Goyal <rgoyal@nvidia.com>
Tested-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

7 years agoHack: mmc: explicitly invoking mmc_test probe from bus drv
Sachin Nikam [Fri, 2 Mar 2012 13:24:07 +0000]
Hack: mmc: explicitly invoking mmc_test probe from bus drv

Bug 930113

Change-Id: I15fede503217152263905d8f7f56d3392e460e8a
Signed-off-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-on: http://git-master/r/87241
Reviewed-by: Shridhar Rasal <srasal@nvidia.com>
Tested-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

7 years agoARM: tegra: Add forced-recovery support for bootloader.
Gaurav Sarode [Fri, 2 Mar 2012 13:00:19 +0000]
ARM: tegra: Add forced-recovery support for bootloader.

Set SCRATCH0 bit 1 when forced-recovery is set.
Bootrom will check this and put device into nvflash mode.

Bug 948326

Signed-off-by: Gaurav Sarode <gsarode@nvidia.com>
Change-Id: I78108021dffda681d63ddc6760e07cb563ba2eac
Reviewed-on: http://git-master/r/87238
Reviewed-by: Vivek Kumar <vivekk@nvidia.com>
Reviewed-by: Hon Fei Chong <hchong@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

7 years agotegra: pcie: Remove unnecessary clock operations
Manoj Chourasia [Tue, 22 Nov 2011 18:11:37 +0000]
tegra: pcie: Remove unnecessary clock operations

All these clock operations should be handled by
powergate operations.

bug 840051

Reviewed-on: http://git-master/r/66177
(cherry picked from commit 1ad8fe3e184db04063275c837e240827bda009e9)

Change-Id: I0159c6c1f64932b22b25d31d4bb1ff9d41385879
Reviewed-on: http://git-master/r/86126
Tested-by: Jay Agarwal <jagarwal@nvidia.com>
Reviewed-by: Manoj Chourasia <mchourasia@nvidia.com>
Reviewed-by: Krishna Thota <kthota@nvidia.com>
Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>

7 years agoarm: tegra: kai: set default_enable to false
Kerwin Wan [Fri, 24 Feb 2012 00:33:22 +0000]
arm: tegra: kai: set default_enable to false

Bug 931371
Bug 947203
Bug 947228

Disable usb hotplug in kai as enterprise to save power

Change-Id: Ia621052d3e825c8b0bd1ef61645dd424df6c29eb
Signed-off-by: Hao Tang <htang@nvidia.com>
Reviewed-on: http://git-master/r/85626
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agommc: enable mmc suspend/resume for sdio device
Om Prakash Singh [Sat, 18 Feb 2012 16:35:21 +0000]
mmc: enable mmc suspend/resume for sdio device

Bug 942826

Change-Id: Ie782f17c51e78994e0fc96da3fbbe2e6592f58dc
Signed-off-by: Rakesh Kumar <krakesh@nvidia.com>
Reviewed-on: http://git-master/r/84697
Reviewed-by: Rakesh Goyal <rgoyal@nvidia.com>
Tested-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

7 years agoarm: tegra: update thermal sensor configurations
Hao Tang [Thu, 16 Feb 2012 19:45:03 +0000]
arm: tegra: update thermal sensor configurations

Bug 941960

Removed CONFIG_TEGRA_INTERNAL_TSENSOR_EDP_SUPPORT.
Add internal tsensor on kai.

Change-Id: Iaefa43112fbbaa42d43a428ecb86ad821e683f85
Signed-off-by: Hao Tang <htang@nvidia.com>
Reviewed-on: http://git-master/r/84350
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

7 years agommc: mmc_test support to set ios parameters
Shridhar Rasal [Fri, 3 Feb 2012 14:14:00 +0000]
mmc: mmc_test support to set ios parameters

support to change *ios* parameteres

bug 930113

Change-Id: I469db49ec9e4ca533ba3be654455ae6b4b052d1c
Signed-off-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-on: http://git-master/r/79238
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

7 years agoARM: tegra: power: Fix LP2 timers suspend/resume
Alex Frid [Thu, 23 Feb 2012 04:40:58 +0000]
ARM: tegra: power: Fix LP2 timers suspend/resume

On entry/exit to suspend state remove/restore Tegra3 LP2 wake timers
interrupts affinity to the respective secondary CPUs.

Change-Id: I9b46c5fa446a8c6e813343f4564abda5313853da
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/87541
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

7 years agoARM: tegra: clock: Increase Tegra3 EACK countdown
Alex Frid [Sun, 26 Feb 2012 23:19:37 +0000]
ARM: tegra: clock: Increase Tegra3 EACK countdown

Bug 935079

Signed-off-by: Alex Frid <afrid@nvidia.com>
(cherry picked from commit 5e70d23ef33dbdf0ce628fd2f287eec1b145dd8e)

Change-Id: Ib8bd72b2cac82b50789f86d034d6ad03b76a657f
Reviewed-on: http://git-master/r/87539
Tested-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

7 years agoarm: tegra: comms: add mutex for on/off switch
Seshendra Gadagottu [Mon, 20 Feb 2012 07:15:10 +0000]
arm: tegra: comms: add mutex for on/off switch

Mutex protection is added on xmm_onoff

Bug 938553

Change-Id: I260847861a56f612f06c20cd7429c19c9001ac99
Signed-off-by: Xin Xie <xxie@nvidia.com>
Reviewed-on: http://git-master/r/84751
(cherry picked from commit 14ac86297c4faa6a9cbf95877b782c997698347c)
Reviewed-on: http://git-master/r/87506
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Tested-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: Steve Lin <stlin@nvidia.com>

7 years agoarm : tegra : comm: AT command loss WAR
Seshendra Gadagottu [Thu, 9 Feb 2012 04:03:20 +0000]
arm : tegra : comm: AT command loss WAR

Workaround to avoid make cdc-acm susp_count
to negative.

Bug 935834

Change-Id: I251049537e21662de329f11ecbad0ce15abb1037
Signed-off-by: Seshendra Gadagottu<sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/84288
(cherry picked from commit d056c04d453bc641e856a61251e7d0aa2dcce73b)
Reviewed-on: http://git-master/r/87505
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agousb: cdc-acm: Add acm handle validity check
Seshendra Gadagottu [Sat, 3 Mar 2012 04:03:14 +0000]
usb: cdc-acm: Add acm handle validity check

Added check for acm handle validity before doing any action
in acm_suspend, acm_resume and acm_reset_resume functions.

Bug 939237

Change-Id: Idc5d7db6bd405056a90b85009825ccbd03547757
Signed-off-by: Seshendra Gadagottu<sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/83413
(cherry picked from commit 1dd9736cd2df12c0315a44c95010cb64eee04050)
Reviewed-on: http://git-master/r/87504
Reviewed-by: Steve Lin <stlin@nvidia.com>

7 years agoasoc: codecs: Fix pop noise while booting for ALC5639/40
Manoj Gangwal [Mon, 5 Mar 2012 09:30:09 +0000]
asoc: codecs: Fix pop noise while booting for ALC5639/40

Fix for pop noise 'cut' from internal speaker while booting
on kai board.

Bug 929049

Change-Id: I9c3fe7e05d869709f50036042e70abc91722885e
Signed-off-by: Manoj Gangwal <mgangwal@nvidia.com>
Reviewed-on: http://git-master/r/87685
Reviewed-by: Sumit Bhattacharya <sumitb@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

7 years agommc: tegra: Clear SPI_MODE_CLKEN_OVERRIDE bit by default
Harry Hong [Wed, 8 Feb 2012 08:19:26 +0000]
mmc: tegra: Clear SPI_MODE_CLKEN_OVERRIDE bit by default

This bit should always be 0 according to TRM.

Bug 929985

Signed-off-by: Harry Hong <hhong@nvidia.com>
Reviewed-on: http://git-master/r/79975
(cherry picked from commit 9371d04b4f9d79f1e03e60120bf1bba28af77d4b)

Change-Id: I225d6b5442f63809a77ce92d9cbd152dc4112ac4
Reviewed-on: http://git-master/r/87640
Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Tested-by: Harry Hong <hhong@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

7 years agoarm: tegra: whistler: reduce carveout size
Prashant Gaikwad [Tue, 14 Feb 2012 12:29:54 +0000]
arm: tegra: whistler: reduce carveout size

Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
(cherry picked from commit 9896377607fb90757289434cd969bebc52726f51)

Change-Id: Ibe6da0737ccd39930ef68f4fb886b507c5efbafe
Reviewed-on: http://git-master/r/87621
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>

7 years agoarm: tegra: whistler: reduce reserved fb memory
Prashant Gaikwad [Tue, 14 Feb 2012 12:17:50 +0000]
arm: tegra: whistler: reduce reserved fb memory

Android needs framebuffer for recovery process and display transition
from boot loader to kernel. Reserve only required memory for these scenarios.

Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
(cherry picked from commit 6e4617224e5b9fe5793691a33f3304acff336e55)

Change-Id: I9892025ed256cb0be5c337d65cd84ba42b604158
Reviewed-on: http://git-master/r/87620
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>

7 years agoarm: config: tegra3: enable NL80211_TESTMODE
Om Prakash Singh [Sat, 3 Mar 2012 06:02:10 +0000]
arm: config: tegra3: enable NL80211_TESTMODE

Enable NL80211_TESTMODE to support nl80211 testmode commands

Bug 926626

Change-Id: I8627ab36079699b81b22cc7e5818e42c534d29a9
Signed-off-by: Om Prakash Singh <omp@nvidia.com>
Reviewed-on: http://git-master/r/87508
Reviewed-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

7 years agoarm: tegra: Enable gizmo settings after system resume
Seshendra Gadagottu [Fri, 10 Feb 2012 06:23:22 +0000]
arm: tegra: Enable gizmo settings after system resume

Enable save/restore gizmo settings for all tegra chip sets.

Bug 935834

Change-Id: I0400d555c05c5558aca2bf3d2cee707c7db77927
Signed-off-by: Seshendra Gadagottu<sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/83037
(cherry picked from commit 5a51bbfc4715dc50571ccfc44c31d8318ba306c1)
Reviewed-on: http://git-master/r/87507
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoarm: tegra: xmm power state handling
Seshendra Gadagottu [Thu, 9 Feb 2012 16:46:30 +0000]
arm: tegra: xmm power state handling

Avoid unwanted xmm power state changes.
Added missing spin_unlock_irqrestore.

Bug 935834
Bug 938553

Signed-off-by: Seshendra Gadagottu<sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/82796
(cherry picked from commit 8af674aadfc1196851d5a2ecd1ecdd2cfe2d4148)

Change-Id: Ic5b354376c0239773762d1b0f6e8848491e74e08
Reviewed-on: http://git-master/r/87503
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Tested-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

7 years agotegra: usb: host: Clean-up hsic device connection retries
Seshendra Gadagottu [Mon, 6 Feb 2012 12:49:06 +0000]
tegra: usb: host: Clean-up hsic device connection retries

usb_phy is handling conenction with hsic device. Removing
hsic conenction re-tries logic from ehci_tegra.

Bug 932606

Change-Id: I7bdea39966eb66d4cb8271d913c449dfa1ff4b2f
Signed-off-by: Seshendra Gadagottu<sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/82758
(cherry picked from commit 5e3c81372ffb2601cc9f078111b90aba03a7b1f0)
Reviewed-on: http://git-master/r/87502
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

7 years agotegra: usb: phy: hsic phy configuration changes
Seshendra Gadagottu [Tue, 31 Jan 2012 09:39:15 +0000]
tegra: usb: phy: hsic phy configuration changes

Program TXFILLTUNNING to 0x10 to avoid any under
runs at HSIC phy.
Program host mode before hsic phy selection.
Program RTUNE to 50 ohm for T30

Bug 903265

Change-Id: Id30d55f312dab1bc04994a8b6a2fa0e68a02a20e
Signed-off-by: Seshendra Gadagottu<sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/82754
(cherry picked from commit 078d0086aed45e3fe3a58a7b29afc6a2bdd907ed)
Reviewed-on: http://git-master/r/87501
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

7 years agoarm: tegra: kai: read mac address from board eeprom
Om Prakash Singh [Thu, 1 Mar 2012 17:39:18 +0000]
arm: tegra: kai: read mac address from board eeprom

Bug 927456

Change-Id: I98e1d8960888a4e6dd429e73c9ac0d1fce7d90be
Signed-off-by: Om Prakash Singh <omp@nvidia.com>
Reviewed-on: http://git-master/r/86958
Reviewed-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

7 years agovideo: tegra: dsi: Fix syncpt hang during early suspend cycle
Animesh Kishore [Thu, 1 Mar 2012 15:54:19 +0000]
video: tegra: dsi: Fix syncpt hang during early suspend cycle

Fixing dsi syncpt hang issue after multiple cycles of
early suspend-late resume.

Bug 943096

Change-Id: Iefc0530a6e514b7733819dd1df35cde8f5c3dd47
Signed-off-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-on: http://git-master/r/86946
Reviewed-by: Sang-Hun Lee <sanlee@nvidia.com>
Tested-by: Sang-Hun Lee <sanlee@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com>

7 years agoregmap: Bypassing cache when initializing cache
Laxman Dewangan [Fri, 17 Feb 2012 13:27:26 +0000]
regmap: Bypassing cache when initializing cache

During regcache_init, if client has not passed the
default data of cached register then it is directly
read from the hw to initialize cache. This hw register
read happens before cache ops are initialized and hence
avoiding register read to check for the data available
on cache or not by enabling flag of cache_bypass.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit df00c79f78d8b0ad788daf689ea461ace9d0811f)

Change-Id: I4398162bd6b12689c795afe5ee02397e975e456c
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/87593

7 years agoregmap: Fix cache defaults initialization from raw cache defaults
Lars-Peter Clausen [Wed, 15 Feb 2012 09:23:25 +0000]
regmap: Fix cache defaults initialization from raw cache defaults

Currently registers with a value of 0 are ignored when initializing the register
defaults from raw defaults. This worked in the past, because registers without a
explicit default were assumed to have a default value of 0. This was changed in
commit b03622a8 ("regmap: Ensure rbtree syncs registers set to zero properly").
As a result registers, which have a raw default value of 0 are now assumed to
have no default. This again can result in unnecessary writes when syncing the
cache. It will also result in unnecessary reads for e.g. the first update
operation. In the case where readback is not possible this will even let the
update operation fail, if the register has not been written to before.

So this patch removes the check. Instead it adds a check to ignore raw defaults
for registers which are volatile, since those registers are not cached.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Cc: stable@vger.kernel.org
(cherry picked from commit 61cddc57dc14a5dffa0921d9a24fd68edbb374ac)

Change-Id: Iccd58a95a432d222befd8b339fe0c6edd26666bb
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/87592

7 years agoregmap: add regmap_bulk_write() for register write
Laxman Dewangan [Sun, 12 Feb 2012 14:19:43 +0000]
regmap: add regmap_bulk_write() for register write

The bulk_write() supports the data transfer to multi
register which takes the data into cpu_endianness format
and does formatting of data to device format before
sending to device.
The transfer can be completed in single transfer or multiple
transfer based on data formatting.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit 8eaeb21925563075ae036c2e5ba8d041b70e18fa)

Change-Id: Id97fbcfa0ed7d00d97dc3ab89fdb2b025850c9b1
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/87591

7 years agoregmap: Support for caching in reg_raw_write()
Laxman Dewangan [Fri, 10 Feb 2012 16:00:27 +0000]
regmap: Support for caching in reg_raw_write()

Adding support for caching of data into the
non-volatile register from the call of reg_raw_write().

This will allow the larger block of data write into multiple
register without worrying whether register is cached or not
through reg_raw_write().

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit c9157198417076c0c2664ba997e7b0217f61fcce)

Change-Id: I6e6a96bc9e08ca9b7fe0f52a0a5692a4a61ef0ae
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/87590

7 years agoregmap: Fix kcalloc parameters swapped
Axel Lin [Fri, 10 Feb 2012 11:29:55 +0000]
regmap: Fix kcalloc parameters swapped

The first parameter should be "number of elements" and the second parameter
should be "element size".

Signed-off-by: Axel Lin <axel.lin@gmail.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit 2a14d7d9b7439fe62082a60a7f8983ccb463d134)

Change-Id: Ibe00000c7c6db1b36e5530e00713cdb434052f0a
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/87589

7 years agoregmap: Add debugfs information for the cache status
Mark Brown [Mon, 6 Feb 2012 18:02:06 +0000]
regmap: Add debugfs information for the cache status

Show all the cache status flags in debugfs if we have a cache.

Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit 028a01e601487b5991b70dba506dfe87d83543f6)

Change-Id: I2b5297143ea8c81477a5124c7db0e6683fd56255
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/87588

7 years agoregmap: Don't use bitfields for booleans
Mark Brown [Mon, 6 Feb 2012 18:01:35 +0000]
regmap: Don't use bitfields for booleans

This was a cut'n'paste from some older code.

Since we're about to add debugfs support don't do the obvious thing and
use bool, use u32 instead (which debugfs has been using since time
immemorial).
cherry-picked from mainline
847fb6fdf58c0ef4c207d2853a043a4da3db9c76

Change-Id: I0eff043969a97190e7470bc695ef78323e9cb8d7
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/87587

7 years agoregmap: Remove incorrect unreachable comment in regcache_set_val()
Axel Lin [Tue, 31 Jan 2012 03:48:18 +0000]
regmap: Remove incorrect unreachable comment in regcache_set_val()

regcache_set_val() returns false if cache[idx] != val.
Thus it actually is not unreachable.

Signed-off-by: Axel Lin <axel.lin@gmail.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit aa795d129246cb4c973076e3242b8a2eb374f1ef)

Change-Id: I83bbce848914e4648723a5c5dd0ca7f04ba0c64e
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/87586

7 years agoregmap: Implement managed regmap_init()
Mark Brown [Mon, 30 Jan 2012 19:56:52 +0000]
regmap: Implement managed regmap_init()

Save error handling and unwinding code in drivers by providing managed
versions of the regmap init functions, simplifying usage.

Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit c0eb46766d395da8d62148bda2e59bad5e6ee2f2)

Change-Id: I6df96ae10ad8a882feb7da908dd46c2f56a28f9f
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/87585

7 years agoregmap: if format_write is used, declare all registers as "unreadable"
Wolfram Sang [Mon, 30 Jan 2012 14:08:16 +0000]
regmap: if format_write is used, declare all registers as "unreadable"

Using .format_write means, we have a custom function to write to the
chip, but not to read back. Also, mark registers as "not precious" and
"not volatile" which is implicit because we cannot read them. Make those
functions use 'regmap_readable' to reuse the checks done there.

Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit 4191f19792bf91267835eb090d970e9cd6277a65)

Change-Id: Iff0be114904ada151315750fdd92ba562dab6314
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/87584

7 years agoregmap: Properly round reg_bytes and val_bytes
Wolfram Sang [Sat, 28 Jan 2012 01:16:41 +0000]
regmap: Properly round reg_bytes and val_bytes

For the upcoming 2/6-format, we don't see debugfs output otherwise,
since the current division results in 0. I'd think 10/14 is broken
currently, too.

Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit c212acccc368a087a53559aac2b7d3be941b1252)

Change-Id: I2d8d1683f1649697ad73aa7544a3ac994931e237
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/87583

7 years agoregmap: Add support for 2/6 register formating
Wolfram Sang [Fri, 27 Jan 2012 15:10:22 +0000]
regmap: Add support for 2/6 register formating

Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit 9aa507505cdcd10b7390398790f013374ee74a26)

Change-Id: I3af1a4c4e9aa30f9ebbd64d5c1818e3e04328e7e
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/87582

7 years agoregmap: Reset device debugfs when reinitialising the cache
Mark Brown [Thu, 26 Jan 2012 18:30:16 +0000]
regmap: Reset device debugfs when reinitialising the cache

Most of the data exposed via debugfs is for or from the cache so reset
all the debugfs configuration to make sure everything is up to date with
the latest configuration, especially if we're changing cache type.
cherry-picked from mainline commit
a24f64a648376766497fddd8bc24b1ca5b906431

Change-Id: I9db449602d9c37b22e024bf78a54fd7d09a07638
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/87581

7 years agoregmap: Bypass the cache when applying patches
Mark Brown [Wed, 25 Jan 2012 21:05:48 +0000]
regmap: Bypass the cache when applying patches

Otherwise any patch that affects a register which is writable may trash
cached values.

Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit 8a892d6996b60c822f19ad1844eb15b96ce393c7)

Change-Id: I278d4f4aa34709e2e15d0cc83238e4b419f159cb
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/87580

7 years agoregmap: Skip patch application when the cache is not dirty on sync
Mark Brown [Wed, 25 Jan 2012 21:06:33 +0000]
regmap: Skip patch application when the cache is not dirty on sync

On the basis that if we don't actually need to resync the cache then the
patches are probably also already applied.

Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit d9db762708e27c2892db9d8a54e735a8e506e16e)

Change-Id: I1b41ea112ae97812be6c9e2e3ea8c490e0835732
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/87579

7 years agoregmap: Unexport regcache_write() and regcache_read()
Mark Brown [Wed, 25 Jan 2012 20:46:53 +0000]
regmap: Unexport regcache_write() and regcache_read()

They have no current users which is fortunate as they don't take the lock
and therefore aren't safe to use externally. We'll need to add new
operations if direct cache access is needed.

Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit 7e53b195e412a813e915843adc7e4d91868e8e94)

Change-Id: I6a273d8f42fafe5f2d0f2269dd9e0253e8ac8e3f
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/87578

7 years agoregmap: Support register patch sets
Mark Brown [Sat, 21 Jan 2012 12:01:14 +0000]
regmap: Support register patch sets

Device manufacturers frequently provide register sequences, usually not
fully documented, to be run at startup in order to provide better defaults
for devices (for example, improving performance in the light of silicon
evaluation). Support such updates by allowing drivers to register update
sets with the core. These updates will be written to the device immediately
and will also be rewritten when the cache is synced.

The assumption is that the reason for resyncing the cache will always be
that the device has been powered off. If this turns out to not be the case
then a separate operation can be provided.

Currently the implementation only allows a single set of updates to be
specified for a device, this could be extended in future.

Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit 22f0d90a34827812413bb3fbeda6a2a79bb58423)

Change-Id: I02f4ead9866a90b3635c4b98f1f9c3be3109c5ea
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/87577

7 years agoregmap: Reset cache status when reinitialsing the cache
Mark Brown [Fri, 20 Jan 2012 13:39:37 +0000]
regmap: Reset cache status when reinitialsing the cache

When we reinitialise the cache make sure that we reset the cache access
flags, ensuring that the reinitialised cache is in the default state
which is what callers would and do expect given the function name.

This is particularly likely to cause issues in systems where there was no
cache previously as those systems have cache bypass enabled, as for the
wm8994 driver where this was noticed.

Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit 421e8d2de3bd8b089dc6322d8589b7eb38437a23)

Change-Id: I99959185b9dd9862717a2faf2d011c9966e23c7f
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/87576

7 years agoregmap: Add support for padding between register and address
Mark Brown [Wed, 18 Jan 2012 10:52:25 +0000]
regmap: Add support for padding between register and address

Some devices, especially those with high speed control interfaces, require
padding between the register and the data. Support this in the regmap API
by providing a pad_bits configuration parameter.

Only devices with integer byte counts are supported.

Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit 82159ba8e6ef8c38e3e0452d90b4ff8da9e4b2c1)

Change-Id: Id9710b92e08ac905f3291715aa457842e60fed3d
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/87575

7 years agoregmap: Add irq_base accessor to regmap_irq
Mark Brown [Mon, 5 Dec 2011 16:10:15 +0000]
regmap: Add irq_base accessor to regmap_irq

Allows devices to discover their own interrupt without having to remember
it themselves.

Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit 209a600623cf13a8168b2f6b83643db7825abb9a)

Change-Id: I3f70623a25a7f67cf121e3bba764c27f18d4c3dd
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/87574

7 years agoregmap: Allow drivers to reinitialise the register cache at runtime
Mark Brown [Sat, 3 Dec 2011 17:06:20 +0000]
regmap: Allow drivers to reinitialise the register cache at runtime

Sometimes the register map information may change in ways that drivers can
discover at runtime. For example, new revisions of a device may add new
registers. Support runtime discovery by drivers by allowing the register
cache to be reinitialised with a new function regmap_reinit_cache() which
discards the existing cache and creates a new one.

Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit bf315173359b2f3b8b8ccca4264815e91f30be12)

Change-Id: I896f9a1f116d1fa43225c1ab63dbf0459e5a6b83
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/87573

7 years agoregmap: Add trace event for successful cache reads
Mark Brown [Wed, 30 Nov 2011 14:27:08 +0000]
regmap: Add trace event for successful cache reads

Currently we only trace physical reads, there's no instrumentation if
the read is satisfied from cache.

Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit bc7ee55633867909bb05e71f957a4d3c1aa1b488)

Change-Id: Ibbd7caff4e97b8a511f1d36b98bfdaa706ff8af4
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/87572

7 years agoregmap: Allow regmap_update_bits() users to detect changes
Mark Brown [Tue, 29 Nov 2011 20:10:36 +0000]
regmap: Allow regmap_update_bits() users to detect changes

Some users of regmap_update_bits() would like to be able to tell their
users if they actually did an update so provide a variant which also
returns a flag indicating if an update took place. We could return a
tristate in the return value of regmap_update_bits() but this makes the
API more cumbersome to use and doesn't fit with the general zero for
success idiom we have.
cherry-picked from main line commit
018690d33ecf4aa1eb1415e38c40e2b0b6c7808e

Change-Id: I1b8d5dd436576f9238db89c61a6b8a6edd9d1151
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/87571

7 years agoregmap: Report if we actually handled an interrupt in regmap-irq
Mark Brown [Mon, 28 Nov 2011 18:50:39 +0000]
regmap: Report if we actually handled an interrupt in regmap-irq

While the IRQ core doesn't currently support shared threaded interrupts
that's no reason for drivers not to do their bit and report IRQ_NONE when
they don't get an interrupt. This allows the core spurious/wedget interrupt
detection support to do its thing.

Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit d23511f9590870effa5ace575b59aac18c47175f)

Change-Id: Iee387fd88ac0b5f542cbe171da92d9b621a94e30
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/87570

7 years agoregmap: Fix rbtreee build when not using debugfs
Mark Brown [Tue, 22 Nov 2011 11:33:31 +0000]
regmap: Fix rbtreee build when not using debugfs

The debugfs functions don't stub themselves out quite so well as might
be desirable so provide functions which do do this stubbing.

Reported-by: Uwe Kleine-K├Ânig <u.kleine-koenig@pengutronix.de>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit cce585ce1ebd5307c9709e24758d5eb8a1e087a7)

Change-Id: I98580d938816e547c0b3c006be93facf38a29965
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/87569

7 years agoregmap: Provide debugfs dump of the rbtree cache data
Mark Brown [Mon, 21 Nov 2011 19:44:44 +0000]
regmap: Provide debugfs dump of the rbtree cache data

Show the register ranges we have in each rbtree node in debugfs, plus
some statistics on how big each node is and the total number of nodes.
It may also be worth collecting data on the ranges of dirty registers
to see if there's much mileage in trying to coalesce writes on sync.

Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit bad2ab4b6d938482c2b0bdcf80a8d14dbef4e8f5)

Change-Id: Ib1f6b29c703b2324fea0d93db5c3d92be6bdee22
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/87568

7 years agoregmap: Do debugfs init before cache init
Mark Brown [Mon, 21 Nov 2011 19:05:13 +0000]
regmap: Do debugfs init before cache init

This allows caches to add custom debugfs files.

Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit 052d2cd123e7e36ce54558ac5af0360de2343b2b)

Change-Id: I5bba9172f5f295d4d98be211c161238aa0066a4b
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/87567

7 years agoregmap: Suppress noop writes in regmap_update_bits()
Mark Brown [Fri, 18 Nov 2011 16:03:50 +0000]
regmap: Suppress noop writes in regmap_update_bits()

If the new register value is identical to the original one then suppress
the write to the hardware in regmap_update_bits(), saving some I/O cost.

Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit d91e8db2c3bbe8ef0e2f3e1a6ff5b31a8d53ef16)

Change-Id: Ia6c6e291371e6937b893501e763b7e589f700d93
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/87566

7 years agoregmap: Remove indexed cache type
Mark Brown [Fri, 18 Nov 2011 16:53:00 +0000]
regmap: Remove indexed cache type

There should be no situation where it offers any advantage over rbtree
and there are no current users so remove the code for simplicity.

Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit 4c691664583ef6a91f9ed0e08a75fbd30a5ffd5c)

Change-Id: I58f92ec9b989b2eaaab767b4201aeb04edec50a8
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/87565

7 years agoregmap: Drop check whether a register is readable in regcache_read
Lars-Peter Clausen [Wed, 16 Nov 2011 19:34:04 +0000]
regmap: Drop check whether a register is readable in regcache_read

One of the reasons for using a cache is to have a software shadow of a register
which is writable but not readable. This allows us to do a read-modify-write
operation on such a register.

Currently regcache checks whether a register is readable when performing a
cached read and returns an error if it is not. Drop this check, since it will
prevent us from using the cache for registers where read-back is not possible.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit b44d48c1ccf70273a91b7d3a920b0b54c3cb314f)

Change-Id: Iafe9afea14b09e69f698d71bcd1dd85695cc1ad5
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/87564

7 years agoregmap: Properly round cache_word_size
Lars-Peter Clausen [Wed, 16 Nov 2011 19:34:03 +0000]
regmap: Properly round cache_word_size

regcache currently only properly works with val bit sizes of 8 or 16, since
it will, when calculating the cache word size, round down. This causes the
cache storage to be too small to hold the full register value. Fix this by
rounding up instead.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit 064d4db11e23949c40b8a2f2f6be11c131b53932)

Change-Id: Ie7f90ca33c75a86fa41d9dd4548e3de5f33f9db4
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/87563

7 years agoregmap: Add support for 10/14 register formating
Lars-Peter Clausen [Wed, 16 Nov 2011 15:28:21 +0000]
regmap: Add support for 10/14 register formating

This patch adds support for 10 bits register, 14 bits value type register
formating. This is for example used by the Analog Devices AD5380.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit 7e5ec63ef574775900c82bd98f95bf039f513de3)

Change-Id: Id7395adf3f27bd6fcad3ba716018747d828f6484
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/87562

7 years agoregmap: Try cached read before checking if a hardware read is possible
Lars-Peter Clausen [Wed, 16 Nov 2011 15:28:19 +0000]
regmap: Try cached read before checking if a hardware read is possible

For some register format types we do not provide a parse_val so we can not do a
hardware read. But a cached read is still possible, so try to read from the
cache first, before checking whether a hardware read is possible. Otherwise the
cache becomes pretty useless for these register types.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit 19254411db4e69d90958244c5017e7e4a38547b0)

Change-Id: Ibdcf86abfca530dfe40a425b1b172ab6b8114408
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/87561

7 years agoregmap: Make reg_config reg_defaults const
Lars-Peter Clausen [Wed, 16 Nov 2011 15:28:17 +0000]
regmap: Make reg_config reg_defaults const

The reg_defaults field usually points to a static per driver array, which should
not be modified. Make requirement this explicit by making reg_defaults const.
To allow this the regcache_init code needs some minor changes. Previoulsy the
reg_config was not available in regcache_init and regmap->reg_defaults was used
to pass the default register set to regcache_init. Now that the reg_config is
available we can work on it directly.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit 720e4616e8fd85284ef1addd8b8d93d8415e8dbc)

Change-Id: Ia56e48e948f6eaf23d0781bc8a7ea4c9d3761a98
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/87560

7 years agoregmap: Move initialization of regcache related fields to regcache_init
Lars-Peter Clausen [Wed, 16 Nov 2011 15:28:16 +0000]
regmap: Move initialization of regcache related fields to regcache_init

Move the initialization regcache related fields of the regmap struct to
regcache_init. This allows us to keep regmap and regcache code better
separated.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit e5e3b8abeda1cf45f5a079458dbc267952694c7a)

Change-Id: If8bf565e163855a58a51bb5ce01967aba6d84fce
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/87559

7 years agoregmap: Do not call regcache_exit from regcache_lzo_init error path
Lars-Peter Clausen [Tue, 15 Nov 2011 12:34:41 +0000]
regmap: Do not call regcache_exit from regcache_lzo_init error path

Calling regcache_exit from regcache_lzo_init is first of all a layering
violation and secondly will cause double frees. regcache_exit will free buffers
allocated by the core, but the core will also free the same buffers when the
cacheops init callback returns an error. Thus we end up with a double free.
Fix this by not calling regcache_exit but only free those buffers which, have
been allocated in this function.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Acked-by: Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit c2b1ecd13c6a7b19f1c0c48b68f61ab083f3ec3f)

Change-Id: Ic777cbfbe140a3a168263488f220ec635d5938c4
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/87558

7 years agoregmap: Do not call regcache_exit from regcache_rbtree_init error path
Lars-Peter Clausen [Tue, 15 Nov 2011 12:34:40 +0000]
regmap: Do not call regcache_exit from regcache_rbtree_init error path

Calling regcache_exit from regcache_rbtree_init is first of all a layering
violation and secondly will cause double frees. regcache_exit will free buffers
allocated by the core, but the core will also free the same buffers when the
cacheops init callback returns an error. Thus we end up with a double free.
Fix this by not calling regcache_exit but only free those buffers which, have
been allocated in this function.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Acked-by: Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit 462a185c5cea7063348003c1644b70a6f6780f01)

Change-Id: Ib3e955599995543d2948d3f85ca46d648fee6bd9
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/87557

7 years agoregmap: Fix memory leak in regcache_init error path
Lars-Peter Clausen [Mon, 14 Nov 2011 09:40:17 +0000]
regmap: Fix memory leak in regcache_init error path

Make sure all allocated memory gets freed again in case initializing the cache
failed.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Acked-by: Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit bd061c78cabc28bb64ed79f784d24918b6bdb791)

Change-Id: I3ece3442c4e1162e481c0c207b2add27a57a6676
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/87556

7 years agoregmap: Fix memory leak in regcache_hw_init error path
Lars-Peter Clausen [Mon, 14 Nov 2011 09:40:16 +0000]
regmap: Fix memory leak in regcache_hw_init error path

Make sure reg_defaults_raw gets freed in case of an error.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Acked-by: Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit 021cd616decb4e8a4b31f1f8c466a847e8c04e67)

Change-Id: I7e9cbfa66b52197b22551e794912185dfc120ada
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/87555

7 years agoregmap: return ERR_PTR instead of NULL in regmap_init
Lars-Peter Clausen [Mon, 14 Nov 2011 09:40:15 +0000]
regmap: return ERR_PTR instead of NULL in regmap_init

The regmap_init documentation states that it will either return a pointer to a
valid regmap structure or a ERR_PTR in case of an error. Currently it returns a
NULL pointer in case no bus or no config was given. Since NULL is not a
ERR_PTR a caller might assume that it is a pointer to a valid regmap structure,
so return a ERR_PTR(-EINVAL) instead.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit abbb18fb4ad7472ee2e1351f0ca12bce64cac143)

Change-Id: I4c853a8b5c70513f04ea5b338197c7416721ee12
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/87554

7 years agoregmap: Fix memory leak in regmap_init error path
Lars-Peter Clausen [Thu, 10 Nov 2011 17:15:15 +0000]
regmap: Fix memory leak in regmap_init error path

If regcache initialization fails regmap_init will currently exit without
freeing work_buf.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit 58072cbfc522c2520e34333a53c8f17bb1adb1a0)

Change-Id: I55877ab14da86fbc479a0418c7f5371486574525
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/87553

7 years agoregmap: Support some more block operations on cached devices
Lars-Peter Clausen [Tue, 8 Nov 2011 17:37:26 +0000]
regmap: Support some more block operations on cached devices

Commit 10a08d9f ("regmap: Support some block operations on cached devices")
allowed raw read operations without throwing a warning when using caches if
all registers are volatile. This patch does the same for raw write operations.

This is for example useful when loading a firmware in a predefined volatile
region on a chip where we otherwise want registers to be cached.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit c48a9d74926c83f62b0251eff0a3dde259923856)

Change-Id: I97c056ab223e0d7de068a92fa43abdebce4dd2a8
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/87552

7 years agoregmap: Add helper function for checking if a register range is volatile
Lars-Peter Clausen [Tue, 8 Nov 2011 17:37:25 +0000]
regmap: Add helper function for checking if a register range is volatile

We already have the same code for checking whether a register range is volatile
in two different places. Instead of duplicating it once more  add a small helper
function for checking whether a register range is voltaile.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit 82cd9965c37be7e2cbcb79ad991a6b9860f855d8)

Change-Id: I95de94b0883cd01b5290181a227f733b914e702e
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/87551

7 years agoregmap: Rename LZO cache type to compressed
Mark Brown [Wed, 2 Nov 2011 15:00:03 +0000]
regmap: Rename LZO cache type to compressed

Users probably don't care about the specific compression algorithm and
we might want to use a different algorithm (snappy being the one I'm
thinking of right now) so update the public interface to have a more
generic name.

Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit 50b776fc71c13663eb7434f634f2b796de5c9885)

Change-Id: I4016e48c8d86581693e8b0af16225d4b832704c2
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/87550

7 years agoregmap: Track if the register cache is dirty and suppress unneeded syncs
Mark Brown [Wed, 26 Oct 2011 08:34:22 +0000]
regmap: Track if the register cache is dirty and suppress unneeded syncs

Allow drivers to optimise out the register cache sync if they didn't need
to do one. If the hardware is desynced from the register cache (by power
loss for example) then the driver should call regcache_mark_dirty() to
let the core know about this.

Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit 8ae0d7e8a918e9603748abe9b31984fc5d96abb3)

Change-Id: If3380b73669ebaaf474cf46fdd2f4339345c66a3
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/87549

7 years agoregmap: Fix typo in kerneldoc for regmap_update_bits()
Mark Brown [Fri, 28 Oct 2011 21:46:18 +0000]
regmap: Fix typo in kerneldoc for regmap_update_bits()

Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit b973aa3624a531c7d2b4d8d199142299488f573e)

Change-Id: I218de108d3799d8302bd363595107df9a60ecdb7
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/87548

7 years agoregmap: Fix word wrap in Makefile
Mark Brown [Sun, 23 Oct 2011 14:54:07 +0000]
regmap: Fix word wrap in Makefile

80 columns FTW.

Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from mainline commit 7ea75801830082f68e4eb7f2e82283b9b2367461)

Change-Id: I6e86779df41614faa494995d03e0bf5b22f652f4
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/87547

7 years agoregmap: Prepare LZO cache for variable block sizes
Mark Brown [Mon, 17 Oct 2011 23:37:00 +0000]
regmap: Prepare LZO cache for variable block sizes

Give regcache_lzo_block_count() a copy of the map so that when we decide
we want to make the LZO cache more controllable we can more easily do so.

Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
(cherry picked from mainline commit 82732bdd663ee9dc1ad4b0409881fe89a9d827ca)

Change-Id: Id94349ea5c7b33d883218f8c5a82f21eff851a01
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/87546

7 years agoregmap: Add a reusable irq_chip for regmap based interrupt controllers
Mark Brown [Fri, 28 Oct 2011 21:50:49 +0000]
regmap: Add a reusable irq_chip for regmap based interrupt controllers

There seem to be lots of regmap-using devices with very similar interrupt
controllers with a small bank of interrupt registers and mask registers
with an interrupt per bit. This won't cover everything but it's a good
start.

Each chip supplies a base for the status registers, a base for the mask
registers, an optional base for writing acknowledgements (which may be the
same as the status registers) and an array of bits within each of these
register banks which indicate the interrupt.

There is an assumption that the bit for each interrupt will be the same
in each of the register bank.

Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from mainline commit f8beab2bb611d735767871e0e1a12dc6a0def7b1)

Change-Id: Id1fd93b09595d8cbdebcc415bebe3366c04d7b18
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/87545

7 years agoarm: tegra: cardhu: increase mc outstanding reqs for lower ram freqs
Nitin Kumbhar [Fri, 2 Mar 2012 11:40:03 +0000]
arm: tegra: cardhu: increase mc outstanding reqs for lower ram freqs

The number of outstanding memory transactions is limited by a setting
in MC. This leads to dc underflows which cause flickers on lcd panel.
Increase the limits to optimal values which don't show dc underflows.

Currently, the cap on outstanding requests for a frequency is calculated
by linearly scaling up values for frequencies keeping minimum value at
0x08. An exception has to be made to resolve dc underflows and
lcd flickers.

For cardhu, the lower ram frequencies are 25.5MHz, 51MHz and 102MHz.
So increase minimum value to 0x10 and set 0x18 for 102MHz as an optimal
value with which there are no dc underflows.

Memory tables of Hynix-1GB, Hynix-2GB and Samsung-2GB memory types are
updated with this change.

Bug 932113
Bug 946316

Signed-off-by: Nitin Kumbhar <nkumbhar@nvidia.com>
Reviewed-on:http://git-master/r/87230
(cherry picked from commit 39642475dc4401e666d4ade338c5b9e0741ce017)

Change-Id: I19e8c04f4acc93f07121ee7da98588d2441147e8
Signed-off-by: Nitin Kumbhar <nkumbhar@nvidia.com>
Reviewed-on: http://git-master/r/87236
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Edward Ahn <eahn@nvidia.com>

7 years agoARM: tegra: dma: Initialize isr handler when it is allocated
Laxman Dewangan [Fri, 2 Mar 2012 11:09:57 +0000]
ARM: tegra: dma: Initialize isr handler when it is allocated

Initialize the interrupt handler of dma channel when it is
allocated.
De-initialize when the allocated channel get free.

Change-Id: Ic813cb28492cc26907d0fcfdf573600a586d1c63
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/87231

7 years agotegra: cpuidle: remove flow-controller programming
satya popuri [Tue, 28 Feb 2012 23:57:35 +0000]
tegra: cpuidle: remove flow-controller programming

bug 937980

Remove some legacy flow-controller programming from LP3 entry and exit
paths. Also remove data synchronization barrier instruction after wfi
to improve scaling across cores.

Signed-off-by: satya popuri <spopuri@nvidia.com>

Reviewed-on: http://git-master/r/86451
(cherry picked from commit f88ee65418126365fc10af3d3771bba5d2e41d57)

Change-Id: I7bca4328044ef477bc4bec9c9af9d30d8815d6ce
Reviewed-on: http://git-master/r/87212
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Satya Popuri <spopuri@nvidia.com>

7 years agodrvers: wireless: bcmdhd: set MMC_PM_KEEP_POWER on suspend
Rakesh Kumar [Fri, 2 Mar 2012 10:46:24 +0000]
drvers: wireless: bcmdhd: set MMC_PM_KEEP_POWER on suspend

MMC_PM_KEEP_POWER should be set before each suspend/resume cyble as
mmc drivers clears MMC_PM_KEEP_POWER from pm_flags on resume.

Bug 942826

Change-Id: Ifc647b500d744a37206a4879f1e3df495bc4123a
Signed-off-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-on: http://git-master/r/87208
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>

7 years agoASOC: Tegra: Fix Tegra20 BT SCO playback/record
Sumit Bhattacharya [Mon, 20 Feb 2012 13:23:23 +0000]
ASOC: Tegra: Fix Tegra20 BT SCO playback/record

Set I2s FIFO attention level based on sample size and channel count.
Also set playback DMA destination bus width and capture DMA source bus
width based on sample size. These changes are needed to have proper
BT SCO playback and record which uses 16bit-mono format.

Bug 934101
Bug 874428
Bug 927978

Signed-off-by: Sumit Bhattacharya <sumitb@nvidia.com>
Reviewed-on: http://git-master/r/84817
(cherry picked from commit 3ca2eb665af450d7e8f3bf6f2471e31203052641)

Change-Id: I95c10716eaa990adb8b6ae535ce6acfca122a609
Reviewed-on: http://git-master/r/87192
Tested-by: Sumit Bhattacharya <sumitb@nvidia.com>
Reviewed-by: Scott Peterson <speterson@nvidia.com>

7 years agoALSA: HDA: Don't power up hda codec from resume
Sumit Bhattacharya [Mon, 6 Feb 2012 16:48:09 +0000]
ALSA: HDA: Don't power up hda codec from resume

Remove snd_hda_power_up()/snd_hda_power_down() sequence from HDA codec
resume since it add around 90ms delay. This code was not essential
for HDA driver to work properly after suspend-resume cycle.

Bug 932606

Signed-off-by: Sumit Bhattacharya <sumitb@nvidia.com>
Reviewed-on: http://git-master/r/80040
(cherry picked from commit 2ed8667c2bdfd4c8cbe371530b066b537aa9ae62)

Change-Id: I0ffb120eb0a54f6c4e20aaf96c5ac2d0f5ab6949
Reviewed-on: http://git-master/r/87188
Tested-by: Sumit Bhattacharya <sumitb@nvidia.com>
Reviewed-by: Scott Peterson <speterson@nvidia.com>

7 years agowl12xx: add set_carddetect in wl12xx platform data
Om Prakash Singh [Fri, 2 Mar 2012 07:05:40 +0000]
wl12xx: add set_carddetect in wl12xx platform data

set_carddetect is use for calling mmc sdio carddetect function
from wl12xx driver.

Bug 931928

Change-Id: I48710fbf2bf1ab2f03651d6dd56c08018191aa9b
Signed-off-by: Om Prakash Singh <omp@nvidia.com>
Reviewed-on: http://git-master/r/87139
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

7 years agoasoc: tegra: ALC5640 machine: Fix switch name
Manoj Gangwal [Fri, 2 Mar 2012 06:46:47 +0000]
asoc: tegra: ALC5640 machine: Fix switch name

Fix headset switch name for kai.

Bug 945640

Change-Id: I61b0a7c58a97bd3f2b976d521a5298a48a27798c
Signed-off-by: Manoj Gangwal <mgangwal@nvidia.com>
Reviewed-on: http://git-master/r/87136
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoarm: config: tegra3: enable EEPROM_AT24 to read eeprom
Om Prakash Singh [Thu, 1 Mar 2012 17:21:24 +0000]
arm: config: tegra3: enable EEPROM_AT24 to read eeprom

Bug 927456

Change-Id: I0c7768b60eb5558484a273deb44965d8736a6061
Signed-off-by: Om Prakash Singh <omp@nvidia.com>
Reviewed-on: http://git-master/r/86957
Reviewed-by: Rakesh Kumar <krakesh@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

7 years agoarm: tegra: kai: Add irq_num for smb349 charger
Syed Rafiuddin [Thu, 1 Mar 2012 15:41:24 +0000]
arm: tegra: kai: Add irq_num for smb349 charger

Board specific change to enable interrupts for
smb349 charger driver

Change-Id: Id0ed2c2644adbfa6181ff07daf6a82c69924d4ab
Signed-off-by: Syed Rafiuddin <srafiuddin@nvidia.com>
Reviewed-on: http://git-master/r/86940
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoARM: tegra: dma: cleanups in isr handlers
Laxman Dewangan [Fri, 2 Mar 2012 09:20:32 +0000]
ARM: tegra: dma: cleanups in isr handlers

Use the helper function for starting head request from
queue/configuring the next request from transfer in place
of doing it in multiple places. This removes the duplicating
of code in multiple places.

Change-Id: I273f6666a1cd2debcdab56593aa9bf0e9c50318d
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/86914
Reviewed-by: Stephen Warren <swarren@nvidia.com>

7 years agoARM: tegra: dvfs: Update T30L and T30SL Vcore min values.
Gaurav Sarode [Thu, 1 Mar 2012 12:42:25 +0000]
ARM: tegra: dvfs: Update T30L and T30SL Vcore min values.

Update T30L and T30SL values Vcore min voltage is now
1.2V when Vcpu >= 1.1V. Old setting was 1.3V.

Bug 841336
Signed-off-by: Gaurav Sarode <gsarode@nvidia.com>

Change-Id: I35202189618cffd4ead1fae3db462c3e970a7ed8
Reviewed-on: http://git-master/r/86912
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Tested-by: Gaurav Sarode <gsarode@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

7 years agomfd: tps6591x: implement irq_set_wake() for tps6591x interrupts
Laxman Dewangan [Thu, 1 Mar 2012 11:56:13 +0000]
mfd: tps6591x: implement irq_set_wake() for tps6591x interrupts

Implementing the function irq_set_wake() for the interrupts
supported by pmu.

Change-Id: I7dab75d82becbb557af5e1c38f6ed7c93e6761cb
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/86907