7 years agonet:wireless:bcmdhd: rename bcmsdh_remove & bcmsdh_probe
Mursalin Akon [Thu, 15 Mar 2012 22:40:15 +0000]
net:wireless:bcmdhd: rename bcmsdh_remove & bcmsdh_probe

rename bcmsdh_remove & bcmsdh_probe to *_bcmdhd
to resolve symbol conflicts with bcm4329 driver.

Bug 956238

Change-Id: I750238ddf9b3a0d9ff9583a7ec456aceef28531c
Signed-off-by: Mursalin Akon <makon@nvidia.com>
Reviewed-on: http://git-master/r/90656
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Gerrit_Virtual_Submit
Reviewed-by: Rakesh Kumar <krakesh@nvidia.com>
Reviewed-by: Allen Martin <amartin@nvidia.com>

7 years agovideo: tegra: add cursor mode flipping
Adam Cheney [Thu, 15 Mar 2012 21:50:00 +0000]
video: tegra: add cursor mode flipping

This change adds a flag to flip windows in cursor mode.  Cursor mode
will cause flips to be skipped over if there are newer flip requests
waiting in the workqueue.

Add CURSOR_MODE to caps bitfield.

bug 942762

Change-Id: Ib52a0a5565f961cdd9650e4204cd65b86f96fee1
Signed-off-by: Adam Cheney <acheney@nvidia.com>
Reviewed-on: http://git-master/r/90418
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Robert Morell <rmorell@nvidia.com>

7 years agoarch: arm: configs: enable Out Of Band interrupt.
Narayan Reddy [Mon, 26 Mar 2012 12:35:58 +0000]
arch: arm: configs: enable Out Of Band interrupt.

enable OutOfBand interrupt support in bcm4329 driver.

Bug 959909

Change-Id: I2e39eed38e2574c106dd0c43f5a940ced2af1d09
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: http://git-master/r/92326
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Rakesh Kumar <krakesh@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

7 years agotegra: p852: nor: Changing timing registers
Vishal Singh [Thu, 22 Mar 2012 09:10:55 +0000]
tegra: p852: nor: Changing timing registers

Changing the values of registers timing0 and timing1 of NOR flash
to those specified in the NOR POR.

Bug 914158.

Change-Id: Ie65fadbeda7329b22786841f46dd2583043a8381
Reviewed-on: http://git-master/r/#change,72828
Reviewed-on: http://git-master/r/91737
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Vishal Singh <vissingh@nvidia.com>
Reviewed-by: Manoj Chourasia <mchourasia@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>

7 years agoARM: tegra3: ARM_SAVE_DEBUG_CONTEXT should be selected based on PM_SLEEP
Manoj Chourasia [Wed, 21 Mar 2012 09:14:14 +0000]
ARM: tegra3: ARM_SAVE_DEBUG_CONTEXT should be selected based on PM_SLEEP

ARM_SAVE_DEBUG_CONTEXT was getting selected by tegra3 independent
of PM_SLEEP config. ARM_SAVE_DEBUG_CONTEXT itself is dependent on
PM_SLEEP. That was generating following warning while doing
savedefconfig with PM_SLEEP disabled.

scripts/kconfig/conf --savedefconfig=defconfig Kconfig
warning: (ARCH_TEGRA_2x_SOC && ARCH_TEGRA_3x_SOC) selects \
ARM_SAVE_DEBUG_CONTEXT which has unmet direct dependencies\
(PM_SLEEP && CPU_V7)

This patch fixes the issue.

bug 931053

Change-Id: I57016476b7ca39f9ac36a9c59d0102c89c85c6c9
Signed-off-by: Manoj Chourasia <mchourasia@nvidia.com>
Reviewed-on: http://git-master/r/91461
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

7 years agoInput: gpio_keys - add support for interrupt only keys
Laxman Dewangan [Tue, 20 Mar 2012 00:54:31 +0000]
Input: gpio_keys - add support for interrupt only keys

Some of buttons, like power-on key or onkey, may only generate interrupts
when pressed and not actually be mapped as gpio in the system. Allow
setting gpio to invalid value and specify IRQ instead to support such
keys. The debounce timer is used not to debounce but to ignore new IRQs
coming while button is kept pressed.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Dmitry Torokhov <dtor@mail.ru>

Cherry-picked from mainline
d8ee4a1c90529ed06e1aa43d034986649f7b670b

Change-Id: Ibf8e407351082d816dd051d2c69a4a1a7caa70e7
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/92321
Reviewed-by: Automatic_Commit_Validation_User

7 years agoInput: gpio_keys - consolidate key destructor code
Dmitry Torokhov [Mon, 19 Mar 2012 06:36:30 +0000]
Input: gpio_keys - consolidate key destructor code

Signed-off-by: Dmitry Torokhov <dtor@mail.ru>
(cherry picked from commit a16ca23935afc0d72215b139720bd07df3162a9f)

Change-Id: I90ae154a3b124fad0e9320ac5d9d8083175461b5
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/92320
Reviewed-by: Automatic_Commit_Validation_User

7 years agoInput: revert "gpio_keys - switch to using threaded IRQs"
David Jander [Mon, 19 Mar 2012 06:36:29 +0000]
Input: revert "gpio_keys - switch to using threaded IRQs"

request_any_context_irq() should handle the case when using GPIO expanders
that themselves use threaded IRQs, and so the premise of change
7e2ecdf438bb479e2b4667fc16b1a84d6348da04 is incorrect.

Signed-off-by: Dmitry Torokhov <dtor@mail.ru>
(cherry picked from commit 6709c9a5d8c53092cbe89128df4e0a549e93133b)

Change-Id: I0b4267f6493483c2edc9926f48ecda68d863bead
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/92319
Reviewed-by: Automatic_Commit_Validation_User

7 years agoInput: gpio_keys - constify platform data
Dmitry Torokhov [Mon, 19 Mar 2012 06:36:29 +0000]
Input: gpio_keys - constify platform data

The platform data should not be altered and therefore should be
accessed through const pointers.

Signed-off-by: Dmitry Torokhov <dtor@mail.ru>
Cherry-picked from
d9080921aa32c70a95476ce387e973787b892591

Change-Id: I5791f831909d4417a5c2732e310630c97c42f4a9
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/92318
Reviewed-by: Automatic_Commit_Validation_User

7 years agoInput: gpio_keys - use of_property_read_u32()
Tobias Klauser [Fri, 9 Sep 2011 18:09:50 +0000]
Input: gpio_keys - use of_property_read_u32()

Use the of_property_read_u32() helper function to retrieve u32 values
from the device tree. Also do not pass the len parameter to
of_get_property if it isn't checked afterwards.

Signed-off-by: Tobias Klauser <tklauser@distanz.ch>
Signed-off-by: Dmitry Torokhov <dtor@mail.ru>
(cherry picked from commit cca84699a079a91b0a0cb4f2da8548e56859376a)

Change-Id: I265e0cdc8b761572d1c78d699d761097be26a4e4
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/92317
Reviewed-by: Automatic_Commit_Validation_User

7 years agoarm : tegra: clocks: Add PERIPH_ON_APB flag for apbif clock
Sumit Bhattacharya [Sun, 18 Mar 2012 08:57:21 +0000]
arm : tegra: clocks: Add PERIPH_ON_APB flag for apbif clock

Bug 953357

Signed-off-by: Sumit Bhattacharya <sumitb@nvidia.com>
Reviewed-on: http://git-master/r/90845
(cherry picked from commit 24b715551882d387b82a89e0213012863e46bb95)

Change-Id: Ia8632fccab0708dacd9ef4b9360f8ef499b47818
Reviewed-on: http://git-master/r/92280
Tested-by: Sumit Bhattacharya <sumitb@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Scott Peterson <speterson@nvidia.com>

7 years agoARM: tegra: Fix PPCS IO address for Tegra 2x
Krishna Yarlagadda [Thu, 22 Mar 2012 10:52:16 +0000]
ARM: tegra: Fix PPCS IO address for Tegra 2x

PPCS physical address is different for Tegra 3x and 2x

Change-Id: If26f08f6f234786194f6642523b644e8bf4be770
Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
Reviewed-on: http://git-master/r/91768
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

7 years agocrypto: tegra-aes: save key during key call
Sanjay Singh Rawat [Wed, 14 Mar 2012 13:18:29 +0000]
crypto: tegra-aes: save key during key call

Save the key in hardware when the key setting call comes. Currently it is
set at later time.

Bug 917607

Change-Id: Ibdacb07c16c161eeba00eda6716884518e40c40a
Signed-off-by: Sanjay Singh Rawat <srawat@nvidia.com>
Reviewed-on: http://git-master/r/90072
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>

7 years agoARM: tegra: cardhu: add pm311 mem table
Ray Poudrier [Sat, 18 Feb 2012 04:31:27 +0000]
ARM: tegra: cardhu: add pm311 mem table

Bug 896060

Reviewed-on: http://git-master/r/84679
(cherry picked from commit e1eb8a0802ff7c2aaf8e278e0f8cfd1fa06758be)

Change-Id: Ic233905eaa22775daa894c0132187b1192824b01
Signed-off-by: Ray Poudrier <rapoudrier@nvidia.com>

Conflicts:

arch/arm/mach-tegra/board-cardhu-memory.c

Change-Id: Ic233905eaa22775daa894c0132187b1192824b01
Reviewed-on: http://git-master/r/88867
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Raymond Poudrier <rapoudrier@nvidia.com>
Tested-by: Raymond Poudrier <rapoudrier@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

7 years agoARM: tegra: dvfs: correct LCD frequency for 1V
Ray Poudrier [Fri, 10 Feb 2012 04:27:17 +0000]
ARM: tegra: dvfs: correct LCD frequency for 1V

Bug 841336

Reviewed-on: http://git-master/r/82996
(cherry picked from commit 5850c8f4968fd7acbb22e377a56a476e37ac5117)

Change-Id: I61d5c1576a6f5caf82b3efec2123c47eb64889b2
Signed-off-by: Ray Poudrier <rapoudrier@nvidia.com>
Reviewed-on: http://git-master/r/88865
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoARM: tegra: dvfs: Add chip sku override
Ray Poudrier [Fri, 9 Dec 2011 01:38:25 +0000]
ARM: tegra: dvfs: Add chip sku override

Based on command line parameter, override the sku

Bug 925878

Signed-off-by: Ray Poudrier <rapoudrier@nvidia.com>
Reviewed-on: http://git-master/r/83241
(cherry picked from commit 24df2878418fc0c5f2b2dd20130df91a23dd042e)

Change-Id: Ic8d2408c6e408fcf28f9b64f12866971b753b41e
Reviewed-on: http://git-master/r/88864
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agousb: gadget: tegra: Fence read for AHB memory coherency
Rakesh Bodla [Tue, 7 Feb 2012 13:37:56 +0000]
usb: gadget: tegra: Fence read for AHB memory coherency

Fix memory coherency of AHB Master-initiated writes
to DRAM by reading the fence registers to make sure
memory is flushed to DRAM from the MC/EMC.

Bug 729267
Bug 952405

Change-Id: I96454fa43b58778d15095de2edb42e9dac1547d2
Signed-off-by: Rakesh Bodla <rbodla@nvidia.com>
Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
Reviewed-on: http://git-master/r/88285
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

7 years agousb: ehci: tegra: Fence read for AHB memory coherency
Rakesh Bodla [Tue, 7 Feb 2012 12:56:46 +0000]
usb: ehci: tegra: Fence read for AHB memory coherency

Fix memory coherency of AHB Master-initiated writes
to DRAM by reading the fence registers to make sure
memory is flushed to DRAM from the MC/EMC.

Bug 729267
Bug 952405

Change-Id: Ia60ee6796e53de6ece89e7e2ad531009a2fe5f00
Signed-off-by: Rakesh Bodla <rbodla@nvidia.com>
Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
Reviewed-on: http://git-master/r/88284
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

7 years agoarm: tegra: xmm: reduce timeout timing on resume
Seongho Joo [Sun, 26 Feb 2012 03:18:02 +0000]
arm: tegra: xmm: reduce timeout timing on resume

1.reduce CP ack timeout to 1000 ms, based on modem vendor spec.
expected timing is 10ms, but modem vendor recommend to wait less than 1 sec.
2.move log print after spinlock section.
log in spinlock could waste cpu resource.

Bug 932104

Signed-off-by: Seongho Joo <sjoo@nvidia.com>
Reviewed-on: http://git-master/r/86003
(cherry picked from commit de853a886153cfb35cafcf797df490207187cc33)

Change-Id: I4b1ea80d25e0aa1f93599c08eedf306dbed00d63
Reviewed-on: http://git-master/r/91934
Reviewed-by: Shawn Joo <sjoo@nvidia.com>
Tested-by: Shawn Joo <sjoo@nvidia.com>
Reviewed-by: Steve Lin <stlin@nvidia.com>

7 years agotty: serial: 8250: use postcore_initcall instead of module_init
Varun Wadekar [Fri, 20 Jan 2012 11:19:00 +0000]
tty: serial: 8250: use postcore_initcall instead of module_init

When the driver is not built as a module, use postcore_initcall
instead of module_init. This allows us to get the console prints
very early during the kernel boot process.

Bug 928931

Change-Id: Icbf60476f76486511237b72f5c53656ff7931676
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/76518
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

7 years agoARM: tegra: timer: add /dev/timerinfo
Jon Mayo [Wed, 29 Feb 2012 04:55:19 +0000]
ARM: tegra: timer: add /dev/timerinfo

Add a device that allows read-only mmap() of timer registers.

Reviewed-on: http://git-master/r/87511
(cherry picked from commit 95a6a6dafd97cbc72ea305f17b600be67a03093b)

Change-Id: I8782107dc3a32ff1c5a3a3c68d2ff0e8fb123dc3
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/91984
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoarch: arm: configs: update for minimal kernel
Ken Chang [Thu, 8 Mar 2012 04:01:42 +0000]
arch: arm: configs: update for minimal kernel

shall not have board specific config for mods
remove CONFIG_I2C_MUX_PCA954x

bug 916180

Signed-off-by: Ken Chang <kenc@nvidia.com>
Reviewed-on: http://git-master/r/88730
Reviewed-by: Krishna Monian <kmonian@nvidia.com>
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
(cherry picked from commit afee1fcade2e60d9c5986488e891c0cc9f1b22be)

Change-Id: I2aa4f8a7f21c5d875b04d537223da90422020907
Reviewed-on: http://git-master/r/90266
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoALSA: HDA: Return -ENODEV if hdmi_pcm_open() fails
Sumit Bhattacharya [Thu, 22 Mar 2012 14:17:16 +0000]
ALSA: HDA: Return -ENODEV if hdmi_pcm_open() fails

Return -ENODEV instead of -EAGAIN if hdmi_pcm_open() fails. There is
a chance of user space getting hung while trying to open pcm device
if -EAGAIN is returned.

Bug 949659

Change-Id: If4ff4078d8e0d882859ac97742e7d48d2e6c230c
Signed-off-by: Sumit Bhattacharya <sumitb@nvidia.com>
Reviewed-on: http://git-master/r/91819
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Scott Peterson <speterson@nvidia.com>
Reviewed-by: Ravindra Lokhande <rlokhande@nvidia.com>

7 years agovideo: tegra: host: use bus_for_each_dev for channel debug output
Mayuresh Kulkarni [Mon, 19 Mar 2012 12:38:53 +0000]
video: tegra: host: use bus_for_each_dev for channel debug output

- this patch uses the iterrator bus API to print the channel
status on debug-fs output
- it is the first step for removal nvhost_master holding
pointers to all the channels

Bug 871237

Change-Id: I2eaf8f0124512f1bc1ea9bbbe71d2c112b1947d2
Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-on: http://git-master/r/91676
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

7 years agoARM: fix rcu stalls on SMP platforms
Russell King [Thu, 19 Jan 2012 15:20:58 +0000]
ARM: fix rcu stalls on SMP platforms

We can stall RCU processing on SMP platforms if a CPU sits in its idle
loop for a long time.  This happens because we don't call irq_enter()
and irq_exit() around generic_smp_call_function_interrupt() and
friends.  Add the necessary calls, and remove the one from within
ipi_timer(), so that they're all in a common place.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Change-Id: I3383645deba180958b548fbae5aca795ac4094f6
Reviewed-on: http://git-master/r/90691
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
Tested-by: Juha Tukkinen <jtukkinen@nvidia.com>

7 years agovideo: tegra: host: Split submit into subfunctions
Terje Bergstrom [Fri, 16 Mar 2012 11:55:24 +0000]
video: tegra: host: Split submit into subfunctions

Split host1x_channel_submit() into subfunctions.

Bug 926690

Change-Id: I8be55cbc9d25ee76c758a918de4a9bb27e2ea846
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/90626
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

7 years agoARM: tegra: Fix compilation warning for PCIe
Juha Tukkinen [Wed, 14 Mar 2012 11:41:34 +0000]
ARM: tegra: Fix compilation warning for PCIe

Fix compilation error for PCIe.

Change-Id: I1ab5390dfce273236bd4aa09579bf54425faf2e9
Signed-off-by: Juha Tukkinen <jtukkinen@nvidia.com>
Reviewed-on: http://git-master/r/90045
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agortc: tps80031: Fixing POR month comparison
Venu Byravarasu [Tue, 13 Mar 2012 05:21:33 +0000]
rtc: tps80031: Fixing POR month comparison

As month calculation is modified to fix bug 931452
and POR comparison for month is not updated, fixing it.

bug 951622

Change-Id: Ifd906b48c51b155809ed88892579e9dd14abd5a0
Signed-off-by: Venu Byravarasu <vbyravarasu@nvidia.com>
Reviewed-on: http://git-master/r/89663
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: David Schalig <dschalig@nvidia.com>
Tested-by: David Schalig <dschalig@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

7 years agoALSA:hda: add alsa control for query of device
Sayak Ghosh Choudhury [Thu, 22 Mar 2012 14:03:19 +0000]
ALSA:hda: add alsa control for query of device

alsa control is added to facilitate querying dts decode capability of
connected device. dts decode capability of the connected device is
updated in the ELD buffer. That information is updated in the
ALSA control structure. In addition to that, the code is amended to
handle other pass through decoder mode support.

Bug 943017

Change-Id: If8da7dfb24be3b86592191f5586b70492282b438
Signed-off-by: Sayak Ghosh Choudhury <sayakc@nvidia.com>
Reviewed-on: http://git-master/r/91813
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Scott Peterson <speterson@nvidia.com>

7 years agomfd: Build rtc5t583 only if I2C config is selected to y.
Laxman Dewangan [Mon, 19 Mar 2012 06:14:55 +0000]
mfd: Build rtc5t583 only if I2C config is selected to y.

Fixing build error reported by Stephen Rothwell:

drivers/built-in.o: In function `rc5t583_i2c_init':
rc5t583.c:(.init.text+0xb3db): undefined reference to `i2c_register_driver'
drivers/built-in.o: In function `rc5t583_i2c_probe':
rc5t583.c:(.devinit.text+0x8fa0): undefined reference to `regmap_init_i2c'
drivers/built-in.o: In function `rc5t583_i2c_exit':
rc5t583.c:(.exit.text+0x708): undefined reference to `i2c_del_driver'

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
(cherry picked from commit 5364d0b8640dd15e5c0b3ba40d0e874764b1bc88)

Change-Id: If1cfde6c6e0e52b4e55b07401afcd91a895b8905
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/91799
Reviewed-by: Automatic_Commit_Validation_User

7 years agomfd: Add support for RICOH PMIC RC5T583
Laxman Dewangan [Tue, 28 Feb 2012 13:05:17 +0000]
mfd: Add support for RICOH PMIC RC5T583

Ricoh power management IC  RC5T583 contains is multi
functional device having multiple sub devices inside this.
This device has multiple dcdc/ldo regulators, gpios, interrupt
controllers, on-key, RTCs, ADCs.
This device have 4 DCDCs, 8 LDOs, 8 GPIOs, 6 ADCs, 3 RTCs etc.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>

Cherry-picked from mainline
1b1247dd75aa5cf5fae54a3bec7280046e9c7957

Change-Id: I5d3bcfb45e232a1a9a210ec14815356ae1918c5d
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/91798
Reviewed-by: Automatic_Commit_Validation_User

7 years agoi2c: tegra: Remove synchronization between init and isr
Chaitanya Bandi [Thu, 22 Mar 2012 11:47:37 +0000]
i2c: tegra: Remove synchronization between init and isr

Removed unnecessary synchronization between init and isr
because clock driver is making sure that any operations
will be completed before disabling the driver clock.

Change-Id: I545e48be73697e023fedb8c663402c15e2a472df
Signed-off-by: Chaitanya Bandi <bandik@nvidia.com>
Reviewed-on: http://git-master/r/91779
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

7 years agoARM: tegra: Remove legacy i2s/spdif driver
Laxman Dewangan [Thu, 22 Mar 2012 10:17:28 +0000]
ARM: tegra: Remove legacy i2s/spdif driver

Removing legacy i2s/spdif driver from tree.

These files are added to support customer projects prior
to moving over to alsa driver for audio.
There is no intention of using them and hence removing it.

Change-Id: I864dbc50e2e76ac16f40542460f63c8c8a0eff71
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/91758
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoasoc: tegra: max98088 machine: use common platform data
Nikesh Oswal [Thu, 22 Mar 2012 06:26:15 +0000]
asoc: tegra: max98088 machine: use common platform data

use common platform data instead of using codec specific platform
data for different codecs

Change-Id: I88ecb08f3945e0d9c5162ec2b2d3279a4da50099
Signed-off-by: Nikesh Oswal <noswal@nvidia.com>
Reviewed-on: http://git-master/r/91686
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoarm: tegra: Specify correct dev name for audio regulators
Preetham Chandru [Wed, 21 Mar 2012 14:43:07 +0000]
arm: tegra: Specify correct dev name for audio regulators

Specify correct device names for ventana and cardhu speaker
and digital mic regulators.

Bug 956562
Signed-off-by: Preetham Chandru <pchandru@nvidia.com>
Change-Id: Iaa357b3da52dc9f593558b7f7e0ffda10ce8d938
Reviewed-on: http://git-master/r/91531
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Kiran Adduri <kadduri@nvidia.com>
Reviewed-by: Sumit Bhattacharya <sumitb@nvidia.com>
Reviewed-by: Allen Martin <amartin@nvidia.com>

7 years agoARM: tegra2: clock: Dynamic rate configuration
Shashank Sharma [Thu, 15 Mar 2012 15:31:02 +0000]
ARM: tegra2: clock: Dynamic rate configuration

support dynamic clock rate configuration for pll_d. Till now tegra2
used to look into a pll_d frequency table to match input and output
frequencies, resulting fixed pll_d output frequencies. Whereas
tegra3 had code to configure pll_d for any desired rate using
dynamically generated m,n,p values.

Bug: 931908

Change-Id: I15322e2e4ac0aba58502575cdc83ca4a4542d1e4
Signed-off-by: Shashank Sharma <shashanks@nvidia.com>
Reviewed-on: http://git-master/r/90361
Reviewed-by: Kiran Adduri <kadduri@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

7 years agoasoc: tegra: aic326x machine: add voice call functionalities for ap30
Nikesh Oswal [Wed, 14 Mar 2012 16:19:03 +0000]
asoc: tegra: aic326x machine: add voice call functionalities for ap30

add voice call, bt voice call, voice call with system sound mix,
bt voice call with system sound mix, voice call recording,
bt voice call recording  functionalities for ti aic326x on ap30

Change-Id: Ia94c1586c30d0636d8de738ff6cbb716f4f79d16
Signed-off-by: Nikesh Oswal <noswal@nvidia.com>
Reviewed-on: http://git-master/r/90123
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Scott Peterson <speterson@nvidia.com>

7 years agoARM: tegra: enterprise: add port id's for HIFI, BT and Baseband
Nikesh Oswal [Wed, 14 Mar 2012 16:17:37 +0000]
ARM: tegra: enterprise: add port id's for HIFI, BT and Baseband

Change-Id: I7dd486fd2b2bad27eecd61dddcca10fca710a7d6
Signed-off-by: Nikesh Oswal <noswal@nvidia.com>
Reviewed-on: http://git-master/r/90122
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Scott Peterson <speterson@nvidia.com>

7 years agoARM: tegra: cardhu: add port id's for BT and HIFI
Nikesh Oswal [Wed, 14 Mar 2012 16:16:03 +0000]
ARM: tegra: cardhu: add port id's for BT and HIFI

add port id's for BT and HIFI and also disable(-1) the port id
for Baseband as Cardhu does not have a Baseband

Change-Id: I16914ce95c2153cd36691b1ef462d387e39d3fa5
Signed-off-by: Nikesh Oswal <noswal@nvidia.com>
Reviewed-on: http://git-master/r/90121
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Scott Peterson <speterson@nvidia.com>

7 years agoasoc: codecs: max98088: check for revision id
Nikesh Oswal [Wed, 14 Mar 2012 12:18:09 +0000]
asoc: codecs: max98088: check for revision id

check for revision id, it must be 0x40 as per the datasheet,
if its not 0x40 then dont allow the card to register by failing
in the codec probe. This functionality will be required when the
same board support multiple codecs. Also register the irq only
after validating the codec.

Change-Id: I8553b85d534428c7137ec2d03e2f814b898609a6
Signed-off-by: Nikesh Oswal <noswal@nvidia.com>
Reviewed-on: http://git-master/r/90061
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Scott Peterson <speterson@nvidia.com>

7 years agoasoc: tegra: max98088 machine: check for card instantiation
Nikesh Oswal [Wed, 14 Mar 2012 12:16:24 +0000]
asoc: tegra: max98088 machine: check for card instantiation

If card fails to instantiate then unregister the card

Change-Id: Ibcc0d505a8df48c1f924a3d8688dc23e362d5e8d
Signed-off-by: Nikesh Oswal <noswal@nvidia.com>
Reviewed-on: http://git-master/r/90060
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoARM: tegra: enterprise: add support for aic326x codec
Nikesh Oswal [Wed, 14 Mar 2012 12:14:47 +0000]
ARM: tegra: enterprise: add support for aic326x codec

Change-Id: Ibb28e461cf21a2b44ae819888d943ba1a5dc976c
Signed-off-by: Nikesh Oswal <noswal@nvidia.com>
Reviewed-on: http://git-master/r/90059
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Scott Peterson <speterson@nvidia.com>

7 years agoasoc: aic326x machine: handle switch unregistration
Nikesh Oswal [Wed, 14 Mar 2012 12:12:56 +0000]
asoc: aic326x machine: handle switch unregistration

If switch registration is success and later card registration
fails then we must unregister the switch

Change-Id: I140b3fb0890f41fea653100bcff450f10294cd9d
Signed-off-by: Nikesh Oswal <noswal@nvidia.com>
Reviewed-on: http://git-master/r/90058
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Scott Peterson <speterson@nvidia.com>

7 years agoasoc: aic326x machine: add aic326x for enterprise
Nikesh Oswal [Wed, 14 Mar 2012 10:14:02 +0000]
asoc: aic326x machine: add aic326x for enterprise

Change-Id: I1b41c408b65b79f12b20a5efb7c0d2e3245bad6a
Signed-off-by: Nikesh Oswal <noswal@nvidia.com>
Reviewed-on: http://git-master/r/90057
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Scott Peterson <speterson@nvidia.com>

7 years agoARM: tegra: enterprise: enable TI AIC326x codec
Nikesh Oswal [Wed, 14 Mar 2012 10:10:24 +0000]
ARM: tegra: enterprise: enable TI AIC326x codec

Change-Id: I941e1140b139240d04906759098249508dbd9535
Signed-off-by: Nikesh Oswal <noswal@nvidia.com>
Reviewed-on: http://git-master/r/90056
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Scott Peterson <speterson@nvidia.com>

7 years agonet: usb: raw-ip: rx / tx statistics
Shawn Joo(Seongho) [Sat, 10 Mar 2012 07:57:37 +0000]
net: usb: raw-ip: rx / tx statistics

Add rx, tx, error statistics feature

Bug 932703

Change-Id: Ic7a6232dd3b48feff2b064fcff8f0d146b1e9902
Signed-off-by: Shawn Joo <sjoo@nvidia.com>
Reviewed-on: http://git-master/r/89305
Tested-by: Gerrit_Virtual_Submit
Reviewed-by: Steve Lin <stlin@nvidia.com>

7 years agovideo: tegra3: dc: remove hard coded HDMI rates
Shashank Sharma [Mon, 27 Feb 2012 09:36:54 +0000]
video: tegra3: dc: remove hard coded HDMI rates

Set dc clock rate dynamically to requested pixel rate.
Using modes specified in monitor's EDID data.
Return mode set errors on unsupported clock tolerances.

Bug 931908

Change-Id: I60990ecbc2fbeab542987036b8ccc30b8dababe8
Signed-off-by: Shashank Sharma <shashanks@nvidia.com>
Reviewed-on: http://git-master/r/86073
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agovideo: tegra: nvavp: Fix for high SMMU aparture
Kaz Fukuoka [Tue, 20 Mar 2012 20:59:07 +0000]
video: tegra: nvavp: Fix for high SMMU aparture

- With this fix NVAVP works with CONFIG_TEGRA_SMMU_BASE_AT_E0000000.

Change-Id: I9c267bc9b008a57f6f0cc4e9b27dbee0501e6a77
Signed-off-by: Kaz Fukuoka <kfukuoka@nvidia.com>
Reviewed-on: http://git-master/r/91316
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoARM: tegra3: p1852: clock: changed p1852 clocks
Mohit Kataria [Wed, 11 Jan 2012 05:08:38 +0000]
ARM: tegra3: p1852: clock: changed p1852 clocks

Changed clock frequencies for vi, host1x etc. as per POR
Bug 882186

Signed-off-by: Mohit Kataria <mkataria@nvidia.com>
Reviewed-on: http://git-master/r/74289
(cherry picked from commit 915b9924388f432fbc68be611f84047d09fc0d33)

Change-Id: I19c3aa845c75f0b8d07bd2dd109055696098e12a
Reviewed-on: http://git-master/r/90494
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Mohit Kataria <mkataria@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>

7 years agoarm: tegra: baseband: Add wakelock after modem re-enumeration.
Steve Lin [Mon, 19 Mar 2012 22:12:42 +0000]
arm: tegra: baseband: Add wakelock after modem re-enumeration.

Holding wakelock after modem re-enumeration to ensure ril has enough
time to restart.

Bug 948610

Reviewed-on: http://git-master/r/91072
(cherry picked from commit 572bd2f735c4667ce326a1acb6e7d0884847d794)

Change-Id: Iee4f5243746ca218623c1ac2cd173482badba358
Signed-off-by: Steve Lin <stlin@nvidia.com>
Reviewed-on: http://git-master/r/91361
Reviewed-by: Automatic_Commit_Validation_User

7 years agovideo: tegra: dc: VGA modes in supported mode list
Shashank Sharma [Wed, 21 Mar 2012 09:27:45 +0000]
video: tegra: dc: VGA modes in supported mode list

Add following VGA video modes in tegra_dc_hdmi_supported_modes list:

Resolution   Refresh rate(Hz)
-----------  ----------------
 640x480  75
 720x400  59
 800x600  60
 800x600  75
1024x768  75
1024x768  60
1152x864  75
1280x800  60
1280x960  60
1280x1024  60
1368x768  60
1440x900  60
1600x1200  75
1680x1050  60

Add CVT representation of all above modes to make sure they pass all the
HDMI constraints.
Add a new function tegra_dc_reload_mode to pick up CVT representation of
matching mode.

Bug 883911
Signed-off-by: Shashank Sharma <shashanks@nvidia.com>
Change-Id: I5227644207d38ca83a0452d3c078ef202e40a508
Reviewed-on: http://git-master/r/89126
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Kiran Adduri <kadduri@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

7 years agoASoC: Tegra WM8903 machine: Fix to control name conflict
Ramalingam C [Wed, 21 Mar 2012 13:04:38 +0000]
ASoC: Tegra WM8903 machine: Fix to control name conflict

This change resolves the control name (Line Out Switch) conflict between
wm8903 codec driver and tegra machine driver.

Bug 956506

Change-Id: Iab049c7fb2fdde0d481d07d8e1bbdbeea1a831d9
Signed-off-by: Ramalingam C <ramalingamc@nvidia.com>
Reviewed-on: http://git-master/r/91510
Reviewed-by: Sumit Bhattacharya <sumitb@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User

7 years agomedia: common camera headers
Erik Lilliebjerg [Tue, 20 Mar 2012 10:56:00 +0000]
media: common camera headers

- Add support for ISP focus

Bug 852480

Change-Id: Ibd4c983d80a5021a88b46033c51c26d1b8120e62
Signed-off-by: Erik Lilliebjerg <elilliebjerg@nvidia.com>
Reviewed-on: http://git-master/r/91203
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

7 years agotegra:pcie: Correct pcie check link sequence
Jay Agarwal [Fri, 9 Mar 2012 12:21:02 +0000]
tegra:pcie: Correct pcie check link sequence

1. Removed mdelay in reset code since pci devices
   are not detected with this.
2. Moved the reset logic down in retry label.

Bug 637871

Change-Id: Idd6344860e513407d5f8c8ba05e1beef0f39bf57
Signed-off-by: Jay Agarwal <jagarwal@nvidia.com>
Reviewed-on: http://git-master/r/89128
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Allen Martin <amartin@nvidia.com>
Reviewed-by: Winnie Hsu <whsu@nvidia.com>

7 years agoarm: tegra: kai: Correcting fuse supply name
Venu Byravarasu [Wed, 21 Mar 2012 10:18:11 +0000]
arm: tegra: kai: Correcting fuse supply name

As fuse driver expects regulator name as Vdd_fuse
instead of Vpp_fuse, fixing it.

bug 956535

Change-Id: I4ecf38acd2ae8c2191f4dbbd018904a33b87043c
Signed-off-by: Venu Byravarasu <vbyravarasu@nvidia.com>
Reviewed-on: http://git-master/r/91472
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User

7 years agoarm: tegra: enterprise: enable out of band interrupt
Nitin Bindal [Tue, 20 Mar 2012 09:16:06 +0000]
arm: tegra: enterprise: enable out of band interrupt

configuring wf_wakeup gpio

Change-Id: I05e907c36847da07990d440357b9ef4ae3a857be
Signed-off-by: Nitin Bindal <nbindal@nvidia.com>
Reviewed-on: http://git-master/r/90994
Reviewed-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

7 years agovideo: tegra: dc: disable disp.emc clock when 0 new rate is requested
Nitin Kumbhar [Wed, 14 Mar 2012 14:10:38 +0000]
video: tegra: dc: disable disp.emc clock when 0 new rate is requested

Not disabling emc clock when it's being set to zero results in incorrect
reference count when a call is made to clear bandwidth. This happens when
two worker threads try to handle dc emc rate. A deep-sleep/wake-up cycle
easily shows this scenario.

With this fix, disp.emc's ref count is properly managed even after multiple
deep-sleep/wake-up cycles.

Bug 947228

Change-Id: I045fafbd483af1e3d492b8d0395275e45642d059
Signed-off-by: Nitin Kumbhar <nkumbhar@nvidia.com>
Reviewed-on: http://git-master/r/90100
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

7 years agovideo: tegra: host: Correct waitchk comparison logic
Terje Bergstrom [Tue, 13 Mar 2012 13:53:10 +0000]
video: tegra: host: Correct waitchk comparison logic

Change waitchk comparison logic to use the new
nvhost_syncpt_is_expired().

Bug 941327

Change-Id: Ib7de04ad7663990bb416e39f8d79a46a9f5955fa
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/89769
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

7 years agoarm: Tegra: Ventana: power gpio modification
Ramalingam C [Tue, 28 Feb 2012 14:02:10 +0000]
arm: Tegra: Ventana: power gpio modification

Correction on the power_gpio assignement for SD and eMMC platform data.

TEGRA_GPIO_PI6 is assigned to power_gpio of tegra_sdhci_platform_data2

Since no gpio control is there for eMMC power rails power_gpio of
tegra_sdhci_platform_data3 is initialized to -1.

Change-Id: I5b18f09c01668e304425dee92f024be69d3e0448
Signed-off-by: Ramalingam C <ramalingamc@nvidia.com>
Reviewed-on: http://git-master/r/86355
Reviewed-by: Kiran Adduri <kadduri@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com>

7 years agoBluetooth: remove DEBUG macro from btwilink driver
Nagarjuna Kristam [Mon, 12 Mar 2012 05:50:26 +0000]
Bluetooth: remove DEBUG macro from btwilink driver

Change-Id: I1721115a1d500f1101c856809ec3fd3ac4a3fe67
Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-on: http://git-master/r/89409
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

7 years agocpufreq: Typecast compared integers
Antti P Miettinen [Tue, 20 Mar 2012 11:50:50 +0000]
cpufreq: Typecast compared integers

The min/max frequencies in cpufreq_policy are unsigned integers
but pm_qos_request() returns a signed int. Compare as unsigned,
frequencies are never negative.

Bug 949219

Change-Id: Iba0de9ad6bf221f7a2e5560f597aa56cbeb7b6f6
Signed-off-by: Antti P Miettinen <amiettinen@nvidia.com>
Reviewed-on: http://git-master/r/91214
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

7 years agocpufreq: set go_maxspeed_load to 85%
Shridhar Rasal [Tue, 20 Mar 2012 06:45:52 +0000]
cpufreq: set go_maxspeed_load to 85%

To get better performance setting it to 85% from 95%

bug 941275

Change-Id: I08bc711ea159d070cf6b62ce25506c8a5bdd7ac4
Signed-off-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-on: http://git-master/r/91159
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

7 years agoRevert "ARM: tegra: dvfs: Set Tegra3 VDD_CORE min to 1.1V"
Alex Frid [Wed, 4 Jan 2012 01:39:16 +0000]
Revert "ARM: tegra: dvfs: Set Tegra3 VDD_CORE min to 1.1V"

This reverts commit db462754240e2ee6cf85e1253b1475a330ea0dfe -
temporary work-around for bug 870300 is no longer needed.

Change-Id: I3b76c01eef89cd80134210926e6623f0494626dd
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/89874
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

7 years agoARM: config: tegra: enable advanced routing and multiple routing table
stephane Dion [Mon, 12 Mar 2012 15:50:47 +0000]
ARM: config: tegra: enable advanced routing and multiple routing table

These options are needed for multiple PDP context support

bug 926236

Change-Id: I7a62db30403b1d610e0b801b2b0ef5ebee2f7f23
signed-off-by: Stephane Dion <sdion@nvidia.com>
Reviewed-on: http://git-master/r/89509
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User

7 years agovideo: tegra: host: refactor for upstreaming
Mayuresh Kulkarni [Mon, 13 Feb 2012 15:04:41 +0000]
video: tegra: host: refactor for upstreaming

- split the nvhost clients into their own directories
- each client is a nvhost_device and nvhost_driver
- all the code related to host1x control node is centralized
at single place in dev.c
- all the code related to host1x modules nodes is centralized
at single place in bus_client.c
- update the copyright notice & year for new files

Bug 871237

Change-Id: Ief85064699e35ad02b48a7e54496928d7f085af4
Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-on: http://git-master/r/83491
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

7 years agocpufreq: update target freq always
Shridhar Rasal [Mon, 19 Mar 2012 16:08:57 +0000]
cpufreq: update target freq always

set determined target freq always

bug 941275

Change-Id: If72936ed145867abd32b43c5c5100290df2fc187
Signed-off-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-on: http://git-master/r/91010
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Satya Popuri <spopuri@nvidia.com>
Reviewed-by: Peter Boonstoppel <pboonstoppel@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

7 years agoARM: tegra: cardhu: Enable Enter key if RCK mode
Ashwini Ghuge [Tue, 20 Mar 2012 05:46:52 +0000]
ARM: tegra: cardhu: Enable Enter key if RCK mode

Added support to change Power key to
Enter key in RCK mode

Bug 948270

Change-Id: I054aa98972494476ea26b5fd815032453a4231b0
Signed-off-by: Ashwini Ghuge <aghuge@nvidia.com>
Reviewed-on: http://git-master/r/90917
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User

7 years agoARM: tegra: Add support to identify if image RCK
Ashwini Ghuge [Mon, 19 Mar 2012 11:51:38 +0000]
ARM: tegra: Add support to identify if image RCK

With this change, we can identify if system
enters RCK mode in kernel.

Bug 948270

Change-Id: I4240fd4171b6b71fbc5f1271f21a588d62db88b1
Signed-off-by: Ashwini Ghuge <aghuge@nvidia.com>
Reviewed-on: http://git-master/r/90914
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoARM: tegra: clock: Update parameterized cluster switch
Alex Frid [Sun, 26 Feb 2012 08:23:37 +0000]
ARM: tegra: clock: Update parameterized cluster switch

Adjusted CPU rate during parametrized (enforced from sysfs) cluster
switch, so that target rate meets min/max constraints on both sides
of the switch. Updated local timer rate accordingly.

Bug 945975

Signed-off-by: Alex Frid <afrid@nvidia.com>
(cherry picked from commit c27f5a2e7380cb667f1f6a4ba61daf67c63ef2d4)

Change-Id: I130ec1a32ecaf8adfd7eff1ec2042f569b54ac54
Reviewed-on: http://git-master/r/90805
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agovideo: tegra: dsi: Clear host trigger bit explicitly on fifo empty
Animesh Kishore [Wed, 14 Mar 2012 11:25:12 +0000]
video: tegra: dsi: Clear host trigger bit explicitly on fifo empty

dsi HW does not clear host trigger bit automatically
on dsi interface disable if host fifo is empty.
This leads to hang. Clearing the bit explicitly.

Bug 930453

Change-Id: Id24359dc274f187f8ac634ad838ef4a6a29a6a5e
Signed-off-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-on: http://git-master/r/90043
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User

7 years agoARM: tegra: Add AHB EMEM to MC Flush Register IO
Rakesh Bodla [Mon, 6 Feb 2012 10:51:03 +0000]
ARM: tegra: Add AHB EMEM to MC Flush Register IO

Add the AHB EMEM to MC Flush Register
area to the statically mapped io regions

Bug 729267

Change-Id: I86542cd3ffec587e7213cbc34129e8b5124aab9c
Signed-off-by: Rakesh Bodla <rbodla@nvidia.com>
Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
Reviewed-on: http://git-master/r/88283
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

7 years agoARM: tegra: clock: Fix activity monitor resume
Alex Frid [Mon, 12 Mar 2012 19:01:17 +0000]
ARM: tegra: clock: Fix activity monitor resume

Properly restore Tegra3 actmon sampling period after suspend.

Bug 952739

Signed-off-by: Alex Frid <afrid@nvidia.com>
(cherry picked from commit eb6e96a39dbc5d310e8e59046d6e1b787b780e60)

Change-Id: I6a61c2aa1d384a8d17d7ef579000cf59ac218435
Reviewed-on: http://git-master/r/90804
Tested-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

7 years agoarm: tegra: fuse: let ODM production mode be world readable
Chris Johnson [Sat, 10 Mar 2012 01:52:50 +0000]
arm: tegra: fuse: let ODM production mode be world readable

Also, fixup some of the bit offsets that were leading to incorrect
values being returned from get_fuse() on T20/T30.

Bug 912862

Signed-off-by: Chris Johnson <cwj@nvidia.com>
Reviewed-on: http://git-master/r/89283
(cherry picked from commit f6323c7f32017b51202d478671cbf366beb0b0f5)

Change-Id: Ieb9f92e36760cbc470d63257d26c09388cec7e1e
Reviewed-on: http://git-master/r/90762
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Chris Johnson <cwj@nvidia.com>
Tested-by: Chris Johnson <cwj@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

7 years agoarm: tegra: nvmap: Update nvmap_alloc api.
Krishna Reddy [Fri, 16 Mar 2012 02:14:53 +0000]
arm: tegra: nvmap: Update nvmap_alloc api.

Update nvmap_alloc api to take heap_mask as arg.
This is to let clients specify the specific heap needed.

Change-Id: I9950b3e60e6dac0301b6dc66be3e9d0bab8e0fee
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/90471
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User

7 years agovideo: tegra: host: Fix sync point comparison
Terje Bergstrom [Mon, 20 Feb 2012 12:50:26 +0000]
video: tegra: host: Fix sync point comparison

Fix sync point comparison to take into account old expired values, and
do proper comparison taking into account wrapping.

Bug 941327

Change-Id: I70724637ba870b2e29bac695abc0ea2b968394d7
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/84808
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Ilan Aelion <iaelion@nvidia.com>
Reviewed-by: Acorn Pooley <apooley@nvidia.com>

7 years agoarm: tegra: enable pll_p clocks by default
Peter Zu [Mon, 6 Feb 2012 06:10:42 +0000]
arm: tegra: enable pll_p clocks by default

Setting pll_p init state to false may cause lp0 resume issue when
cpu_restore_complex tries to restore pll_p state on CPU cluster
switching.

Bug 932820

Signed-off-by: Peter Zu <pzu@nvidia.com>
Reviewed-on: http://git-master/r/86904
(cherry picked from commit 939e6c177927a4731b043ac77543f075ac17fca2)

Change-Id: I4513470515a20edcf54a9aa11a54e65838012fe5
Reviewed-on: http://git-master/r/90568
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

7 years agovideo: tegra: nvmap: Optimze nvmap page pool shrink time
Krishna Reddy [Fri, 9 Mar 2012 07:51:51 +0000]
video: tegra: nvmap: Optimze nvmap page pool shrink time

Bug 925987

Change-Id: Ifab4e515c7dd06b92d798e7eb93094c35e02b878
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/89414
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoDrivers: MTD: NAND: restore to the NAND controller
Ramalingam C [Mon, 19 Mar 2012 06:18:27 +0000]
Drivers: MTD: NAND: restore to the NAND controller

On entering the power saving mode NAND controller registers are getting reset.
With this change resume will restore the controller registers' values.

Bug 933291

Change-Id: Ia1a43827b4b4a91ab1383bf07c3c0fe3068b666b
Signed-off-by: Ramalingam C <ramalingamc@nvidia.com>
Reviewed-on: http://git-master/r/90883
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>
Reviewed-by: Preetham Chandru <pchandru@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

7 years agoARM: tegra3: dvfs: Changed max values of clocks
Mohit Kataria [Tue, 10 Jan 2012 12:05:24 +0000]
ARM: tegra3: dvfs: Changed max values of clocks

Changed clock frequency of some clocks as per
Automotive POR.

Bug 882186

Signed-off-by: Mohit Kataria <mkataria@nvidia.com>
Reviewed-on: http://git-master/r/75210
(cherry picked from commit 9cc17e9cddfedc6fe977f103c5e21ae3f82c3496)

Change-Id: Ibb0e79e75c2fca7d9f09d373c163ef08cc636819
Reviewed-on: http://git-master/r/90490
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Tested-by: Mohit Kataria <mkataria@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>

7 years agovideo: tegra: clean-up warnings and code style
Jon Mayo [Tue, 13 Mar 2012 01:42:28 +0000]
video: tegra: clean-up warnings and code style

fix some build warnings and bad code style.

Change-Id: I907296ce0e5437dfd6acd0b2b3c119b6dbde7b1c
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/89634
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

7 years agoARM: tegra: disable proximity sensor in defconfig
Winnie Hsu [Tue, 6 Mar 2012 01:19:02 +0000]
ARM: tegra: disable proximity sensor in defconfig

Disable isl29028 proximity sensor.

bug 946330

Change-Id: I7a5d9f1defbb1de5f02fe851f7a24cd70d49d47b
Signed-off-by: Winnie Hsu <whsu@nvidia.com>
Reviewed-on: http://git-master/r/87897
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

7 years agoregulator: tps65910: Provide settling time for DCDC voltage change
Laxman Dewangan [Wed, 14 Mar 2012 07:30:58 +0000]
regulator: tps65910: Provide settling time for DCDC voltage change

Settling time is require when there is dcdc rail's voltage change.
Returning proper delay time for dcdc voltage change to settle down
the output voltage to new value.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit 18039e0f16d50c8243fe0388a587c25a3b155ece)

Change-Id: Ibd67d2661dd1d5b014754c221d44963baeb13726
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/90518
Reviewed-by: Automatic_Commit_Validation_User

7 years agoregulator: tps65910: Provide settling time for enabling rails
Laxman Dewangan [Tue, 13 Mar 2012 06:05:20 +0000]
regulator: tps65910: Provide settling time for enabling rails

There is settling time for each rails when it is switched to
ON. Implementing enable time for returning proper settling time
of regulator rails when it is enabled.
Filling the on-time for each rail as per tps65910/tps65911
datasheets.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit 0651eed5e094a079a0a9fccd80a41cb3e7f2aa99)

Change-Id: Ibdb05171cfb4c4e7a064c8f65193647997e8e9a8
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/90517
Reviewed-by: Automatic_Commit_Validation_User

7 years agoregulator: Fix the logic of tps65910_get_mode
Axel Lin [Mon, 12 Mar 2012 23:15:27 +0000]
regulator: Fix the logic of tps65910_get_mode

We actually clear LDO_ST_ON_BIT for standby mode in tps65910_set_mode.
Fix the logic in tps65910_get_mode.

Supply state (EEPROM bits):
ST[1:0] = 00 : Off
ST[1:0] = 01 : On high power (ACTIVE)
ST[1:0] = 10 : Off
ST[1:0] = 11 : On low power (SLEEP)

Signed-off-by: Axel Lin <axel.lin@gmail.com>
Acked-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit 585993932ccc44ab6a8c6dc590a2f3d6b2facb41)

Change-Id: I1cb46d05396a286ba34c84b1836b9070f0f78003
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/90516
Reviewed-by: Automatic_Commit_Validation_User

7 years agoregulator: Rename set_voltage_sel callback function name to *_sel
Axel Lin [Fri, 9 Mar 2012 02:22:20 +0000]
regulator: Rename set_voltage_sel callback function name to *_sel

This change improves readability.

Signed-off-by: Axel Lin <axel.lin@gmail.com>
Acked-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>

Cherry-picked from mainline
94732b97c39859427cf99c34fc9de9750be7e5a5

Change-Id: Ie3eb5462a99cceab40ba0e26e4e3cdb93c5f3f0f
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/90515
Reviewed-by: Automatic_Commit_Validation_User

7 years agoarm: tegra: p1852: Add proc interface for board specific info
Bob Johnston [Thu, 15 Mar 2012 17:45:52 +0000]
arm: tegra: p1852: Add proc interface for board specific info

1) /proc/board_serial will have the board serial number.
2) /proc/skuinfo will have 18 character sku information.
3) /proc/skuver will have 2 character sku version number.
4) /proc/prodinfo will have product information
5) /proc/prodver will have product version number.

bug 931053

Change-Id: I7daccf932d3ee55b13c89eb4aaa519f51d8dba3e
Signed-off-by: Bob Johnston <bjohnston@nvidia.com>
Reviewed-on: http://git-master/r/90378
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoarm: tegra: p1852: instantiated audio drivers
Nitin Pai [Thu, 15 Mar 2012 05:27:11 +0000]
arm: tegra: p1852: instantiated audio drivers

Instantiated audio drivers for I2S and AHUB.
Instantiated the machine driver for P1852 boards.
Added clocks that were not initialized by QB which are needed to be on.

Bug 948478

Change-Id: I6e696f97ed114ae684a74d9b9869066606dfaa22
Signed-off-by: Nitin Pai <npai@nvidia.com>
Reviewed-on: http://git-master/r/90252
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Manoj Chourasia <mchourasia@nvidia.com>
Reviewed-by: Bob Johnston <bjohnston@nvidia.com>
Tested-by: Bob Johnston <bjohnston@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>

7 years agoiommu: tegra/gart: use correct gart_device
Vandana Salve [Wed, 14 Mar 2012 12:47:53 +0000]
iommu: tegra/gart: use correct gart_device

Pass the correct gart device pointer.

Change-Id: Ia54c3df7ce013855bf8843161f5ee0816482bda6
Reviewed-on: http://git-master/r/90064
Reviewed-by: Vandana Salve <vsalve@nvidia.com>
Tested-by: Vandana Salve <vsalve@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

7 years agoARM: tegra3: cardhu: Enable TPS65910 configs
Laxman Dewangan [Wed, 14 Mar 2012 11:35:15 +0000]
ARM: tegra3: cardhu: Enable TPS65910 configs

In order to use the mainline tps65910 driver for PMIC and
getting rid of NV's tps6591x driver, enabling config
variable for TPS65910 mfd and regulator driver.

bug 927501

Change-Id: I0dc30b248f648d554024adfdf7beb2dc3db7e844
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/90049
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoarm: tegra: configs: Enable LTR558 ALS
Sachin Nikam [Wed, 14 Mar 2012 08:16:57 +0000]
arm: tegra: configs: Enable LTR558 ALS

Enable CONFIG_SENSORS_LTR558 for Ambient Light and Proximity Sensor.

Bug 901133

Change-Id: I66245046add9ada58064490fa154c9b2190e15b9
Signed-off-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-on: http://git-master/r/89994
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agovideo: tegra: host: disable 3d powergating
Donghan Ryu [Tue, 6 Mar 2012 05:33:40 +0000]
video: tegra: host: disable 3d powergating

this is a workaround for the SLI scissor bug which can happen
intermittently.

Bug 914785

Change-Id: I5b7071df5bbfdd03bfe8b6f6b12ac7279221bd4e
Signed-off-by: Donghan Ryu <dryu@nvidia.com>
Reviewed-on: http://git-master/r/87968
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User

7 years agoARM: tegra: fuse: Implement caching of fuse sku_id
Laxman Dewangan [Tue, 13 Mar 2012 03:19:12 +0000]
ARM: tegra: fuse: Implement caching of fuse sku_id

In place of reading the sku id from the fuse every time,
read once and stored it for future use.

Based on orginal change from Simon Je's
http://git-master/r/#change,51502

bug 950922
bug 949620

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/89647
(cherry picked from commit 8eda0d2b574f7dda5975115ba6990790a2d4e1cc)

Change-Id: I4aed1a7c34008b4b3f4df17f7a41e3446ad8fe4f
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/90305
Reviewed-by: Automatic_Commit_Validation_User

7 years agospi: tegra: Make sure SCLK frequency to be in minimum require value.
Laxman Dewangan [Thu, 15 Mar 2012 09:42:38 +0000]
spi: tegra: Make sure SCLK frequency to be in minimum require value.

Making sure that SCLK frequency should be maintain on minimum
require value during spi transfer. This is require to proper
functioning of spi controller.

bug 949393

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/89526

Cherry-picked from commit
7d83f658b39b2ab1a5105eec7649246fddea7325

Change-Id: I60fa0fef98e5f2882c646c29e1773194deddd6da
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/90296
Reviewed-by: Automatic_Commit_Validation_User

7 years agoARM: tegra: common: Set SCLK to 40MHz for spi
Laxman Dewangan [Mon, 12 Mar 2012 17:33:55 +0000]
ARM: tegra: common: Set SCLK to 40MHz for spi

Setting sclk frequency for spi to 40MHz.

bug 949393

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/89525
cherry-picked from
171f5693e4137e9fe5a8b4e496c0c5db3b7838f1

Change-Id: I34808a64b834111dfff1592dd9244a45e9d3312c
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/90295
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agovideo: tegra: dsi: Add checks to dsi for HOST1X power
Terje Bergstrom [Tue, 28 Feb 2012 15:25:07 +0000]
video: tegra: dsi: Add checks to dsi for HOST1X power

Add checks to ensure host1x is powered when DSI is used.

Change-Id: I2e61abdd5c0741571fb18262fd2efa16ffee71d9
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/86361
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoARM: tegra: clock: Entry for spi-sclk clock control
Laxman Dewangan [Mon, 12 Mar 2012 17:32:59 +0000]
ARM: tegra: clock: Entry for spi-sclk clock control

Tegra's spi requires some minimum sclk clock frequency for
proper functioning.
Making entry for spi-sclk clock so that spi driver can get the
proper clock for controlling the minimum rate of sclk.

bug 949393

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/89524
(cherry picked from commit 542cbe457b1b19b8fdf8cbf193e38a00027060c2)

Change-Id: I3f829b36b1b42bb8b1c6e4e21745855e113c17c1
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/90294
Reviewed-by: Automatic_Commit_Validation_User

7 years agoRevert "crypto: testmgr: add support for aes ofb mode"
Mallikarjun Kasoju [Wed, 14 Mar 2012 13:49:25 +0000]
Revert "crypto: testmgr: add support for aes ofb mode"

This reverts commit 2afef0391f30a2831f8beed6a89351682c8a81f6.

Change-Id: Ieef8fd28ba78334a4a0a1b7c64ba6fd4d0f4cb05
Reviewed-on: http://git-master/r/90082
Reviewed-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Tested-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

7 years agovideo: tegra: host: Refactor context handling logic
Terje Bergstrom [Tue, 21 Feb 2012 08:21:18 +0000]
video: tegra: host: Refactor context handling logic

Currently nvhost hard codes usage of context handler and sync point
id. Split the context handler and context structures into generic and
host1x specific parts, and move the allocation to happen via a
function pointer in nvhost_device.

Also updates gr3d and mpe to use sync point id and waitbase from
nvhost_device.

Bug 926690

Change-Id: I7f00b450cac99f3816baa27b37ee4e4cf68cfe24
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/84901
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoarm: config: tegra3: enable wl12xx gps char driver
Rakesh Goyal [Wed, 14 Mar 2012 16:08:19 +0000]
arm: config: tegra3: enable wl12xx gps char driver

Bug 933797

Change-Id: I13c066f9902af43e1958a445dcb2b8e710b6e644
Signed-off-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-on: http://git-master/r/90117
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agovideo: tegra: nvmap: Fix issue in handle_page_alloc
Krishna Reddy [Tue, 13 Mar 2012 00:02:44 +0000]
video: tegra: nvmap: Fix issue in handle_page_alloc

Fix race condition in handle_page_alloc. Page allocations
should not try allocate from pool, once it fails for a
request. If it tries and allocation passes during subsequent
attempts, the page_index is not valid for CPA and cache won't be
flushed for all the necessary pages.

Change-Id: I5548e11b713f271cc8473a3f2ae193a69e832f99
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/89611
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>