7 years agoasoc: codecs: Add Headset detect support for ALC5639/40
Manoj Gangwal [Tue, 28 Feb 2012 13:21:55 +0000]
asoc: codecs: Add Headset detect support for ALC5639/40

Add support for headset detection for ALC5639/40
codec for kai board.

Bug 937914

Change-Id: I0bb9e913601c37a1cc8f7094fbdd3885aeec92b3
Signed-off-by: Manoj Gangwal <mgangwal@nvidia.com>
Reviewed-on: http://git-master/r/86348
Reviewed-by: Chandler Zhang <chazhang@nvidia.com>
Tested-by: Chandler Zhang <chazhang@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Sumit Bhattacharya <sumitb@nvidia.com>

7 years agoarm: tegra: kai: avoid export of wifi board specific functions
Om Prakash Singh [Fri, 2 Mar 2012 11:59:50 +0000]
arm: tegra: kai: avoid export of wifi board specific functions

Bug 931928

Change-Id: Id7f65295dd0f67cae1aca8ccb2c8471382ecb6bd
Signed-off-by: Om Prakash Singh <omp@nvidia.com>
Reviewed-on: http://git-master/r/84818
Reviewed-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

7 years agopower: smb349: Addition of interrupt support
Syed Rafiuddin [Thu, 1 Mar 2012 15:40:44 +0000]
power: smb349: Addition of interrupt support

-Addition of interrupt support to update charger
properties to fuel-gauge driver.

Change-Id: If6384921247b6534f2d8142ad5fd079c5f6e0890
Signed-off-by: Syed Rafiuddin <srafiuddin@nvidia.com>
Reviewed-on: http://git-master/r/83507
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

7 years agopower: max17048: Add battery custom model data
Syed Rafiuddin [Tue, 28 Feb 2012 17:33:09 +0000]
power: max17048: Add battery custom model data

- Addition of battery custom data to max17048 driver
- Update battery properties like online and charging/discharging
status instantaneously based on the interrupt.

Change-Id: I84f4833caf4c25fb4d73c74c9e986084bb33a94a
Signed-off-by: Syed Rafiuddin <srafiuddin@nvidia.com>
Reviewed-on: http://git-master/r/83505
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoALSA: HDA: Prevent delay in opening hdmi pcm
Sumit Bhattacharya [Wed, 8 Feb 2012 12:45:50 +0000]
ALSA: HDA: Prevent delay in opening hdmi pcm

When monitor is plugged in instead of reading the complete ELD buffer
only read the relavant bytes required to update pcm info. Go through
the complete ELD buffer once LPCM sad ELD information is updated in
ELD structure. This is required to reduce the delay in getting a valid
PCM information which in turn delays opening of HDMI PCM stream.

Also if a valid LPCM SAD ELD information is not available when
hdmi_pcm_open is called then instead of looping inside hdmi_pcm_open
return error to unblock other operations. User space should retry to
open HDA PCM device after some time.

Bug 931930
Bug 913739
Bug 906076

Change-Id: Iaaef3f0e361ae406c92605b056bd4dff9c2b7856
Signed-off-by: Sumit Bhattacharya <sumitb@nvidia.com>
Reviewed-on: http://git-master/r/83143
Reviewed-by: Scott Peterson <speterson@nvidia.com>

7 years agovideo: tegra: add ioctl to query DC capabilities
Adam Cheney [Fri, 2 Mar 2012 00:44:43 +0000]
video: tegra: add ioctl to query DC capabilities

Defines a new ioctl for querying a bitfield of DC capabilities.
The first defined caps bit is for "cursor mode" flipping support.

bug 942631

Change-Id: Iea8a0dfe4e400e0dad4bb9f23509c3ac0ca532ba
Reviewed-on: http://git-master/r/87066
Reviewed-by: Robert Morell <rmorell@nvidia.com>
Tested-by: Adam Cheney <acheney@nvidia.com>

7 years agoarm: tegra: p1852: Add nvavp driver
Gajanan Bhat [Thu, 9 Feb 2012 23:11:40 +0000]
arm: tegra: p1852: Add nvavp driver

Change-Id: Ibbddfeb25bbbb5610c1cd18fb20029fd0c4a009e
Signed-off-by: Bob Johnston <bjohnston@nvidia.com>
Reviewed-on: http://git-master/r/86250
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agospi: tegra: Fix CS status properly in spi setup
Laxman Dewangan [Thu, 1 Mar 2012 10:50:44 +0000]
spi: tegra: Fix CS status properly in spi setup

Fixing the logic to clear/set spi cs level on default command
register.

Change-Id: I55e130ecb02dae6e11ad7048730ed11df9848e94
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/86888
Reviewed-by: Rakesh Goyal <rgoyal@nvidia.com>

7 years agoarm: tegra: kai: Turn off status LED during LP0
Johnny Qiu [Thu, 1 Mar 2012 10:01:34 +0000]
arm: tegra: kai: Turn off status LED during LP0

Use leds-gpio to control status LED during LP0.

Bug 920845
Bug 931371

Change-Id: I22f11629bcefe7ecb47181ad5c461f505654dde1
Signed-off-by: Johnny Qiu <joqiu@nvidia.com>
Reviewed-on: http://git-master/r/86879
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoarm: tegra3: Enable leds-gpio
Johnny Qiu [Thu, 1 Mar 2012 10:05:03 +0000]
arm: tegra3: Enable leds-gpio

Change-Id: I4c1e264df22e01a50ea6df7abeb2afbd5e28206e
Signed-off-by: Johnny Qiu <joqiu@nvidia.com>
Reviewed-on: http://git-master/r/86878
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoARM: tegra: dma: define global dma address only once
Laxman Dewangan [Thu, 1 Mar 2012 08:25:40 +0000]
ARM: tegra: dma: define global dma address only once

Define the global address as static global in file and
uses this in different functions. This way, it will avoid
the same definition at multiple functions.

Change-Id: I71d7ec075c70356c52ae9ce36339b4b9cc082f70
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/86872
Reviewed-by: Stephen Warren <swarren@nvidia.com>

7 years agoRevert "mfd: max77663: add support for status LED control through PMU GPIO"
Johnny Qiu [Thu, 1 Mar 2012 08:12:56 +0000]
Revert "mfd: max77663: add support for status LED control through PMU GPIO"

This reverts commit 11c94f0d529a089f8cc37311258fd518be576383.

Stat LED control through PMU GPIO should be implemented in another
way. No need to touch PMU driver.

Change-Id: Iecde818425640616df0a92339e1c0e8b323800bd
Signed-off-by: Johnny Qiu <joqiu@nvidia.com>
Reviewed-on: http://git-master/r/86828
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

7 years agoRevert "arm: tegra: kai: turn off status LED in LP0"
Johnny Qiu [Thu, 1 Mar 2012 08:13:49 +0000]
Revert "arm: tegra: kai: turn off status LED in LP0"

This reverts commit 39af9f4c2c3cf0d9b8026986db5d73b9ad3ffe11.

Stat LED control through PMU GPIO should be implemented in another
way. No need to touch PMU driver.

Change-Id: I7b577364275a3da3f6fee0b683a4a1323123ae63
Signed-off-by: Johnny Qiu <joqiu@nvidia.com>
Reviewed-on: http://git-master/r/86827
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

7 years agoarm: tegra: enable mmc host test driver
Shridhar Rasal [Thu, 1 Mar 2012 06:02:43 +0000]
arm: tegra: enable mmc host test driver

bug 930113

Change-Id: I046826f264d0b42bada0de2484146edf2c87c797
Signed-off-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-on: http://git-master/r/86781
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoARM: tegra: Add support for passing arguments to bootloader.
Gaurav Sarode [Mon, 27 Feb 2012 16:24:30 +0000]
ARM: tegra: Add support for passing arguments to bootloader.

PMC SCRATCH register 0 holds value across warmboot.
Storing values in bit31:30 for recovery and fastboot.
This requires change in bootloader as well to parse these arguments.

Bug 863014

Change-Id: I1d4b752dbc6dd7b065e9d0cc87df189e7caeb201
Signed-off-by: Gaurav Sarode <gsarode@nvidia.com>
Reviewed-on: http://git-master/r/86140
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agommc: fix sdhci_host PM flags usage
David Schalig [Thu, 9 Feb 2012 01:38:10 +0000]
mmc: fix sdhci_host PM flags usage

MMC_PM_KEEP_POWER was used on the wrong structure member, which might
cause card interrupt lost during suspend/resume

Bug 936503

Change-Id: Ib42d7a5ba27c0175e944223967c416a3c80802dd
Signed-off-by: David Schalig <dschalig@nvidia.com>
Signed-off-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-on: http://git-master/r/83011
Reviewed-on: http://git-master/r/86020
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

7 years agoarm: tegra: io: Increase host1x io size
Animesh Kishore [Tue, 14 Feb 2012 09:49:50 +0000]
arm: tegra: io: Increase host1x io size

This accomodates dsi second instance address space.

Bug 928423

Change-Id: I4aa3314b3227f49b3fe49552503fbdb2fd1c9ddb
Signed-off-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-on: http://git-master/r/83773
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoarm: tegra: config: Enable Read Only NTFS file system support.
Gaurav Sarode [Mon, 20 Feb 2012 06:38:21 +0000]
arm: tegra: config: Enable Read Only NTFS file system support.

Bug 896757

Change-Id: I7ebce860f62c79f4e675be26da76f517960086d2
Signed-off-by: Gaurav Sarode <gsarode@nvidia.com>
Reviewed-on: http://git-master/r/83455
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoARM: tegra: power: Fix Tegra2 power timer rate
Alex Frid [Sun, 19 Feb 2012 08:24:18 +0000]
ARM: tegra: power: Fix Tegra2 power timer rate

Commit cb0428145196ed7a75861c78d28f46b6bc8d2320 implemented LP0
state entry with fast CPU and system bus clocks only for Tegra3,
but changed power timers rate calculation in the common Tegra2
and Tegra3 path. Fixing it now.

Signed-off-by: Alex Frid <afrid@nvidia.com>
(cherry picked from commit 9e66d6adf6ab1fe06eee63baf0f1f684715d1ae2)

Change-Id: Iac276f048fed4edbee318cadddb862e45ba851c6
Reviewed-on: http://git-master/r/86550
Tested-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

7 years agoARM: tegra: dvfs: Relax Tegra3 lower speedo limits
Alex Frid [Sun, 19 Feb 2012 01:02:03 +0000]
ARM: tegra: dvfs: Relax Tegra3 lower speedo limits

Bug 817679
Bug 841336

Signed-off-by: Alex Frid <afrid@nvidia.com>
(cherry picked from commit 44e7c117b3188bdd45a6e7dae31e8d3ea78c5d98)

Change-Id: I3d6d43a9a6690a8df51b0c84f4e4b6ad244c4fea
Reviewed-on: http://git-master/r/86549
Tested-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

7 years agoARM: tegra: dvfs: Update Tegra3 speedo thresholds
Diwakar Tundlam [Thu, 2 Feb 2012 02:02:23 +0000]
ARM: tegra: dvfs: Update Tegra3 speedo thresholds

Bug 817679
Bug 841336

Signed-off-by: Diwakar Tundlam <dtundlam@nvidia.com>
(cherry picked from commit a4f6d43aa692586654ebb441246f0509fce7fa58)

Change-Id: Ie649f71177ed71b8e8c4062a8966f2478bfef7aa
Reviewed-on: http://git-master/r/86548
Tested-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

7 years agoMerge "regmap: merge 7cccbdc84487616c3dbe493b04bfa1f362f4bc56" into android-tegra...
Simone Willett [Thu, 1 Mar 2012 21:21:21 +0000]
Merge "regmap: merge 7cccbdc84487616c3dbe493b04bfa1f362f4bc56" into android-tegra-nv-3.1

7 years agoARM: tegra: Enable ARM_SAVE_DEBUG_CONTEXT
Scott Williams [Mon, 27 Feb 2012 18:54:56 +0000]
ARM: tegra: Enable ARM_SAVE_DEBUG_CONTEXT

Change-Id: Icbeed86d3fdc04d4ae7e3c129a707ceba6f61fba
Signed-off-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-on: http://git-master/r/86159
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoARM: mm: Make CPU debug context save/restore optional
Scott Williams [Thu, 23 Feb 2012 20:00:12 +0000]
ARM: mm: Make CPU debug context save/restore optional

Change-Id: I5a5a26c6fc0a169a004307e07de1223c107e4df7
Signed-off-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-on: http://git-master/r/86158
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Tested-by: Gerrit_Virtual_Submit

7 years agoARM: tegra: kai: add usb vbus irq
Hao Tang [Fri, 24 Feb 2012 06:08:16 +0000]
ARM: tegra: kai: add usb vbus irq

Bug 931371
Bug 947203
Bug 947228

Change-Id: Ibfa00e5df77661487fc764cb3bff9cd854e8f70a
Signed-off-by: Hao Tang <htang@nvidia.com>
Reviewed-on: http://git-master/r/85673
Reviewed-by: Lokesh Pathak <lpathak@nvidia.com>
Tested-by: Lokesh Pathak <lpathak@nvidia.com>

7 years agoarm: tegra: cardhu: add support for max98095
Ravindra Lokhande [Wed, 18 Jan 2012 14:15:35 +0000]
arm: tegra: cardhu: add support for max98095

add support for maxim 98095 audio codec

Change-Id: I112130341363e18986158cd94a981a60a80fb0d0
Reviewed-on: http://git-master/r/75956
Signed-off-by: Ravindra Lokhande <rlokhande@nvidia.com>
Reviewed-on: http://git-master/r/85485
Reviewed-by: Sumit Bhattacharya <sumitb@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Scott Peterson <speterson@nvidia.com>

7 years agoinput: misc: cm3217: Fix incorrect enabling during suspend/resume
Johnny Qiu [Wed, 29 Feb 2012 10:08:32 +0000]
input: misc: cm3217: Fix incorrect enabling during suspend/resume

Bug 946800

Change-Id: I1c7665002c94f54eb44c6b0715f6bd737a3e1288
Signed-off-by: Johnny Qiu <joqiu@nvidia.com>
Reviewed-on: http://git-master/r/86572
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Kerwin Wan <kerwinw@nvidia.com>

7 years agortc: max8907c: correct month index calculation.
Joseph Yoon [Wed, 29 Feb 2012 09:02:49 +0000]
rtc: max8907c: correct month index calculation.

max8907c is returning Jan as 1 from rtc register.
but kernel is assuming Jan as 0.
so correct month index.

Change-Id: I9b77b89952442891f53ebd6355352f36a07521cd
Signed-off-by: Joseph Yoon <tyoon@nvidia.com>
Reviewed-on: http://git-master/r/86561
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

7 years agoregulator: add GCOV_PROFILE
Juha Tukkinen [Tue, 28 Feb 2012 07:42:10 +0000]
regulator: add GCOV_PROFILE

Add GCOV profiling for regulators in Makefile. This change has no effect
if CONFIG_GCOV_KERNEL is not set in defconfig. This patch only makes it
easier to trigger GCOV for the kernel.

Change-Id: I921647e2742cda870ebb99afe3f63544396b7f02
Signed-off-by: Juha Tukkinen <jtukkinen@nvidia.com>
Reviewed-on: http://git-master/r/86277
Tested-by: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

7 years agotty: serial: tegra: Fix dma/cpu coherency issues
Pradeep Kumar [Mon, 27 Feb 2012 08:35:46 +0000]
tty: serial: tegra: Fix dma/cpu coherency issues

Call dma sync single api's to maintain coherency between
CPU, dma and device in data transfers.

Bug 935876
Bug 918880

Signed-off-by: Pradeep Kumar <pgoudagunta@nvidia.com>

Change-Id: I45d7d998b1d091e726c1bfb512c8b0b087d7452e
Reviewed-on: http://git-master/r/86054
Tested-by: Pradeep Goudagunta <pgoudagunta@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

7 years agoarm: tegra: kai: change cpu governor in early suspend
Kerwin Wan [Fri, 24 Feb 2012 00:27:26 +0000]
arm: tegra: kai: change cpu governor in early suspend

Change-Id: If351e3401ce85495c78a16f7aa6eaf69d2fba0bf
Signed-off-by: Hao Tang <htang@nvidia.com>
Reviewed-on: http://git-master/r/85624
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoarm: tegra: Reduce sbc1 frequency to 13MHz
Daniel Solomon [Fri, 24 Feb 2012 02:26:15 +0000]
arm: tegra: Reduce sbc1 frequency to 13MHz

Change-Id: Ia81f5038d6b2ad58d29b0f57a8b8eddbc3daac84
Signed-off-by: Daniel Solomon <daniels@nvidia.com>
Reviewed-on: http://git-master/r/85648
Reviewed-by: Ali Ekici <aekici@nvidia.com>
Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>

7 years agoarm: tegra: kai: Fix the judgement of board fab for KAI
Kerwin Wan [Sat, 18 Feb 2012 22:58:09 +0000]
arm: tegra: kai: Fix the judgement of board fab for KAI

Change-Id: Id27c7e7a1894e0ce1f97fa5dab2d437814cca5ed
Signed-off-by: Kerwin Wan <kerwinw@nvidia.com>
Reviewed-on: http://git-master/r/84704
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoregmap: merge 7cccbdc84487616c3dbe493b04bfa1f362f4bc56
Laxman Dewangan [Wed, 29 Feb 2012 13:08:12 +0000]
regmap: merge 7cccbdc84487616c3dbe493b04bfa1f362f4bc56

Merge commit '7cccbdc84487616c3dbe493b04bfa1f362f4bc56'
into origin/android-tegra-nv-3.1

Conflicts:
drivers/base/regmap/regmap.c

Change-Id: I7c74b1745e592390538419a2c8026a3ba29be8ea
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>

7 years agomfd: Use regmap for tps65910 register access.
Laxman Dewangan [Tue, 21 Feb 2012 12:51:34 +0000]
mfd: Use regmap for tps65910 register access.

Using regmap apis for accessing the device registers and
using RBTREE caching mechanims for caching registers.

Enabling caching of the registers which is used for voltage
controls. By doing this, the modify_bits operation is faster as
it does not involve the i2c register read from device, just read
from cache. This results faster set voltage operation.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
cherry picked from mainline commit
0e7018c7b161dc5544f7af862dc59e0b9a0dbd20

Change-Id: Ie0bc1fd32f1c7f7b80004b30ec9ba615d4c29360
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/86349

7 years agomedia: tegra: avp: set emc to max for video only
Bharat Nihalani [Fri, 24 Feb 2012 13:39:11 +0000]
media: tegra: avp: set emc to max for video only

emc should be set to MAX only in case of video and not otherwise

Bug 941448

Signed-off-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-on: http://git-master/r/85766
(cherry picked from commit 736072f72b468449246f5c943f87ce83092579c4)

Change-Id: I8bda6c47a07534ef35305795449835364a129864
Reviewed-on: http://git-master/r/86306
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>

7 years agoasoc: codecs: support 26MHz mclk for aic326x codec
Harry Hong [Tue, 28 Feb 2012 08:14:28 +0000]
asoc: codecs: support 26MHz mclk for aic326x codec

bug 940617

Change-Id: I83f43820761d0227d7a594123d22fe79089e2e15
Signed-off-by: Harry Hong <hhong@nvidia.com>
Reviewed-on: http://git-master/r/86280
Reviewed-by: Scott Peterson <speterson@nvidia.com>
Tested-by: Gerrit_Virtual_Submit

7 years agoasoc: tegra: ALC5640 machine: fix GPIO_EXT_MIC_EN
Chandler Zhang [Mon, 27 Feb 2012 05:58:33 +0000]
asoc: tegra: ALC5640 machine: fix GPIO_EXT_MIC_EN

Invert the gpio output because GPIO_EXT_MIC_EN is active low.

Bug 937914

Change-Id: Ifeccda092d7834dfdd39e3d1df616bda7bf516bc
Reviewed-on: http://git-master/r/86038
Reviewed-by: Liangchuan Mi <lmi@nvidia.com>
Tested-by: Chandler Zhang <chazhang@nvidia.com>
Reviewed-by: Johnny Qiu <joqiu@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Kerwin Wan <kerwinw@nvidia.com>

7 years agoarm: tegra: enterprise: add 12.75mhz memory freq
Wen Yi [Wed, 18 Jan 2012 18:13:52 +0000]
arm: tegra: enterprise: add 12.75mhz memory freq

Add operation parameters for running emc at 12.75 MHz into
emc dvfs table.

Bug 922351
Bug 943239

Signed-off-by: Wen Yi <wyi@nvidia.com>
Reviewed-on: http://git-master/r/79577
(cherry picked from commit 98f225dae75c8ed04cd11d0f6514f5259f3b9a9b)

Change-Id: I98d972e76a988d167a214ddaac800a5a442f01c3
Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-on: http://git-master/r/86298
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>

7 years agoARM: tegra: enterprise: Updating EMC table
Tom Cherry [Tue, 22 Nov 2011 19:19:12 +0000]
ARM: tegra: enterprise: Updating EMC table

Bug 896654
Bug 905859

Reviewed-on: http://git-master/r/66191
(cherry picked from commit 196a42e94f1a8a33466a63f19f81d48aed442ac5)

Change-Id: Ic8417ee4370b827e69af23b407cd1bf88b836523
Signed-off-by: Tom Cherry <tcherry@nvidia.com>
Reviewed-on: http://git-master/r/86202
Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>

7 years agopower: tps80031: charger: Fix the charging current bits calculation
Laxman Dewangan [Fri, 24 Feb 2012 06:21:34 +0000]
power: tps80031: charger: Fix the charging current bits calculation

Calculation of register bits from charging current is not correct.
Fixing the calculation using lookup table.

Change-Id: I76f7612288eafd96e00ea73674556b7609d09248
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/85680
Reviewed-by: Syed Rafiuddin <srafiuddin@nvidia.com>
Tested-by: Syed Rafiuddin <srafiuddin@nvidia.com>

7 years agoarm: tegra: kai: enable modem related gpio pins
Sheshagiri Shenoy [Wed, 22 Feb 2012 02:49:54 +0000]
arm: tegra: kai: enable modem related gpio pins

bug 937956

Change-Id: I15e9314c1dce0892fc2d047c6c52a5d3cf437be8
Signed-off-by: Sheshagiri Shenoy <sshenoy@nvidia.com>
Reviewed-on: http://git-master/r/85064
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoarch: arm: configs: correct bcm4329 nvram path
Nitin Bindal [Tue, 21 Feb 2012 10:53:53 +0000]
arch: arm: configs: correct bcm4329 nvram path

modified nvram file path for bcm4329 driver

Bug 943531

Change-Id: Iae01c0146ecb894ac0edc20ed3182f82102fe388
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: http://git-master/r/84927
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoARM: tegra: invalidate volatile CPU state after resume from suspend or hotplug
Haley Teng [Fri, 24 Feb 2012 05:19:25 +0000]
ARM: tegra: invalidate volatile CPU state after resume from suspend or hotplug

In the CPU hotplug startup routine, besides invalidate d-cache, we also
need,

- invalidate BTAC, i-cache, branch predict array, TLB
- invalidate SCU tags
- enable i-cache, branch prediction

Bug 926063
Bug 925488

Change-Id: I3751192f6aee65d93f6654e768d93ef7a5092023
Signed-off-by: Haley Teng <hteng@nvidia.com>
Change-Id: I35af9d4bbe5d60df2d648d9e7dcc18762194fb11
Reviewed-on: http://git-master/r/84759
Reviewed-by: Foster Cho <ycho@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>

7 years agoARM: tegra: power: Support minimum on-line cpus limit
Alex Frid [Sun, 19 Feb 2012 04:46:15 +0000]
ARM: tegra: power: Support minimum on-line cpus limit

Updated Tegra3 auto-hotplug mechanism to keep minimum number of
on-line cpus above the limit specified by the PM QoS parameter
PM_QOS_MIN_ONLINE_CPUS.

Added respective debugfs node /kernel/debug/tegra_hotplug/min_cpus.

Bug 940061

Change-Id: Ic7d2e0fdb334661d46c9cd3ce0c73ae662ca3722
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/84707
Reviewed-by: Donghan Ryu <dryu@nvidia.com>
Tested-by: Gaurav Sarode <gsarode@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

7 years agoarm: tegra: kai: set wifi as built_in
Om Prakash Singh [Sat, 18 Feb 2012 16:28:26 +0000]
arm: tegra: kai: set wifi as built_in

Wifi driver is inserted at boot time and never remove, so no need to
detect card while turing-on wifi and remove card while turning-off wifi

Bug 942826

Change-Id: I1314ca8af7026ad2720fe6bd8fdd478b880c9c23
Signed-off-by: Om Prakash Singh <omp@nvidia.com>
Reviewed-on: http://git-master/r/84696
Reviewed-by: Rakesh Kumar <krakesh@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

7 years agoarm: tegra: kai: enable modem regulator
Sheshagiri Shenoy [Sat, 18 Feb 2012 00:33:50 +0000]
arm: tegra: kai: enable modem regulator

bug 937956

Change-Id: I765f2fb07e438d91e4e3c338206f7d0899c3c67d
Signed-off-by: Sheshagiri Shenoy <sshenoy@nvidia.com>
Reviewed-on: http://git-master/r/84661
Reviewed-by: Steve Lin <stlin@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

7 years agoARM: tegra: dma: Pause dma before configuring dma for next transfer
Laxman Dewangan [Mon, 27 Feb 2012 10:47:46 +0000]
ARM: tegra: dma: Pause dma before configuring dma for next transfer

The apb dma supports next transfer configuration before current
on-going transfer completes in continuous mode.
The new configuration require multiple register programming and need
to be done before last burst completed. Just after last transfer
completes, the new configure data is reloaded.
To make this configuration atomic, pausing the dma during configuration
so that last burst should not be happen and dma engine should not re-load
new configuration when it was on a way.

bug 937142

Change-Id: I15b62394df10c97ca21c0d7905fedc7e7c2872b7
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/84292
Tested-by: Pradeep Goudagunta <pgoudagunta@nvidia.com>
Tested-by: Bandi Krishna Chaitanya <bandik@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>

7 years agoarm: tegra[3]: set proper options for BCMDHD driver
Mursalin Akon [Mon, 6 Feb 2012 21:38:20 +0000]
arm: tegra[3]: set proper options for BCMDHD driver

 - enable BCMDHD_CSCAN_ENABLE and BCMDHD_INSMOD_NO_FW_LOAD
for Android builds
 - enable BCMDHD for Linux builds

Bug 924521

(cherry picked from commit I537cef0658c16925597d9511828b7a3ba3742bc5)
Signed-off-by: Mursalin Akon <makon@nvidia.com>

Change-Id: Iba99c225dd61499c3f04b4535a7939983e94a063
Reviewed-on: http://git-master/r/82879
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agovideo: tegra: host: Merge tegra_grhost and host1x devices
Mayuresh Kulkarni [Fri, 24 Feb 2012 10:16:51 +0000]
video: tegra: host: Merge tegra_grhost and host1x devices

- tegra_grhost is a platform device that represents host1x
- nvhost has device host1x which represents the same hardware
- merge these two device structs
- as the new struct is a nvhost_device, platform_driver
is also converted into a nvhost_driver
- register nvhost device before other graphics devices.
this ensures that nvhost_probe() is called as soon as
nvhost_driver is registered with the core.
- this also ensures that nvmap is probed first, followed
by nvhost, followed by tegra-dc and nvavp (if they
are enabled).

Change-Id: Ic420a6516a9cb20d6f481692a4db10fa6053dd90
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-on: http://git-master/r/82631
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agovideo: tegra: dc: Clear window option before window update.
Kevin Huang [Tue, 28 Feb 2012 01:26:02 +0000]
video: tegra: dc: Clear window option before window update.

There exits an issue that if window number is less than DC_N_WINDOWS,
window option of some windows won't be cleared. So although it should
be disabled, it might not be disabled properly. This will lead to the
failure of scan-out on screen.

Bug 943846

Change-Id: I604399abaa590b27ab4ea41ed9eb2706be16a75a
Signed-off-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-on: http://git-master/r/86230
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agodrivers: tsensor: added tsensor low temp interface
Joshua Primero [Sun, 18 Dec 2011 23:33:25 +0000]
drivers: tsensor: added tsensor low temp interface

Added function to retrieve tsensor driver's lowest
temperature support

Signed-off-by: Joshua Primero <jprimero@nvidia.com>
Reviewed-on: http://git-master/r/70931
(cherry picked from commit f81c5b945b2104969fd1a391d0e5df8f0900710d)

Change-Id: I8bf3f7c7fb3ab4730bfb6700b2ae5edec44c7da2
Reviewed-on: http://git-master/r/85960
Reviewed-by: Joshua Primero <jprimero@nvidia.com>
Tested-by: Joshua Primero <jprimero@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

7 years agodrivers: misc: nct: Fixed nct interrupt handler
Joshua Primero [Fri, 20 Jan 2012 00:42:10 +0000]
drivers: misc: nct: Fixed nct interrupt handler

Fixed nct bug where interrupts would go missing because
thermal_alert would not correctly set the state of
the thermal device.

Change-Id: I09f4e7816fe606e576b257281acd498428f0d941
Signed-off-by: Joshua Primero <jprimero@nvidia.com>
Reviewed-on: http://git-master/r/84674
(cherry picked from commit 5bba6f1b63225ce9ab0ab45a8513541d4435ace5)
Reviewed-on: http://git-master/r/85945
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

7 years agoPM Qos: Add min online cpus as PM QoS parameter
Gaurav Sarode [Fri, 17 Feb 2012 09:55:43 +0000]
PM Qos: Add min online cpus as PM QoS parameter

Bug 940061

Change-Id: Ibae842fdc3af3c92ec7e6125c602417110d8b55e
Signed-off-by: Gaurav Sarode <gsarode@nvidia.com>
Reviewed-on: http://git-master/r/84521
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Tested-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

7 years agonet: wireless: bcmdhd: let BCMDHD_WEXT control wireless extension features
Mursalin Akon [Fri, 27 Jan 2012 22:57:30 +0000]
net: wireless: bcmdhd: let BCMDHD_WEXT control wireless extension features

In the driver code wireless extension features are
controlled through WIRELESS_EXT config option.
However, WIRELESS_EXT is turned on by the BCMDHD_WEXT
option of this driver.

Hence, the instead of using WIRELESS_EXT, BCMDHD_WEXT
is used to control wireless extension features.

Bug 924521

(cherry picked from commit 22a9df35537080fbd8a2045c574c5b3e5d08f1ab)

Signed-off-by: Mursalin Akon <makon@nvidia.com>
Change-Id: I68a49271fd3f3616b3beb07f5350d616f3bd9459
Reviewed-on: http://git-master/r/82878
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Allen Martin <amartin@nvidia.com>

7 years agonet: wireless: bcmdhd: make delayed firmware loading a Kconfig option
Mursalin Akon [Fri, 27 Jan 2012 22:35:03 +0000]
net: wireless: bcmdhd: make delayed firmware loading a Kconfig option

Make delayed firmware loading a Kconfig option.
Config option BCMDHD_INSMOD_NO_FW_LOAD controls
this feature.

Bug 924521

(cherry picked from commit 9a0219b500f677381b3d912c73a9755cb0eb1caa)

Signed-off-by: Mursalin Akon <makon@nvidia.com>
Change-Id: I5d48f6c7484bbf8d5d6825f4b3a08d711ff86558
Reviewed-on: http://git-master/r/82877
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Allen Martin <amartin@nvidia.com>

7 years agonet: wireless: bcmdhd: move CSCAN enable to a Kconfig option
Mursalin Akon [Wed, 25 Jan 2012 23:42:10 +0000]
net: wireless: bcmdhd: move CSCAN enable to a Kconfig option

Move CSCAN driver compilation flag to CONFIG_BCMDHD_CSCAN_ENABLE
Kconfig option; CSCAN is not supported in all userspace environments.

The driver implementation of PNO_SUPPORT has a dependency on CSCAN, so
make that option controlled by CONFIG_BCMDHD_CSCAN_ENABLE.

This CL is inspired from http://git-master/r/#change,76730

Bug 924521

(cherry picked from commit 240664309eaba6ec56297ff7c2704176708189e7)

Signed-off-by: Mursalin Akon <makon@nvidia.com>
Change-Id: I3481b48750089800c0aa977f05d7512880d6d74c
Reviewed-on: http://git-master/r/82876
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Allen Martin <amartin@nvidia.com>

7 years agoarm: tegra: kai: Set TEGRA_IOMMU_SMMU for platform_device
Johnny Qiu [Wed, 22 Feb 2012 09:59:48 +0000]
arm: tegra: kai: Set TEGRA_IOMMU_SMMU for platform_device

This platform_device will be used for struct iommu_ops for SMMU in
addition to iovmm-smmu exclusively.

Change-Id: I95734e16764f148e4d91c767d98f399ed2acb593
Signed-off-by: Johnny Qiu <joqiu@nvidia.com>
Reviewed-on: http://git-master/r/85146
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoARM: defconfig: enable TI aic326x codec for cardhu
Nikesh Oswal [Fri, 17 Feb 2012 10:08:02 +0000]
ARM: defconfig: enable TI aic326x codec for cardhu

Change-Id: I847b06fb9e69469221ddc2e7d88b7836b1316f76
Signed-off-by: Nikesh Oswal <noswal@nvidia.com>
Reviewed-on: http://git-master/r/84540
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoARM: tegra: cardhu: enable TI aic326x codec
Nikesh Oswal [Fri, 17 Feb 2012 10:10:12 +0000]
ARM: tegra: cardhu: enable TI aic326x codec

Change-Id: I05f436146def9a2a7f55ff3fa1af6b560d3b289c
Signed-off-by: Nikesh Oswal <noswal@nvidia.com>
Reviewed-on: http://git-master/r/84541
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoARM: config: tegra3: enable advanced routing and multiple routing table
stephane Dion [Thu, 19 Jan 2012 14:13:48 +0000]
ARM: config: tegra3: enable advanced routing and multiple routing table

These options are needed for multiple PDP context support

bug 926236

Change-Id: I2a7149ca829d015375132b1f882924cab825d945
signed-off-by: Stephane Dion <sdion@nvidia.com>
Reviewed-on: http://git-master/r/85533
Reviewed-by: Jean-Marc Guiraudet <jguiraudet@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

7 years agodriver: wireless: bcmdhd: add missed wake_unlocks
Narayan Reddy [Thu, 16 Feb 2012 11:44:11 +0000]
driver: wireless: bcmdhd: add missed wake_unlocks

handled missed wake_unlocks in bcmdhd wlan driver

Bug 924611

Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: http://git-master/r/84302
(cherry picked from commit d54a9823622acf981b782260a717f0091ea69fd7)

Change-Id: I4faff6d6fbee8ac62e3d19d6b5ef27ee5a20e60b
Reviewed-on: http://git-master/r/85692
Reviewed-by: Narayan Reddy <narayanr@nvidia.com>
Tested-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

7 years agovideo: tegra: host: Reject gathers if submit failed
Terje Bergstrom [Thu, 23 Feb 2012 11:03:35 +0000]
video: tegra: host: Reject gathers if submit failed

If submit failed, for example when we ran out of memory, we should
reject any subsequent writes.

Bug 936097

Change-Id: Ic124fc08b7715532d210a0c0d0b7aebcb54e43d4
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/85479
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agovideo: tegra: nvmap: don't override contiguous flag
Krishna Reddy [Wed, 22 Feb 2012 23:57:46 +0000]
video: tegra: nvmap: don't override contiguous flag

Don't override contiguous flag in nvmap_page_alloc().
This is causing incorrect iovm_commit accounting.

Bug 938864

Change-Id: If30ea43702465980914b12816fa28eac9e14581d
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/85319
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Kamal Balagopalan <kbalagopalan@nvidia.com>
Tested-by: Kamal Balagopalan <kbalagopalan@nvidia.com>

7 years agoARM: tegra: power: Don't lower clocks on LP0 entry
Alex Frid [Sun, 12 Feb 2012 04:19:42 +0000]
ARM: tegra: power: Don't lower clocks on LP0 entry

Do not change (lower) CPU and system clocks, and do not disable PLLs
on entry to LP0, since all clocks and PLLs are stopped in h/w, anyway.

Signed-off-by: Alex Frid <afrid@nvidia.com>
(cherry picked from commit 0142197cf7b1828fa7935c9d8715f37313864db1)

Change-Id: I2f175882d4d3dcfe5aee9c460f873a5e907e4ece
Reviewed-on: http://git-master/r/84714
Reviewed-by: Lokesh Pathak <lpathak@nvidia.com>
Tested-by: Lokesh Pathak <lpathak@nvidia.com>

7 years agoARM: tegra: clock: Update secondary pll dividers resume
Alex Frid [Sun, 5 Feb 2012 08:12:59 +0000]
ARM: tegra: clock: Update secondary pll dividers resume

During resume from LP0 on Tegra3 always enable pll secondary dividers
before clocks restoration (to make sure clock sources are enabled).
Restore actual secondary dividers settings after clocks are restored.

Remove pllp secondary dividers restoration from cpu complex restore,
and add them to common clock restoration procedure. These dividers
are not affected by CPU complex suspend, only by LP0 core suspend.

Signed-off-by: Alex Frid <afrid@nvidia.com>
(cherry picked from commit 1f631436717c0602ef30770f7976615150114afe)

Change-Id: I45777ca0535f51a39c35e9d360ac6e97a13ea92c
Reviewed-on: http://git-master/r/84712
Reviewed-by: Lokesh Pathak <lpathak@nvidia.com>
Tested-by: Lokesh Pathak <lpathak@nvidia.com>

7 years agoarm: tegra: pci: fix lost interrupts condition
Rakesh Iyer [Thu, 16 Feb 2012 20:09:48 +0000]
arm: tegra: pci: fix lost interrupts condition

Clear the interrupt status before posting events to driver code, to avoid
losing interrupts for devices with high interrupt rate.

Change-Id: I776dff33e273b7d1c0dd10615ce4405acdc867e8
Signed-off-by: Rakesh Iyer <riyer@nvidia.com>
Reviewed-on: http://git-master/r/84356
Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>

7 years agoARM: tegra: power: Notify clock event in CPU mode switch
Alex Frid [Sun, 5 Feb 2012 06:32:44 +0000]
ARM: tegra: power: Notify clock event in CPU mode switch

Add clock event notification to switch timekeeping to broadcast
timer during Tegra3 CPU mode switch. Skip notifications if mode
switch happens on entry/exit to/from suspend state when timekeeping
is already suspended.

Signed-off-by: Alex Frid <afrid@nvidia.com>
(cherry picked from commit 236fd35c40a748d8373d7f34b53c320045fa4d3a)

Change-Id: I38386dfe3d4ffb89f35828cd911d254b976f0063
Reviewed-on: http://git-master/r/84713
Tested-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

7 years agovideo: tegra: nvmap: Fix build warning
Hiroshi DOYU [Tue, 21 Feb 2012 13:29:01 +0000]
video: tegra: nvmap: Fix build warning

Use correct type.

Change-Id: Iec3ec1624e4f14c36f02fbee6d838f4b2d188569
Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/84947
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>

7 years agovideo: tegra: dsi: Fix dsi phy timing
Animesh Kishore [Wed, 22 Feb 2012 15:37:00 +0000]
video: tegra: dsi: Fix dsi phy timing

Corrected the formulas to calculate phy timing.
Added mipi d-phy constraints.

Bug 938043

Change-Id: Ie1f2dd45e7e39f83735fe28e21a62dc0415c7c00
Signed-off-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-on: http://git-master/r/85217
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

7 years agoARM: tegra: clock src initialisation for debug port in common place
Laxman Dewangan [Wed, 22 Feb 2012 12:05:38 +0000]
ARM: tegra: clock src initialisation for debug port in common place

Moving clock source rate initialisation of  debug ports in
common place from board files.
In this way, it does not need to call the same function from
all board files and so avoid duplicating.

Change-Id: I4e0292c7760488125c0dd8ee5fa23f50faca3436
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/85174
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agospi: tegra: checkpatch cleanups
Laxman Dewangan [Wed, 22 Feb 2012 11:34:03 +0000]
spi: tegra: checkpatch cleanups

Removing checkpatch error and warnings from spi driver
resulted from checkpatch.

Change-Id: I92160e802781b583048f46a93dee7d2465689cc0
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/85163
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>

7 years agoarm: tegra: kai: Clock audio from clk_m
Johnny Qiu [Wed, 22 Feb 2012 10:09:29 +0000]
arm: tegra: kai: Clock audio from clk_m

Clock audio from clkm as a pre-condition of disabling pllp_out1
and plla when I2S is in slave mode.

Change-Id: If6cf1037598969ae99224e30edd8fecba8a78d1f
Signed-off-by: Johnny Qiu <joqiu@nvidia.com>
Reviewed-on: http://git-master/r/85147
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agomedia: video: tegra: nvavp: Fix build warning
Hiroshi DOYU [Tue, 21 Feb 2012 13:32:50 +0000]
media: video: tegra: nvavp: Fix build warning

Use correct type.

Change-Id: Ic08214f97d721311dde07ac35664bc3b766ba131
Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/84948
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

7 years agovideo: tegra: host: Dump client managed sync points
Terje Bergstrom [Tue, 21 Feb 2012 11:44:13 +0000]
video: tegra: host: Dump client managed sync points

Change sync point debug dump filtering so that client managed sync
points are added to output.

Remove also an infinite loop when sync point value goes beyond maximum.
Debug dump calls t20_syncpt_update_min, which should not call debug
dump again.

Change-Id: I086a3c21d6171d083e5254e7a34b1582e38a3e49
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/84940
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoasoc: codecs: remove device id for aic326x codec driver
Nikesh Oswal [Fri, 17 Feb 2012 10:13:39 +0000]
asoc: codecs: remove device id for aic326x codec driver

Change-Id: Ia6fac687a6b302fa49b6f8a7cfd74abfde5b45f9
Signed-off-by: Nikesh Oswal <noswal@nvidia.com>
Reviewed-on: http://git-master/r/84544
Reviewed-by: Scott Peterson <speterson@nvidia.com>

7 years agoasoc: tegra: aic326x: add support for aic326x on cardhu
Nikesh Oswal [Fri, 17 Feb 2012 10:14:21 +0000]
asoc: tegra: aic326x: add support for aic326x on cardhu

add support for aic326x on cardhu and also cleanup unused code
of t30 voice call since it has never been tested as aic326x is
not used on any t30 phone platform yet

Change-Id: I32e916f53f6e73031d39bc09afef8ad7f872639b
Signed-off-by: Nikesh Oswal <noswal@nvidia.com>
Reviewed-on: http://git-master/r/84545
Reviewed-by: Scott Peterson <speterson@nvidia.com>

7 years agoARM: tegra: dma: Calculate transferred count based on req size
Laxman Dewangan [Thu, 16 Feb 2012 08:30:38 +0000]
ARM: tegra: dma: Calculate transferred count based on req size

In order to get the correct the transferred count done by dma,
use the requested size from client request instead of transfer
count programmed on dma.

Change-Id: I6d78b0435820ecb1db4b2de2569a2f9d728b2d05
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/77795
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoARM: tegra: dma: Clear dma interrupt status with lock held
Laxman Dewangan [Thu, 16 Feb 2012 08:37:09 +0000]
ARM: tegra: dma: Clear dma interrupt status with lock held

The dma interrupt status should be cleared with spin lock held
to provide the proper synchronization between get_channel_status()
and dma isr.
The interrupt status flag is used to get the transferred data
done by dma and hence the status check and transfer count update
should be atomic.

Change-Id: I9c60f818e95eb32b362abea1afe19c92a23e6827
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/79191
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoARM: tegra: cardhu: add device TI aic326x codec
Nikesh Oswal [Fri, 17 Feb 2012 10:12:45 +0000]
ARM: tegra: cardhu: add device TI aic326x codec

Change-Id: Idc0261b937471499dc5e3c549eae6dff43ca9118
Signed-off-by: Nikesh Oswal <noswal@nvidia.com>
Reviewed-on: http://git-master/r/84543
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agovideo: tegra: dc: fix pixel clock latency issue
Ken Chang [Mon, 13 Feb 2012 03:22:21 +0000]
video: tegra: dc: fix pixel clock latency issue

GENERAL_ACT_REQ causes double-buffered registers to become active.
This register needs to be programed to reduce the latency of pixel clock after
dc enabled by tegra_dc_enable().

bug 926189

Signed-off-by: Ken Chang <kenc@nvidia.com>
Reviewed-on: http://git-master/r/83346
Reviewed-by: Lokesh Pathak <lpathak@nvidia.com>
Tested-by: Lokesh Pathak <lpathak@nvidia.com>
(cherry picked from commit f39c5ddd1867c508900c9aa2d4eead7eb3082343)

Change-Id: I741c9be9074709c1ab571aa631cb462599d5fb78
Reviewed-on: http://git-master/r/84561
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoarm: tegra: power: Add AP33 Battery EDP table tegra-l4t-r15-alpha
Peter Boonstoppel [Fri, 20 Jan 2012 18:33:32 +0000]
arm: tegra: power: Add AP33 Battery EDP table

Exact copy of AP30 table

Bug 926056

Change-Id: I48730c41605b177d267a569804bbc75a6b94cfba
Signed-off-by: Peter Boonstoppel <pboonstoppel@nvidia.com>
Reviewed-on: http://git-master/r/85233
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

7 years agoARM: tegra: Do not unlock CoreSight register access
Scott Williams [Wed, 22 Feb 2012 01:20:10 +0000]
ARM: tegra: Do not unlock CoreSight register access

There is no reason to unlock APB CoreSight register access in the
kernel. The debugger can perform it's own unlock operation as
needed. Keep the registers write-protected to prevent inadvertent
access.

Change-Id: I22f28f76b5dd498b3782ab3380a04f865b59d6fd
Signed-off-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-on: http://git-master/r/85039
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-by: Bo Yan <byan@nvidia.com>

7 years agoARM: tegra: cardhu: set dap1 drive strength
Nikesh Oswal [Fri, 17 Feb 2012 10:11:36 +0000]
ARM: tegra: cardhu: set dap1 drive strength

Change-Id: I1b3797b021adadd1ad944ede45b5916500a881e6
Signed-off-by: Nikesh Oswal <noswal@nvidia.com>
Reviewed-on: http://git-master/r/84542
Reviewed-by: Scott Peterson <speterson@nvidia.com>

7 years agoARM: tegra: power: Power off multiple CPUs on-line
Alex Frid [Fri, 3 Feb 2012 00:21:02 +0000]
ARM: tegra: power: Power off multiple CPUs on-line

Currently on Tegra3 cpu complex is powered off in idle (enters CPU0
LP2 state) only if all secondary CPUs are off-line. This commit adds
an option for CPU0 to enter LP2 while secondary CPUs are still on-line
but have been power gated and entered LP2 state by themselves.

The critical race: secondary CPU is waking up from LP2, while CPU0 is
turning common CPU rail off, is addressed as follows.

1. When entering LP2 state on CPU0:
a) disable GIC distributor
b) check that CPU1-3 are all power-gated (i.e., either off-lined or
have entered LP2)
c) if (b) passes - set all interrupts affinity to CPU0, then
re-enable distributor and continue with CPU complex powering off
d) if (b) fails - re-enable distributor and enter clock-gated (LP3)
state on CPU0
This procedure prevents waking secondary CPUs by GIC SPIs.

2. We still need to make sure that no CPU1-3 PPIs from legacy IRQ/FIQ
or private timers would happen. This is achieved by disabling timers
and legacy interrupts if CPU1-3 enters LP2 state with external timers
selected as wake sources. Respectively, establish dependency between
turning rail off and LP2 wake timers configuration options.

3. Finally, no IPIs is sent by CPU0 entering LP2.

There are no special changes in wake up procedures - whenever CPU0
is awaken by external interrupt or wake timer, cpu complex is powered
on by h/w, and secondary CPUs that were in LP2 state are ungated by
the same interrupt (off-line CPUs are kept power gated). Hence, there
is no need for CPU1-3 external wake timers to run while the rail is
off, and these timers are stopped. To make sure that none of secondary
CPUs over-sleeps its LP2 time, CPU0 wake timer is set to minimum sleep
interval of all CPUs.

By default configuration option for powering off multiple on-line CPUs
is disabled on Tegra3.

Change-Id: I4920d0df375536b2b8ebd9e6738c5fe4f92b92a0
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/83547
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

7 years agovideo: tegra: dc: in continuous mode mask VBLANK after first frame
Nitin Kumbhar [Fri, 27 Jan 2012 05:43:21 +0000]
video: tegra: dc: in continuous mode mask VBLANK after first frame

A V_BLANK interrupt for each frame does not allow long lp2 idle intervals.
If all windows are clean, mask V_BLANK interrupt after processing it
for updating smart dimmer. It's unmasked again when a new window update
is performed. This will schedule a work for updating smart dimmer for
the new frame.

Bug 920110

Signed-off-by: Nitin Kumbhar <nkumbhar@nvidia.com>
Reviewed-on: http://git-master/r/85137
(cherry picked from commit 68398090aee22cf02069e5767c3e9a062b0fc2f6)

Change-Id: I588328bfd0d6036febed236dc07f441878aa81d1
Signed-off-by: Nitin Kumbhar <nkumbhar@nvidia.com>
Reviewed-on: http://git-master/r/85166
Reviewed-by: Lokesh Pathak <lpathak@nvidia.com>
Tested-by: Lokesh Pathak <lpathak@nvidia.com>

7 years agoRevert "mmc: tegra: enabling MMC_PM_KEEP_POWER flag for built_in devices"
Om Prakash Singh [Wed, 22 Feb 2012 05:55:17 +0000]
Revert "mmc: tegra: enabling MMC_PM_KEEP_POWER flag for built_in devices"

This reverts commit caa6566d4fb8539d09276c1bcb818444af675624.

MMC_PM_KEEP_POWER should be used only for sdio as power-on/off code is
implemented only for sdio.

This may also create regression in power.

Bug 938011
Bug 943131

Change-Id: I41a29acb3dd6f3396c97ab78f9704f9b39359675
Signed-off-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-on: http://git-master/r/85213
Reviewed-by: Om Prakash Singh <omp@nvidia.com>
Tested-by: Om Prakash Singh <omp@nvidia.com>

7 years agospi: tegra: Add Dma/cpu buffer synchronisation
Laxman Dewangan [Wed, 22 Feb 2012 09:43:24 +0000]
spi: tegra: Add Dma/cpu buffer synchronisation

When dma coherant buffer need to be access by cpu or apb dma,
it is require to calling the dma_sync_single_for_cpu() when cpu
wants to access it and dma_sync_single_for_device() when dma
wants to access the buffer.

Change-Id: I62fc7fced782f3fc2d145c0d5416a4c8cbe30715
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/85138
Reviewed-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>

7 years agoserial: tegra: checkpatch cleanups
Laxman Dewangan [Tue, 21 Feb 2012 17:48:12 +0000]
serial: tegra: checkpatch cleanups

Fixing build warning.
Cleaning up check patch error and warning.
Re-arranging function to avoid prototype definition of static
functions.

Change-Id: I034f0ca5a1cc2d4c05a79df9df553b87b47d64e2
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/85092
Reviewed-by: Pradeep Goudagunta <pgoudagunta@nvidia.com>
Tested-by: Pradeep Goudagunta <pgoudagunta@nvidia.com>

7 years agoasoc: tegra: aic326x machine: configure codec as master for voice call
Nikesh Oswal [Mon, 13 Feb 2012 06:39:43 +0000]
asoc: tegra: aic326x machine: configure codec as master for voice call

Change-Id: I970ab858399113e4ea0d079779a2cb368af90850
Signed-off-by: Nikesh Oswal <noswal@nvidia.com>
Reviewed-on: http://git-master/r/84539
Reviewed-by: Scott Peterson <speterson@nvidia.com>

7 years agoasoc: codecs: aic326x: configure ASI2 as master
Nikesh Oswal [Mon, 13 Feb 2012 06:38:18 +0000]
asoc: codecs: aic326x: configure ASI2 as master

configure ASI2 as master and add missing dapm widgets and routes

Change-Id: If2f9c8361888ec40147cd5537f435c91e50cbcc8
Signed-off-by: Nikesh Oswal <noswal@nvidia.com>
Reviewed-on: http://git-master/r/84538
Reviewed-by: Scott Peterson <speterson@nvidia.com>

7 years agoasoc: codecs: aic326x: add process flow for voice call
Nikesh Oswal [Mon, 13 Feb 2012 06:36:59 +0000]
asoc: codecs: aic326x: add process flow for voice call

Change-Id: Ie8ef49b2a76e27e07835fb61bce23ddf69c0b1f9
Signed-off-by: Nikesh Oswal <noswal@nvidia.com>
Reviewed-on: http://git-master/r/84537
Reviewed-by: Scott Peterson <speterson@nvidia.com>

7 years agoasoc: tegra: aic326x machine: register the sw dev before the card
Nikesh Oswal [Wed, 8 Feb 2012 18:35:03 +0000]
asoc: tegra: aic326x machine: register the sw dev before the card

If sw dev is registered after the card then there would be a kernel
panic if we try to boot the device with Headset connected because
when the card is registered init of every dai link is called from where
we register the jack with codec driver and doing so will enable headset
interrupts which would try to set switch state for an unregistered switch
device

Change-Id: Ie951f41028a3459e4e13d021c80c3f830bbcc533
Signed-off-by: Nikesh Oswal <noswal@nvidia.com>
Reviewed-on: http://git-master/r/84536
Reviewed-by: Scott Peterson <speterson@nvidia.com>

7 years agoasoc: codecs: aic326x: enable the headset interrupts after jack registration
Nikesh Oswal [Wed, 8 Feb 2012 18:33:44 +0000]
asoc: codecs: aic326x: enable the headset interrupts after jack registration

Change-Id: I682ccc9ba44f82b8acf836c1703d5d54419da54b
Signed-off-by: Nikesh Oswal <noswal@nvidia.com>
Reviewed-on: http://git-master/r/84535
Reviewed-by: Scott Peterson <speterson@nvidia.com>

7 years agoasoc: codecs: aic326x: change the init values of aic326x registers
Nikesh Oswal [Tue, 7 Feb 2012 20:56:42 +0000]
asoc: codecs: aic326x: change the init values of aic326x registers

change the init values of aic326x registers to keep unrequired
codec elements powered off to save power, these codec elements would
be turned on when required by dapm

Change-Id: Id843fae2ca1f30b77c402da7ac24e89fb04828b6
Signed-off-by: Nikesh Oswal <noswal@nvidia.com>
Reviewed-on: http://git-master/r/84534
Reviewed-by: Scott Peterson <speterson@nvidia.com>

7 years agoasoc: tegra: aic326x: turn the mic bias on for headset detction
Nikesh Oswal [Tue, 7 Feb 2012 18:24:53 +0000]
asoc: tegra: aic326x: turn the mic bias on for headset detction

Change-Id: I3d2bb9de12f72fe7c860bdfe740a2d55676a8aa3
Signed-off-by: Nikesh Oswal <noswal@nvidia.com>
Reviewed-on: http://git-master/r/84533
Reviewed-by: Scott Peterson <speterson@nvidia.com>

7 years agoasoc: codecs: aic326x: add mixer controls for configuring CM modes
Nikesh Oswal [Tue, 7 Feb 2012 15:25:07 +0000]
asoc: codecs: aic326x: add mixer controls for configuring CM modes

add mixer controls for configuring CM modes and use the
non-inverting modes for speaker and receiver mixers

Change-Id: I247ccea17d08dc92ac035d6e8070fb146d26b7f5
Signed-off-by: Nikesh Oswal <noswal@nvidia.com>
Reviewed-on: http://git-master/r/84532
Reviewed-by: Scott Peterson <speterson@nvidia.com>

7 years agoasoc: tegra: aic326x: add dapm route for capture path
Nikesh Oswal [Tue, 7 Feb 2012 15:24:02 +0000]
asoc: tegra: aic326x: add dapm route for capture path

Change-Id: I433c35f2ada14f273f85d67f8cf18612bd1e72ea
Signed-off-by: Nikesh Oswal <noswal@nvidia.com>
Reviewed-on: http://git-master/r/84531
Reviewed-by: Scott Peterson <speterson@nvidia.com>

7 years agoasoc: tegra: aic326x: add support for voice call and bt voice call
Nikesh Oswal [Sat, 4 Feb 2012 06:16:15 +0000]
asoc: tegra: aic326x: add support for voice call and bt voice call

Change-Id: I773a7c6769ca74d1a02e2d0b8236fdc20af3ecb8
Signed-off-by: Nikesh Oswal <noswal@nvidia.com>
Reviewed-on: http://git-master/r/84530
Reviewed-by: Scott Peterson <speterson@nvidia.com>

7 years agoasoc: tegra: aic326x: support bt sco playback and recording
Nikesh Oswal [Sat, 4 Feb 2012 05:11:08 +0000]
asoc: tegra: aic326x: support bt sco playback and recording

support bt sco playback and recording with bt chip as master
and ap-i2s as slave

Change-Id: I0e1bcd6fa71a234a90c830195a7eb2015f71a3b0
Signed-off-by: Nikesh Oswal <noswal@nvidia.com>
Reviewed-on: http://git-master/r/84529
Reviewed-by: Scott Peterson <speterson@nvidia.com>