7 years agovideo: dsi: tegra: Use separate LP freq for read
Animesh Kishore [Tue, 6 Sep 2011 12:33:35 +0000]
video: dsi: tegra: Use separate LP freq for read

Recommended LP freq for read and write is sometimes different.
Adding provision to use diff freq for read and write.

Bug 863030

Reviewed-on: http://git-master/r/49197
(cherry picked from commit fd5448995b73bb3e896765a2695d01699f2e7c99)

Change-Id: I78bda39223cb56bad5e917420b9748439f37c5cf
Reviewed-on: http://git-master/r/54182
Reviewed-by: Animesh Kishore <ankishore@nvidia.com>
Tested-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>

Rebase-Id: R02f17dbaee01fc98d49f728da0a1bed4e2a7c0e8

7 years agovideo:tegra:dc: fix hdcp hotplug issue
Ken Chang [Tue, 30 Aug 2011 09:59:23 +0000]
video:tegra:dc: fix hdcp hotplug issue

bit WRITE16 of HDMI_NV_PDISP_KEY_CTRL_0 shall be polled until it
reports DONE, which is value 0 to ensure the write is complete.

bug 858744
bug 861719

(cherry picked from commit d37336f3965cd1071afb6b03b979b0409ee480f1)
(reviewed on http://git-master/r/49821)

Change-Id: I38fe861a265db7d969f3a15f164724294d627cfd
Reviewed-on: http://git-master/r/52852
Tested-by: Ken Chang <kenc@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

Rebase-Id: Rde95d37c2dfa5d1a169a3aa2a80f304f25b94c03

7 years agonvhost: Add locking to module clock code
Terje Bergstrom [Thu, 1 Sep 2011 05:19:50 +0000]
nvhost: Add locking to module clock code

nvhost_module_add_client(), nvhost_module_remove_client() and
nvhost_module_set_rate() need locking when accessing the client list.

Bug 870328

(cherry picked from commit a09309d672fd2f96be1b61d58c57dcc659710e92)

Change-Id: I4c556df0e9607b3e2effb3b788220b784f858774
Reviewed-on: http://git-master/r/52845
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>

Rebase-Id: R379d4317b22c1360a4756e28fbf66655e3aded95

7 years agoARM: tegra: call latency_allowance functions only for silicon
Yudong Tan [Wed, 14 Sep 2011 21:27:06 +0000]
ARM: tegra: call latency_allowance functions only for silicon

Change-Id: Icc97af53cef2c66cd335d66b960fdb211e5839a2
Reviewed-on: http://git-master/r/52456
Tested-by: Yudong Tan <ytan@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>

Rebase-Id: R6a5601582b06e40c0d673c430257faf51ef76d2b

7 years agovideo: tegra: host: disable 3d clock scaling
Ilan Aelion [Thu, 1 Sep 2011 17:10:01 +0000]
video: tegra: host: disable 3d clock scaling

disable 3d clock scaling by default.

Bug 874271

Reviewed-on: http://git-master/r/50305
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
(cherry picked from commit 94850648ca180fda6a811d0cafc8ca281847be28)
Change-Id: I305c7c2efc5cb95bddd33e96291f3ee96e211f8e
Reviewed-on: http://git-master/r/51740
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>

Rebase-Id: Re8a23b529c5659e61a36d33bcb520a471c20fe14

7 years agovideo: tegra: nvsd: code clean up
Jon Mayo [Wed, 31 Aug 2011 23:26:29 +0000]
video: tegra: nvsd: code clean up

reformat code to fit with Linux coding style, and made blocks in some
larger if-else chains into functions.

Original-Change-Id: If78038d196c8d5cf0326678a7432092179682182
Reviewed-on: http://git-master/r/50179
Reviewed-by: Matt Wagner <mwagner@nvidia.com>
Tested-by: Matt Wagner <mwagner@nvidia.com>
Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

Rebase-Id: Rc7ae588c25551df1702e0db19fc4a69c71593a52

7 years agonvhost: power: Remove minimum clock rate
Terje Bergstrom [Thu, 25 Aug 2011 11:30:52 +0000]
nvhost: power: Remove minimum clock rate

As each client has its own instance of all shared clocks, minimum clock
rates can be removed from nvhost and be delegated to clock subsystem.

Bug 868554

Original-Change-Id: Iaa59c8a7f9bd6e992280895acf800594bc3b4508
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/49611
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

Rebase-Id: R692bd4e41b2419a88ab4a50f3abd632b8f5e5e12

7 years agonvhost: power: Separate module shared clocks
Terje Bergstrom [Thu, 25 Aug 2011 11:30:52 +0000]
nvhost: power: Separate module shared clocks

Register clocks that are shared amongst modules (emc, epp) as separate
clocks. This way setting EMC clock for 2D does not interfere with EMC
clock needs for 3D or MPE.

Bug 868554

Original-Change-Id: I5c7dddc8f1d67969865918e577bd24b274d9e897
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/49603
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

Rebase-Id: R08daeac39833341c31016ea95999d0c21964ba93

7 years agovideo: tegra: dsi: deep sleep
Animesh Kishore [Fri, 26 Aug 2011 19:22:41 +0000]
video: tegra: dsi: deep sleep

Aggregate code for dsi deep sleep

Bug 862427

Original-Change-Id: I5296e6659112642f9fe0fb84bec1d5938014c33a
Reviewed-on: http://git-master/r/49506
Reviewed-by: Animesh Kishore <ankishore@nvidia.com>
Tested-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>

Rebase-Id: Ref7c30c407efe88481af5f2d23e5892bb0d05ef3

7 years agovideo: tegra: Implement EDID query
Robert Morell [Wed, 24 Aug 2011 23:52:56 +0000]
video: tegra: Implement EDID query

This change implements the TEGRA_DC_EXT_CONTROL_GET_OUTPUT_EDID ioctl in
the dc_ext interface.

It first adds a way for the tegra dc EDID module to export EDID data
safely, without the risk of reading an incomplete or corrupted EDID in
the presence of hotplug, by moving the actual data to a substructure
with a lifetime maintained by a kref.  Then, that support is plumbed
through the hdmi block (which is currently the only way to get at the
EDID) and out to userspace.

Signed-off-by: Robert Morell <rmorell@nvidia.com>

Bug 817119

Original-Change-Id: I78cd170e15322011b428cb71ffad2c0c3ea058ac
Reviewed-on: http://git-master/r/49127
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

Rebase-Id: Rafafc0a6fbacda5494b12162ad99a8c70ceeb2e0

7 years agotegra: host: Separate Tegra2/3 code paths for 3D
Terje Bergstrom [Fri, 12 Aug 2011 08:25:13 +0000]
tegra: host: Separate Tegra2/3 code paths for 3D

Separate Tegra2 and Tegra3 code paths for 3D context switching.

Bug 839973

Original-Change-Id: I5cfece1c9835a3de329f390aed55c47ad00f87e8
Reviewed-on: http://git-master/r/46887
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

Rebase-Id: R715b9728fe01cb391f258e374f83d098c14ea874

7 years agovideo: tegra: dc: Separate allocations for U and V
Robert Morell [Sat, 16 Jul 2011 01:47:06 +0000]
video: tegra: dc: Separate allocations for U and V

Currently, dc_ext only takes a single nvmap memory ID per overlay, even
in the YUV case (the U and V planes are expected to be differentiated
using an offset from the beginning of the nvmap allocation).

This is problematic for some software flows, such as certain video
interlacing algorithms that will vary the luma plane while keeping the
chrome plane constant.

This change allows dc_ext clients to specify a different nvmap
allocation for each of the Y, U, and V planes.  If a YUV surface is
used and no U or V plane allocation is specified, the old behavior is
preserved: the U and V offsets are assumed to be within the same
allocation as Y.

Note: this changes the behavior of the offset parameter: the old code
added offset to offset_u and offset_v when using it.  The new code
treats all three offsets as relative to the beginning of the allocation.
It also fixes a bug in the code where offset was applied twice to the Y
plane.  I believe this is safe because the presence of this bug means
that no existing clients are using offset != 0 (or if they are, they're
already broken).

Signed-off-by: Robert Morell <rmorell@nvidia.com>

Bug 850882

Original-Change-Id: I230e03db25baaae73a3bdc0d45a2aec162b87fa4
Reviewed-on: http://git-master/r/41471
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: Ra6dd17a50de7150edf104d2a6c9b3b9949919022

7 years agovideo: tegra: dc: disable irq on controller enable
Jon Mayo [Thu, 25 Aug 2011 20:51:54 +0000]
video: tegra: dc: disable irq on controller enable

Mask interrupts in _tegra_dc_controller_enable before calling
enable_irq.

Bug 864602

Change-Id: I93e16d4cb5ea01ed8f112acd43132d6407aed82a
Reviewed-on: http://git-master/r/50178
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Tested-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>

Rebase-Id: Rf1c43274e5bc54b106f7c150a3c839648ea06bd1

7 years agovideo: tegra: Fixed wrong aspect ratio information
Bo Kim [Sat, 13 Aug 2011 13:10:12 +0000]
video: tegra: Fixed wrong aspect ratio information

Picture Aspect Ratio for 576p mode was wrong, it was always 4:3
if aspect ratio is 16:9. It is fixed.

Bug 863854

Reviewed-on: http://git-master/r/49120
(cherry picked from commit 5537288a3faf4ba7b6677dab8790a022d06d638b)
Original-Change-Id: I7e4ff4e2908a9809f9681f1a09c4f56118418674
Reviewed-on: http://git-master/r/49586
Reviewed-by: BK Kim <bkk@nvidia.com>
Tested-by: BK Kim <bkk@nvidia.com>
Reviewed-by: Bo Kim <bok@nvidia.com>
Tested-by: Bo Kim <bok@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Jonathan Mayo <jmayo@nvidia.com>

Rebase-Id: R0ad2bc3df1b7e43f398b162e934a5bf7a678b22c

7 years agovideo: tegra: dc: errdiff dithering limited to 1280
Jon Mayo [Fri, 26 Aug 2011 22:04:00 +0000]
video: tegra: dc: errdiff dithering limited to 1280

the errdiff dithering mode is limited to 1280 pixels per line. There was
some confusion and 640 was used in code and documentation.

Bug 803059

Original-Change-Id: Ia802cc5bca72cf55621487f18369278be254de72
Reviewed-on: http://git-master/r/49538
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: R07c12fe503cc58942fe81d381d15c0134c2e56d2

7 years agomedia: tegra: avp: Use end of IOVM for AVP kernel
Kaz Fukuoka [Tue, 21 Jun 2011 23:15:42 +0000]
media: tegra: avp: Use end of IOVM for AVP kernel

- Use 0x0ff00000 (last 1MB of IOVM).
- For Tegra3 A01, use 0xeff00000.

Original-Change-Id: Ieb21d2bf38158171b97434e04ede7417823b3603
Reviewed-on: http://git-master/r/37742
Reviewed-by: Kaz Fukuoka <kfukuoka@nvidia.com>
Tested-by: Kaz Fukuoka <kfukuoka@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

Rebase-Id: Rc2bbd34a9cb25dee22c4f94fd09f6987636c5b2c

7 years agonvhost: Set default frequency to maximum
Terje Bergstrom [Tue, 23 Aug 2011 11:15:15 +0000]
nvhost: Set default frequency to maximum

Nvhost has a mechanism to request a frequency to be set to module
clocks. When a client connects, it is given default requested frequency,
which was lowest possible.

When a client exits, the frequency of a module is set to maximum of all
requests. As most clients do not set frequency, this caused emc to be
set to lowest possible.

Introduce a new field, default_rate, which is set at initialization
time, and as the requested rate for each client. Client can still
override this setting by using clock setting ioctl.

Bug 859515

Original-Change-Id: I5c62d4cb81ac29e7c9bc9195353338f0b97ac812
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/48470
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: R19cb0ee671a31e3efd156876a0723971cd7cbc15

7 years agovideo: tegra: dc: use 1/2.1 efficiency factor
Jon Mayo [Fri, 26 Aug 2011 00:42:10 +0000]
video: tegra: dc: use 1/2.1 efficiency factor

Use a 48% efficiency factor when calculating EMC clock.

Bug 868860

Original-Change-Id: I469c8120d754210951936b49465b0a2d31fa6825
Reviewed-on: http://git-master/r/49312
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: R71260dc9f361ca66c14733b68baaffcee597970d

7 years agovideo: tegra: dc: Fix smartdimmer brightness update issue.
Krishna Reddy [Wed, 24 Aug 2011 22:23:56 +0000]
video: tegra: dc: Fix smartdimmer brightness update issue.

When dc is disabled, don't perform smartdimmer brightness update.
Accessing dc registers when dc is disabled causes cpu lockup.
Bug 866024

Original-Change-Id: Ibe5ef46fe6c3cbc622021c5d6a57c6f4bc11fe78
Reviewed-on: http://git-master/r/49064
Reviewed-by: Jonathan Mayo <jmayo@nvidia.com>
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Tested-by: Krishna Reddy <vdumpa@nvidia.com>

Rebase-Id: R5f2f9b3e7aeff39d84b1c3b37e6270cbea8479ed

7 years agotegra: nvhost: Runtime retrieval of chip type
Terje Bergstrom [Fri, 12 Aug 2011 08:21:32 +0000]
tegra: nvhost: Runtime retrieval of chip type

Use tegra_get_chipid() to the chip type at run-time instead of own code
based on build-time flags.

Bug 839973

Original-Change-Id: Iecb20be2bdc909627d4dd096a735518ba9cb2976
Reviewed-on: http://git-master/r/46886
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

Rebase-Id: Rade4bdd18721b7db9085358f1e5792b2d5747247

7 years agovideo: tegra: fb: do not set mode on register
Jon Mayo [Wed, 24 Aug 2011 02:01:29 +0000]
video: tegra: fb: do not set mode on register

Do not load a default mode on fb register. This causes a race with
any userspace attempts to set a mode on hotplug.

Bug 862473

Original-Change-Id: I52a93c4348753ca73d01a96025512bf9d179e1e5
Reviewed-on: http://git-master/r/48861
Reviewed-by: Jonathan Mayo <jmayo@nvidia.com>
Tested-by: Jonathan Mayo <jmayo@nvidia.com>
Reviewed-by: Donghan Ryu <dryu@nvidia.com>
Reviewed-by: Michael Frydrych <mfrydrych@nvidia.com>
Tested-by: Michael Frydrych <mfrydrych@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Reviewed-by: Robert Morell <rmorell@nvidia.com>

Rebase-Id: R1204d8e40ce56d0de22ec059fb6a73a0952f94ce

7 years agovideo: tegra: fb: remove warning unused var 'mode'
Jon Mayo [Wed, 24 Aug 2011 02:11:46 +0000]
video: tegra: fb: remove warning unused var 'mode'

warning introduced by commit e50086bfeb1c1fd090ddc5f6c4d951bd4f5fdbcd

Original-Change-Id: I4e651e8e01266faa3eabdc72c955784dafca7f9f
Reviewed-on: http://git-master/r/48859
Reviewed-by: Jonathan Mayo <jmayo@nvidia.com>
Tested-by: Jonathan Mayo <jmayo@nvidia.com>
Reviewed-by: Robert Morell <rmorell@nvidia.com>

Rebase-Id: R17350fd8dc32d0c429627fb7ec8a635e22e7b7bb

7 years agovideo: tegra: dc: Update hdmi hot-plug status on resume
Manjula Gupta [Mon, 1 Aug 2011 11:25:13 +0000]
video: tegra: dc: Update hdmi hot-plug status on resume

- Update the upper layer about hdmi removal in suspended state.
- Removes the redundant variable hpd_pending.

Bug 857122

Reviewed-on: http://git-master/r/44326
(cherry picked from commit ef32636d02cb3405f7f0232d34fb29a33fc5ad94)

Original-Change-Id: Ic1c4cfedfadd318eb0be67d19b528d8e767a7d89
Reviewed-on: http://git-master/r/46642
Tested-by: Manjula Gupta <magupta@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

Rebase-Id: Rfc4ee020f2fab2c8bcc0bad74d2d592f71152c00

7 years agovideo: tegra: nvhost: Context save on suspend
Greg Roth [Mon, 22 Aug 2011 04:55:10 +0000]
video: tegra: nvhost: Context save on suspend

Save context when clock gating. System suspend might happen when unit is
clock gated, which requires context to be restored at resume.

Bug 857053
Bug 866693

Original-Change-Id: Ic45f17e18447d530f6a680ff14ac5cad13639fdd
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/48401
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: R135751e525374ecbef06d345707ce20b196554f6

7 years agotegra: nvhost: Set minimum rate for nvhost clocks
Alex Frid [Sat, 20 Aug 2011 03:27:34 +0000]
tegra: nvhost: Set minimum rate for nvhost clocks

Define minimum rate level for nvhost clocks that is applied to all
user space clients requests. Actually set minimum rate for EMC clock.

Bug 859515

Original-Change-Id: I85a7e835bacb11fd794cda6916e397e0f3cbd728
Reviewed-on: http://git-master/r/48325
Tested-by: Yu-Huan Hsu <yhsu@nvidia.com>
Tested-by: Daniel Solomon <daniels@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

Rebase-Id: R76a20140698529ed768b4aa0517628edb98a6cb9

7 years agovideo: tegra: overlay: Add support in DSI one-shot mode for DIDIM
Kevin Huang [Thu, 18 Aug 2011 20:41:46 +0000]
video: tegra: overlay: Add support in DSI one-shot mode for DIDIM

Bug 849780

Original-Change-Id: I9e704d5d03a253655acd209e6c0815bb6bef3551
Reviewed-on: http://git-master/r/47149
Reviewed-by: Kevin Huang <kevinh@nvidia.com>
Tested-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-by: Phillip Smith <psmith@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

Rebase-Id: R2481c736dd6819a4ab2f565bb0f9df70e3f057a3

7 years agovideo: tegra: dsi: Reset DSI state during system booting.
Kevin Huang [Sat, 20 Aug 2011 23:20:06 +0000]
video: tegra: dsi: Reset DSI state during system booting.

Bug 866389

Original-Change-Id: Ia382270e29fb8b0c111ffe41bcee20f8a072f3a2
Reviewed-on: http://git-master/r/48343
Reviewed-by: Kevin Huang <kevinh@nvidia.com>
Tested-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-by: Matt Wagner <mwagner@nvidia.com>
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>
Reviewed-by: Chih-Lung Huang <lhuang@nvidia.com>
Tested-by: Matt Wagner <mwagner@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

Rebase-Id: R5d78a5727bafe0f6f66eece2791a18f66bdd9df8

7 years agovideo: tegra: dc: correct rounding of bandwidth for window B
Michael Frydrych [Mon, 15 Aug 2011 13:19:17 +0000]
video: tegra: dc: correct rounding of bandwidth for window B

Patch eb81b378 had a sideeffect in that bandwidth of window B
may have no longer been rounded up to 1MBs, contrary to original
intention. This patch fixes it.

Original-Change-Id: Idaba2923e0316245e284e19e1a995adf1bd9cd35
Reviewed-on: http://git-master/r/47133
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

Rebase-Id: Rbd6c56777241c2886f714d4de32a642354b69a67

7 years agovideo: tegra: overlay: Modified overlay flipping for DSI one-shot mode.
Kevin Huang [Thu, 18 Aug 2011 07:02:28 +0000]
video: tegra: overlay: Modified overlay flipping for DSI one-shot mode.

Bug 858957
Bug 861244

Original-Change-Id: Id9584e9f81d96d86d328c80e3c30efb36613f725
Reviewed-on: http://git-master/r/42817
Reviewed-by: Kevin Huang <kevinh@nvidia.com>
Tested-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-by: Robert Morell <rmorell@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

Rebase-Id: Rc27fa2be5a956c999527a54fc089299212eff8e1

7 years agovideo: tegra: nvhost: add submit timeout support
Chris Johnson [Fri, 12 Aug 2011 06:04:09 +0000]
video: tegra: nvhost: add submit timeout support

In this change, nvhost_cdma starts a timer (if a timeout is specified
in the userctx), for the buffer at the head of the sync_queue that has
not reached its syncpt threshold.

If the timeout fires, nvhost_cdma initiates a channel / module reset.
It then detects up to where in the sync_queue it stopped execution
(based on the current HW syncpt value).

For any remaining uncompleted buffers in the context, nvhost_cdma NOPs
the entry and CPU incrs the syncpt to where it should be had it completed.
If one of the sync_queue entries belongs to another context, it still
does the syncpt incrs for this context, but via the PB as a GATHER opcode,

At the end, CDMA is restarted, so buffers are refetched (either with
NOP slots, or GATHERs to incr syncpts). This appears as though the
buffer has completed (and the associated resources released).

For testing, debugfs entries have been added under /d/tegra_nvhost

force_timeout_val - set the timeout value, in ms
force_timeout_channel - channel ID, were timeouts checks occur
force_timeout_pid - process ID to set the userctx

The idea is to set the timeout_val, then the timeout_channel (e.g. for
3D, the channel ID is 1) and then the process ID, gotten from running
adb shell ps.

Bug 625545

Original-Change-Id: I659e9255f1105f3439ce23e9169a19739b83ea52
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/42655
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: R89759c129e2db8f7dbf83a6066fc29947f95cc27

7 years agonvhost: Fix tegra_host/status debug output
Terje Bergstrom [Fri, 29 Jul 2011 06:09:43 +0000]
nvhost: Fix tegra_host/status debug output

Add tracking of mapping between push buffer gathers and nvmap handles.
Use the mapping to access contents of gather buffers.

Bug 840976

Original-Change-Id: Ic6fe2fc7a83e8f14cd606a9e638b6420aa714495
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/44779
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: Rd0c946095890cfe15a68d3c5eaa181a9ac02cf07

7 years agoarm: tegra: Include nvhost.h in tegra_dc_ext.h
Robert Morell [Tue, 16 Aug 2011 01:44:52 +0000]
arm: tegra: Include nvhost.h in tegra_dc_ext.h

This header file was moved from mach/nvhost.h to linux/nvhost.h with
commit f82ab0099542, but that commit deleted this include line instead
of updating it, breaking the build.

Bug 854182
Bug 858358

Original-Change-Id: I921cc5be7b0c0d09c70761c8d5d42b5dfc131720
Reviewed-on: http://git-master/r/47237
Tested-by: Robert Morell <rmorell@nvidia.com>
Reviewed-by: Ken Adams <kadams@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>

Rebase-Id: R16e24674cd98367c1ac6e27c88308155f8e39641

7 years agotegra: nvhost: On Tegra2, set 2D clock to maximum
Terje Bergstrom [Mon, 15 Aug 2011 05:52:22 +0000]
tegra: nvhost: On Tegra2, set 2D clock to maximum

On Tegra2, clocks are not rounded up. Nvhost tries to set 2D clock to
zero, which causes a division-by-zero error. Check for SoC version and
for Tegra2, set clocks always to maximum.

Bug 863937

Original-Change-Id: I3043cb2ddd243a48700de47e1bfdd13920fd0e8c
Reviewed-on: http://git-master/r/47114
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: Reab7a05cea74039b5d914728173efc8a74155c56

7 years agonvhost: Move include files to kernel/include
Terje Bergstrom [Tue, 26 Jul 2011 11:09:02 +0000]
nvhost: Move include files to kernel/include

To prepare for kernel modularization, nvhost include files need to be
moved from mach-tegra/include to kernel/include. At the same time
user space specific part is split into nvhost_ioctl.h.

Bug 854182

Original-Change-Id: I3694a40d786028733310ecf5b59341282af571be
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/43211
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: Rb7ecc6a8932947c7dd33bf0e0079442875ae2cd7

7 years agonvhost: Add tracing for submit activity and cdma
Terje Bergstrom [Thu, 16 Jun 2011 06:31:25 +0000]
nvhost: Add tracing for submit activity and cdma

Adds trace commands for times when a command buffer has been submitted
and when the channel's command buffer has been processed. Also adds
tracing when cdma buffer is full.

This patch fixes a spelling mistake in waitchk trace function.

Original-Change-Id: Ib5609a56c6c2d9ce6cbd019a94f3e102d419bb60
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/36863
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: R34c172eff1e9c128a7748bb4f9af0cf05a30aa7d

7 years agovideo: add support for 1080p stereo
Dhiren Bhatia [Fri, 12 Aug 2011 00:41:56 +0000]
video: add support for 1080p stereo

Original-Change-Id: I933f64a82b74025f3ea05a2a20a24cba7948b039
Reviewed-on: http://git-master/r/46995
Reviewed-by: Alok Ahuja <alahuja@nvidia.com>
Tested-by: Dhiren Bhatia <dbhatia@nvidia.com>
Reviewed-by: Jonathan Mayo <jmayo@nvidia.com>

Rebase-Id: R3b58044e1c821040ffba6adee54fb4b7131dd489

7 years agotegra: host: Disable MPE power gating
Terje Bergstrom [Fri, 12 Aug 2011 10:25:57 +0000]
tegra: host: Disable MPE power gating

Disable MPE power gating until power gating race has been fixed.

Bug 857044

Original-Change-Id: I92a5adf608ee302fb23413c6ef60d3478c0779d7
Reviewed-on: http://git-master/r/46943
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

Rebase-Id: Rae65b78f6a831457b17c6ebcdd02a13c7d90160d

7 years agovideo: tegra: dc: fix CEA timings for hdmi
Jon Mayo [Wed, 20 Jul 2011 20:49:15 +0000]
video: tegra: dc: fix CEA timings for hdmi

Fixes the issue that timings are 1 clock too long in 720p and 1080p.

Bug 847774

Original-Change-Id: I3925ec1e64537daa27d6e697abe522ea17a87e1e
Reviewed-on: http://git-master/r/42488
Reviewed-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-by: Jonathan Mayo <jmayo@nvidia.com>
Tested-by: Jonathan Mayo <jmayo@nvidia.com>

Rebase-Id: Rafbae1d4ae46bb13509af7ca59709e9f526bf6eb

7 years agovideo: dsi: tegra: Add fields to store chip info
Animesh Kishore [Wed, 10 Aug 2011 12:04:48 +0000]
video: dsi: tegra: Add fields to store chip info

Add fields for chip id and revision.

Bug 837129

Original-Change-Id: I2ed5496f86967b06c40cd8e07e8be572952fc172
Reviewed-on: http://git-master/r/46348
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: Re205f5a2640d5320785ca94fde583efbafbcf24b

7 years agovideo: tegra: dsi: fix unused variable warning
Jon Mayo [Wed, 3 Aug 2011 01:51:03 +0000]
video: tegra: dsi: fix unused variable warning

This change removes the unused variable 'base_clk' warning.

Bug 850852

Original-Change-Id: I055313030fcecf1bce64e68f962995aa70c4359d
Reviewed-on: http://git-master/r/46419
Tested-by: Jonathan Mayo <jmayo@nvidia.com>
Reviewed-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-by: Jonathan Mayo <jmayo@nvidia.com>

Rebase-Id: R33afa9192e2e74f1a7b7ff64ce74233d251e8c52

7 years agoDocumentation: Add documentation for tegra_dc_ext
Robert Morell [Sat, 16 Jul 2011 00:38:26 +0000]
Documentation: Add documentation for tegra_dc_ext

tegra_dc_ext is the extended interface that exposes unique features for
the NVIDIA Tegra display controller.

Original-Change-Id: Ic18087a8fd8a60a6bc1b244361c15a1ed44cced4
Signed-off-by: Robert Morell <rmorell@nvidia.com>
Reviewed-on: http://git-master/r/41348
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: Red37e229b1606096c47f6ff0dfb3106ea43b2d69

7 years agovideo: tegra: dc_ext: Add head status ioctl
Robert Morell [Wed, 25 May 2011 02:27:57 +0000]
video: tegra: dc_ext: Add head status ioctl

This change adds a new tegra_dc_ext ioctl to allow userspace to query
whether a head is currently enabled or not.  This is necessary for the X
server to be able to restore the outputs that were enabled before it was
started.

bug 818525

Original-Change-Id: I6d209894081312621f623a722cdd3fcb53553c61
Signed-off-by: Robert Morell <rmorell@nvidia.com>
Reviewed-by: Aaron Plattner <aplattner@nvidia.com>
Reviewed-by: Olof Johansson <olofj@chromium.org>
Reviewed-on: http://git-master/r/40530
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: Re42eae066099587529fbcc677c06ddefef18d36d

7 years agovideo: tegra: Expose vblank syncpoint
Robert Morell [Mon, 21 Mar 2011 21:42:51 +0000]
video: tegra: Expose vblank syncpoint

This change adds support for userspace to query the syncpoint that
display autoincrements every vblank.  This can be useful for
applications to time buffer submissions to throttle rendering and
prevent excessive host stalls.

bug 818525

Original-Change-Id: I050e4dcd08609da802f10eeec5b70da181b21717
Signed-off-by: Robert Morell <rmorell@nvidia.com>
Reviewed-on: http://git-master/r/40529
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: Rac929d8ba6b14e469fef4c2753b040e02fae0b8e

7 years agovideo: tegra: Expose possible bound head mask
Robert Morell [Mon, 21 Mar 2011 21:42:35 +0000]
video: tegra: Expose possible bound head mask

This change adds support for userspace to query which heads an output
may be bound to.  Since our implementation currently hardcodes the head
to output mapping, we currently always fill in a single bit.  However,
for future implementations we will be able to dynamically bind outputs
to heads.

bug 818525

Original-Change-Id: Ib0dead7748620a538c8f8d6ef548ca8b13a9c2b2
Signed-off-by: Robert Morell <rmorell@nvidia.com>
Reviewed-on: http://git-master/r/40528
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: R524f90dca82a3a67fa3289a3ebc4c7e32716749b

7 years agovideo: tegra: Add userspace CSC control
Robert Morell [Mon, 21 Mar 2011 21:32:29 +0000]
video: tegra: Add userspace CSC control

This adds configurability of the per-window color space conversion
support in the Tegra display controller through the dc extension
interface.  The CSC matrix defaults to its previously-hardcoded values,
but can be overridden by userspace.

bug 818525

Original-Change-Id: I00d8e48dd38a40e5b8c36d4624d31c834e5cd9de
Signed-off-by: Robert Morell <rmorell@nvidia.com>
Reviewed-on: http://git-master/r/40527
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: R1f445ab544b4c06f56dde1e3f0e9db3c930a9c14

7 years agovideo: tegra: Allow fractional input rects
Robert Morell [Fri, 18 Mar 2011 00:56:49 +0000]
video: tegra: Allow fractional input rects

This change makes the input rect for Tegra windows be a 20.12
fixed-point number instead of an integer.  This allows software to
specify sub-pixel precision.

bug 818525

Original-Change-Id: I130f63b68159ed896d1113ea537307997875ca40
Signed-off-by: Robert Morell <rmorell@nvidia.com>
Reviewed-on: http://git-master/r/40526
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: R848e901645aa49776d4dc41fa4210b6b594a8d84

7 years agodrm_fixed: Add dfixed_frac
Robert Morell [Fri, 18 Mar 2011 00:54:39 +0000]
drm_fixed: Add dfixed_frac

This helper macro retrieves the fractional part of a fixed20_12 20.12
fixed-point number.

bug 818525

Original-Change-Id: Ia43a7bd3029a4d09ad7801099cbe2a52a4fc9c04
Signed-off-by: Robert Morell <rmorell@nvidia.com>
Reviewed-on: http://git-master/r/40525
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: R3ad51cd6fb0e1dadbc25807bf12894a9b81e94d3

7 years agovideo: tegra: Only attempt filtering when supported
Robert Morell [Fri, 18 Mar 2011 01:02:00 +0000]
video: tegra: Only attempt filtering when supported

The Tegra display windows are not entirely symmetric; only some of them
support filtering in either direction.  This change makes the kernel
only enable filtering when it's supported by the hardware.

bug 818525

Original-Change-Id: I0f85f52fcc5c6785c75003c54c8aee12fcd0a220
Signed-off-by: Robert Morell <rmorell@nvidia.com>
Reviewed-on: http://git-master/r/40524
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: R7306a484983f91d501bcb122d5fc3cf25c5006d7

7 years agovideo: tegra: Add vblank syncpts as client managed
Peter Pipkorn [Wed, 19 Jan 2011 13:35:26 +0000]
video: tegra: Add vblank syncpts as client managed

This change adds the vblank syncpoints to the list of client managed
syncpoints, since they are incremented outside driver control.

This makes the check_max function return true, since previously
the max value was never incremented, leading to the situation that
a syncpoint read failed.

bug 818525

Original-Change-Id: Ie7810aab3842b94964a95a7d8256527168b98a31
Signed-off-by: Aaron Plattner <aplattner@nvidia.com>
[small commit message edits by rmorell]
Signed-off-by: Robert Morell <rmorell@nvidia.com>
Reviewed-on: http://git-master/r/40523
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: Rd4e5529a6ad9c82b11eaa70e588f780bf5f3b533

7 years agovideo: tegra: Wire up output connectedness
Robert Morell [Thu, 3 Mar 2011 23:04:19 +0000]
video: tegra: Wire up output connectedness

This makes the core dc driver keep track of whether a particular input
in enabled.  It is up to the output ops to maintain the connected status
if a detect op is plugged in, otherwise it is assumed that the output is
always connected.

bug 818525

Original-Change-Id: I794d7e2db347f63bbb1a7d80bca1a53d9d10c210
Signed-off-by: Robert Morell <rmorell@nvidia.com>
Reviewed-on: http://git-master/r/40522
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: Rfeeae486b6a39b95d9f1d95b697132b476735f50

7 years agovideo: tegra: Implement fops->poll() for control device
Robert Morell [Tue, 1 Mar 2011 23:33:15 +0000]
video: tegra: Implement fops->poll() for control device

This is necessary for select() and poll() to work properly when clients
are waiting for events.

bug 818525

Original-Change-Id: If98b3e0706495884834813c9a352b946352cc2f5
Signed-off-by: Robert Morell <rmorell@nvidia.com>
Reviewed-on: http://git-master/r/40521
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: Rc8813923838bada46d87d71ef852960316eda2f7

7 years agovideo: tegra: Add control device to dc extension driver
Robert Morell [Thu, 3 Mar 2011 23:02:53 +0000]
video: tegra: Add control device to dc extension driver

This device exposes control over everything that's not specific to one
of T20's two display controllers.  It supports:
- output devices
- event delivery
- hotplug events

bug 818525

Original-Change-Id: I3a46f1dddc483b08ed3ee91a4f9c64111c1fd7eb
Signed-off-by: Robert Morell <rmorell@nvidia.com>
Reviewed-on: http://git-master/r/40520
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: R9e49fe41f3327b797ec65c3729f4f94edbb45307

7 years agovideo: tegra: Prevent hang when output disabled
Robert Morell [Fri, 4 Mar 2011 04:54:09 +0000]
video: tegra: Prevent hang when output disabled

This adds code to track when the dc is disabled and prevent flips or
cursor moves.  This prevents system hangs since the dc is powergated
when it's disabled.

bug 818525

Original-Change-Id: I061da1f6a831fa14a216520e603e0fbc5dbb0437
Signed-off-by: Robert Morell <rmorell@nvidia.com>
Reviewed-on: http://git-master/r/40519
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: Rb648ef48bd3528344cf090c49093dcb258c20150

7 years agovideo: tegra: Add cursor support to dc extensions
Robert Morell [Fri, 18 Feb 2011 23:51:38 +0000]
video: tegra: Add cursor support to dc extensions

This change adds full support for specify the cursor image and
manipulating its position.

bug 818525

Original-Change-Id: I101a951aff358b0ac0998afc6fe5f6c5c4d37c64
Signed-off-by: Robert Morell <rmorell@nvidia.com>
Reviewed-on: http://git-master/r/40518
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: R93f0c68a14e4419f200a77d48a17eb8862f2e4e1

7 years agovideo: tegra: Move pin function to new util file
Robert Morell [Wed, 23 Feb 2011 01:15:06 +0000]
video: tegra: Move pin function to new util file

This will be used in forthcoming cursor support in addition to the
existing overlay flipping support.

bug 818525

Original-Change-Id: Ic27267deeaefad4ec803eb457a02b22c0d9a1373
Signed-off-by: Robert Morell <rmorell@nvidia.com>
Reviewed-on: http://git-master/r/40517
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: Rc1e18fe5248f9dfd1f9ee23184cd2c102539ca61

7 years agovideo: tegra: nvhost: Use a syncpoint per window
Robert Morell [Thu, 3 Mar 2011 22:58:06 +0000]
video: tegra: nvhost: Use a syncpoint per window

Reserve one syncpoint per window per display controller instead of one
for the entire display controller.  This is necessary to allow multiple
windows on a single display controller to flip asynchronously.

bug 818525

Original-Change-Id: Ide1de2bf2ed0bfea7f6abe9aa93815efd0824db1
Signed-off-by: Robert Morell <rmorell@nvidia.com>
Reviewed-on: http://git-master/r/40516
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: R49886938a74e71db0c8f53edc8ac45e5015ffe84

7 years agovideo: tegra: Remove fbdev SET_NVMAP and FLIP ioctls
Robert Morell [Thu, 3 Mar 2011 22:24:25 +0000]
video: tegra: Remove fbdev SET_NVMAP and FLIP ioctls

This is necessary so that multiple clients can open /dev/fb* at the same
time.  The functionaly has been moved to the dc extension device nodes.

bug 818525

Original-Change-Id: I299e060fce3bb9e3cbf976f3d94dbabc4b3f1654
Signed-off-by: Robert Morell <rmorell@nvidia.com>
Reviewed-on: http://git-master/r/40515
Reviewed-by: Jonathan Mayo <jmayo@nvidia.com>

Rebase-Id: R32908db3f1e344eea13d628f0341600ed698783d

7 years agovideo: tegra: Implement FLIP dc extension ioctl.
Robert Morell [Wed, 16 Feb 2011 18:45:53 +0000]
video: tegra: Implement FLIP dc extension ioctl.

This is very similar to the tegra_fb FLIP ioctl.

bug 818525

Original-Change-Id: Iba32ab5bf730b575477c62a8ae4394f1779ef65e
Signed-off-by: Robert Morell <rmorell@nvidia.com>
Reviewed-on: http://git-master/r/40514
Reviewed-by: Jonathan Mayo <jmayo@nvidia.com>

Rebase-Id: R9a79363b09d2df38bec4b8a8666f97b1feff76ff

7 years agovideo: tegra: Add an ioctl() implementation.
Robert Morell [Wed, 16 Feb 2011 02:13:36 +0000]
video: tegra: Add an ioctl() implementation.

This implements:
- GET_WINDOW
- PUT_WINDOW
and adds a stub for FLIP.

bug 818525

Original-Change-Id: I467b58a77242b2a8077e236106b542b8545f5353
Signed-off-by: Robert Morell <rmorell@nvidia.com>
Reviewed-on: http://git-master/r/40513
Reviewed-by: Jonathan Mayo <jmayo@nvidia.com>

Rebase-Id: R4fc354fdae76f3eac189d481fb346a0982146db5

7 years agovideo: tegra: Add skeleton support for extensions
Robert Morell [Thu, 3 Mar 2011 21:04:00 +0000]
video: tegra: Add skeleton support for extensions

This adds the infrasturcture for an enhanced driver interface to program
extended capabilities of the Tegra display controller.

It exposes a new set of device nodes for userspace clients distinct from
the traditional fbdev device nodes.  This is necessary due to
limitations in the fbdev infrastructure that don't allow drivers to
store file-private data.

bug 818525

Original-Change-Id: I06cecf894792b9904c73f9ebcdeb746ff7455f6e
Signed-off-by: Robert Morell <rmorell@nvidia.com>
Reviewed-on: http://git-master/r/40512
Reviewed-by: Jonathan Mayo <jmayo@nvidia.com>

Rebase-Id: Rfa3969804d7f52c841be1ff96305c9463077e1c5

7 years agovideo: tegra: Add flags to tegra_overlay.h
Robert Morell [Mon, 11 Jul 2011 20:30:23 +0000]
video: tegra: Add flags to tegra_overlay.h

These were missing from tegra_overlay.h, but present in tegrafb.h.

bug 818525

Original-Change-Id: Ia174516a068dd3c53d462eb9c68b3e76e0ea25ff
Signed-off-by: Robert Morell <rmorell@nvidia.com>
Reviewed-on: http://git-master/r/40511
Reviewed-by: Jonathan Mayo <jmayo@nvidia.com>

Rebase-Id: R8b80f31a7b2de86c3032cf3f0fad59e838b9eac4

7 years agotegra: host: fix the compare statement.
Jubeom Kim [Tue, 9 Aug 2011 09:22:24 +0000]
tegra: host: fix the compare statement.

Original-Change-Id: Ie1c1aaf2a994193897fc8cc88768e40fb8479b6b
Reviewed-on: http://git-master/r/46028
Tested-by: Jubeom Kim <jubeomk@nvidia.com>
Reviewed-by: Donghan Ryu <dryu@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

Rebase-Id: R2f161c994ef58f20a0ec639964f84c6ebc139467

7 years agovideo: backlight: tegra: add callback to tegra_pwm_backlight
Matt Wagner [Fri, 22 Jul 2011 07:13:08 +0000]
video: backlight: tegra: add callback to tegra_pwm_backlight

tegra-pwm-backlight now has a notify function that enables the
brightness to be passed back to the boardfile where it is modified.

Bug 854820

Original-Change-Id: I1425d801f77987485b58c3cbedae464b5db88444
Reviewed-on: http://git-master/r/42639
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: R156ca05e91b04723146628b1b1abcef31a43795a

7 years agovideo: tegra: host: 3d clock scaling
Ilan Aelion [Fri, 15 Jul 2011 18:05:01 +0000]
video: tegra: host: 3d clock scaling

Adds support for 3d clock scaling based on the 3d module idle
time percentage.

Original-Change-Id: I4d3a70d372b9a8bd6f999e71e135fcd35673e18f
Reviewed-on: http://git-master/r/41250
Tested-by: Ilan Aelion <iaelion@nvidia.com>
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>

Rebase-Id: R64b86250fce24e3b43d70ffd316e9de518eb24ba

7 years agoarm:video:dc Audio EDID improvements
ScottPeterson [Tue, 26 Jul 2011 21:54:14 +0000]
arm:video:dc Audio EDID improvements

Finer grain determination of audio capabilities
for HDMI devices. TO enable audio we have to have
basic audio supported in the EDID plus at least one
Short Audio Descriptor block.

Reviewed-on: http://git-master/r/43304
(cherry picked from commit aaadcb7a4f8501dc71c6185e111fab1427bb7286)

Original-Change-Id: I30c818cdc77ccb351f304bd3639f28a5d370f36b
Reviewed-on: http://git-master/r/45568
Reviewed-by: Jonathan Mayo <jmayo@nvidia.com>
Reviewed-by: Sumit Bhattacharya <sumitb@nvidia.com>
Reviewed-by: Scott Peterson <speterson@nvidia.com>
Tested-by: Scott Peterson <speterson@nvidia.com>

Rebase-Id: R608c722e0481a4e2a4f8294c4358569f7970e722

7 years agovideo: tegra: host: Add ioctl to set/get clk rate
Prashant Gaikwad [Tue, 2 Aug 2011 15:33:59 +0000]
video: tegra: host: Add ioctl to set/get clk rate

Host modules are initialized to max rate. Not all use cases
require clocks at max rate, which increases the power consumption.
Modules from user space can request for the lower clk rate
using this ioctl.

Bug 850467

Original-Change-Id: I1c7a8dfd159460e7c5a27813e3a08a992a20c132
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-on: http://git-master/r/44579
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

Rebase-Id: R0cffab971c5ac6adde28af4777354a1ecae4c54d

7 years agovideo: tegra: nvmap: Add debugfs for iovmm allocations.
Krishna Reddy [Thu, 4 Aug 2011 22:14:49 +0000]
video: tegra: nvmap: Add debugfs for iovmm allocations.

Original-Change-Id: Ic50111924d7adf7838926cb534bbf841b7e8003a
Reviewed-on: http://git-master/r/45358
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: R6399e487b817aa16c39e685d3f7860d1eefa8b09

7 years agodriver: video: dc: Add check_ref_to_sync() in dc.
Kevin Huang [Tue, 2 Aug 2011 01:04:18 +0000]
driver: video: dc: Add check_ref_to_sync() in dc.

Add new function to check display timing restrictions.

Bug 847774

Original-Change-Id: I986f0211bafcdd0223257fe07863e8a79f03388c
Reviewed-on: http://git-master/r/44409
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: R88a1d1358640b7118074e2efa964d56a3e524f74

7 years agovideo: tegra: dsi: Optimize DSI suspend flow.
Kevin Huang [Fri, 5 Aug 2011 22:50:55 +0000]
video: tegra: dsi: Optimize DSI suspend flow.

- Added power saving mode to reduce power consumption. It supports
disable whole dsi module, source clock and panel in early suspend.
- Fixed synpt error in DSI resume.

Bug 859593
Bug 858500

Original-Change-Id: I9a734db2192776a2a66ecf2b9075b3d50356e4e8
Reviewed-on: http://git-master/r/45681
Reviewed-by: Chih-Lung Huang <lhuang@nvidia.com>
Tested-by: Chih-Lung Huang <lhuang@nvidia.com>
Reviewed-by: Jonathan Mayo <jmayo@nvidia.com>

Rebase-Id: R5f508e0bfbaa840efc1bb8cf4f12d9707dd7cedf

7 years agovideo: tegra: dc: window bandwidth calculations
Michael Frydrych [Tue, 2 Aug 2011 13:05:33 +0000]
video: tegra: dc: window bandwidth calculations

Determine which windows are overlapping, and apply bandwidth calculations
for emc clock scaling and latency allowance appropriately.

Bug 856234
Bug 850602

Original-Change-Id: If587c46e8929b3885b25125f054f5cc2d22b2b58
Reviewed-on: http://git-master/r/44772
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: R841ce1734a7afab1311d3367a72ba9755d6d539c

7 years agovideo: dsi: tegra: Export dsi functions
Animesh Kishore [Fri, 5 Aug 2011 12:51:03 +0000]
video: dsi: tegra: Export dsi functions

Export following functions:
- panel read
- panel write
- register write
- register read

Bug 830296

Original-Change-Id: Ie0854e0b8eb213ac2c7fd54f8883ec28e523e1a3
Reviewed-on: http://git-master/r/45529
Reviewed-by: Animesh Kishore <ankishore@nvidia.com>
Tested-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-by: Hanumanth Venkateswa Moganty <vmoganty@nvidia.com>

Rebase-Id: R69d9bed3b6c66384316a849bd646726cd321b1b2

7 years agovideo: tegra: dc: Set PWM pin to SFIO in default
Min-wuk Lee [Tue, 2 Aug 2011 02:39:53 +0000]
video: tegra: dc: Set PWM pin to SFIO in default

Set PWM pin to SFIO before it is configured to DC output pin:
Having too early SFIO setting for this pin makes black screen
in display transition from bootloader to kenel and android
since backlight can be turned off.

Bug 858120

Original-Change-Id: I952aa73c50d1df57b1cedf0a5f9ffee0044048ea
Reviewed-on: http://git-master/r/44304
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: R89903c1f14f1b867638834bd1581d8637b079c94

7 years agovideo: tegra: nvmap: include mm.h
Robert Morell [Wed, 16 Feb 2011 23:38:25 +0000]
video: tegra: nvmap: include mm.h

This is needed to pick up definitions for pgprot*

bug 818525

Original-Change-Id: Idc2de3564eeba9d1bbb7c7211c9c707bc760d14f
Signed-off-by: Robert Morell <rmorell@nvidia.com>
Reviewed-on: http://git-master/r/40510
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: Rb4c7f3cee9d813549bedb53b5fd7ed760f9a32d5

7 years agovideo: tegra: write permission only for User.
Sachin Nikam [Thu, 4 Aug 2011 12:47:25 +0000]
video: tegra: write permission only for User.

Giving write permission only for User for sysfs nodes
stereo_mode and stereo_orientation.
This is needed to fix the CtsPermissionTestCase.

Bug 859437

Original-Change-Id: I3f93290367a1e68cbc618b5d8ec84a27baa14152
Signed-off-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-on: http://git-master/r/45010
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

Rebase-Id: R2038af5a5346062336bae102f799a8460dcef195

7 years agonvhost: Add IOCTL to read 3D registers
Terje Bergstrom [Wed, 8 Jun 2011 10:07:23 +0000]
nvhost: Add IOCTL to read 3D registers

Add IOCTL to read values from registers of 3D unit.

Bug 716734

Original-Change-Id: I5e85429d67433d6dadb4a853ce32901a9e66ab74
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/38035
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
Reviewed-by: Daniel Willemsen <dwillemsen@nvidia.com>

Rebase-Id: Rd4f9a38eac423fa9fbdc685647e32be1dc134d53

7 years agovideo: tegra: add 504MHz pll_d rate for HDMI
Joseph Lehrer [Wed, 22 Jun 2011 20:58:28 +0000]
video: tegra: add 504MHz pll_d rate for HDMI

To support the 25.2MHz pixel clock frequency required for CEA-861-B format 1: 640x480p at 59.94Hz

bug 837571

(cherry picked from commit d03e629f3f428d0666a559e8a5c5f94419107ad3)

Original-Change-Id: I4f12b9333f31a2df6b1029acf5faffb7802f170c
Reviewed-on: http://git-master/r/40380
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: Re7907dc7bb4b61cd1af284a722a2b208d34e4687

7 years agovideo: tegra: dc: Add basic audio EDID
ScottPeterson [Wed, 20 Jul 2011 20:29:10 +0000]
video: tegra: dc: Add basic audio EDID

Add support so that when the EDID is read from
an HDMI display we set the spk_alloc flag to
Left+Right, even if the optional SPeaker Allocation
Block is not present. This provides a default audio
configuration.

Bug  849686

Reviewed-on: http://git-master/r/42173
(cherry picked from commit 13bbb59bfe687944923bceb1b2f60020546ce082)

Original-Change-Id: I8306f261a7cbc640693d777c2a2453c2ef1da6b3
Reviewed-on: http://git-master/r/44610
Tested-by: Scott Peterson <speterson@nvidia.com>
Reviewed-by: Scott Peterson <speterson@nvidia.com>

Rebase-Id: R970aebba6518b2a38de1d51dcf6ba1475688c72f

7 years agovideo: tegra: nvmap: handle free null conditions
Ken Adams [Mon, 1 Aug 2011 19:21:33 +0000]
video: tegra: nvmap: handle free null conditions

Original-Change-Id: I75e88d6cef2daf625c6ede38a937207b95e2b84c
Reviewed-on: http://git-master/r/44364
Reviewed-by: Ken Adams <kadams@nvidia.com>
Tested-by: Ken Adams <kadams@nvidia.com>
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

Rebase-Id: Rd79c4aac3d3e03e601be5b35934fe36a35cd358f

7 years agovideo: dsi: tegra: Fix init sequence for burst mode
Animesh Kishore [Mon, 1 Aug 2011 18:01:13 +0000]
video: dsi: tegra: Fix init sequence for burst mode

Correct initialisation sequence

Bug 832439

Original-Change-Id: I0acc386a6cf366b4abf43a946deb982b69c1f171
Reviewed-on: http://git-master/r/44355
Reviewed-by: Animesh Kishore <ankishore@nvidia.com>
Tested-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

Rebase-Id: Rd7809a5eebfff8ed0753f380fb02583bdbc05509

7 years agonvhost: Re-enabled power gating of MPE
Terje Bergstrom [Mon, 25 Jul 2011 11:18:04 +0000]
nvhost: Re-enabled power gating of MPE

Revert a change that accidentally disabled power gating of MPE.

Bug 854015,854706

Original-Change-Id: I04cc90de4fd4ead37821011a84df7331e96fc62e
Reviewed-on: http://git-master/r/43047
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: R3a813002fac2cb2ee8b70042db3e61bea88e1462

7 years agovideo:tegra:dsi Add dsi one-shot mode support.
Kevin Huang [Tue, 12 Jul 2011 19:33:36 +0000]
video:tegra:dsi Add dsi one-shot mode support.

Add support for DSI one-shot mode in dsi driver.

Bug 848524

Original-Change-Id: Ic849d00775c8f08c202496abbd5dc49b141178a9
Reviewed-on: http://git-master/r/35810
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: R71c9fa4a4b887b53fbae0d2097b44d3d26d9ac0e

7 years agovideo: tegra: dc: use a delayed_work on hdcp
Donghan Ryu [Wed, 27 Jul 2011 22:43:01 +0000]
video: tegra: dc: use a delayed_work on hdcp

hdmi modeset triggers to re-start hdcp and trying to negotiate
too early can cause HDCP failure. using delayed_work can avoid
this situation by starting HDCP a little bit late

Bug 855002

Original-Change-Id: Ic54a6f156845d911e2631b755284362026474012
Reviewed-on: http://git-master/r/43694
Reviewed-by: Donghan Ryu <dryu@nvidia.com>
Tested-by: Donghan Ryu <dryu@nvidia.com>
Reviewed-by: Jonathan Mayo <jmayo@nvidia.com>

Rebase-Id: R353eadbf83e4ee9bb6dd280898eccaaccc021d1a

7 years agovideo: tegra: dc: fix division by zero
Jon Mayo [Wed, 20 Jul 2011 20:51:19 +0000]
video: tegra: dc: fix division by zero

Fixed the issue where comparing the pixel clocks of two modes can have a
subtraction result of 0, when this is passed to PICOS2KHZ a divide by
zero occurs.

Bug 850852

Original-Change-Id: I6cb22af6f1bbadd412d033982cbfb2ae31793b55
Reviewed-on: http://git-master/r/42241
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: Rc46985f9393b16e227aaa3f32d211babd5de1485

7 years agoARM: tegra: dc: Disable EDID dump
Artiste Hsu [Wed, 20 Jul 2011 02:45:31 +0000]
ARM: tegra: dc: Disable EDID dump

tegra_edid_dump() causes audio noise when plugin HDMI cable during
video playback and should not be enabled by default.

Bug 837728

(cherry picked from commit Ib06926e30420c0aa26c7a6a3949429bbd3f2f9e1)

Original-Change-Id: Ibd1e817db0a017a8543288a9b8525a4d71cba9cc
Reviewed-on: http://git-master/r/42783
Tested-by: ChihJen Hsu <chhsu@nvidia.com>
Reviewed-by: Jonathan Mayo <jmayo@nvidia.com>

Rebase-Id: R508e1a028e0adf14127f5eb64c7750f584402d0f

7 years agovideo: tegra: nvmap: Allow cache maint for write combine memory.
Krishna Reddy [Mon, 25 Jul 2011 18:49:54 +0000]
video: tegra: nvmap: Allow cache maint for write combine memory.

Map uncahced memory as uncached, inner cached as inner cached and
cached as cached.

Bug 841109

Original-Change-Id: Id92532828ab2e69bac80b20f2be2fc243e4db888
Reviewed-on: http://git-master/r/43078
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Tested-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-by: Kaz Fukuoka <kfukuoka@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>

Rebase-Id: R75168ffeab3c91d3080b53d4d66c4e550d6f9e12

7 years agoARM: tegra: clock: Optimize power consumption of DSI module.
Kevin Huang [Wed, 27 Jul 2011 00:49:43 +0000]
ARM: tegra: clock: Optimize power consumption of DSI module.

- Disable phy clock at early suspend.
- Set DSI to LP mode at early suspend

Bug 847254
Bug 848069

Original-Change-Id: Ia53fa3be5280172bc5aede12cef3ca06e07ea7f5
Reviewed-on: http://git-master/r/39245
Reviewed-by: Kevin Huang <kevinh@nvidia.com>
Tested-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-by: Jonathan Mayo <jmayo@nvidia.com>

Rebase-Id: Ra178934e0a17a698d353ddbe7bbf4c5631972189

7 years agonvhost: Disable 3D power gating due to hangs
Terje Bergstrom [Wed, 27 Jul 2011 05:26:50 +0000]
nvhost: Disable 3D power gating due to hangs

After 3D power gating was enabled, the system has exhibited hanging sync
points. This patch disables 3D power gating for all systems.

Bug 855392,855889

Original-Change-Id: I35c933e31223aacbc2a088793e5c799f2f1ff0ec
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/43427
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Andrew Howe <ahowe@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>

Rebase-Id: Rb12cb046a1b60fb33b267721b283caf828b26196

7 years agotegra: video: dc: Fix no audio after res. change
Sumit Bhattacharya [Fri, 22 Jul 2011 11:09:37 +0000]
tegra: video: dc: Fix no audio after res. change

Avoid reseting eld_retrieved flag during tegra_dc_hdmi_disable(). It
will ensure if tegra_dc_hdmi_disable() is called due to resolution
change, cached eld data is used. It will be reset to zero if during
hotplug HDMI driver fails to get valid eld data.

Bug 854284

Original-Change-Id: I08c8f48eded0c6a469faf63d601f28627a71602f
Reviewed-on: http://git-master/r/42599
Tested-by: Sumit Bhattacharya <sumitb@nvidia.com>
Reviewed-by: Scott Peterson <speterson@nvidia.com>

Rebase-Id: Rb9636052979360707443ecc151a758f574b03a21

7 years agovideo: tegra: dc: fix delay on hdmi modeset
Donghan Ryu [Tue, 26 Jul 2011 21:34:18 +0000]
video: tegra: dc: fix delay on hdmi modeset

wait_event_interruptible_timeout checks the condition before
it enters a sleep. Adding a real condition to the function
avoids an un-wanted aditional sleep.

Bug 833476

Original-Change-Id: I03072d1c3b6efb48e20ed42b55ee2d844a29fbbc
Reviewed-on: http://git-master/r/43225
Reviewed-on: http://git-master/r/43426
Reviewed-by: Donghan Ryu <dryu@nvidia.com>
Tested-by: Donghan Ryu <dryu@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

Rebase-Id: Rcb4571b19c3c3499d7bfbfdfae040c6bf454a284

7 years agovideo: tegra: dc: fix tiled memory efficiency
Xin Xie [Thu, 7 Jul 2011 21:05:04 +0000]
video: tegra: dc: fix tiled memory efficiency

Tegra3 also supports LPDDR2 which has no tiled memory inefficiency as in DDR3.
This patch adds one memory controller API to retrive tiled memory efficiency.

BUG 847731

Original-Change-Id: I407914c6035389b696040947e7aebc6ecdb92bb1
Reviewed-on: http://git-master/r/40074
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: R79cf21f12584fed81a67abd05cf62407127741aa

7 years agovideo: tegra: dsi: Fix DC & DSI clock issue.
Kevin Huang [Fri, 15 Jul 2011 09:31:19 +0000]
video: tegra: dsi: Fix DC & DSI clock issue.

- Balance the clock disable/enable in DSI module to fix the issue that
DC can't be disabled in suspend.

Bug 847254

Original-Change-Id: I1beaab6d0ba96e9b886526c1f07107b8d27bcf94
Reviewed-on: http://git-master/r/41180
Reviewed-by: Kevin Huang <kevinh@nvidia.com>
Tested-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-by: Chih-Lung Huang <lhuang@nvidia.com>
Tested-by: Chih-Lung Huang <lhuang@nvidia.com>
Reviewed-by: Jonathan Mayo <jmayo@nvidia.com>

Rebase-Id: Rfa9c3d7db30920baaea79bc7d05f3a92404e18ec

7 years agotegra: video: dc: disp1 and overlay at 204MHz
Vinayak Pane [Thu, 21 Jul 2011 02:10:39 +0000]
tegra: video: dc: disp1 and overlay at 204MHz

Overlay was requesting emc 400MHz always during video playback.
Playback happens in overlay which was calculated incorrectly.
Reducing it to match accurate requirement.
Calculate overlay EMC bandwidth requirement same as DC.

Original-Change-Id: I5816d9ca1b42cd04048ca16b3e23e6d6ea312137
Reviewed-on: http://git-master/r/42507
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: Re49bdef16f545771e9c67d999a2805d282a95a92

7 years agonvhost: Set gr2d clocks to minimum and set timeout=0
Mandar Potdar [Thu, 7 Jul 2011 09:38:32 +0000]
nvhost: Set gr2d clocks to minimum and set timeout=0

Set gr2d and related clocks (epp, emc) to minimum.
Set Timeout for 2D only to 0.

bug: 845598
bug: 843716

Original-Change-Id: I1367274469ef290a08c3fb1f348664b3a38fecd7
Reviewed-on: http://git-master/r/39992
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: R5436a0af9c1ef813d06e4201e18d853488fb85ef

7 years agovideo: tegra: dc: disable underflows for fpga
Jon Mayo [Thu, 21 Jul 2011 02:09:59 +0000]
video: tegra: dc: disable underflows for fpga

For non-silicon platforms(fpga and simulation) disable all underflow
interrupts.

Original-Change-Id: Idda78cd5a8e1fda7fac672a259ed05c95876752b
Reviewed-on: http://git-master/r/42286
Reviewed-by: Jonathan Mayo <jmayo@nvidia.com>
Tested-by: Jonathan Mayo <jmayo@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>

Rebase-Id: Rd37cc00d1ad527fae58834be3b225238d1ec8c49

7 years agovideo: tegra: nvmap: Fix cache flush issue during page alloc.
Krishna Reddy [Wed, 6 Jul 2011 21:57:44 +0000]
video: tegra: nvmap: Fix cache flush issue during page alloc.

Bug 39790
Original-Change-Id: I5ce0e35501442ed1a6818aebfeae1670ebb9d08d
Reviewed-on: http://git-master/r/39867
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Tested-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

Rebase-Id: R5679d529af4779bde735d3055b04d368b765c620

7 years agovideo: tegra: check for hdmi peripheral during resume
Sanjay Singh Rawat [Wed, 6 Jul 2011 07:41:28 +0000]
video: tegra: check for hdmi peripheral during resume

As HDMI is not a wakeup source. To detect HDMI peripheral which is
connected after suspend, we scan for it during HDMI resume.

Bug 846365

Signed-off-by: Sanjay Singh Rawat <srawat@nvidia.com>
Reviewed-on: http://git-master/r/39776
(cherry picked from commit fd1134f413845f8e0b3944153eb7406f713a9709)

Original-Change-Id: Idee461e66edce494214814ced3854f716e8a44e3
Reviewed-on: http://git-master/r/41545
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: R01d0a5d61afb386240ae35da73fe12f38e26ed28

7 years agonvhost: Enable 3D powergating
Terje Bergstrom [Tue, 14 Jun 2011 08:04:56 +0000]
nvhost: Enable 3D powergating

Enables 3D power gating on chips that support it.

Bug 793861

Original-Change-Id: Iadc40b65ac4897550d3b0d2076cc7efe98c95dfa
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/37821
Reviewed-by: Narendra Damahe <ndamahe@nvidia.com>
Reviewed-by: Karan Jhavar <kjhavar@nvidia.com>
Tested-by: Karan Jhavar <kjhavar@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

Rebase-Id: Rb7434a80b19c239264ed8758d82b6f41c1b5ec8c

7 years agovideo: tegra: host: Channel based AVP driver
Soumen Kumar Dey [Fri, 15 Jul 2011 06:04:59 +0000]
video: tegra: host: Channel based AVP driver

Reserving syncpoint for channel based AVP driver.

Original-Change-Id: I2829341417a9bdc010ba51f4416d8648b7068b17
Reviewed-on: http://git-master/r/41148
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-by: Kaz Fukuoka <kfukuoka@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Gajanan Bhat <gbhat@nvidia.com>
Tested-by: Gajanan Bhat <gbhat@nvidia.com>
Reviewed-by: Chris Johnson <cwj@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

Rebase-Id: Rffd00ab1a181b331fc5e309f68f61748b8d2bd65

7 years agovideo: tegra: update copyright and comments
Jon Mayo [Thu, 30 Jun 2011 18:20:37 +0000]
video: tegra: update copyright and comments

added correct copyright comment.
removed funny block comments.

Original-Change-Id: I1a86083e3467bba208e5cafc3886a3800cb52e1d
Reviewed-on: http://git-master/r/39246
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: R50e415ae0c7d0f52ab7313a55ad757cec8910d9f

7 years agonvhost: Do not crash if wait syncpt > max
Terje Bergstrom [Thu, 9 Jun 2011 09:39:33 +0000]
nvhost: Do not crash if wait syncpt > max

If user space is waiting for a syncpt value higher than max,
nvhost_wait_timeout() panics the kernel. This panic is based on the
assumption that nobody should wait for sync points higher than indicated
by a submit from user space.

As the API has nothing to disallow waiting for future sync points not
indicated by any submit, this patch removes the panic and treats this as
a normal case.
Bug 843238

Original-Change-Id: I367c46e42bd683f1023e7fe04e523a99ab3d666b
Reviewed-on: http://git-master/r/36470
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Tested-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

Rebase-Id: R18a509f85dfd657c3dcbbd7db1fa95d71113cea0