6 years agoscripts/Kbuild.include: Fix portability problem of "echo -e"
Bernhard Walle [Sun, 26 Feb 2012 17:35:18 +0000]
scripts/Kbuild.include: Fix portability problem of "echo -e"

"echo -e" is a GNU extension. When cross-compiling the kernel on a
BSD-like operating system (Mac OS X in my case), this doesn't work.

One could install a GNU version of echo, put that in the $PATH before
the system echo and use "/usr/bin/env echo", but the solution with
printf is simpler.

Since it is no disadvantage on Linux, I hope that gets accepted even if
cross-compiling the Linux kernel on another Unix operating system is
quite a rare use case.

(Cherry-picked from upstream v3.4 commit
875de98623fa2b29f0cb19915fe3292ab6daa1cb)

Signed-off-by: Bernhard Walle <bernhard@bwalle.de>
Andreas Bieƃ\237mann <andreas@biessmann.de>
Signed-off-by: Michal Marek <mmarek@suse.cz>
Signed-off-by: Nuno Subtil <nsubtil@nvidia.com>

Change-Id: Iddfeae6611a82e76a5d7cecbc1af25d4fdc71ecc
Reviewed-on: http://git-master/r/116918
Reviewed-by: Donghan Ryu <dryu@nvidia.com>
Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>
Tested-by: Nuno Subtil <nsubtil@nvidia.com>

6 years agoCHROMIUM: config: enable DM_CRYPT target
Kees Cook [Thu, 9 Feb 2012 00:53:31 +0000]
CHROMIUM: config: enable DM_CRYPT target

The dm "crypt" target is needed for encrypted /var support.
Additionally, since the expected hash alg will be sha256, built it in,
and ready future support for sha512 as a module.

BUG=chromium-os:22172
TEST=build, boot amd64-generic, verify target listed in "dmsetup targets"

Signed-off-by: Kees Cook <keescook@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/15548
Reviewed-by: Kees Cook <keescook@chromium.org>
Tested-by: Kees Cook <keescook@chromium.org>
Commit-Ready: Kees Cook <keescook@chromium.org>
(cherry-picked from commit 50180f134a6e23be3ce763524b6b5193d848c0f7)

Modified to use:
chromeos/config/config.common.chromeos

instead of:
chromeos/config/base.config

Change-Id: Iac31f59f340f52a7017948fd5add3d316d38a123
Signed-off-by: Rhyland Klein <rklein@nvidia.com>
Reviewed-on: http://git-master/r/117151
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>

6 years agodrivers: net: raw-ip: Add IPv6 support.
Michael Hsu [Wed, 28 Mar 2012 21:57:53 +0000]
drivers: net: raw-ip: Add IPv6 support.

Upon receiving IPv6 packet, set ethernet header's ether type
to 0x86dd.  For transmission of IPv6, nothing extra required,
as the 14 byte ethernet header (containing the 0x86dd ether
type) is already stripped off as part of the raw-ip protocol.

Bug 1010735

Change-Id: Id574a7feeefbde0504ad0ea449dff28340e9356a
Signed-off-by: Michael Hsu <mhsu@nvidia.com>
Reviewed-on: http://git-master/r/113761
(cherry picked from commit 8bdfd06cae7eede4856ef825ea26b69c9ea065ef)
Reviewed-on: http://git-master/r/117148
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Vinayak Pane <vpane@nvidia.com>
Tested-by: Vinayak Pane <vpane@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Steve Lin <stlin@nvidia.com>

6 years agoARM: tegra: clock: Reduce Tegra3 pll post-lock delay
Alex Frid [Sun, 15 Jul 2012 03:11:04 +0000]
ARM: tegra: clock: Reduce Tegra3 pll post-lock delay

Reduced pll post-lock delay from 50us to 2us.

Rearranged wait for lock loop to delay first check of lock bit
by 2us after pll is enabled.

Added read fence for PLLM lock via PMC (in this case enable bit is
in APB bus register, but lock detect bit is in PPSB bus register).

Bug 1017271

Change-Id: Ibc963533854383e884d87be61e1b98e9d54d3ea0
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/115933
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agoARM: tegra: power: Enforce CPU rate range in secondary boot
Alex Frid [Fri, 18 May 2012 05:11:55 +0000]
ARM: tegra: power: Enforce CPU rate range in secondary boot

On Tegra3 make sure cpu rate is within G-mode range before LP to G
mode switch triggered by secondary cpu boot directly from LP mode.

Bug 988544

Change-Id: I0d86fbf0727a6bbf6069159e7c532947a9d0af73
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/115930
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Peter Boonstoppel <pboonstoppel@nvidia.com>
Reviewed-by: Greg Lo <glo@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

6 years agoARM: tegra: clock: relax memory efficiency if 3d clock is off
Peter Zu [Thu, 5 Jul 2012 01:56:48 +0000]
ARM: tegra: clock: relax memory efficiency if 3d clock is off

Bug 1003509

Change-Id: I8fb2c0cff7106671f8470b836ea26c09350d6206
Signed-off-by: Peter Zu <pzu@nvidia.com>
(cherry picked from commit df2dda0438c2aed3a961d197dce7319fefdf5b30)
Reviewed-on: http://git-master/r/115468
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agoARM: tegra: dvfs: add back 916mV & 1007mV entries
Peter Zu [Fri, 6 Jul 2012 00:01:12 +0000]
ARM: tegra: dvfs: add back 916mV & 1007mV entries

Bug 841336

Signed-off-by: Peter Zu <pzu@nvidia.com>
Signed-off-by: Manoj Chourasia <mchourasia@nvidia.com>
Reviewed-on: http://git-master/r/113751
(cherry picked from commit 833f9d47a350358000e9201f77a3c9fd655d2900)

Change-Id: I679093d9d2577625bff3e02e25ffe90d396ea5a6
Reviewed-on: http://git-master/r/116134
Tested-by: Matt Wagner <mwagner@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agoARM: tegra: dvfs: update Tegra3 single-core dvfs table
Peter Zu [Fri, 22 Jun 2012 18:11:49 +0000]
ARM: tegra: dvfs: update Tegra3 single-core dvfs table

Bug 841336

Signed-off-by: Peter Zu <pzu@nvidia.com>
Reviewed-on: http://git-master/r/110587
(cherry picked from commit c0e7904245168cafc426219948ab132a4d832376)

Change-Id: I370f4af1d4ce888ebc71351519c1018b82d91913
Reviewed-on: http://git-master/r/116132
Tested-by: Matt Wagner <mwagner@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agoarm: tegra: pci: unmap/map memory while pwroff/on
Jay Agarwal [Mon, 16 Jul 2012 11:14:15 +0000]
arm: tegra: pci: unmap/map memory while pwroff/on

Rearranged the code to release all memory and res-
ources whenever poweroff is called and re-allocate
them whenever power on is called.

Bug 963969

Change-Id: I31d9cd1e8603e638714bba765aadfdd4eed78d93
Signed-off-by: Jay Agarwal <jagarwal@nvidia.com>
Reviewed-on: http://git-master/r/116048
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agoARM: tegra: reset io dpd mode
Bitan Biswas [Thu, 12 Jul 2012 13:03:37 +0000]
ARM: tegra: reset io dpd mode

Bootloader io dpd settings are cleared during kernel initialization

bug 758856

Change-Id: Ic6d5250a5ae127bb45ab37b9200ca06c8d1f11a2
Signed-off-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-on: http://git-master/r/115395
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agortc: set alarm logging enable
Bitan Biswas [Wed, 18 Jul 2012 12:58:20 +0000]
rtc: set alarm logging enable

Set alarm logs enabled to help understand suspend stress failures

Change-Id: I60644ff0e3fea813ae1140be1b71fc2694d95709
Signed-off-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-on: http://git-master/r/115361
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jinyoung Park <jinyoungp@nvidia.com>
Tested-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

6 years agocpufreq: interactive: clean up sysfs declarations
Ilan Aelion [Mon, 2 Jul 2012 18:27:45 +0000]
cpufreq: interactive: clean up sysfs declarations

Cosmetics: introducing a macro to define unsigned long sysfs nodes.

Change-Id: I594a527dc977437405167237e8d5ac6d3a3167d2
Signed-off-by: Ilan Aelion <iaelion@nvidia.com>
Reviewed-on: http://git-master/r/113020
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Matthew Longnecker <mlongnecker@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agoi2c: tegra: enable/disable clock unconditionally during xfer
Laxman Dewangan [Tue, 17 Jul 2012 14:28:16 +0000]
i2c: tegra: enable/disable clock unconditionally during xfer

Do the clock control for enable/disable during each transfer
regardless of whether clock is always on or not.

If clock is always on then in probe the reference count of the
clock incremented and doing again enable will just increment
reference and disable will decrement the reference count
and so there is no harm on calling enable/disable always
during transfer.

Change-Id: Ibf67413fb84f826f04e890fe3dd2a20cd0469922
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/116473
Tested-by: Bandi Krishna Chaitanya <bandik@nvidia.com>

6 years agoi2c: tegra: remove unused member variable
Laxman Dewangan [Tue, 10 Jul 2012 11:40:21 +0000]
i2c: tegra: remove unused member variable

Remove unused member variable "iomem" of the
i2c device structure.

This variable becomes unused when converted all allocation
to devm_* in following change:
    i2c: tegra: make all resource allocation through devm_*

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Cherry-picked from mainline
57c0dc3e69439a2ddf239226c318d676da773492

Change-Id: I8a3db21524a20ee4cbd1b87dff82bac80a2763de
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/116472
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Bandi Krishna Chaitanya <bandik@nvidia.com>

6 years agoi2c: tegra: i2c slave initialization for non-dvc i2c
Laxman Dewangan [Tue, 17 Jul 2012 14:01:04 +0000]
i2c: tegra: i2c slave initialization for non-dvc i2c

The slave configuration is required for non-dvc i2c.
This can be done by checking the i2c type "is_dvc"
in place of having another variable.

Change-Id: Ia80ba0f7a68e2dfaa13b5da94896b87f2877e047
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/116471
Tested-by: Bandi Krishna Chaitanya <bandik@nvidia.com>

6 years agoRevert "i2c: tegra: Fix i2c unknown interrupt issue"
Laxman Dewangan [Tue, 17 Jul 2012 13:24:24 +0000]
Revert "i2c: tegra: Fix i2c unknown interrupt issue"

This reverts commit 021d8866c80fab07cb4cd2753ed67d0c1b49c174.

The reason for revert the change:
The readback is done at the time of i2c_writel() and hence
it is not require to have this in scattered manner.
This is towards the aligning driver with mainline.

Change-Id: I74184683301d7a3c26550d97fb1ce3596273a0bb
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/116470
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Tested-by: Bandi Krishna Chaitanya <bandik@nvidia.com>

6 years agoi2c: tegra: make sure register writes completes
Laxman Dewangan [Wed, 13 Jun 2012 10:12:36 +0000]
i2c: tegra: make sure register writes completes

The Tegra PPSB (an peripheral bus) queues writes transactions.
In order to guarantee that writes have completed before a
certain time, a read transaction to a register on the same
bus must be executed.
This is necessary in situations such as when clearing an
interrupt status or enable, so that when returning from an
interrupt handler, the HW has already de-asserted its
interrupt status output, which will avoid spurious interrupts.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Cherry-picked from mainline
ec7aaca2f64f509f45d463d784b41d0b3d2be083

Change-Id: I4f064c38993031303bfeef794015efd5517561cc
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/116469
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Tested-by: Bandi Krishna Chaitanya <bandik@nvidia.com>

6 years agoi2c: tegra: make all resource allocation through devm_*
Laxman Dewangan [Wed, 13 Jun 2012 10:12:39 +0000]
i2c: tegra: make all resource allocation through devm_*

Use the devm_* for the memory region allocation, interrupt request,
clock handler request.
By doing this, it does not require to explicitly free it and hence
saving some code.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Cherry-picked from mainline
9cbb6b2b92d0fdade0fe00cc00e3658b44c86676

Change-Id: I0bc86dbd2bd4e460c75f6d425131f9e27bdace71
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/116468
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Tested-by: Bandi Krishna Chaitanya <bandik@nvidia.com>

6 years agoi2c: tegra: Add devexit_p() for remove
Shubhrajyoti Datta [Tue, 20 Dec 2011 06:15:08 +0000]
i2c: tegra: Add devexit_p() for remove

It was originally missed in the __devinit/__devexit annotations.

Signed-off-by: Shubhrajyoti D <shubhrajyoti@ti.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Olof Johansson <olof@lixom.net>

Cherry-picked from mainline
218d06d79468ca2e6abf3679eea12d7d93d251ef

Change-Id: I66db3d8b54ad6635819e5bda677bc789f9f90588
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/116467
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Tested-by: Bandi Krishna Chaitanya <bandik@nvidia.com>

6 years agoi2c: tegra: Add __devinit/exit to probe/remove
Stephen Warren [Sun, 18 Dec 2011 06:29:29 +0000]
i2c: tegra: Add __devinit/exit to probe/remove

This fixes some section mismatch build warnings.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
This is based on mainline
92891da11a3f913b50a685c3facff6a5891a45ba

Change-Id: I40547607818dbc42e5a428bfd98edcf472a7e35e
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/116466
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Tested-by: Bandi Krishna Chaitanya <bandik@nvidia.com>

6 years agoi2c: tegra: rename dev_pm_ops variables/macro
Laxman Dewangan [Tue, 17 Jul 2012 12:51:54 +0000]
i2c: tegra: rename dev_pm_ops variables/macro

To align the downstream to mainline, renaming the
variable/macro of dev_pm_ops as per mainline.

The original change on mainline is:
commit 6a7b3c3c465cef29d92dfc3fbbff0d958aa8be04
Author: Rafael J. Wysocki <rjw@sisk.pl>
    i2c-tegra: Use struct dev_pm_ops for power management

Change-Id: Ica427ee339390a76ac8004bef96b4c12ef4ecae4
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/116465
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Tested-by: Bandi Krishna Chaitanya <bandik@nvidia.com>

6 years agoi2c: tegra: use of_match_ptr() for match_table initialization
Laxman Dewangan [Tue, 10 Jul 2012 11:20:42 +0000]
i2c: tegra: use of_match_ptr() for match_table initialization

In place of defining match_table for non-DT based as NULL,
use of_match_ptr() for initialzing the of_match_table.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>

Cherry-picked from mainline
02d8bf8dc6b09cb810599c64d47da3bdf4f85882
Fixed conflicts.

Change-Id: I71994c49813396ad6b3dfa3fd616d9585203adba
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/116464
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Tested-by: Bandi Krishna Chaitanya <bandik@nvidia.com>

6 years agoarm: tegra3: usb_phy: HSIC rail consumes 4mA in suspend
srinivas [Mon, 16 Jul 2012 10:39:12 +0000]
arm: tegra3: usb_phy: HSIC rail consumes 4mA in suspend

In auto-suspend, removed power downs for HSIC from
 PADS_CFG1 register.

Bug 1011912

Change-Id: I646c196ef9b822ae8d9e12a0f918507fcdd16f0b
Signed-off-by: srinivas <sthaduvai@nvidia.com>
Reviewed-on: http://git-master/r/116044
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agoARM: tegra: tegra2 wakeups header cleanup
Bitan Biswas [Thu, 28 Jun 2012 07:28:41 +0000]
ARM: tegra: tegra2 wakeups header cleanup

Removed the unnecessary function prototypes in Tegra2 wakeups header

Change-Id: Ia41ce72947902cbc483cc85eaefb3a81d091a9b8
Signed-off-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-on: http://git-master/r/111817
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

6 years agoarm: config: tegra3: enable alsa usb audio
Ravindra Lokhande [Thu, 19 Jul 2012 14:22:54 +0000]
arm: config: tegra3: enable alsa usb audio

Change-Id: I6b6348ec3b604bbf9b8e40fe551023cf94b0b153
Reviewed-on: http://git-master/r/117083
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agoARM: mm: cache-l2x0: Implement outer_clean_all()
Kirill Artamonov [Mon, 16 Jul 2012 14:24:00 +0000]
ARM: mm: cache-l2x0: Implement outer_clean_all()

There is already implemented full outer clean routine in
arch/arm/mm/cache-l2x0.c.

Make it possible to use it through outer_cache interface,
like other outer maintenance functions.

bug 983964

Change-Id: I47f1fad536c151c255e6a42d6517114c334ddfef
Reviewed-on: http://git-master/r/116074
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Kirill Artamonov <kartamonov@nvidia.com>
Tested-by: Kirill Artamonov <kartamonov@nvidia.com>
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-by: Justin Paver <jpaver@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agoarm: tegra: PLLX LP/G ports switching ON/OFF
Prem Sasidharan [Thu, 5 Jul 2012 18:56:14 +0000]
arm: tegra: PLLX LP/G ports switching ON/OFF

Enable target PLLX port(LP/G) before cluster switch and disable
the previous PLLX port(LP/G) after cluster switch is finished.
Seeing a power improvement of ~10mW when core operates at
max. voltage and max. frequency.

Bug 997358
Signed-off-by: Prem Sasidharan <psasidharan@nvidia.com>
Change-Id: I9d05245977f9f63a8f4c53b1c6797118d2d8b903
Reviewed-on: http://git-master/r/113399
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agoRevert "mmc: host: Disable SDIO card clock when idle for Tegra 3 only"
Pavan Kunapuli [Mon, 25 Jun 2012 10:07:46 +0000]
Revert "mmc: host: Disable SDIO card clock when idle for Tegra 3 only"

Without the card clock, inband interrupt is not working on
some wifi chips.

Bug 981683

This reverts commit 0467657691ba046b492504272baf7c626d9a3713.

Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-on: http://git-master/r/110826
(cherry picked from commit 33c8e504328387097ed0160082cce6b36b994bd8)
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Change-Id: I6683720a9bda1f779a63133d8ca64a024c5d8a08
Reviewed-on: http://git-master/r/116707
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

6 years agoarm: tegra: p1852: Make TDM1 as 16 channels
Nitin Pai [Thu, 28 Jun 2012 08:50:50 +0000]
arm: tegra: p1852: Make TDM1 as 16 channels

Made TDM1 as 16 channels so that both devices
work in the same configuration.

Bug 1008391

Signed-off-by: Nitin Pai <npai@nvidia.com>
Reviewed-on: http://git-master/r/112090
(cherry picked from commit 4d042a0e613ba1c2d715d6ed47daddd61be14a28)
Change-Id: I622b046b3b36147b82d47f612febb7ae7ba0767c
Reviewed-on: http://git-master/r/116059
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

6 years agoARM: tegra: dvfs: Handle Tegra3 alternative dvfs errors
Rohan Somvanshi [Tue, 3 Jul 2012 12:28:01 +0000]
ARM: tegra: dvfs: Handle Tegra3 alternative dvfs errors

Propagate error to the caller when switching between alternative
cpu dvfs tables. Change dvfs table during cpu hotplug operation
only after the new edp limit is set, and abort bringing cpu core
on-line in case of failure in applying new (less conservative)
table. When cpu core is removed change dvfs table before setting
new edp limit, and ignore error (it is safe to continue with more
conservative table).

Signed-off-by: Alex Frid <afrid@nvidia.com>
(cherry picked from commit 951710ec179fd620a2251d0815ca7bff15da014b)

Change-Id: Ib1ad8e41093fb9bee75d3d6bd18d0ac406da8271
Reviewed-on: http://git-master/r/114779
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

6 years agoARM: tegra: Fix build issue for no-SMP
Alex Waterman [Tue, 10 Jul 2012 00:23:50 +0000]
ARM: tegra: Fix build issue for no-SMP

Fix issues causing the kernel build to fail with CONFIG_SMP not set.

Change-Id: I8c7a49970e55354e38ce41d2d1e0dab00ba78f24
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/114317
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

6 years agommc: tegra: clean up interrupts logic in tuning
Pavan Kunapuli [Wed, 27 Jun 2012 12:21:54 +0000]
mmc: tegra: clean up interrupts logic in tuning

Disable the normal interrupts signalling before
tuning and enable it only after the entire tuning
process is done.

Bug 860102

Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-on: http://git-master/r/111589
(cherry picked from commit 15a97f33f6cf1fc1c25441142f69f62ce5f7029b)
Change-Id: I9eba9af65a50928dc4bb475e06cbf401963751bc
Reviewed-on: http://git-master/r/116433
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

6 years agommc: tegra: Fix SDR50 clock rate configuration
Pavan Kunapuli [Wed, 27 Jun 2012 11:28:10 +0000]
mmc: tegra: Fix SDR50 clock rate configuration

The host clock configuration in SDR50 mode is
incorrectly grouped with DDR50 mode due to which
DDR50 mode clock limits are wrongly applied even
in SDR50 mode.

Bug 965298

Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-on: http://git-master/r/111566
(cherry picked from commit 2ad290d477e8198bace22d2623856555f07b9bf9)

Change-Id: I5d3a446e39a349209e5842d385c1b728bfb7012e
Reviewed-on: http://git-master/r/116428
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Tested-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-by: Naveen Kumar Arepalli <naveenk@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>

6 years agovideo: tegra: dsi: Implement dcs video + host
Animesh Kishore [Wed, 11 Jul 2012 12:25:28 +0000]
video: tegra: dsi: Implement dcs video + host

Send host commands to panel during vertical blanking
of a frame. Implementation is generic enough to
handle both long and short packets.

Bug 1009863

Change-Id: I9a80641df2d8b67eb3649d220c028543b246a5f3
Signed-off-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-on: http://git-master/r/114990
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>

6 years agoarm: tegra: usb: phy code clean up
Venu Byravarasu [Fri, 13 Jul 2012 06:08:04 +0000]
arm: tegra: usb: phy code clean up

Code clean up of usb phy driver

Change-Id: If951ed461b096be76938504d9e1073a70f59860a
Signed-off-by: Venu Byravarasu <vbyravarasu@nvidia.com>
Reviewed-on: http://git-master/r/115339
(cherry picked from commit 6d4046a6f2170dadaf5647f0bf47aa546dd705b0)
Reviewed-on: http://git-master/r/104055
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>

6 years agoregulator: tps80031: adjust tolerance if req minuV > dev minuV
Mallikarjun Kasoju [Tue, 17 Jul 2012 10:34:01 +0000]
regulator: tps80031: adjust tolerance if req minuV > dev minuV

Adjust the tolerance voltage only when requested minimum voltage is
more than the rail's minimum voltage.

bug 997415

Change-Id: Ie139c657f8550adba07b74a0cd5d69e2b53d62c2
Signed-off-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Reviewed-on: http://git-master/r/116405
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

6 years agoARM: tegra: enterprise: allow 3mv tolerance for cpu voltage
Laxman Dewangan [Fri, 22 Jun 2012 06:53:36 +0000]
ARM: tegra: enterprise: allow 3mv tolerance for cpu voltage

Allow 3mv tolerance on minimum voltage side for cpu voltage.
This saves power when system require 900/975mV.

bug 997415

Change-Id: I273cdeda6980f5ddf50be7980bced443b386dae8
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/110524
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agochromeos: config: renormalize cfgs and drop debug_ll
Rhyland Klein [Mon, 16 Jul 2012 19:43:50 +0000]
chromeos: config: renormalize cfgs and drop debug_ll

Renormalize split configs based on current TOT k3.1 kernel and
remove DEBUG_LL to clean up the kernel log a bit.

BUG=None
TEST=Verified generated config doesn't prompt.

Signed-off-by: Rhyland Klein <rklein@nvidia.com>
Change-Id: Ib13e633742a2c4e0060629d145e0571e7a7d5241
Reviewed-on: http://git-master/r/116136
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Allen Martin <amartin@nvidia.com>

6 years agoasoc: tegra: p852: Added machine driver for P852
Nitin Pai [Fri, 6 Jul 2012 11:01:11 +0000]
asoc: tegra: p852: Added machine driver for P852

Renamed P1852 machine driver to VCM so that can be used
for P1852/P852 and E1853 as well.

Bug 1008391

Signed-off-by: Nitin Pai <npai@nvidia.com>
Reviewed-on: http://git-master/r/113886
(cherry picked from commit 5eb23e30bab716b28146b85438989e58761c7136)
Change-Id: I8d1363a6419c6381b8d23ebd38d625fb482084dc
Reviewed-on: http://git-master/r/116056
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Scott Peterson <speterson@nvidia.com>

6 years agoARM: tegra: wake source interrupts enabled
Bitan Biswas [Fri, 13 Jul 2012 10:33:17 +0000]
ARM: tegra: wake source interrupts enabled

Tegra wake source interrupts are only enabled before suspend

bug 904746

Change-Id: Ie9722199b4541f2bac77e47d0c8c7e65d5d8b54d
Signed-off-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-on: http://git-master/r/115655
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

6 years agogpio: tegra: disable non-wake source interrupts
Bitan Biswas [Fri, 13 Jul 2012 10:29:37 +0000]
gpio: tegra: disable non-wake source interrupts

Gpio interrupts for non-wake sources are disabled before suspend

bug 904746

Change-Id: I21f3e5798055cbae7324b1571291eab4538e256f
Signed-off-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-on: http://git-master/r/115654
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User

6 years agodrivers: brcmfmac: update to stable version
Rhyland Klein [Tue, 15 May 2012 16:22:56 +0000]
drivers: brcmfmac: update to stable version

Update the driver to the stable version.

Based on 33252fe66aa42cc1c217b9fd632b5df6c77932c6 from

branch: dev/amartin/chromeos-3.0-t30

Change-Id: I53db887749b8781d90667a07de71abbea390ac5c
Signed-off-by: Rhyland Klein <rklein@nvidia.com>
Reviewed-on: http://git-master/r/111334
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-by: Wei Ni <wni@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agoARM: Tegra3: clocks: optional se.cbus
Mohit Kataria [Wed, 20 Jun 2012 05:29:37 +0000]
ARM: Tegra3: clocks: optional se.cbus

Made se.cbus optional so that se clock can be derived
from other clocks and not just from the clocks which drive cbus.

Added config option for the same.

Bug 978870

Change-Id: I7b5bf405efb58bbb53143f52d2bfe0ebcf6b8322
Signed-off-by: Mohit Kataria <mkataria@nvidia.com>
Reviewed-on: http://git-master/r/110827
(cherry picked from commit 35e9017b79a3a4b4e0b4098cd2e63ad24018d3de)
Reviewed-on: http://git-master/r/106397
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agoARM: tegra: thermal: Call pm register only once
Joshua Primero [Tue, 17 Jul 2012 00:09:42 +0000]
ARM: tegra: thermal: Call pm register only once

Fixed bug where pm register was being called multiple times.

Change-Id: I32f7b10547275e0a9bdad1073f9842589180c0f8
Signed-off-by: Joshua Primero <jprimero@nvidia.com>
Reviewed-on: http://git-master/r/116203
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>

6 years agoarm: tegra: pcie: Enable cardhu a02+ Dock detect GPIO
Jay Agarwal [Fri, 13 Jul 2012 12:50:18 +0000]
arm: tegra: pcie: Enable cardhu a02+ Dock detect GPIO

Set E_INPUT and PUPD bit of GPIO_PU4 used for dock
detect event for cardhu a02+ board versions and
hence enable pcie hotplug for them.

Bug 955043
Bug 1009086
Bug 1016722

Change-Id: Ibb66e5bc6fd9cf5333a81988b975b611fe9c5312
Signed-off-by: Jay Agarwal <jagarwal@nvidia.com>
Reviewed-on: http://git-master/r/115692
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Thota <kthota@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

6 years agonet: wireless: bcmdhd: disable WLC_E_TXFAIL event.
Narayan Reddy [Fri, 13 Jul 2012 09:09:54 +0000]
net: wireless: bcmdhd: disable WLC_E_TXFAIL event.

In suspend mode WLC_E_TXFAIL event is causing autowake
when the device is connected to an AP, so discarding the
WLC_E_TXFAIL event initialization as per BRCM team suggestion.

Bug 1014610

Change-Id: I297dab7ee589f458bba3e26be090665a36c78502
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: http://git-master/r/115633
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Rakesh Goyal <rgoyal@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agonet: usb: raw-ip: support more rmnet interfaces
Vinayak Pane [Fri, 29 Jun 2012 23:31:15 +0000]
net: usb: raw-ip: support more rmnet interfaces

New requirement to support upto 5 rmnet interfaces with
raw-ip. Driver will be able to support dynamically multiple
number of interfaces, maximum to 5.

Bug 1006183

Signed-off-by: Vinayak Pane <vpane@nvidia.com>
Reviewed-on: http://git-master/r/112790
(cherry picked from commit 0dde53830d9e21004b2e90c1b997a54c89767fa1)

Change-Id: I8166c448dbfef0391491ffdef9dff2b0e2693d75
Reviewed-on: http://git-master/r/115611
Tested-by: Vinayak Pane <vpane@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Steve Lin <stlin@nvidia.com>

6 years agoarm: tegra: xmm: flashed modem start with hsic_active low
Vinayak Pane [Fri, 29 Jun 2012 20:08:36 +0000]
arm: tegra: xmm: flashed modem start with hsic_active low

Flashed modem should start with hsic_active signal as low.
The hsic register is done at falling edge of ap_wake.

Bug 1006183

Signed-off-by: Vinayak Pane <vpane@nvidia.com>
Reviewed-on: http://git-master/r/112781
(cherry picked from commit 6437d1453d2a7694c2efa183cff135297f9f45e3)

Change-Id: I7bf355088096788b030fd861ef257a9f635c66e7
Reviewed-on: http://git-master/r/115610
Tested-by: Vinayak Pane <vpane@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Steve Lin <stlin@nvidia.com>

6 years agousb: serial: baseband: buffer allocations at init
Vinayak Pane [Wed, 21 Mar 2012 22:06:43 +0000]
usb: serial: baseband: buffer allocations at init

The usb transaction buffers are allocated in module init.
In device open, close and disconnect the buffers will not be
freed. Instead they will be reused to avoid allocation failure
in low-mem conditions.

The usb driver register moved to init so that rmmod and
insmod is not required.

Bug 956211

Signed-off-by: Vinayak Pane <vpane@nvidia.com>
Reviewed-on: http://git-master/r/109935
(cherry picked from commit a4e8219a86f80fd06aaaae2c40a657098d5dcfa5)

Change-Id: Id88cfe3b0a75cb2e6f39176b5297f81f4f9e978b
Reviewed-on: http://git-master/r/115609
Tested-by: Vinayak Pane <vpane@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Steve Lin <stlin@nvidia.com>

6 years agoARM: tegra: clock: Add missed Tegra3 PERIPH_ON_APB attributes
Alex Frid [Sun, 15 Jul 2012 00:08:01 +0000]
ARM: tegra: clock: Add missed Tegra3 PERIPH_ON_APB attributes

Change-Id: I12be16dbc2614224ba852216a645d0f84c795334
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/115929
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Scott Peterson <speterson@nvidia.com>

6 years agoarm: tegra: cpu: changing cpu min. freq to 51MHz
Prem Sasidharan [Tue, 10 Jul 2012 01:30:58 +0000]
arm: tegra: cpu: changing cpu min. freq to 51MHz

Changing the CPU min. frequency to 51MHz. This helps
in bringing down the core power to 46mW.

Bug 1005275

Change-Id: I61daa59866be7baf8ebb741000904422cb095e85
Signed-off-by: Prem Sasidharan <psasidharan@nvidia.com>
(cherry picked from commit afbb34d5871b69df328d5aae37f69f25a8946514)
Reviewed-on: http://git-master/r/115452
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Wen Yi <wyi@nvidia.com>
Tested-by: Wen Yi <wyi@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agocpufreq: protect cpufreq_stats_free_table with spinlock
Peter Boonstoppel [Fri, 2 Mar 2012 00:04:27 +0000]
cpufreq: protect cpufreq_stats_free_table with spinlock

Prevents crash on cpufreq_stat_notifier_trans when cpufreq_stats_table
has been freed due to a core being hotplugged out.

Bug 948348

Change-Id: I2640a9a23c9a79cad8c76bfefd243a07162d2004
Signed-off-by: Peter Boonstoppel <pboonstoppel@nvidia.com>
(cherry picked from commit 03070a4b0b8eb74825c99c6bbfb108ddb36a041c)
Reviewed-on: http://git-master/r/114248
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

6 years agoarm: config: tegra3 Enable XHCI driver for USB3
Jay Agarwal [Fri, 6 Jul 2012 09:12:03 +0000]
arm: config: tegra3 Enable XHCI driver for USB3

1. Enable USB3 for both android and L4T
2. Enable R8169 for android, already enabled for L4T

Bug 956573

Change-Id: If8d7cf653a5cd2b02352ad07fee3a56c3f568d3a
Signed-off-by: Jay Agarwal <jagarwal@nvidia.com>
Reviewed-on: http://git-master/r/113856
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Thota <kthota@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agoARM: tegra: dvfs: Update Tegra3 sdmmc dvfs tables
Alex Frid [Fri, 8 Jun 2012 21:43:35 +0000]
ARM: tegra: dvfs: Update Tegra3 sdmmc dvfs tables

Added Tegra3 sdmmc4 dvfs table and downgraded sdmmc 2/4 maximum
clock limits based on recent characterization results.

Bug 817679
Bug 841336

Change-Id: I88ddeaabf0739efc0f9c18c41cace331792d4d43
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/107780
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Tested-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

6 years agoARM: tegra: p1852: Dual-display support for all SKUs
Dongfang Shi [Thu, 3 May 2012 23:40:49 +0000]
ARM: tegra: p1852: Dual-display support for all SKUs

Ported Peter's original change 86413 to main.

board-p1852-panel.c:
Add support for primary and secondary LVDS displays, and secondary HDMI display.

board-p1852-pinmux.c:
Add configuration for HDMI and LVDS

board-p1852.c:
board-p1852.h:
Support for determining which p1852 sku is in use

hdmi.c:If no edid retrieved, but there's a hardwired mode, enable it
(used to support HDMI->LVDS output on p1852 sku 2)

devices.c:added secondary display data.

Bug 977859
Bug 994011

Change-Id: Ide8fb6bf7dd873b1d50269fb98d7c1687e4d9073
Signed-off-by: Dongfang Shi <dshi@nvidia.com>
Reviewed-on: http://git-master/r/100438
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agopower: max17048: fix power polling at resume
Chandler Zhang [Fri, 13 Jul 2012 09:01:38 +0000]
power: max17048: fix power polling at resume

The state of charing is not correct because of the 1 sec delay.
Remove the delay to fix the issue.

Bug 1016683

Change-Id: I389970e32d34578bb1ec1f2019d78145f250a673
Signed-off-by: Chandler Zhang <chazhang@nvidia.com>
Reviewed-on: http://git-master/r/115632
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agoarm: tegra: usb_phy: fix hsic suspend issue on xmm
Vinayak Pane [Tue, 12 Jun 2012 01:08:14 +0000]
arm: tegra: usb_phy: fix hsic suspend issue on xmm

XMM modem fails at auto-suspend on hsic. Fixing this issue
by enabling PMC sleepwalk code conditionally and only at
phy-on and phy-off routines.

Bug 991709

Signed-off-by: Vinayak Pane <vpane@nvidia.com>
Reviewed-on: http://git-master/r/109324
(cherry picked from commit 100f818a16ce97411a98ddb0e2c5c9e73a9e654a)

Change-Id: If6f92b8b36f856fa633cb411ac20dbe6e862890c
Reviewed-on: http://git-master/r/115612
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agoARM: tegra: usb: correct fuse.h include path
Rakesh Bodla [Fri, 6 Jul 2012 12:01:58 +0000]
ARM: tegra: usb: correct fuse.h include path

Correct the fuse.h include path.

Reviewed-on: http://git-master/r/113895
(cherry picked from commit e0a6bea533c7f56ebd7c75e4bc0ec5b55ee9664e)
Change-Id: Ib6cf4f86ba3420d20bcd5e64da4c15ef38759938
Reviewed-on: http://git-master/r/115373
Reviewed-by: Rakesh Bodla <rbodla@nvidia.com>
Tested-by: Rakesh Bodla <rbodla@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

6 years agohwmon: tegra: tsensor:Simplify counter calculation
Daniel Fu [Thu, 12 Jul 2012 09:30:10 +0000]
hwmon: tegra: tsensor:Simplify counter calculation

Simplify the temp to counter conversion in tsensor,
Also it can improve a little bit accuracy of temp to
counter conversion.

Change-Id: I5764334d5d94e317dd9400bc03cb5d7a64096ee0
Signed-off-by: Daniel Fu <danifu@nvidia.com>
Reviewed-on: http://git-master/r/115340
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>

6 years agoarm: tegra: sd: enable sd dpd
Wen Yi [Thu, 21 Jun 2012 04:42:13 +0000]
arm: tegra: sd: enable sd dpd

This is a WAR solution that allows for the turning on
SD DPD feature.

The original issue is that enabling SD DPD immediately after device comes
out of LP0 causes ULPI disconnect. The root cause of that is
not known.

The WAR is to delay the enabling of SD DPD for 100ms after
device comes out of LP0.

Bug 929628

Change-Id: I3c5e35ace422e5441535c2c0fe18545b53bbddc4
Signed-off-by: Wen Yi <wyi@nvidia.com>
(cherry picked from commit bffb7b917d52a3523af80db21322ec7ba5fd33f9)
Reviewed-on: http://git-master/r/113392
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agosdhci: tegra: enable sd dpd
Bitan Biswas [Mon, 25 Jun 2012 14:34:54 +0000]
sdhci: tegra: enable sd dpd

This is a WAR solution that allows for the turning on
SD DPD feature.

The original issue is that enabling SD DPD immediately after device comes
out of LP0 causes ULPI disconnect. The root cause of that is
not known.

The WAR is to delay the enabling of SD DPD for 100ms after
device comes out of LP0.

Bug 929628

Change-Id: I946771a8e92459464ce571295f96f197db25c061
Signed-off-by: Bitan Biswas <bbiswas@nvidia.com>
(cherry picked from commit beba2b34af7ff9313aed074342b9bb86b12620a8)
Reviewed-on: http://git-master/r/113391
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Wen Yi <wyi@nvidia.com>
Tested-by: Wen Yi <wyi@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agoRevert "arm: tegra: power: disable all sd dpd"
Bitan Biswas [Tue, 24 Jan 2012 07:52:23 +0000]
Revert "arm: tegra: power: disable all sd dpd"

This reverts commit 8924926cdb77c6ab270867d4caef7a8cdacd11f2.

Bug 924452
Bug 929628

Signed-off-by: Bitan Biswas <bbiswas@nvidia.com>
(cherry picked from commit 142b34993404c853579864f7b7b4f320fb92a715)

Change-Id: I9d49703799e32d410beba18938e94e4b641eea6f
(cherry picked from commit 8de60b7a832bfbbf09e75def756379dbb2d14c3e)
Reviewed-on: http://git-master/r/113387
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Wen Yi <wyi@nvidia.com>
Tested-by: Wen Yi <wyi@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agoarm: tegra: usb_phy: utmip remote wakeup issue
Venu Byravarasu [Fri, 29 Jun 2012 06:28:51 +0000]
arm: tegra: usb_phy: utmip remote wakeup issue

Do not clear sleep walk pointer for utmip port after remote
wakeup is detected. This should be cleared after control
is given to USB master from PMC.

Bug 999208

Change-Id: I9f498521989c6421f0043dc1b4364591d4907423
Signed-off-by: Venu Byravarasu <vbyravarasu@nvidia.com>
(cherry picked from commit e4dbecfe031cbacd4f22bbbcdf971ab11ad81ee8)
Reviewed-on: http://git-master/r/112938
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agoARM: tegra: iovmm: Fix build error w/o CONFIG_IOVMM
Hiroshi DOYU [Thu, 12 Jul 2012 12:11:20 +0000]
ARM: tegra: iovmm: Fix build error w/o CONFIG_IOVMM

Update function prototype along with:

  commit 6cbf4c7465b7b70936cb422b509da0ad0829c306
  ARM: tegra: iovmm: Allow alloc_client to take struct device

Change-Id: I11d173429413ab268f6ab789d90f321e3d33de2c
Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/115391
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

6 years agoARM: tegra: iovmm: Make IOMMU/IOVMM selectable in Kconfig
Hiroshi DOYU [Wed, 11 Jul 2012 13:51:24 +0000]
ARM: tegra: iovmm: Make IOMMU/IOVMM selectable in Kconfig

This patch enables to replace iovmm*.ko family with
tegra-{smmu,gart}.ko if needed in kernel config. To use IOMMU as
backend engine, Enable TEGRA_IOMMU_{GART,SMMU} under IOMMU in config,
and automatically disable IOVMM.

IOVMM is equivalent to IOMMU_API. TEGRA_IOVMM_GART is equivalent to
TEGRA_IOMMU_GART. TEGRA_IOVMM_SMMU is equivalent to TEGRA_IOMMU_SMMU.

Change-Id: I73408e927eb3f21e1db4e73700aaf415f4949166
Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/115011
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

6 years agoARM: tegra: iovmm: Replace IOVMM backend with IOMMU
Hiroshi DOYU [Tue, 10 Jul 2012 06:32:42 +0000]
ARM: tegra: iovmm: Replace IOVMM backend with IOMMU

Replace IOVMM backend functions with the standard IOMMU API
ones. Instead of modifying the actual C-files in drivers, MACROs in
iovmm.h does the all work.

Change-Id: I27dc893555ca1495588852261e3ba1e3e5619764
Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/114460
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

6 years agovideo: tegra: nvmap: Make IOMMU/IOVMM selectable in Kconfig
Hiroshi DOYU [Tue, 21 Feb 2012 14:47:08 +0000]
video: tegra: nvmap: Make IOMMU/IOVMM selectable in Kconfig

This patch allows nvmap to use the standard IOMMU API as its backend
engine instead of the legacy tegra IOVMM by Kconfig.

Enable TEGRA_IOMMU_{GART,SMMU} under IOMMU in config, and it
automatically disables IOVMM, instead.

Change-Id: I71112ef8072591aac4a93075623ca31c8851a960
Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/114217
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

6 years agovideo: tegra: fix compilation warning
Rhyland Klein [Thu, 12 Jul 2012 16:51:54 +0000]
video: tegra: fix compilation warning

Without the CONFIG_SWITCH enabled, there are multiple unused
variable warnings that get treated as error.

bug 949219

Signed-off-by: Rhyland Klein <rklein@nvidia.com>
Change-Id: I39512367fa4bbd3b00a435d0d7a31cfede9e712f
Reviewed-on: http://git-master/r/115428
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Sanjay Singh Rawat <srawat@nvidia.com>

6 years agoARM: tegra: clock: Dynamically re-lock memory pll
Alex Frid [Sun, 24 Jun 2012 01:22:13 +0000]
ARM: tegra: clock: Dynamically re-lock memory pll

So far Tegra3 EMC DFS allowed only scaling rates that can be divided
down from two fixed rate plls: memory PLLM, and peripheral PLLP. PLLM
is always running at maximum SDRAM rate set at boot time, while PLLP
rate 408MHz is fixed across all Tegra3 platforms.

This commit implements dynamic re-locking of PLLM at run time. Now
memory pll can lock either at boot rate or additional auxiliary rate
that is selected as follows: auxiliary PLLM rate must be present in
EMC DFS table, it must exactly match one of the rate steps for Tegra3
graphics bus with PLLC clock source (cbus), and must not be a proper
factor of boot PLLM rate or PLLP fixed rate.

When switching PLLM between boot and auxiliary rate, PLLC is used as
backup memory pll, and during this time cbus is locked at auxiliary
rate. In addition system bus is forced to temporarily use PLLP as
a clock source (this is necessary as sbus main clock source is PLLM
secondary divider PLLM_OUT1).

Limitations:
- only one auxiliary rate is supported, and it should be below PLLM
boot rate, but above half of boot rate
- dynamic re-lock is allowed only on LPDDR2 platforms
- no clock other than EMC and system bus could use PLLM as a source;
so for dynamic re-lock to work CONFIG_TEGRA_PLLM_RESTRICTED must be
selected, and VI clock (not covered by PLLM restricted configuration)
must be moved to PLLP.

Bug 1005576

Change-Id: I6177107c89c3cbe975a1d940927efa1ed0ea61ec
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/111438
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
(cherry picked from commit dc4d468a6acabfb268e7a7f44b45bb7354e9a99a)
Reviewed-on: http://git-master/r/114760
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jihoon Bang <jbang@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

6 years agoARM: tegra: clock: Increase boost_up_threshold for AVP clock
Vandana Salve [Tue, 10 Jul 2012 15:33:24 +0000]
ARM: tegra: clock: Increase boost_up_threshold for AVP clock

Increase the boost_up_threshold to 85 for ULP audio

bug 1009849

Change-Id: I4b1b746f445f5c2804befa52ae95c69b6b467083
Signed-off-by: Vandana Salve <vsalve@nvidia.com>
Reviewed-on: http://git-master/r/114620
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>

6 years agoARM: tegra: cardhu: add mem 437MHz table for Samsung K4P8G304EB
Jihoon Bang [Wed, 11 Jul 2012 18:06:40 +0000]
ARM: tegra: cardhu: add mem 437MHz table for Samsung K4P8G304EB

Bug 1005576

Signed-off-by: Peter Zu <pzu@nvidia.com>
Reviewed-on: http://git-master/r/112036
(cherry picked from commit 1f1e6d22e771336fb9e0b91bbabf12fa89f0c57c)

Change-Id: If65aba6aaa0a400c960a2d2b1315a07fa44dcefe
Reviewed-on: http://git-master/r/115054
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agoARM: tegra: change include to proper notation
Rhyland Klein [Tue, 10 Jul 2012 14:59:49 +0000]
ARM: tegra: change include to proper notation

In this case we want to include a file in the same directory. We
should be using "" with include instead of <>. This fixes a an
issue using the chromeos toolchain (4.6.3+) where fuse.h is not
found while compiling usb_phy.c.

Signed-off-by: Rhyland Klein <rklein@nvidia.com>
Change-Id: I0c6bdf6768cd89740ed0444b2b46289057dfad6a
Reviewed-on: http://git-master/r/114608
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

6 years agocpufreq: Protected access of policy attribute
Puneet Saxena [Thu, 7 Jun 2012 13:49:59 +0000]
cpufreq: Protected access of policy attribute

It takes read RW semaphore to access policy governor

bug 997731

Change-Id: Ibdc3dd54cf6076c0fef4bc58f144e4bcb4631d76
Signed-off-by: Puneet Saxena <puneets@nvidia.com>
Reviewed-on: http://git-master/r/107079
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sang-Hun Lee <sanlee@nvidia.com>
Reviewed-by: Peter Boonstoppel <pboonstoppel@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agovideo: tegra: dc: fix build error in print_mode
Jon Mayo [Thu, 12 Jul 2012 20:29:07 +0000]
video: tegra: dc: fix build error in print_mode

Use the right number of parameters for tegra_dc_calc_fresh() when called from
print_mode(). This code is only used for debug.

Change-Id: I4d0bb8b1700f670644057039fe8d0bc315b27c1d
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/115485
Reviewed-by: Automatic_Commit_Validation_User

6 years agobluesleep: stop/start based on HCI_DEV_REG/HCI_DEV_UNREG events
Nagarjuna Kristam [Wed, 11 Jul 2012 11:19:24 +0000]
bluesleep: stop/start based on HCI_DEV_REG/HCI_DEV_UNREG events

when BT is turned off HCI_DEV_DOWN event is received and bluesleep
protocol is stopped. On bluesleep stop, EXT_WAKE gpio will be set to
default high level. This condition does not allow BT chip to enter
low power mode. So, start and stop bluesleep based on HCI_DEV_REG
and HCI_DEV_UNREG events instead of HCI_DEV_UP and HCI_DEV_DOWN.

Also, enable and disable host wake functionality based on HCI_DEV_UP and
HCI_DEV_DOWN events, as these events indicate BT turn ON and OFF

Bug 1014590

Change-Id: I3929c1328ac024eb080359283107dabf3712e9ea
Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-on: http://git-master/r/114984
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Rakesh Kumar <krakesh@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agoARM: tegra: clock: Allow Tegra3 PLLM rate change
Alex Frid [Sun, 24 Jun 2012 06:50:54 +0000]
ARM: tegra: clock: Allow Tegra3 PLLM rate change

Allowed Tegra3 memory PLLM rate change, provided it is disabled.

Since PLLM can deviate from boot configuration now, and on Tegra3 it
is controlled by PMC override registers (not CAR module registers):

- Re-factored PLLM initialization, resume, and set rate operations
accordingly (enable and disable ops already used PMC override).

- Made sure that boot configuration is restored on entry to LP0 to
match memory timing saved in scratch registers.

Bug 1005576

Change-Id: Iac6297455bec709a8e12d71deccab62c18905ea7
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/110937
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
(cherry picked from commit b53f88c68543a2b0ddb4545bb3b389b42eeb95d8)
Reviewed-on: http://git-master/r/114759
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jihoon Bang <jbang@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

6 years agoARM: tegra: clock: Record EMC clock source rate
Alex Frid [Fri, 22 Jun 2012 21:13:41 +0000]
ARM: tegra: clock: Record EMC clock source rate

On Tegra3 added source rate to EMC clock source selection structure,
and re-factored EMC DVFS initialization accordingly.

Bug 1005576

Change-Id: I155e982bef2431a76cf5e5085070d4e654a7b49b
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/110935
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
(cherry picked from commit bf52c26c532a9ebabc4fc8a1fb5fc9d88be85e66)
Reviewed-on: http://git-master/r/114758
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jihoon Bang <jbang@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

6 years agoARM: tegra: clock: Record shared bus backup rate
Alex Frid [Fri, 22 Jun 2012 19:31:44 +0000]
ARM: tegra: clock: Record shared bus backup rate

Added shared bus backup rate entry to clock descriptor; initialized
it for cbus (currently the only shared bus with backup source).

Bug 1005576

Change-Id: I8124aa87f1dc307e42417da8f78797cfaf71e5dc
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/110934
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
(cherry picked from commit bc5ed688929c3c0ca920b5e9663cf9c6fb85c00f)
Reviewed-on: http://git-master/r/114757
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jihoon Bang <jbang@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

6 years agotegra: dc: Make data output along with pixel clock.
Roger Hsieh [Tue, 3 Jul 2012 07:13:31 +0000]
tegra: dc: Make data output along with pixel clock.

After making pclk output ahead of LVDS_SHDN# , data output is later than
panel ready then caused partial black screen. Force triggered data output to
get it fixed.

Bug 972377
Bug 976081
Bug 1001434

Change-Id: Icd455d7439f622e46295158a5435286c521526aa
Signed-off-by: Roger Hsieh <rhsieh@nvidia.com>
Reviewed-on: http://git-master/r/113164
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

6 years agoARM: tegra: clock: Adjust Tegra3 cpu to emc ratio
Alex Frid [Thu, 7 Jun 2012 05:18:38 +0000]
ARM: tegra: clock: Adjust Tegra3 cpu to emc ratio

On Tegra3 changed cpu rate threshold for maximum emc rate request from
750MHz to 925MHz. Adjusted cpu frequency table to provide entries close
to the new threshold for all Tegra3 skus.

Bug 998044
Bug 1003521

Signed-off-by: Alex Frid <afrid@nvidia.com>

Change-Id: I6e6df1958db9d55ad64cf35a5e9fe6ec74b8d4ea
Reviewed-on: http://git-master/r/106946
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

6 years agohwmon: tegra: tsensor: improve counter accuracy
Daniel Fu [Wed, 11 Jul 2012 07:11:56 +0000]
hwmon: tegra: tsensor: improve counter accuracy

When set threshold of tsensor,convert the temp to counter.
The counter convert from temp is with ~1.8C average error.
Improved the accuracy, make it to be ~0.1C.

Bug 1015288

Change-Id: Icab03b559eaeb8846dd1191869afe39c9965f934
Signed-off-by: Daniel Fu <danifu@nvidia.com>
Reviewed-on: http://git-master/r/114904
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>

6 years agoarm: tegra: kai: fix time does not increase in lp0
Chandler Zhang [Wed, 11 Jul 2012 05:57:43 +0000]
arm: tegra: kai: fix time does not increase in lp0

time does not increase in LP0 because GPIO4 is configured as POR.
Change to active_low and pull push to fix the issue.

Bug 1014548

Change-Id: I13c65ac6a4f3ae9158c58922e1ad6982f24bb103
Signed-off-by: Chandler Zhang <chazhang@nvidia.com>
Reviewed-on: http://git-master/r/114866
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-by: Jinyoung Park <jinyoungp@nvidia.com>

6 years agovideo: tegra: dc: consider bandwidth efficiency for tegra2
Bharat Nihalani [Tue, 26 Jun 2012 12:36:42 +0000]
video: tegra: dc: consider bandwidth efficiency for tegra2

This is similar to commit a62be5b5595ad86411ced81bceeb3d6a693426d2
pushed for rel-14 branch.

Bug 1004341

Signed-off-by: Bharat Nihalani <bnihalani@nvidia.com>

Reviewed-on: http://git-master/r/111227
(cherry-picked from fbfce3106da8dad18948103c812bdd9d45ffdd06)

Change-Id: Ib459094fd6499b3cc63bc534bf36e57dc98ce62b
Reviewed-on: http://git-master/r/114584
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

6 years agoasoc: codecs: max98088: Headset Detection
Nikesh Oswal [Fri, 29 Jun 2012 10:56:33 +0000]
asoc: codecs: max98088: Headset Detection

Add code for headset detection according to that
state transitions mentioned for JKSNS field in the
max98088 codec datasheet

Bug: 110529
Bug: 1008246

Signed-off-by: Nikesh Oswal <noswal@nvidia.com>
Reviewed-on: http://git-master/r/112127
(cherry picked from commit 12a2259e0e9cf7da4bf64bad2a97c32cec41477c)

Change-Id: I7d45b210dd02f181e71a08d9b3de7cff109dd88b
Reviewed-on: http://git-master/r/114445
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Nikesh Oswal <noswal@nvidia.com>
Reviewed-by: Scott Peterson <speterson@nvidia.com>

6 years agoasoc: tegra: Change HW disabling dequence and I2S clock parent
Nikesh Oswal [Fri, 22 Jun 2012 07:24:52 +0000]
asoc: tegra: Change HW disabling dequence and I2S clock parent

Change HW disabling dequence and I2S clock parent in slave mode
for voice call use-case

Bug: 1005176
Signed-off-by: Nikesh Oswal <noswal@nvidia.com>
Reviewed-on: http://git-master/r/110529
(cherry picked from commit 4b138cdeb3374575bde9f49d0c644faa91ced68f)

Change-Id: Ia037ed5ef45d38972c3e1e1a78b4b7b7f39d8f72
Reviewed-on: http://git-master/r/114444
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Nikesh Oswal <noswal@nvidia.com>
Reviewed-by: Scott Peterson <speterson@nvidia.com>

6 years agomedia: video: tegra: ar0832:Update Aptina settings
Amy Deng [Mon, 2 Jul 2012 23:09:20 +0000]
media: video: tegra: ar0832:Update Aptina settings

updated MT9E013 and AR0832 Recommended Settings

Bug 1009371

Change-Id: Ib1e4ce2f42ebc8d2080a47613cf7054a19198dda
Signed-off-by: Amy Deng <amyd@nvidia.com>
Reviewed-on: http://git-master/r/113092
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Yining Deng <ydeng@nvidia.com>
Reviewed-by: Frank Chen <frankc@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agomac80211 & nl80211: add support to abort a scan request on tx
Wei Ni [Tue, 22 Nov 2011 10:17:43 +0000]
mac80211 & nl80211: add support to abort a scan request on tx

This fix comes from:
https://gerrit.chromium.org/gerrit/#change,5744
https://gerrit.chromium.org/gerrit/#change,5745

So that it can work with the related wpa_supplicant tool.

BUG=895591

Change-Id: Ie81f6d6052bd45dab13c936f9f0c5f4eb277496a
Original-Signed-off-by: Wei Ni <wni@nvidia.com>
Signed-off-by: Rhyland Klein <rklein@nvidia.com>
Reviewed-on: http://git-master/r/111333
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agovideo: tegra: dc: support disp mode override via boot args
Nirav Patel [Tue, 22 May 2012 22:58:55 +0000]
video: tegra: dc: support disp mode override via boot args

Allows overidding the default disp mode without having to recompile
the kernel. Boot args can be specified in the following format:

disp_params=<rgb|hdmi|dsi>:pclk,h_active,v_active,h_ref_to_sync,
v_ref_to_sync,h_sync_width,v_sync_width,h_back_porch,v_back_porch,
h_front_porch,v_front_porch;<rgb|hdmi|dsi>:pclk,h_active,...

Bug 969088

Change-Id: Id0acf608de145493f6749d5b799d4bbb8162ba72
Signed-off-by: Nirav Patel <nipatel@nvidia.com>
Reviewed-on: http://git-master/r/104604
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

6 years agoARM: Tegra: cardhu: No longer invert backlight on PM313
Graziano Misuraca [Mon, 2 Apr 2012 19:56:35 +0000]
ARM: Tegra: cardhu: No longer invert backlight on PM313

Backlight value was inverted for panels with PM313.
This assumed the panel was the 15", but because the
10.1" (AUO) is more prevalent and doesn't have the
inverted backlight signal we no longer need to
invert it. Note this will fix the backlight issue
for AUO E1198 boards but break it for 15".

Bug 962636
Reviewed-on: http://git-master/r/#change,93965
Signed-off-by: Graziano Misuraca <gmisuraca@nvidia.com>
Change-Id: Icb65592eb2df21e349e5a759a780e4438a0f5b26
Reviewed-on: http://git-master/r/95728
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

6 years agoarm: tegra: pm269: 12.75mhz emc rate
Wen Yi [Thu, 28 Jun 2012 20:24:40 +0000]
arm: tegra: pm269: 12.75mhz emc rate

Add 12.75mhz emc frequency for Samsung K4P8G304EB-FGC2
LPDDR2 1GB memory chip.

Bug 1011100

Change-Id: Ibbbb3f002c36c31cd2806051803ddd3ba9daa63b
Signed-off-by: Wen Yi <wyi@nvidia.com>
(cherry picked from commit a37cb14dc441005ddd977b6a83f41df817179d79)
Reviewed-on: http://git-master/r/113383
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
GVS: Gerrit_Virtual_Submit

6 years agovideo: tegra: treat compilation warning as error
Sanjay Singh Rawat [Tue, 10 Jul 2012 16:07:35 +0000]
video: tegra: treat compilation warning as error

- Adding flag to treat warning as error.
- Handled warning of unused function.

bug 949219

Change-Id: Ic6edfc28bae95b8395cbd51e80f14aa4aa663f61
Signed-off-by: Sanjay Singh Rawat <srawat@nvidia.com>
Reviewed-on: http://git-master/r/114624
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agonet: wireless: WFD specific changes
Jun (Gab-Joo) Lim [Tue, 26 Jun 2012 03:29:57 +0000]
net: wireless: WFD specific changes

WFD specific changes integrated from broadcom patch

Bug 1001418
Bug 997838

Change-Id: I0632307bf5fb959def4ee12687430a14ab9e068e
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: http://git-master/r/111032
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-by: Rakesh Kumar <krakesh@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agomedia: video: tegra: sh532u: Focuser range tuning support
Naren Bhat [Thu, 21 Jun 2012 23:48:51 +0000]
media: video: tegra: sh532u: Focuser range tuning support

Support for get/set capabilities added. Focuser code has a way to
calibrate itself that results in determination of optimal working
range. This along with actual range from device ROM are returned
to the caller. Focuser has the macro at lower end and infinity at
farther end of the range, which are reversed to the user level to
keep the inf/macro positions to be consistent. Focuser range
translation is taken out.

Bug 1004816

Change-Id: I1a086ff10e99940f9ad861397bf7e71e9996c68a
Signed-off-by: Naren Bhat <nbhat@nvidia.com>
Reviewed-on: http://git-master/r/110443
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Charlie Huang <chahuang@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-by: Patrick Shehane <pshehane@nvidia.com>
Tested-by: Charlie Huang <chahuang@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agoarm: tegra: cardhu: move VI to PLL_P
Jihoon Bang [Fri, 29 Jun 2012 20:54:34 +0000]
arm: tegra: cardhu: move VI to PLL_P

As a part of effort to bring in 437MHz clock frequency in EMC,
We need to move VI from PLL_M to PLL_P.

Bug 1005576

Signed-off-by: Jihoon Bang <jbang@nvidia.com>
Reviewed-on: http://git-master/r/112704
(cherry picked from commit c175857e80355857b55e8eb2012c12e94e532835)

Change-Id: Icd314c01625f5c4765b0215735ceafb7d3f25d1e
Reviewed-on: http://git-master/r/114241
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

6 years agovideo: tegra: nvmap: Introduce IOMMU backend instead of IOVMM
Hiroshi DOYU [Wed, 22 Feb 2012 12:34:08 +0000]
video: tegra: nvmap: Introduce IOMMU backend instead of IOVMM

Introduce IOMMU backend functions which use DMA API familiy
internally. Replace tegra_iovmm_*() API with arm_iommu_*iova*() and
dma_(un)map_page_(at)().

Change-Id: I0b014926ffedc12bf8f868b163982c6082d050b6
Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/114216
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

6 years agoARM: tegra: iovmm: Allow alloc_client to take struct device
Hiroshi DOYU [Mon, 9 Jul 2012 08:24:57 +0000]
ARM: tegra: iovmm: Allow alloc_client to take struct device

Allow tegra_iovmm_alloc_client() to take struct device * instead of
const char *name w/ __tegra_iovmm_alloc_client(). This is necessary to
support IOVMM and IOMMU simultaneously.

Change-Id: I18df5001bfe0ece8f9f15b636eb11def9f228dfb
Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/114215
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

6 years agoiommu/tegra: smmu: move tegra_smmu_init in core_init
Hiroshi DOYU [Tue, 28 Feb 2012 11:53:11 +0000]
iommu/tegra: smmu: move tegra_smmu_init in core_init

Move tegra_smmu_init in core_init. IOMMU should be available at early
stage of system booting.

Change-Id: I8675e62acef44fb585a731c0f24be716b76ca41a
Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/114214
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

6 years agoiommu/tegra: smmu: Enable all SWGRP by default
Hiroshi DOYU [Tue, 28 Feb 2012 13:33:17 +0000]
iommu/tegra: smmu: Enable all SWGRP by default

Revisited later with new conf passed from DT.

Change-Id: Ic94a698b0ee56603bbb7f2204ae8c5412ea133b1
Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/114213
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

6 years agoARM: tegra: iomap: Introduce TEGRA_IOMMU_{BASE,SIZE} for SMMU/GART
Vandana Salve [Tue, 13 Mar 2012 08:41:41 +0000]
ARM: tegra: iomap: Introduce TEGRA_IOMMU_{BASE,SIZE} for SMMU/GART

Replace TEGRA_{SMMU,GART}_{BASE,SIZE} with TEGRA_IOMMU_{BASE,SIZE} to
deal with SMMU/GART in unified manner.

This is necessary for DMA mapping API to pass the appropriate IOMMU
address for SMMU and GART in the same code in nvmap.

[Hiroshi Doyu: Squash nvmap parts into "nvmap: API conversion" patch.]

Change-Id: I75429dd56554f880f144c375d2c20e8e8948ceee
Signed-off-by: Vandana Salve <vsalve@nvidia.com>
Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/114212
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

6 years agoarm: tegra: p1852: Add IOMMU_SMMU support
Hiroshi DOYU [Fri, 6 Jul 2012 07:24:56 +0000]
arm: tegra: p1852: Add IOMMU_SMMU support

Migrating from IOVMM_SMMU to IOMMU_SMMU.

Change-Id: If5bca4a3bce15d59641f11dfea3ad6da2a8efbf5
Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/114211
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>